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2011-01-08 Michael Snyder <msnyder@vmware.com>
[thirdparty/binutils-gdb.git] / gdb / mn10300-linux-tdep.c
CommitLineData
611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1 2
7b6bb8da 3 Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
9b254dd1 4 Free Software Foundation, Inc.
611889b1
KB		 5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
611889b1
KB		 11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
611889b1
KB		 20
21#include "defs.h"
22#include "gdbcore.h"
23#include "gdb_string.h"
24#include "regcache.h"
25#include "mn10300-tdep.h"
26#include "gdb_assert.h"
27#include "bfd.h"
28#include "elf-bfd.h"
29#include "osabi.h"
30#include "regset.h"
696cc4a6 31#include "solib-svr4.h"
f9ec92b6
KB		 32#include "frame.h"
33#include "trad-frame.h"
34#include "tramp-frame.h"
a5ee0f0c 35#include "linux-tdep.h"
611889b1
KB		 36
37#include <stdlib.h>
38
39/* Transliterated from <asm-mn10300/elf.h>... */
40#define MN10300_ELF_NGREG 28
41#define MN10300_ELF_NFPREG 32
42
43typedef gdb_byte mn10300_elf_greg_t[4];
44typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
45
46typedef gdb_byte mn10300_elf_fpreg_t[4];
47typedef struct
48{
49 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
50 gdb_byte fpcr[4];
51} mn10300_elf_fpregset_t;
52
53/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
54#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
55#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
56#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
57#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
58#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
59#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
60#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
61#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
65#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
66#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
67#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
68#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
69#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
70#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
71#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
72#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
73#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
74#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
75#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
76#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
77#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
78#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
79#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
80#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
81
82/* New gdbarch API for corefile registers.
83 Given a section name and size, create a struct reg object
84 with a supply_register and a collect_register method. */
85
025bb325 86/* Copy register value of REGNUM from regset to regcache.
611889b1
KB		 87 If REGNUM is -1, do this for all gp registers in regset. */
88
89static void
90am33_supply_gregset_method (const struct regset *regset,
91 struct regcache *regcache,
92 int regnum, const void *gregs, size_t len)
93{
94 char zerobuf[MAX_REGISTER_SIZE];
95 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
96 int i;
97
98 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
99
100 switch (regnum) {
101 case E_D0_REGNUM:
102 regcache_raw_supply (regcache, E_D0_REGNUM,
103 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
104 break;
105 case E_D1_REGNUM:
106 regcache_raw_supply (regcache, E_D1_REGNUM,
107 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
108 break;
109 case E_D2_REGNUM:
110 regcache_raw_supply (regcache, E_D2_REGNUM,
111 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
112 break;
113 case E_D3_REGNUM:
114 regcache_raw_supply (regcache, E_D3_REGNUM,
115 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
116 break;
117 case E_A0_REGNUM:
118 regcache_raw_supply (regcache, E_A0_REGNUM,
119 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
120 break;
121 case E_A1_REGNUM:
122 regcache_raw_supply (regcache, E_A1_REGNUM,
123 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
124 break;
125 case E_A2_REGNUM:
126 regcache_raw_supply (regcache, E_A2_REGNUM,
127 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
128 break;
129 case E_A3_REGNUM:
130 regcache_raw_supply (regcache, E_A3_REGNUM,
131 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
132 break;
133 case E_SP_REGNUM:
134 regcache_raw_supply (regcache, E_SP_REGNUM,
135 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
136 break;
137 case E_PC_REGNUM:
138 regcache_raw_supply (regcache, E_PC_REGNUM,
139 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
140 break;
141 case E_MDR_REGNUM:
142 regcache_raw_supply (regcache, E_MDR_REGNUM,
143 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
144 break;
145 case E_PSW_REGNUM:
146 regcache_raw_supply (regcache, E_PSW_REGNUM,
147 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
148 break;
149 case E_LIR_REGNUM:
150 regcache_raw_supply (regcache, E_LIR_REGNUM,
151 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
152 break;
153 case E_LAR_REGNUM:
154 regcache_raw_supply (regcache, E_LAR_REGNUM,
155 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
156 break;
157 case E_MDRQ_REGNUM:
158 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
159 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
160 break;
161 case E_E0_REGNUM:
162 regcache_raw_supply (regcache, E_E0_REGNUM,
163 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
164 break;
165 case E_E1_REGNUM:
166 regcache_raw_supply (regcache, E_E1_REGNUM,
167 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
168 break;
169 case E_E2_REGNUM:
170 regcache_raw_supply (regcache, E_E2_REGNUM,
171 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
172 break;
173 case E_E3_REGNUM:
174 regcache_raw_supply (regcache, E_E3_REGNUM,
175 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
176 break;
177 case E_E4_REGNUM:
178 regcache_raw_supply (regcache, E_E4_REGNUM,
179 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
180 break;
181 case E_E5_REGNUM:
182 regcache_raw_supply (regcache, E_E5_REGNUM,
183 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
184 break;
185 case E_E6_REGNUM:
186 regcache_raw_supply (regcache, E_E6_REGNUM,
187 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
188 break;
189 case E_E7_REGNUM:
190 regcache_raw_supply (regcache, E_E7_REGNUM,
191 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
192 break;
193
194 /* ssp, msp, and usp are inaccessible. */
195 case E_E8_REGNUM:
196 memset (zerobuf, 0, MAX_REGISTER_SIZE);
197 regcache_raw_supply (regcache, E_E8_REGNUM, zerobuf);
198 break;
199 case E_E9_REGNUM:
200 memset (zerobuf, 0, MAX_REGISTER_SIZE);
201 regcache_raw_supply (regcache, E_E9_REGNUM, zerobuf);
202 break;
203 case E_E10_REGNUM:
204 memset (zerobuf, 0, MAX_REGISTER_SIZE);
205 regcache_raw_supply (regcache, E_E10_REGNUM, zerobuf);
206
207 break;
208 case E_MCRH_REGNUM:
209 regcache_raw_supply (regcache, E_MCRH_REGNUM,
210 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
211 break;
212 case E_MCRL_REGNUM:
213 regcache_raw_supply (regcache, E_MCRL_REGNUM,
214 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
215 break;
216 case E_MCVF_REGNUM:
217 regcache_raw_supply (regcache, E_MCVF_REGNUM,
218 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
219 break;
220 case E_FPCR_REGNUM:
221 /* FPCR is numbered among the GP regs, but handled as an FP reg.
222 Do nothing. */
223 break;
224 case E_FPCR_REGNUM + 1:
225 /* The two unused registers beyond fpcr are inaccessible. */
226 memset (zerobuf, 0, MAX_REGISTER_SIZE);
227 regcache_raw_supply (regcache, E_FPCR_REGNUM + 1, zerobuf);
228 break;
229 case E_FPCR_REGNUM + 2:
230 memset (zerobuf, 0, MAX_REGISTER_SIZE);
231 regcache_raw_supply (regcache, E_FPCR_REGNUM + 2, zerobuf);
232 break;
233 default: /* An error, obviously, but should we error out? */
234 break;
235 case -1:
236 for (i = 0; i < MN10300_ELF_NGREG; i++)
237 am33_supply_gregset_method (regset, regcache, i, gregs, len);
238 break;
239 }
240 return;
241}
242
025bb325
MS		 243/* Copy fp register value of REGNUM from regset to regcache.
244 If REGNUM is -1, do this for all fp registers in regset. */
611889b1
KB		 245
246static void
247am33_supply_fpregset_method (const struct regset *regset,
248 struct regcache *regcache,
249 int regnum, const void *fpregs, size_t len)
250{
251 const mn10300_elf_fpregset_t *fpregset = fpregs;
252
253 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
254
255 if (regnum == -1)
256 {
257 int i;
258
259 for (i = 0; i < MN10300_ELF_NFPREG; i++)
260 am33_supply_fpregset_method (regset, regcache,
261 E_FS0_REGNUM + i, fpregs, len);
262 am33_supply_fpregset_method (regset, regcache,
263 E_FPCR_REGNUM, fpregs, len);
264 }
265 else if (regnum == E_FPCR_REGNUM)
9c9acae0 266 regcache_raw_supply (regcache, E_FPCR_REGNUM,
611889b1 267 &fpregset->fpcr);
025bb325
MS		 268 else if (E_FS0_REGNUM <= regnum
269 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 270 regcache_raw_supply (regcache, regnum,
611889b1
KB		 271 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
272
273 return;
274}
275
276/* Copy register values from regcache to regset. */
277
278static void
279am33_collect_gregset_method (const struct regset *regset,
280 const struct regcache *regcache,
281 int regnum, void *gregs, size_t len)
282{
283 mn10300_elf_gregset_t *regp = gregs;
284 int i;
285
286 gdb_assert (len == sizeof (mn10300_elf_gregset_t));
287
288 switch (regnum) {
289 case E_D0_REGNUM:
290 regcache_raw_collect (regcache, E_D0_REGNUM,
291 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
292 break;
293 case E_D1_REGNUM:
294 regcache_raw_collect (regcache, E_D1_REGNUM,
295 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
296 break;
297 case E_D2_REGNUM:
298 regcache_raw_collect (regcache, E_D2_REGNUM,
299 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
300 break;
301 case E_D3_REGNUM:
302 regcache_raw_collect (regcache, E_D3_REGNUM,
303 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
304 break;
305 case E_A0_REGNUM:
306 regcache_raw_collect (regcache, E_A0_REGNUM,
307 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
308 break;
309 case E_A1_REGNUM:
310 regcache_raw_collect (regcache, E_A1_REGNUM,
311 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
312 break;
313 case E_A2_REGNUM:
314 regcache_raw_collect (regcache, E_A2_REGNUM,
315 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
316 break;
317 case E_A3_REGNUM:
318 regcache_raw_collect (regcache, E_A3_REGNUM,
319 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
320 break;
321 case E_SP_REGNUM:
322 regcache_raw_collect (regcache, E_SP_REGNUM,
323 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
324 break;
325 case E_PC_REGNUM:
326 regcache_raw_collect (regcache, E_PC_REGNUM,
327 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
328 break;
329 case E_MDR_REGNUM:
330 regcache_raw_collect (regcache, E_MDR_REGNUM,
331 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
332 break;
333 case E_PSW_REGNUM:
334 regcache_raw_collect (regcache, E_PSW_REGNUM,
335 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
336 break;
337 case E_LIR_REGNUM:
338 regcache_raw_collect (regcache, E_LIR_REGNUM,
339 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
340 break;
341 case E_LAR_REGNUM:
342 regcache_raw_collect (regcache, E_LAR_REGNUM,
343 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
344 break;
345 case E_MDRQ_REGNUM:
346 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
347 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
348 break;
349 case E_E0_REGNUM:
350 regcache_raw_collect (regcache, E_E0_REGNUM,
351 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
352 break;
353 case E_E1_REGNUM:
354 regcache_raw_collect (regcache, E_E1_REGNUM,
355 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
356 break;
357 case E_E2_REGNUM:
358 regcache_raw_collect (regcache, E_E2_REGNUM,
359 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
360 break;
361 case E_E3_REGNUM:
362 regcache_raw_collect (regcache, E_E3_REGNUM,
363 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
364 break;
365 case E_E4_REGNUM:
366 regcache_raw_collect (regcache, E_E4_REGNUM,
367 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
368 break;
369 case E_E5_REGNUM:
370 regcache_raw_collect (regcache, E_E5_REGNUM,
371 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
372 break;
373 case E_E6_REGNUM:
374 regcache_raw_collect (regcache, E_E6_REGNUM,
375 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
376 break;
377 case E_E7_REGNUM:
378 regcache_raw_collect (regcache, E_E7_REGNUM,
379 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
380 break;
381
382 /* ssp, msp, and usp are inaccessible. */
383 case E_E8_REGNUM:
384 /* The gregset struct has noplace to put this: do nothing. */
385 break;
386 case E_E9_REGNUM:
387 /* The gregset struct has noplace to put this: do nothing. */
388 break;
389 case E_E10_REGNUM:
390 /* The gregset struct has noplace to put this: do nothing. */
391 break;
392 case E_MCRH_REGNUM:
393 regcache_raw_collect (regcache, E_MCRH_REGNUM,
394 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
395 break;
396 case E_MCRL_REGNUM:
397 regcache_raw_collect (regcache, E_MCRL_REGNUM,
398 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
399 break;
400 case E_MCVF_REGNUM:
401 regcache_raw_collect (regcache, E_MCVF_REGNUM,
402 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
403 break;
404 case E_FPCR_REGNUM:
405 /* FPCR is numbered among the GP regs, but handled as an FP reg.
406 Do nothing. */
407 break;
408 case E_FPCR_REGNUM + 1:
409 /* The gregset struct has noplace to put this: do nothing. */
410 break;
411 case E_FPCR_REGNUM + 2:
412 /* The gregset struct has noplace to put this: do nothing. */
413 break;
414 default: /* An error, obviously, but should we error out? */
415 break;
416 case -1:
417 for (i = 0; i < MN10300_ELF_NGREG; i++)
418 am33_collect_gregset_method (regset, regcache, i, gregs, len);
419 break;
420 }
421 return;
422}
423
424/* Copy fp register values from regcache to regset. */
425
426static void
427am33_collect_fpregset_method (const struct regset *regset,
428 const struct regcache *regcache,
429 int regnum, void *fpregs, size_t len)
430{
431 mn10300_elf_fpregset_t *fpregset = fpregs;
432
433 gdb_assert (len == sizeof (mn10300_elf_fpregset_t));
434
435 if (regnum == -1)
436 {
437 int i;
438 for (i = 0; i < MN10300_ELF_NFPREG; i++)
439 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
440 fpregs, len);
441 am33_collect_fpregset_method (regset, regcache,
442 E_FPCR_REGNUM, fpregs, len);
443 }
444 else if (regnum == E_FPCR_REGNUM)
9c9acae0 445 regcache_raw_collect (regcache, E_FPCR_REGNUM,
611889b1
KB		 446 &fpregset->fpcr);
447 else if (E_FS0_REGNUM <= regnum
448 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 449 regcache_raw_collect (regcache, regnum,
611889b1
KB		 450 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
451
452 return;
453}
454
455/* Create a struct regset from a corefile register section. */
456
457static const struct regset *
458am33_regset_from_core_section (struct gdbarch *gdbarch,
459 const char *sect_name,
460 size_t sect_size)
461{
462 /* We will call regset_alloc, and pass the names of the supply and
463 collect methods. */
464
465 if (sect_size == sizeof (mn10300_elf_fpregset_t))
466 return regset_alloc (gdbarch,
467 am33_supply_fpregset_method,
468 am33_collect_fpregset_method);
469 else
470 return regset_alloc (gdbarch,
471 am33_supply_gregset_method,
472 am33_collect_gregset_method);
473}
f9ec92b6
KB		 474\f
475static void
476am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 477 struct frame_info *this_frame,
f9ec92b6
KB		 478 struct trad_frame_cache *this_cache,
479 CORE_ADDR func);
480
481static const struct tramp_frame am33_linux_sigframe = {
482 SIGTRAMP_FRAME,
483 1,
484 {
485 /* mov 119,d0 */
486 { 0x2c, -1 },
487 { 0x77, -1 },
488 { 0x00, -1 },
489 /* syscall 0 */
490 { 0xf0, -1 },
491 { 0xe0, -1 },
492 { TRAMP_SENTINEL_INSN, -1 }
493 },
494 am33_linux_sigframe_cache_init
495};
496
497static const struct tramp_frame am33_linux_rt_sigframe = {
498 SIGTRAMP_FRAME,
499 1,
500 {
501 /* mov 173,d0 */
502 { 0x2c, -1 },
503 { 0xad, -1 },
504 { 0x00, -1 },
505 /* syscall 0 */
506 { 0xf0, -1 },
507 { 0xe0, -1 },
508 { TRAMP_SENTINEL_INSN, -1 }
509 },
510 am33_linux_sigframe_cache_init
511};
512
513/* Relevant struct definitions for signal handling...
514
515From arch/mn10300/kernel/sigframe.h:
516
517struct sigframe
518{
519 void (*pretcode)(void);
520 int sig;
e84605cd 521 struct sigcontext *psc;
f9ec92b6
KB		 522 struct sigcontext sc;
523 struct fpucontext fpuctx;
524 unsigned long extramask[_NSIG_WORDS-1];
525 char retcode[8];
526};
527
528struct rt_sigframe
529{
530 void (*pretcode)(void);
531 int sig;
532 struct siginfo *pinfo;
533 void *puc;
534 struct siginfo info;
535 struct ucontext uc;
536 struct fpucontext fpuctx;
537 char retcode[8];
538};
539
540From include/asm-mn10300/ucontext.h:
541
542struct ucontext {
543 unsigned long uc_flags;
544 struct ucontext *uc_link;
545 stack_t uc_stack;
546 struct sigcontext uc_mcontext;
547 sigset_t uc_sigmask;
548};
549
550From include/asm-mn10300/sigcontext.h:
551
552struct fpucontext {
553 unsigned long fs[32];
554 unsigned long fpcr;
555};
556
557struct sigcontext {
558 unsigned long d0;
559 unsigned long d1;
560 unsigned long d2;
561 unsigned long d3;
562 unsigned long a0;
563 unsigned long a1;
564 unsigned long a2;
565 unsigned long a3;
566 unsigned long e0;
567 unsigned long e1;
568 unsigned long e2;
569 unsigned long e3;
570 unsigned long e4;
571 unsigned long e5;
572 unsigned long e6;
573 unsigned long e7;
574 unsigned long lar;
575 unsigned long lir;
576 unsigned long mdr;
577 unsigned long mcvf;
578 unsigned long mcrl;
579 unsigned long mcrh;
580 unsigned long mdrq;
581 unsigned long sp;
582 unsigned long epsw;
583 unsigned long pc;
584 struct fpucontext *fpucontext;
585 unsigned long oldmask;
586}; */
587
588
589#define AM33_SIGCONTEXT_D0 0
590#define AM33_SIGCONTEXT_D1 4
591#define AM33_SIGCONTEXT_D2 8
592#define AM33_SIGCONTEXT_D3 12
593#define AM33_SIGCONTEXT_A0 16
594#define AM33_SIGCONTEXT_A1 20
595#define AM33_SIGCONTEXT_A2 24
596#define AM33_SIGCONTEXT_A3 28
597#define AM33_SIGCONTEXT_E0 32
598#define AM33_SIGCONTEXT_E1 36
599#define AM33_SIGCONTEXT_E2 40
600#define AM33_SIGCONTEXT_E3 44
601#define AM33_SIGCONTEXT_E4 48
602#define AM33_SIGCONTEXT_E5 52
603#define AM33_SIGCONTEXT_E6 56
604#define AM33_SIGCONTEXT_E7 60
605#define AM33_SIGCONTEXT_LAR 64
606#define AM33_SIGCONTEXT_LIR 68
607#define AM33_SIGCONTEXT_MDR 72
608#define AM33_SIGCONTEXT_MCVF 76
609#define AM33_SIGCONTEXT_MCRL 80
610#define AM33_SIGCONTEXT_MCRH 84
611#define AM33_SIGCONTEXT_MDRQ 88
612#define AM33_SIGCONTEXT_SP 92
613#define AM33_SIGCONTEXT_EPSW 96
614#define AM33_SIGCONTEXT_PC 100
615#define AM33_SIGCONTEXT_FPUCONTEXT 104
616
617
618static void
619am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 620 struct frame_info *this_frame,
f9ec92b6
KB		 621 struct trad_frame_cache *this_cache,
622 CORE_ADDR func)
623{
624 CORE_ADDR sc_base, fpubase;
625 int i;
611889b1 626
5366653e 627 sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
f9ec92b6
KB		 628 if (self == &am33_linux_sigframe)
629 {
630 sc_base += 8;
5366653e 631 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 632 }
633 else
634 {
635 sc_base += 12;
5366653e 636 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 637 sc_base += 20;
638 }
639
640 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
641 sc_base + AM33_SIGCONTEXT_D0);
642 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
643 sc_base + AM33_SIGCONTEXT_D1);
644 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
645 sc_base + AM33_SIGCONTEXT_D2);
646 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
647 sc_base + AM33_SIGCONTEXT_D3);
648
649 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
650 sc_base + AM33_SIGCONTEXT_A0);
651 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
652 sc_base + AM33_SIGCONTEXT_A1);
653 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
654 sc_base + AM33_SIGCONTEXT_A2);
655 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
656 sc_base + AM33_SIGCONTEXT_A3);
657
658 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
659 sc_base + AM33_SIGCONTEXT_E0);
660 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
661 sc_base + AM33_SIGCONTEXT_E1);
662 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
663 sc_base + AM33_SIGCONTEXT_E2);
664 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
665 sc_base + AM33_SIGCONTEXT_E3);
666 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
667 sc_base + AM33_SIGCONTEXT_E4);
668 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
669 sc_base + AM33_SIGCONTEXT_E5);
670 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
671 sc_base + AM33_SIGCONTEXT_E6);
672 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
673 sc_base + AM33_SIGCONTEXT_E7);
674
675 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
676 sc_base + AM33_SIGCONTEXT_LAR);
677 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
678 sc_base + AM33_SIGCONTEXT_LIR);
679 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
680 sc_base + AM33_SIGCONTEXT_MDR);
681 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
682 sc_base + AM33_SIGCONTEXT_MCVF);
683 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
684 sc_base + AM33_SIGCONTEXT_MCRL);
685 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
686 sc_base + AM33_SIGCONTEXT_MDRQ);
687
688 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
689 sc_base + AM33_SIGCONTEXT_SP);
690 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
691 sc_base + AM33_SIGCONTEXT_EPSW);
692 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
693 sc_base + AM33_SIGCONTEXT_PC);
694
5366653e 695 fpubase = get_frame_memory_unsigned (this_frame,
025bb325
MS		 696 sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
697 4);
f9ec92b6
KB		 698 if (fpubase)
699 {
700 for (i = 0; i < 32; i++)
701 {
702 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
703 fpubase + 4 * i);
704 }
705 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
706 }
707
708 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
709}
710\f
155bd5d1 711/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 712 Now's our chance to register our corefile handling. */
713
714static void
a5ee0f0c 715am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
611889b1 716{
a5ee0f0c
PA		 717 linux_init_abi (info, gdbarch);
718
611889b1
KB		 719 set_gdbarch_regset_from_core_section (gdbarch,
720 am33_regset_from_core_section);
696cc4a6 721 set_solib_svr4_fetch_link_map_offsets
cf1f553f 722 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 723
724 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
725 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 726}
727
63807e1d
PA		 728/* Provide a prototype to silence -Wmissing-prototypes. */
729extern initialize_file_ftype _initialize_mn10300_linux_tdep;
730
611889b1
KB		 731void
732_initialize_mn10300_linux_tdep (void)
733{
734 gdbarch_register_osabi (bfd_arch_mn10300, 0,
735 GDB_OSABI_LINUX, am33_linux_init_osabi);
736}
737
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