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Remove regcache_cooked_write_part
[thirdparty/binutils-gdb.git] / gdb / mn10300-linux-tdep.c
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611889b1 1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
155bd5d1 2
e2882c85 3 Copyright (C) 2003-2018 Free Software Foundation, Inc.
611889b1
KB		 4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
611889b1
KB		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
611889b1
KB		 19
20#include "defs.h"
21#include "gdbcore.h"
611889b1
KB		 22#include "regcache.h"
23#include "mn10300-tdep.h"
611889b1
KB		 24#include "bfd.h"
25#include "elf-bfd.h"
26#include "osabi.h"
27#include "regset.h"
696cc4a6 28#include "solib-svr4.h"
f9ec92b6
KB		 29#include "frame.h"
30#include "trad-frame.h"
31#include "tramp-frame.h"
a5ee0f0c 32#include "linux-tdep.h"
611889b1 33
611889b1
KB		 34/* Transliterated from <asm-mn10300/elf.h>... */
35#define MN10300_ELF_NGREG 28
36#define MN10300_ELF_NFPREG 32
37
38typedef gdb_byte mn10300_elf_greg_t[4];
39typedef mn10300_elf_greg_t mn10300_elf_gregset_t[MN10300_ELF_NGREG];
40
41typedef gdb_byte mn10300_elf_fpreg_t[4];
42typedef struct
43{
44 mn10300_elf_fpreg_t fpregs[MN10300_ELF_NFPREG];
45 gdb_byte fpcr[4];
46} mn10300_elf_fpregset_t;
47
48/* elf_gregset_t register indices stolen from include/asm-mn10300/ptrace.h. */
49#define MN10300_ELF_GREGSET_T_REG_INDEX_A3 0
50#define MN10300_ELF_GREGSET_T_REG_INDEX_A2 1
51#define MN10300_ELF_GREGSET_T_REG_INDEX_D3 2
52#define MN10300_ELF_GREGSET_T_REG_INDEX_D2 3
53#define MN10300_ELF_GREGSET_T_REG_INDEX_MCVF 4
54#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRL 5
55#define MN10300_ELF_GREGSET_T_REG_INDEX_MCRH 6
56#define MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ 7
57#define MN10300_ELF_GREGSET_T_REG_INDEX_E1 8
58#define MN10300_ELF_GREGSET_T_REG_INDEX_E0 9
59#define MN10300_ELF_GREGSET_T_REG_INDEX_E7 10
60#define MN10300_ELF_GREGSET_T_REG_INDEX_E6 11
61#define MN10300_ELF_GREGSET_T_REG_INDEX_E5 12
62#define MN10300_ELF_GREGSET_T_REG_INDEX_E4 13
63#define MN10300_ELF_GREGSET_T_REG_INDEX_E3 14
64#define MN10300_ELF_GREGSET_T_REG_INDEX_E2 15
65#define MN10300_ELF_GREGSET_T_REG_INDEX_SP 16
66#define MN10300_ELF_GREGSET_T_REG_INDEX_LAR 17
67#define MN10300_ELF_GREGSET_T_REG_INDEX_LIR 18
68#define MN10300_ELF_GREGSET_T_REG_INDEX_MDR 19
69#define MN10300_ELF_GREGSET_T_REG_INDEX_A1 20
70#define MN10300_ELF_GREGSET_T_REG_INDEX_A0 21
71#define MN10300_ELF_GREGSET_T_REG_INDEX_D1 22
72#define MN10300_ELF_GREGSET_T_REG_INDEX_D0 23
73#define MN10300_ELF_GREGSET_T_REG_INDEX_ORIG_D0 24
74#define MN10300_ELF_GREGSET_T_REG_INDEX_EPSW 25
75#define MN10300_ELF_GREGSET_T_REG_INDEX_PC 26
76
77/* New gdbarch API for corefile registers.
78 Given a section name and size, create a struct reg object
79 with a supply_register and a collect_register method. */
80
025bb325 81/* Copy register value of REGNUM from regset to regcache.
611889b1
KB		 82 If REGNUM is -1, do this for all gp registers in regset. */
83
84static void
85am33_supply_gregset_method (const struct regset *regset,
86 struct regcache *regcache,
87 int regnum, const void *gregs, size_t len)
88{
611889b1
KB		 89 const mn10300_elf_greg_t *regp = (const mn10300_elf_greg_t *) gregs;
90 int i;
91
1528345d 92 gdb_assert (len >= sizeof (mn10300_elf_gregset_t));
611889b1
KB		 93
94 switch (regnum) {
95 case E_D0_REGNUM:
96 regcache_raw_supply (regcache, E_D0_REGNUM,
97 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
98 break;
99 case E_D1_REGNUM:
100 regcache_raw_supply (regcache, E_D1_REGNUM,
101 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
102 break;
103 case E_D2_REGNUM:
104 regcache_raw_supply (regcache, E_D2_REGNUM,
105 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
106 break;
107 case E_D3_REGNUM:
108 regcache_raw_supply (regcache, E_D3_REGNUM,
109 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
110 break;
111 case E_A0_REGNUM:
112 regcache_raw_supply (regcache, E_A0_REGNUM,
113 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
114 break;
115 case E_A1_REGNUM:
116 regcache_raw_supply (regcache, E_A1_REGNUM,
117 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
118 break;
119 case E_A2_REGNUM:
120 regcache_raw_supply (regcache, E_A2_REGNUM,
121 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
122 break;
123 case E_A3_REGNUM:
124 regcache_raw_supply (regcache, E_A3_REGNUM,
125 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
126 break;
127 case E_SP_REGNUM:
128 regcache_raw_supply (regcache, E_SP_REGNUM,
129 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
130 break;
131 case E_PC_REGNUM:
132 regcache_raw_supply (regcache, E_PC_REGNUM,
133 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
134 break;
135 case E_MDR_REGNUM:
136 regcache_raw_supply (regcache, E_MDR_REGNUM,
137 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
138 break;
139 case E_PSW_REGNUM:
140 regcache_raw_supply (regcache, E_PSW_REGNUM,
141 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
142 break;
143 case E_LIR_REGNUM:
144 regcache_raw_supply (regcache, E_LIR_REGNUM,
145 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
146 break;
147 case E_LAR_REGNUM:
148 regcache_raw_supply (regcache, E_LAR_REGNUM,
149 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
150 break;
151 case E_MDRQ_REGNUM:
152 regcache_raw_supply (regcache, E_MDRQ_REGNUM,
153 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
154 break;
155 case E_E0_REGNUM:
156 regcache_raw_supply (regcache, E_E0_REGNUM,
157 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
158 break;
159 case E_E1_REGNUM:
160 regcache_raw_supply (regcache, E_E1_REGNUM,
161 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
162 break;
163 case E_E2_REGNUM:
164 regcache_raw_supply (regcache, E_E2_REGNUM,
165 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
166 break;
167 case E_E3_REGNUM:
168 regcache_raw_supply (regcache, E_E3_REGNUM,
169 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
170 break;
171 case E_E4_REGNUM:
172 regcache_raw_supply (regcache, E_E4_REGNUM,
173 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
174 break;
175 case E_E5_REGNUM:
176 regcache_raw_supply (regcache, E_E5_REGNUM,
177 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
178 break;
179 case E_E6_REGNUM:
180 regcache_raw_supply (regcache, E_E6_REGNUM,
181 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
182 break;
183 case E_E7_REGNUM:
184 regcache_raw_supply (regcache, E_E7_REGNUM,
185 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
186 break;
187
188 /* ssp, msp, and usp are inaccessible. */
189 case E_E8_REGNUM:
146e6c5c 190 regcache->raw_supply_zeroed (E_E8_REGNUM);
611889b1
KB		 191 break;
192 case E_E9_REGNUM:
146e6c5c 193 regcache->raw_supply_zeroed (E_E9_REGNUM);
611889b1
KB		 194 break;
195 case E_E10_REGNUM:
146e6c5c 196 regcache->raw_supply_zeroed (E_E10_REGNUM);
611889b1
KB		 197 break;
198 case E_MCRH_REGNUM:
199 regcache_raw_supply (regcache, E_MCRH_REGNUM,
200 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
201 break;
202 case E_MCRL_REGNUM:
203 regcache_raw_supply (regcache, E_MCRL_REGNUM,
204 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
205 break;
206 case E_MCVF_REGNUM:
207 regcache_raw_supply (regcache, E_MCVF_REGNUM,
208 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
209 break;
210 case E_FPCR_REGNUM:
211 /* FPCR is numbered among the GP regs, but handled as an FP reg.
212 Do nothing. */
213 break;
214 case E_FPCR_REGNUM + 1:
215 /* The two unused registers beyond fpcr are inaccessible. */
146e6c5c 216 regcache->raw_supply_zeroed (E_FPCR_REGNUM + 1);
611889b1
KB		 217 break;
218 case E_FPCR_REGNUM + 2:
146e6c5c 219 regcache->raw_supply_zeroed (E_FPCR_REGNUM + 2);
611889b1
KB		 220 break;
221 default: /* An error, obviously, but should we error out? */
222 break;
223 case -1:
224 for (i = 0; i < MN10300_ELF_NGREG; i++)
225 am33_supply_gregset_method (regset, regcache, i, gregs, len);
226 break;
227 }
228 return;
229}
230
025bb325
MS		 231/* Copy fp register value of REGNUM from regset to regcache.
232 If REGNUM is -1, do this for all fp registers in regset. */
611889b1
KB		 233
234static void
235am33_supply_fpregset_method (const struct regset *regset,
236 struct regcache *regcache,
237 int regnum, const void *fpregs, size_t len)
238{
19ba03f4
SM		 239 const mn10300_elf_fpregset_t *fpregset
240 = (const mn10300_elf_fpregset_t *) fpregs;
611889b1 241
1528345d 242 gdb_assert (len >= sizeof (mn10300_elf_fpregset_t));
611889b1
KB		 243
244 if (regnum == -1)
245 {
246 int i;
247
248 for (i = 0; i < MN10300_ELF_NFPREG; i++)
249 am33_supply_fpregset_method (regset, regcache,
250 E_FS0_REGNUM + i, fpregs, len);
251 am33_supply_fpregset_method (regset, regcache,
252 E_FPCR_REGNUM, fpregs, len);
253 }
254 else if (regnum == E_FPCR_REGNUM)
9c9acae0 255 regcache_raw_supply (regcache, E_FPCR_REGNUM,
611889b1 256 &fpregset->fpcr);
025bb325
MS		 257 else if (E_FS0_REGNUM <= regnum
258 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 259 regcache_raw_supply (regcache, regnum,
611889b1
KB		 260 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
261
262 return;
263}
264
265/* Copy register values from regcache to regset. */
266
267static void
268am33_collect_gregset_method (const struct regset *regset,
269 const struct regcache *regcache,
270 int regnum, void *gregs, size_t len)
271{
19ba03f4 272 mn10300_elf_gregset_t *regp = (gdb_byte (*)[28][4]) gregs;
611889b1
KB		 273 int i;
274
1528345d 275 gdb_assert (len >= sizeof (mn10300_elf_gregset_t));
611889b1
KB		 276
277 switch (regnum) {
278 case E_D0_REGNUM:
279 regcache_raw_collect (regcache, E_D0_REGNUM,
280 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D0));
281 break;
282 case E_D1_REGNUM:
283 regcache_raw_collect (regcache, E_D1_REGNUM,
284 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D1));
285 break;
286 case E_D2_REGNUM:
287 regcache_raw_collect (regcache, E_D2_REGNUM,
288 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D2));
289 break;
290 case E_D3_REGNUM:
291 regcache_raw_collect (regcache, E_D3_REGNUM,
292 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_D3));
293 break;
294 case E_A0_REGNUM:
295 regcache_raw_collect (regcache, E_A0_REGNUM,
296 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A0));
297 break;
298 case E_A1_REGNUM:
299 regcache_raw_collect (regcache, E_A1_REGNUM,
300 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A1));
301 break;
302 case E_A2_REGNUM:
303 regcache_raw_collect (regcache, E_A2_REGNUM,
304 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A2));
305 break;
306 case E_A3_REGNUM:
307 regcache_raw_collect (regcache, E_A3_REGNUM,
308 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_A3));
309 break;
310 case E_SP_REGNUM:
311 regcache_raw_collect (regcache, E_SP_REGNUM,
312 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_SP));
313 break;
314 case E_PC_REGNUM:
315 regcache_raw_collect (regcache, E_PC_REGNUM,
316 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_PC));
317 break;
318 case E_MDR_REGNUM:
319 regcache_raw_collect (regcache, E_MDR_REGNUM,
320 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDR));
321 break;
322 case E_PSW_REGNUM:
323 regcache_raw_collect (regcache, E_PSW_REGNUM,
324 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_EPSW));
325 break;
326 case E_LIR_REGNUM:
327 regcache_raw_collect (regcache, E_LIR_REGNUM,
328 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LIR));
329 break;
330 case E_LAR_REGNUM:
331 regcache_raw_collect (regcache, E_LAR_REGNUM,
332 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_LAR));
333 break;
334 case E_MDRQ_REGNUM:
335 regcache_raw_collect (regcache, E_MDRQ_REGNUM,
336 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MDRQ));
337 break;
338 case E_E0_REGNUM:
339 regcache_raw_collect (regcache, E_E0_REGNUM,
340 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E0));
341 break;
342 case E_E1_REGNUM:
343 regcache_raw_collect (regcache, E_E1_REGNUM,
344 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E1));
345 break;
346 case E_E2_REGNUM:
347 regcache_raw_collect (regcache, E_E2_REGNUM,
348 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E2));
349 break;
350 case E_E3_REGNUM:
351 regcache_raw_collect (regcache, E_E3_REGNUM,
352 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E3));
353 break;
354 case E_E4_REGNUM:
355 regcache_raw_collect (regcache, E_E4_REGNUM,
356 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E4));
357 break;
358 case E_E5_REGNUM:
359 regcache_raw_collect (regcache, E_E5_REGNUM,
360 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E5));
361 break;
362 case E_E6_REGNUM:
363 regcache_raw_collect (regcache, E_E6_REGNUM,
364 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E6));
365 break;
366 case E_E7_REGNUM:
367 regcache_raw_collect (regcache, E_E7_REGNUM,
368 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_E7));
369 break;
370
371 /* ssp, msp, and usp are inaccessible. */
372 case E_E8_REGNUM:
373 /* The gregset struct has noplace to put this: do nothing. */
374 break;
375 case E_E9_REGNUM:
376 /* The gregset struct has noplace to put this: do nothing. */
377 break;
378 case E_E10_REGNUM:
379 /* The gregset struct has noplace to put this: do nothing. */
380 break;
381 case E_MCRH_REGNUM:
382 regcache_raw_collect (regcache, E_MCRH_REGNUM,
383 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRH));
384 break;
385 case E_MCRL_REGNUM:
386 regcache_raw_collect (regcache, E_MCRL_REGNUM,
387 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCRL));
388 break;
389 case E_MCVF_REGNUM:
390 regcache_raw_collect (regcache, E_MCVF_REGNUM,
391 (regp + MN10300_ELF_GREGSET_T_REG_INDEX_MCVF));
392 break;
393 case E_FPCR_REGNUM:
394 /* FPCR is numbered among the GP regs, but handled as an FP reg.
395 Do nothing. */
396 break;
397 case E_FPCR_REGNUM + 1:
398 /* The gregset struct has noplace to put this: do nothing. */
399 break;
400 case E_FPCR_REGNUM + 2:
401 /* The gregset struct has noplace to put this: do nothing. */
402 break;
403 default: /* An error, obviously, but should we error out? */
404 break;
405 case -1:
406 for (i = 0; i < MN10300_ELF_NGREG; i++)
407 am33_collect_gregset_method (regset, regcache, i, gregs, len);
408 break;
409 }
410 return;
411}
412
413/* Copy fp register values from regcache to regset. */
414
415static void
416am33_collect_fpregset_method (const struct regset *regset,
417 const struct regcache *regcache,
418 int regnum, void *fpregs, size_t len)
419{
19ba03f4 420 mn10300_elf_fpregset_t *fpregset = (mn10300_elf_fpregset_t *) fpregs;
611889b1 421
1528345d 422 gdb_assert (len >= sizeof (mn10300_elf_fpregset_t));
611889b1
KB		 423
424 if (regnum == -1)
425 {
426 int i;
427 for (i = 0; i < MN10300_ELF_NFPREG; i++)
428 am33_collect_fpregset_method (regset, regcache, E_FS0_REGNUM + i,
429 fpregs, len);
430 am33_collect_fpregset_method (regset, regcache,
431 E_FPCR_REGNUM, fpregs, len);
432 }
433 else if (regnum == E_FPCR_REGNUM)
9c9acae0 434 regcache_raw_collect (regcache, E_FPCR_REGNUM,
611889b1
KB		 435 &fpregset->fpcr);
436 else if (E_FS0_REGNUM <= regnum
437 && regnum < E_FS0_REGNUM + MN10300_ELF_NFPREG)
9c9acae0 438 regcache_raw_collect (regcache, regnum,
611889b1
KB		 439 &fpregset->fpregs[regnum - E_FS0_REGNUM]);
440
441 return;
442}
443
24534243
AA		 444static const struct regset am33_gregset =
445 {
446 NULL, am33_supply_gregset_method, am33_collect_gregset_method
447 };
448
449static const struct regset am33_fpregset =
450 {
451 NULL, am33_supply_fpregset_method, am33_collect_fpregset_method
452 };
453
3636e608 454/* Iterate over core file register note sections. */
611889b1 455
3636e608
AA		 456static void
457am33_iterate_over_regset_sections (struct gdbarch *gdbarch,
458 iterate_over_regset_sections_cb *cb,
459 void *cb_data,
460 const struct regcache *regcache)
611889b1 461{
3636e608
AA		 462 cb (".reg", sizeof (mn10300_elf_gregset_t), &am33_gregset,
463 NULL, cb_data);
464 cb (".reg2", sizeof(mn10300_elf_fpregset_t), &am33_fpregset,
465 NULL, cb_data);
611889b1 466}
f9ec92b6
KB		 467\f
468static void
469am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 470 struct frame_info *this_frame,
f9ec92b6
KB		 471 struct trad_frame_cache *this_cache,
472 CORE_ADDR func);
473
474static const struct tramp_frame am33_linux_sigframe = {
475 SIGTRAMP_FRAME,
476 1,
477 {
478 /* mov 119,d0 */
479 { 0x2c, -1 },
480 { 0x77, -1 },
481 { 0x00, -1 },
482 /* syscall 0 */
483 { 0xf0, -1 },
484 { 0xe0, -1 },
485 { TRAMP_SENTINEL_INSN, -1 }
486 },
487 am33_linux_sigframe_cache_init
488};
489
490static const struct tramp_frame am33_linux_rt_sigframe = {
491 SIGTRAMP_FRAME,
492 1,
493 {
494 /* mov 173,d0 */
495 { 0x2c, -1 },
496 { 0xad, -1 },
497 { 0x00, -1 },
498 /* syscall 0 */
499 { 0xf0, -1 },
500 { 0xe0, -1 },
501 { TRAMP_SENTINEL_INSN, -1 }
502 },
503 am33_linux_sigframe_cache_init
504};
505
506/* Relevant struct definitions for signal handling...
507
508From arch/mn10300/kernel/sigframe.h:
509
510struct sigframe
511{
512 void (*pretcode)(void);
513 int sig;
e84605cd 514 struct sigcontext *psc;
f9ec92b6
KB		 515 struct sigcontext sc;
516 struct fpucontext fpuctx;
517 unsigned long extramask[_NSIG_WORDS-1];
518 char retcode[8];
519};
520
521struct rt_sigframe
522{
523 void (*pretcode)(void);
524 int sig;
525 struct siginfo *pinfo;
526 void *puc;
527 struct siginfo info;
528 struct ucontext uc;
529 struct fpucontext fpuctx;
530 char retcode[8];
531};
532
533From include/asm-mn10300/ucontext.h:
534
535struct ucontext {
536 unsigned long uc_flags;
537 struct ucontext *uc_link;
538 stack_t uc_stack;
539 struct sigcontext uc_mcontext;
540 sigset_t uc_sigmask;
541};
542
543From include/asm-mn10300/sigcontext.h:
544
545struct fpucontext {
546 unsigned long fs[32];
547 unsigned long fpcr;
548};
549
550struct sigcontext {
551 unsigned long d0;
552 unsigned long d1;
553 unsigned long d2;
554 unsigned long d3;
555 unsigned long a0;
556 unsigned long a1;
557 unsigned long a2;
558 unsigned long a3;
559 unsigned long e0;
560 unsigned long e1;
561 unsigned long e2;
562 unsigned long e3;
563 unsigned long e4;
564 unsigned long e5;
565 unsigned long e6;
566 unsigned long e7;
567 unsigned long lar;
568 unsigned long lir;
569 unsigned long mdr;
570 unsigned long mcvf;
571 unsigned long mcrl;
572 unsigned long mcrh;
573 unsigned long mdrq;
574 unsigned long sp;
575 unsigned long epsw;
576 unsigned long pc;
577 struct fpucontext *fpucontext;
578 unsigned long oldmask;
579}; */
580
581
582#define AM33_SIGCONTEXT_D0 0
583#define AM33_SIGCONTEXT_D1 4
584#define AM33_SIGCONTEXT_D2 8
585#define AM33_SIGCONTEXT_D3 12
586#define AM33_SIGCONTEXT_A0 16
587#define AM33_SIGCONTEXT_A1 20
588#define AM33_SIGCONTEXT_A2 24
589#define AM33_SIGCONTEXT_A3 28
590#define AM33_SIGCONTEXT_E0 32
591#define AM33_SIGCONTEXT_E1 36
592#define AM33_SIGCONTEXT_E2 40
593#define AM33_SIGCONTEXT_E3 44
594#define AM33_SIGCONTEXT_E4 48
595#define AM33_SIGCONTEXT_E5 52
596#define AM33_SIGCONTEXT_E6 56
597#define AM33_SIGCONTEXT_E7 60
598#define AM33_SIGCONTEXT_LAR 64
599#define AM33_SIGCONTEXT_LIR 68
600#define AM33_SIGCONTEXT_MDR 72
601#define AM33_SIGCONTEXT_MCVF 76
602#define AM33_SIGCONTEXT_MCRL 80
603#define AM33_SIGCONTEXT_MCRH 84
604#define AM33_SIGCONTEXT_MDRQ 88
605#define AM33_SIGCONTEXT_SP 92
606#define AM33_SIGCONTEXT_EPSW 96
607#define AM33_SIGCONTEXT_PC 100
608#define AM33_SIGCONTEXT_FPUCONTEXT 104
609
610
611static void
612am33_linux_sigframe_cache_init (const struct tramp_frame *self,
5366653e 613 struct frame_info *this_frame,
f9ec92b6
KB		 614 struct trad_frame_cache *this_cache,
615 CORE_ADDR func)
616{
617 CORE_ADDR sc_base, fpubase;
618 int i;
611889b1 619
5366653e 620 sc_base = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
f9ec92b6
KB		 621 if (self == &am33_linux_sigframe)
622 {
623 sc_base += 8;
5366653e 624 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 625 }
626 else
627 {
628 sc_base += 12;
5366653e 629 sc_base = get_frame_memory_unsigned (this_frame, sc_base, 4);
f9ec92b6
KB		 630 sc_base += 20;
631 }
632
633 trad_frame_set_reg_addr (this_cache, E_D0_REGNUM,
634 sc_base + AM33_SIGCONTEXT_D0);
635 trad_frame_set_reg_addr (this_cache, E_D1_REGNUM,
636 sc_base + AM33_SIGCONTEXT_D1);
637 trad_frame_set_reg_addr (this_cache, E_D2_REGNUM,
638 sc_base + AM33_SIGCONTEXT_D2);
639 trad_frame_set_reg_addr (this_cache, E_D3_REGNUM,
640 sc_base + AM33_SIGCONTEXT_D3);
641
642 trad_frame_set_reg_addr (this_cache, E_A0_REGNUM,
643 sc_base + AM33_SIGCONTEXT_A0);
644 trad_frame_set_reg_addr (this_cache, E_A1_REGNUM,
645 sc_base + AM33_SIGCONTEXT_A1);
646 trad_frame_set_reg_addr (this_cache, E_A2_REGNUM,
647 sc_base + AM33_SIGCONTEXT_A2);
648 trad_frame_set_reg_addr (this_cache, E_A3_REGNUM,
649 sc_base + AM33_SIGCONTEXT_A3);
650
651 trad_frame_set_reg_addr (this_cache, E_E0_REGNUM,
652 sc_base + AM33_SIGCONTEXT_E0);
653 trad_frame_set_reg_addr (this_cache, E_E1_REGNUM,
654 sc_base + AM33_SIGCONTEXT_E1);
655 trad_frame_set_reg_addr (this_cache, E_E2_REGNUM,
656 sc_base + AM33_SIGCONTEXT_E2);
657 trad_frame_set_reg_addr (this_cache, E_E3_REGNUM,
658 sc_base + AM33_SIGCONTEXT_E3);
659 trad_frame_set_reg_addr (this_cache, E_E4_REGNUM,
660 sc_base + AM33_SIGCONTEXT_E4);
661 trad_frame_set_reg_addr (this_cache, E_E5_REGNUM,
662 sc_base + AM33_SIGCONTEXT_E5);
663 trad_frame_set_reg_addr (this_cache, E_E6_REGNUM,
664 sc_base + AM33_SIGCONTEXT_E6);
665 trad_frame_set_reg_addr (this_cache, E_E7_REGNUM,
666 sc_base + AM33_SIGCONTEXT_E7);
667
668 trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM,
669 sc_base + AM33_SIGCONTEXT_LAR);
670 trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM,
671 sc_base + AM33_SIGCONTEXT_LIR);
672 trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM,
673 sc_base + AM33_SIGCONTEXT_MDR);
674 trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM,
675 sc_base + AM33_SIGCONTEXT_MCVF);
676 trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM,
677 sc_base + AM33_SIGCONTEXT_MCRL);
678 trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM,
679 sc_base + AM33_SIGCONTEXT_MDRQ);
680
681 trad_frame_set_reg_addr (this_cache, E_SP_REGNUM,
682 sc_base + AM33_SIGCONTEXT_SP);
683 trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM,
684 sc_base + AM33_SIGCONTEXT_EPSW);
685 trad_frame_set_reg_addr (this_cache, E_PC_REGNUM,
686 sc_base + AM33_SIGCONTEXT_PC);
687
5366653e 688 fpubase = get_frame_memory_unsigned (this_frame,
025bb325
MS		 689 sc_base + AM33_SIGCONTEXT_FPUCONTEXT,
690 4);
f9ec92b6
KB		 691 if (fpubase)
692 {
693 for (i = 0; i < 32; i++)
694 {
695 trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i,
696 fpubase + 4 * i);
697 }
698 trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32);
699 }
700
701 trad_frame_set_id (this_cache, frame_id_build (sc_base, func));
702}
703\f
155bd5d1 704/* AM33 GNU/Linux osabi has been recognized.
611889b1
KB		 705 Now's our chance to register our corefile handling. */
706
707static void
a5ee0f0c 708am33_linux_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
611889b1 709{
a5ee0f0c
PA		 710 linux_init_abi (info, gdbarch);
711
3636e608
AA		 712 set_gdbarch_iterate_over_regset_sections
713 (gdbarch, am33_iterate_over_regset_sections);
696cc4a6 714 set_solib_svr4_fetch_link_map_offsets
cf1f553f 715 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
f9ec92b6
KB		 716
717 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe);
718 tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe);
611889b1
KB		 719}
720
721void
722_initialize_mn10300_linux_tdep (void)
723{
724 gdbarch_register_osabi (bfd_arch_mn10300, 0,
725 GDB_OSABI_LINUX, am33_linux_init_osabi);
726}
727
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