]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gdb/ppc-linux-nat.c
2002-04-11 Michael Snyder <msnyder@redhat.com>
[thirdparty/binutils-gdb.git] / gdb / ppc-linux-nat.c
CommitLineData
9abe5450 1/* PPC GNU/Linux native support.
05f13b9c 2 Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002
b6ba6518 3 Free Software Foundation, Inc.
c877c8e6
KB
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
05f13b9c
EZ
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c877c8e6
KB
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "gdbcore.h"
4e052eda 26#include "regcache.h"
c877c8e6
KB
27
28#include <sys/types.h>
29#include <sys/param.h>
30#include <signal.h>
31#include <sys/user.h>
32#include <sys/ioctl.h>
33#include <sys/wait.h>
34#include <fcntl.h>
35#include <sys/procfs.h>
45229ea4 36#include <sys/ptrace.h>
c877c8e6 37
c60c0f5f
MS
38/* Prototypes for supply_gregset etc. */
39#include "gregset.h"
16333c4f 40#include "ppc-tdep.h"
c60c0f5f 41
45229ea4
EZ
42#ifndef PT_READ_U
43#define PT_READ_U PTRACE_PEEKUSR
44#endif
45#ifndef PT_WRITE_U
46#define PT_WRITE_U PTRACE_POKEUSR
47#endif
48
49/* Default the type of the ptrace transfer to int. */
50#ifndef PTRACE_XFER_TYPE
51#define PTRACE_XFER_TYPE int
52#endif
53
9abe5450
EZ
54/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
55 configure time check. Some older glibc's (for instance 2.2.1)
56 don't have a specific powerpc version of ptrace.h, and fall back on
57 a generic one. In such cases, sys/ptrace.h defines
58 PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that
59 ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and
60 PTRACE_SETVRREGS to be. This also makes a configury check pretty
61 much useless. */
62
63/* These definitions should really come from the glibc header files,
64 but Glibc doesn't know about the vrregs yet. */
65#ifndef PTRACE_GETVRREGS
66#define PTRACE_GETVRREGS 18
67#define PTRACE_SETVRREGS 19
68#endif
69
70/* This oddity is because the Linux kernel defines elf_vrregset_t as
71 an array of 33 16 bytes long elements. I.e. it leaves out vrsave.
72 However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return
73 the vrsave as an extra 4 bytes at the end. I opted for creating a
74 flat array of chars, so that it is easier to manipulate for gdb.
75
76 There are 32 vector registers 16 bytes longs, plus a VSCR register
77 which is only 4 bytes long, but is fetched as a 16 bytes
78 quantity. Up to here we have the elf_vrregset_t structure.
79 Appended to this there is space for the VRSAVE register: 4 bytes.
80 Even though this vrsave register is not included in the regset
81 typedef, it is handled by the ptrace requests.
82
83 Note that GNU/Linux doesn't support little endian PPC hardware,
84 therefore the offset at which the real value of the VSCR register
85 is located will be always 12 bytes.
86
87 The layout is like this (where x is the actual value of the vscr reg): */
88
89/* *INDENT-OFF* */
90/*
91 |.|.|.|.|.....|.|.|.|.||.|.|.|x||.|
92 <-------> <-------><-------><->
93 VR0 VR31 VSCR VRSAVE
94*/
95/* *INDENT-ON* */
96
97#define SIZEOF_VRREGS 33*16+4
98
99typedef char gdb_vrregset_t[SIZEOF_VRREGS];
100
101/* For runtime check of ptrace support for VRREGS. */
102int have_ptrace_getvrregs = 1;
103
c877c8e6 104int
fba45db2 105kernel_u_size (void)
c877c8e6
KB
106{
107 return (sizeof (struct user));
108}
109
16333c4f
EZ
110/* *INDENT-OFF* */
111/* registers layout, as presented by the ptrace interface:
112PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
113PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
114PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
115PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
116PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
117PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
118PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
119PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
120PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
121/* *INDENT_ON * */
c877c8e6 122
45229ea4
EZ
123static int
124ppc_register_u_addr (int regno)
c877c8e6 125{
16333c4f 126 int u_addr = -1;
dc5cfeb6 127 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
16333c4f
EZ
128
129 /* General purpose registers occupy 1 slot each in the buffer */
dc5cfeb6 130 if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum )
45229ea4 131 u_addr = ((PT_R0 + regno) * 4);
16333c4f
EZ
132
133 /* Floating point regs: 2 slots each */
134 if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
45229ea4 135 u_addr = ((PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4);
16333c4f
EZ
136
137 /* UISA special purpose registers: 1 slot each */
138 if (regno == PC_REGNUM)
45229ea4 139 u_addr = PT_NIP * 4;
dc5cfeb6 140 if (regno == tdep->ppc_lr_regnum)
45229ea4 141 u_addr = PT_LNK * 4;
dc5cfeb6 142 if (regno == tdep->ppc_cr_regnum)
45229ea4 143 u_addr = PT_CCR * 4;
dc5cfeb6 144 if (regno == tdep->ppc_xer_regnum)
45229ea4 145 u_addr = PT_XER * 4;
dc5cfeb6 146 if (regno == tdep->ppc_ctr_regnum)
45229ea4 147 u_addr = PT_CTR * 4;
dc5cfeb6 148 if (regno == tdep->ppc_mq_regnum)
45229ea4 149 u_addr = PT_MQ * 4;
dc5cfeb6 150 if (regno == tdep->ppc_ps_regnum)
45229ea4 151 u_addr = PT_MSR * 4;
16333c4f
EZ
152
153 return u_addr;
c877c8e6
KB
154}
155
45229ea4
EZ
156static int
157ppc_ptrace_cannot_fetch_store_register (int regno)
158{
159 return (ppc_register_u_addr (regno) == -1);
160}
161
9abe5450
EZ
162/* The Linux kernel ptrace interface for AltiVec registers uses the
163 registers set mechanism, as opposed to the interface for all the
164 other registers, that stores/fetches each register individually. */
165static void
166fetch_altivec_register (int tid, int regno)
167{
168 int ret;
169 int offset = 0;
170 gdb_vrregset_t regs;
171 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
172 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
173
174 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
175 if (ret < 0)
176 {
177 if (errno == EIO)
178 {
179 have_ptrace_getvrregs = 0;
180 return;
181 }
182 perror_with_name ("Unable to fetch AltiVec register");
183 }
184
185 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
186 long on the hardware. We deal only with the lower 4 bytes of the
187 vector. VRSAVE is at the end of the array in a 4 bytes slot, so
188 there is no need to define an offset for it. */
189 if (regno == (tdep->ppc_vrsave_regnum - 1))
190 offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
191
192 supply_register (regno,
193 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
194}
195
45229ea4 196static void
05f13b9c 197fetch_register (int tid, int regno)
45229ea4
EZ
198{
199 /* This isn't really an address. But ptrace thinks of it as one. */
200 char mess[128]; /* For messages */
201 register int i;
202 unsigned int offset; /* Offset of registers within the u area. */
203 char *buf = alloca (MAX_REGISTER_RAW_SIZE);
45229ea4
EZ
204 CORE_ADDR regaddr = ppc_register_u_addr (regno);
205
9abe5450
EZ
206 if (altivec_register_p (regno))
207 {
208 /* If this is the first time through, or if it is not the first
209 time through, and we have comfirmed that there is kernel
210 support for such a ptrace request, then go and fetch the
211 register. */
212 if (have_ptrace_getvrregs)
213 {
214 fetch_altivec_register (tid, regno);
215 return;
216 }
217 /* If we have discovered that there is no ptrace support for
218 AltiVec registers, fall through and return zeroes, because
219 regaddr will be -1 in this case. */
220 }
221
45229ea4
EZ
222 if (regaddr == -1)
223 {
224 memset (buf, '\0', REGISTER_RAW_SIZE (regno)); /* Supply zeroes */
225 supply_register (regno, buf);
226 return;
227 }
228
45229ea4
EZ
229 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
230 {
231 errno = 0;
232 *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid,
233 (PTRACE_ARG3_TYPE) regaddr, 0);
234 regaddr += sizeof (PTRACE_XFER_TYPE);
235 if (errno != 0)
236 {
237 sprintf (mess, "reading register %s (#%d)",
238 REGISTER_NAME (regno), regno);
239 perror_with_name (mess);
240 }
241 }
242 supply_register (regno, buf);
243}
244
9abe5450
EZ
245static void
246supply_vrregset (gdb_vrregset_t *vrregsetp)
247{
248 int i;
249 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
250 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
251 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
252 int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
253
254 for (i = 0; i < num_of_vrregs; i++)
255 {
256 /* The last 2 registers of this set are only 32 bit long, not
257 128. However an offset is necessary only for VSCR because it
258 occupies a whole vector, while VRSAVE occupies a full 4 bytes
259 slot. */
260 if (i == (num_of_vrregs - 2))
261 supply_register (tdep->ppc_vr0_regnum + i,
262 *vrregsetp + i * vrregsize + offset);
263 else
264 supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
265 }
266}
267
268static void
269fetch_altivec_registers (int tid)
270{
271 int ret;
272 gdb_vrregset_t regs;
273
274 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
275 if (ret < 0)
276 {
277 if (errno == EIO)
278 {
279 have_ptrace_getvrregs = 0;
280 return;
281 }
282 perror_with_name ("Unable to fetch AltiVec registers");
283 }
284 supply_vrregset (&regs);
285}
286
45229ea4 287static void
05f13b9c 288fetch_ppc_registers (int tid)
45229ea4
EZ
289{
290 int i;
9abe5450
EZ
291 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
292
293 for (i = 0; i <= tdep->ppc_mq_regnum; i++)
05f13b9c 294 fetch_register (tid, i);
9abe5450
EZ
295 if (have_ptrace_getvrregs)
296 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
297 fetch_altivec_registers (tid);
45229ea4
EZ
298}
299
300/* Fetch registers from the child process. Fetch all registers if
301 regno == -1, otherwise fetch all general registers or all floating
302 point registers depending upon the value of regno. */
303void
304fetch_inferior_registers (int regno)
305{
9abe5450 306 /* Overload thread id onto process id */
05f13b9c
EZ
307 int tid = TIDGET (inferior_ptid);
308
309 /* No thread id, just use process id */
310 if (tid == 0)
311 tid = PIDGET (inferior_ptid);
312
9abe5450 313 if (regno == -1)
05f13b9c 314 fetch_ppc_registers (tid);
45229ea4 315 else
05f13b9c 316 fetch_register (tid, regno);
45229ea4
EZ
317}
318
319/* Store one register. */
9abe5450
EZ
320static void
321store_altivec_register (int tid, int regno)
322{
323 int ret;
324 int offset = 0;
325 gdb_vrregset_t regs;
326 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
327 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
328
329 ret = ptrace (PTRACE_GETVRREGS, tid, 0, &regs);
330 if (ret < 0)
331 {
332 if (errno == EIO)
333 {
334 have_ptrace_getvrregs = 0;
335 return;
336 }
337 perror_with_name ("Unable to fetch AltiVec register");
338 }
339
340 /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes
341 long on the hardware. */
342 if (regno == (tdep->ppc_vrsave_regnum - 1))
343 offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
344
345 regcache_collect (regno,
346 regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
347
348 ret = ptrace (PTRACE_SETVRREGS, tid, 0, &regs);
349 if (ret < 0)
350 perror_with_name ("Unable to store AltiVec register");
351}
352
45229ea4 353static void
05f13b9c 354store_register (int tid, int regno)
45229ea4
EZ
355{
356 /* This isn't really an address. But ptrace thinks of it as one. */
357 CORE_ADDR regaddr = ppc_register_u_addr (regno);
358 char mess[128]; /* For messages */
359 register int i;
360 unsigned int offset; /* Offset of registers within the u area. */
45229ea4
EZ
361 char *buf = alloca (MAX_REGISTER_RAW_SIZE);
362
9abe5450 363 if (altivec_register_p (regno))
45229ea4 364 {
9abe5450 365 store_altivec_register (tid, regno);
45229ea4
EZ
366 return;
367 }
368
9abe5450
EZ
369 if (regaddr == -1)
370 return;
371
45229ea4
EZ
372 regcache_collect (regno, buf);
373 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE))
374 {
375 errno = 0;
376 ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr,
377 *(PTRACE_XFER_TYPE *) & buf[i]);
378 regaddr += sizeof (PTRACE_XFER_TYPE);
379 if (errno != 0)
380 {
381 sprintf (mess, "writing register %s (#%d)",
382 REGISTER_NAME (regno), regno);
383 perror_with_name (mess);
384 }
385 }
386}
387
9abe5450
EZ
388static void
389fill_vrregset (gdb_vrregset_t *vrregsetp)
390{
391 int i;
392 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
393 int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1;
394 int vrregsize = REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum);
395 int offset = vrregsize - REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum);
396
397 for (i = 0; i < num_of_vrregs; i++)
398 {
399 /* The last 2 registers of this set are only 32 bit long, not
400 128, but only VSCR is fetched as a 16 bytes quantity. */
401 if (i == (num_of_vrregs - 2))
402 regcache_collect (tdep->ppc_vr0_regnum + i,
403 *vrregsetp + i * vrregsize + offset);
404 else
405 regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize);
406 }
407}
408
409static void
410store_altivec_registers (int tid)
411{
412 int ret;
413 gdb_vrregset_t regs;
414
415 ret = ptrace (PTRACE_GETVRREGS, tid, 0, (int) &regs);
416 if (ret < 0)
417 {
418 if (errno == EIO)
419 {
420 have_ptrace_getvrregs = 0;
421 return;
422 }
423 perror_with_name ("Couldn't get AltiVec registers");
424 }
425
426 fill_vrregset (&regs);
427
428 if (ptrace (PTRACE_SETVRREGS, tid, 0, (int) &regs) < 0)
429 perror_with_name ("Couldn't write AltiVec registers");
430}
431
45229ea4 432static void
05f13b9c 433store_ppc_registers (int tid)
45229ea4
EZ
434{
435 int i;
9abe5450 436 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
45229ea4 437
9abe5450 438 for (i = 0; i <= tdep->ppc_mq_regnum; i++)
05f13b9c 439 store_register (tid, i);
9abe5450
EZ
440 if (have_ptrace_getvrregs)
441 if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1)
442 store_altivec_registers (tid);
45229ea4
EZ
443}
444
445void
446store_inferior_registers (int regno)
447{
05f13b9c
EZ
448 /* Overload thread id onto process id */
449 int tid = TIDGET (inferior_ptid);
450
451 /* No thread id, just use process id */
452 if (tid == 0)
453 tid = PIDGET (inferior_ptid);
454
45229ea4 455 if (regno >= 0)
05f13b9c 456 store_register (tid, regno);
45229ea4 457 else
05f13b9c 458 store_ppc_registers (tid);
45229ea4
EZ
459}
460
50c9bd31 461void
8ae45c11 462supply_gregset (gdb_gregset_t *gregsetp)
c877c8e6
KB
463{
464 int regi;
2ac44c70 465 register elf_greg_t *regp = (elf_greg_t *) gregsetp;
dc5cfeb6 466 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
c877c8e6
KB
467
468 for (regi = 0; regi < 32; regi++)
469 supply_register (regi, (char *) (regp + regi));
470
16333c4f 471 supply_register (PC_REGNUM, (char *) (regp + PT_NIP));
dc5cfeb6
EZ
472 supply_register (tdep->ppc_lr_regnum, (char *) (regp + PT_LNK));
473 supply_register (tdep->ppc_cr_regnum, (char *) (regp + PT_CCR));
474 supply_register (tdep->ppc_xer_regnum, (char *) (regp + PT_XER));
475 supply_register (tdep->ppc_ctr_regnum, (char *) (regp + PT_CTR));
476 supply_register (tdep->ppc_mq_regnum, (char *) (regp + PT_MQ));
477 supply_register (tdep->ppc_ps_regnum, (char *) (regp + PT_MSR));
c877c8e6
KB
478}
479
fdb28ac4 480void
8ae45c11 481fill_gregset (gdb_gregset_t *gregsetp, int regno)
fdb28ac4
KB
482{
483 int regi;
2ac44c70 484 elf_greg_t *regp = (elf_greg_t *) gregsetp;
dc5cfeb6 485 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
fdb28ac4 486
fdb28ac4
KB
487 for (regi = 0; regi < 32; regi++)
488 {
16333c4f
EZ
489 if ((regno == -1) || regno == regi)
490 regcache_collect (regi, regp + PT_R0 + regi);
fdb28ac4
KB
491 }
492
16333c4f
EZ
493 if ((regno == -1) || regno == PC_REGNUM)
494 regcache_collect (PC_REGNUM, regp + PT_NIP);
05f13b9c 495 if ((regno == -1) || regno == tdep->ppc_lr_regnum)
dc5cfeb6 496 regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK);
05f13b9c 497 if ((regno == -1) || regno == tdep->ppc_cr_regnum)
dc5cfeb6 498 regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR);
05f13b9c 499 if ((regno == -1) || regno == tdep->ppc_xer_regnum)
dc5cfeb6 500 regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER);
05f13b9c 501 if ((regno == -1) || regno == tdep->ppc_ctr_regnum)
dc5cfeb6 502 regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR);
05f13b9c 503 if ((regno == -1) || regno == tdep->ppc_mq_regnum)
dc5cfeb6 504 regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ);
05f13b9c 505 if ((regno == -1) || regno == tdep->ppc_ps_regnum)
dc5cfeb6 506 regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR);
fdb28ac4
KB
507}
508
50c9bd31 509void
8ae45c11 510supply_fpregset (gdb_fpregset_t * fpregsetp)
c877c8e6
KB
511{
512 int regi;
9abe5450 513
c877c8e6 514 for (regi = 0; regi < 32; regi++)
05f13b9c 515 supply_register (FP0_REGNUM + regi, (char *) (*fpregsetp + regi));
c877c8e6 516}
fdb28ac4 517
9abe5450
EZ
518/* Given a pointer to a floating point register set in /proc format
519 (fpregset_t *), update the register specified by REGNO from gdb's
520 idea of the current floating point register set. If REGNO is -1,
521 update them all. */
fdb28ac4 522void
8ae45c11 523fill_fpregset (gdb_fpregset_t *fpregsetp, int regno)
fdb28ac4
KB
524{
525 int regi;
fdb28ac4
KB
526
527 for (regi = 0; regi < 32; regi++)
528 {
529 if ((regno == -1) || (regno == FP0_REGNUM + regi))
f00d3753 530 regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi));
fdb28ac4
KB
531 }
532}