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7b112f9c JT |
1 | /* Target-dependent code for PowerPC systems using the SVR4 ABI |
2 | for GDB, the GNU debugger. | |
3 | ||
1d506c26 | 4 | Copyright (C) 2000-2024 Free Software Foundation, Inc. |
7b112f9c JT |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
7b112f9c JT |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
7b112f9c JT |
20 | |
21 | #include "defs.h" | |
83b6e1f1 | 22 | #include "language.h" |
7b112f9c JT |
23 | #include "gdbcore.h" |
24 | #include "inferior.h" | |
25 | #include "regcache.h" | |
26 | #include "value.h" | |
7b112f9c | 27 | #include "ppc-tdep.h" |
6066c3de | 28 | #include "target.h" |
0a90bcdd | 29 | #include "objfiles.h" |
7d9b040b | 30 | #include "infcall.h" |
54fcddd0 | 31 | #include "dwarf2.h" |
a0eda3df | 32 | #include "dwarf2/loc.h" |
3b2ca824 | 33 | #include "target-float.h" |
325fac50 | 34 | #include <algorithm> |
7b112f9c | 35 | |
88aed45e UW |
36 | |
37 | /* Check whether FTPYE is a (pointer to) function type that should use | |
38 | the OpenCL vector ABI. */ | |
39 | ||
40 | static int | |
41 | ppc_sysv_use_opencl_abi (struct type *ftype) | |
42 | { | |
43 | ftype = check_typedef (ftype); | |
44 | ||
78134374 | 45 | if (ftype->code () == TYPE_CODE_PTR) |
27710edb | 46 | ftype = check_typedef (ftype->target_type ()); |
88aed45e | 47 | |
78134374 | 48 | return (ftype->code () == TYPE_CODE_FUNC |
88aed45e UW |
49 | && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL); |
50 | } | |
51 | ||
0df8b418 | 52 | /* Pass the arguments in either registers, or in the stack. Using the |
7b112f9c JT |
53 | ppc sysv ABI, the first eight words of the argument list (that might |
54 | be less than eight parameters if some parameters occupy more than one | |
55 | word) are passed in r3..r10 registers. float and double parameters are | |
0df8b418 MS |
56 | passed in fpr's, in addition to that. Rest of the parameters if any |
57 | are passed in user stack. | |
7b112f9c JT |
58 | |
59 | If the function is returning a structure, then the return address is passed | |
85102364 | 60 | in r3, then the first 7 words of the parameters can be passed in registers, |
0df8b418 | 61 | starting from r4. */ |
7b112f9c JT |
62 | |
63 | CORE_ADDR | |
7d9b040b | 64 | ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
77b2b6d4 AC |
65 | struct regcache *regcache, CORE_ADDR bp_addr, |
66 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
67 | function_call_return_method return_method, |
68 | CORE_ADDR struct_addr) | |
7b112f9c | 69 | { |
08106042 | 70 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e17a4113 | 71 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d0c97917 | 72 | int opencl_abi = ppc_sysv_use_opencl_abi (function->type ()); |
fb4443d8 | 73 | ULONGEST saved_sp; |
68856ea3 AC |
74 | int argspace = 0; /* 0 is an initial wrong guess. */ |
75 | int write_pass; | |
7b112f9c | 76 | |
b14d30e1 JM |
77 | gdb_assert (tdep->wordsize == 4); |
78 | ||
40a6adc1 | 79 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 80 | &saved_sp); |
fb4443d8 | 81 | |
68856ea3 | 82 | /* Go through the argument list twice. |
7b112f9c | 83 | |
68856ea3 AC |
84 | Pass 1: Figure out how much new stack space is required for |
85 | arguments and pushed values. Unlike the PowerOpen ABI, the SysV | |
86 | ABI doesn't reserve any extra space for parameters which are put | |
87 | in registers, but does always push structures and then pass their | |
88 | address. | |
7a41266b | 89 | |
68856ea3 AC |
90 | Pass 2: Replay the same computation but this time also write the |
91 | values out to the target. */ | |
7b112f9c | 92 | |
68856ea3 AC |
93 | for (write_pass = 0; write_pass < 2; write_pass++) |
94 | { | |
95 | int argno; | |
96 | /* Next available floating point register for float and double | |
dda83cd7 | 97 | arguments. */ |
68856ea3 AC |
98 | int freg = 1; |
99 | /* Next available general register for non-float, non-vector | |
dda83cd7 | 100 | arguments. */ |
68856ea3 AC |
101 | int greg = 3; |
102 | /* Next available vector register for vector arguments. */ | |
103 | int vreg = 2; | |
104 | /* Arguments start above the "LR save word" and "Back chain". */ | |
105 | int argoffset = 2 * tdep->wordsize; | |
106 | /* Structures start after the arguments. */ | |
107 | int structoffset = argoffset + argspace; | |
108 | ||
109 | /* If the function is returning a `struct', then the first word | |
dda83cd7 SM |
110 | (which will be passed in r3) is used for struct return |
111 | address. In that case we should advance one word and start | |
112 | from r4 register to copy parameters. */ | |
cf84fa6b | 113 | if (return_method == return_method_struct) |
7b112f9c | 114 | { |
68856ea3 AC |
115 | if (write_pass) |
116 | regcache_cooked_write_signed (regcache, | |
117 | tdep->ppc_gp0_regnum + greg, | |
118 | struct_addr); | |
119 | greg++; | |
7b112f9c | 120 | } |
68856ea3 AC |
121 | |
122 | for (argno = 0; argno < nargs; argno++) | |
7b112f9c | 123 | { |
68856ea3 | 124 | struct value *arg = args[argno]; |
d0c97917 | 125 | struct type *type = check_typedef (arg->type ()); |
df86565b | 126 | int len = type->length (); |
efaf1ae0 | 127 | const bfd_byte *val = arg->contents ().data (); |
68856ea3 | 128 | |
78134374 | 129 | if (type->code () == TYPE_CODE_FLT && len <= 8 |
55eddb0f | 130 | && !tdep->soft_float) |
7b112f9c | 131 | { |
68856ea3 | 132 | /* Floating point value converted to "double" then |
dda83cd7 SM |
133 | passed in an FP register, when the registers run out, |
134 | 8 byte aligned stack is used. */ | |
68856ea3 AC |
135 | if (freg <= 8) |
136 | { | |
137 | if (write_pass) | |
138 | { | |
139 | /* Always store the floating point value using | |
dda83cd7 | 140 | the register's floating-point format. */ |
0f068fb5 | 141 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
68856ea3 | 142 | struct type *regtype |
366f009f | 143 | = register_type (gdbarch, tdep->ppc_fp0_regnum + freg); |
3b2ca824 | 144 | target_float_convert (val, type, regval, regtype); |
b66f5587 SM |
145 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, |
146 | regval); | |
68856ea3 AC |
147 | } |
148 | freg++; | |
149 | } | |
7b112f9c JT |
150 | else |
151 | { | |
f964a756 MK |
152 | /* The SysV ABI tells us to convert floats to |
153 | doubles before writing them to an 8 byte aligned | |
154 | stack location. Unfortunately GCC does not do | |
155 | that, and stores floats into 4 byte aligned | |
156 | locations without converting them to doubles. | |
157 | Since there is no know compiler that actually | |
158 | follows the ABI here, we implement the GCC | |
159 | convention. */ | |
160 | ||
161 | /* Align to 4 bytes or 8 bytes depending on the type of | |
162 | the argument (float or double). */ | |
163 | argoffset = align_up (argoffset, len); | |
68856ea3 | 164 | if (write_pass) |
68856ea3 | 165 | write_memory (sp + argoffset, val, len); |
f964a756 | 166 | argoffset += len; |
7b112f9c JT |
167 | } |
168 | } | |
78134374 | 169 | else if (type->code () == TYPE_CODE_FLT |
b14d30e1 JM |
170 | && len == 16 |
171 | && !tdep->soft_float | |
40a6adc1 | 172 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
173 | == floatformats_ibm_long_double)) |
174 | { | |
175 | /* IBM long double passed in two FP registers if | |
176 | available, otherwise 8-byte aligned stack. */ | |
177 | if (freg <= 7) | |
178 | { | |
179 | if (write_pass) | |
180 | { | |
b66f5587 SM |
181 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val); |
182 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1, | |
183 | val + 8); | |
b14d30e1 JM |
184 | } |
185 | freg += 2; | |
186 | } | |
187 | else | |
188 | { | |
189 | argoffset = align_up (argoffset, 8); | |
190 | if (write_pass) | |
191 | write_memory (sp + argoffset, val, len); | |
192 | argoffset += 16; | |
193 | } | |
194 | } | |
55eddb0f | 195 | else if (len == 8 |
78134374 SM |
196 | && (type->code () == TYPE_CODE_INT /* long long */ |
197 | || type->code () == TYPE_CODE_FLT /* double */ | |
198 | || (type->code () == TYPE_CODE_DECFLOAT | |
00fbcec4 | 199 | && tdep->soft_float))) |
7b112f9c | 200 | { |
00fbcec4 | 201 | /* "long long" or soft-float "double" or "_Decimal64" |
dda83cd7 SM |
202 | passed in an odd/even register pair with the low |
203 | addressed word in the odd register and the high | |
204 | addressed word in the even register, or when the | |
205 | registers run out an 8 byte aligned stack | |
206 | location. */ | |
68856ea3 AC |
207 | if (greg > 9) |
208 | { | |
209 | /* Just in case GREG was 10. */ | |
210 | greg = 11; | |
211 | argoffset = align_up (argoffset, 8); | |
212 | if (write_pass) | |
213 | write_memory (sp + argoffset, val, len); | |
214 | argoffset += 8; | |
215 | } | |
68856ea3 AC |
216 | else |
217 | { | |
218 | /* Must start on an odd register - r3/r4 etc. */ | |
219 | if ((greg & 1) == 0) | |
220 | greg++; | |
221 | if (write_pass) | |
222 | { | |
b66f5587 SM |
223 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0, |
224 | val + 0); | |
225 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1, | |
226 | val + 4); | |
68856ea3 AC |
227 | } |
228 | greg += 2; | |
229 | } | |
7b112f9c | 230 | } |
00fbcec4 | 231 | else if (len == 16 |
78134374 | 232 | && ((type->code () == TYPE_CODE_FLT |
00fbcec4 JM |
233 | && (gdbarch_long_double_format (gdbarch) |
234 | == floatformats_ibm_long_double)) | |
78134374 | 235 | || (type->code () == TYPE_CODE_DECFLOAT |
00fbcec4 | 236 | && tdep->soft_float))) |
b14d30e1 | 237 | { |
00fbcec4 JM |
238 | /* Soft-float IBM long double or _Decimal128 passed in |
239 | four consecutive registers, or on the stack. The | |
240 | registers are not necessarily odd/even pairs. */ | |
b14d30e1 JM |
241 | if (greg > 7) |
242 | { | |
243 | greg = 11; | |
244 | argoffset = align_up (argoffset, 8); | |
245 | if (write_pass) | |
246 | write_memory (sp + argoffset, val, len); | |
247 | argoffset += 16; | |
248 | } | |
249 | else | |
250 | { | |
251 | if (write_pass) | |
252 | { | |
b66f5587 SM |
253 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0, |
254 | val + 0); | |
255 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1, | |
256 | val + 4); | |
257 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 2, | |
258 | val + 8); | |
259 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 3, | |
260 | val + 12); | |
b14d30e1 JM |
261 | } |
262 | greg += 4; | |
263 | } | |
264 | } | |
78134374 | 265 | else if (type->code () == TYPE_CODE_DECFLOAT && len <= 8 |
1300a2f4 TJB |
266 | && !tdep->soft_float) |
267 | { | |
268 | /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can | |
dda83cd7 | 269 | end up in memory. */ |
1300a2f4 TJB |
270 | |
271 | if (freg <= 8) | |
272 | { | |
273 | if (write_pass) | |
274 | { | |
0f068fb5 | 275 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
1300a2f4 TJB |
276 | const gdb_byte *p; |
277 | ||
278 | /* 32-bit decimal floats are right aligned in the | |
279 | doubleword. */ | |
df86565b | 280 | if (type->length () == 4) |
01add95b SM |
281 | { |
282 | memcpy (regval + 4, val, 4); | |
283 | p = regval; | |
284 | } | |
1300a2f4 TJB |
285 | else |
286 | p = val; | |
287 | ||
b66f5587 | 288 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, p); |
1300a2f4 TJB |
289 | } |
290 | ||
291 | freg++; | |
292 | } | |
293 | else | |
294 | { | |
295 | argoffset = align_up (argoffset, len); | |
296 | ||
297 | if (write_pass) | |
298 | /* Write value in the stack's parameter save area. */ | |
299 | write_memory (sp + argoffset, val, len); | |
300 | ||
301 | argoffset += len; | |
302 | } | |
303 | } | |
78134374 | 304 | else if (type->code () == TYPE_CODE_DECFLOAT && len == 16 |
1300a2f4 TJB |
305 | && !tdep->soft_float) |
306 | { | |
307 | /* 128-bit decimal floats go in f2 .. f7, always in even/odd | |
308 | pairs. They can end up in memory, using two doublewords. */ | |
309 | ||
310 | if (freg <= 6) | |
311 | { | |
312 | /* Make sure freg is even. */ | |
313 | freg += freg & 1; | |
314 | ||
315 | if (write_pass) | |
316 | { | |
b66f5587 SM |
317 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val); |
318 | regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1, | |
319 | val + 8); | |
1300a2f4 TJB |
320 | } |
321 | } | |
322 | else | |
323 | { | |
324 | argoffset = align_up (argoffset, 8); | |
325 | ||
326 | if (write_pass) | |
327 | write_memory (sp + argoffset, val, 16); | |
328 | ||
329 | argoffset += 16; | |
330 | } | |
331 | ||
332 | /* If a 128-bit decimal float goes to the stack because only f7 | |
dda83cd7 | 333 | and f8 are free (thus there's no even/odd register pair |
1300a2f4 TJB |
334 | available), these registers should be marked as occupied. |
335 | Hence we increase freg even when writing to memory. */ | |
336 | freg += 2; | |
337 | } | |
54fcddd0 | 338 | else if (len < 16 |
78134374 | 339 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 340 | && type->is_vector () |
54fcddd0 UW |
341 | && opencl_abi) |
342 | { | |
343 | /* OpenCL vectors shorter than 16 bytes are passed as if | |
344 | a series of independent scalars. */ | |
27710edb | 345 | struct type *eltype = check_typedef (type->target_type ()); |
df86565b | 346 | int i, nelt = type->length () / eltype->length (); |
54fcddd0 UW |
347 | |
348 | for (i = 0; i < nelt; i++) | |
349 | { | |
df86565b | 350 | const gdb_byte *elval = val + i * eltype->length (); |
54fcddd0 | 351 | |
78134374 | 352 | if (eltype->code () == TYPE_CODE_FLT && !tdep->soft_float) |
54fcddd0 UW |
353 | { |
354 | if (freg <= 8) | |
355 | { | |
356 | if (write_pass) | |
357 | { | |
358 | int regnum = tdep->ppc_fp0_regnum + freg; | |
0f068fb5 | 359 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
54fcddd0 UW |
360 | struct type *regtype |
361 | = register_type (gdbarch, regnum); | |
3b2ca824 UW |
362 | target_float_convert (elval, eltype, |
363 | regval, regtype); | |
b66f5587 | 364 | regcache->cooked_write (regnum, regval); |
54fcddd0 UW |
365 | } |
366 | freg++; | |
367 | } | |
368 | else | |
369 | { | |
370 | argoffset = align_up (argoffset, len); | |
371 | if (write_pass) | |
372 | write_memory (sp + argoffset, val, len); | |
373 | argoffset += len; | |
374 | } | |
375 | } | |
df86565b | 376 | else if (eltype->length () == 8) |
54fcddd0 UW |
377 | { |
378 | if (greg > 9) | |
379 | { | |
380 | /* Just in case GREG was 10. */ | |
381 | greg = 11; | |
382 | argoffset = align_up (argoffset, 8); | |
383 | if (write_pass) | |
384 | write_memory (sp + argoffset, elval, | |
df86565b | 385 | eltype->length ()); |
54fcddd0 UW |
386 | argoffset += 8; |
387 | } | |
388 | else | |
389 | { | |
390 | /* Must start on an odd register - r3/r4 etc. */ | |
391 | if ((greg & 1) == 0) | |
392 | greg++; | |
393 | if (write_pass) | |
394 | { | |
395 | int regnum = tdep->ppc_gp0_regnum + greg; | |
b66f5587 SM |
396 | regcache->cooked_write (regnum + 0, elval + 0); |
397 | regcache->cooked_write (regnum + 1, elval + 4); | |
54fcddd0 UW |
398 | } |
399 | greg += 2; | |
400 | } | |
401 | } | |
402 | else | |
403 | { | |
0f068fb5 | 404 | gdb_byte word[PPC_MAX_REGISTER_SIZE]; |
54fcddd0 UW |
405 | store_unsigned_integer (word, tdep->wordsize, byte_order, |
406 | unpack_long (eltype, elval)); | |
407 | ||
408 | if (greg <= 10) | |
409 | { | |
410 | if (write_pass) | |
b66f5587 SM |
411 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg, |
412 | word); | |
54fcddd0 UW |
413 | greg++; |
414 | } | |
415 | else | |
416 | { | |
417 | argoffset = align_up (argoffset, tdep->wordsize); | |
418 | if (write_pass) | |
419 | write_memory (sp + argoffset, word, tdep->wordsize); | |
420 | argoffset += tdep->wordsize; | |
421 | } | |
422 | } | |
423 | } | |
424 | } | |
425 | else if (len >= 16 | |
78134374 | 426 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 427 | && type->is_vector () |
54fcddd0 UW |
428 | && opencl_abi) |
429 | { | |
430 | /* OpenCL vectors 16 bytes or longer are passed as if | |
431 | a series of AltiVec vectors. */ | |
432 | int i; | |
433 | ||
434 | for (i = 0; i < len / 16; i++) | |
435 | { | |
436 | const gdb_byte *elval = val + i * 16; | |
437 | ||
438 | if (vreg <= 13) | |
439 | { | |
440 | if (write_pass) | |
b66f5587 SM |
441 | regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, |
442 | elval); | |
54fcddd0 UW |
443 | vreg++; |
444 | } | |
445 | else | |
446 | { | |
447 | argoffset = align_up (argoffset, 16); | |
448 | if (write_pass) | |
449 | write_memory (sp + argoffset, elval, 16); | |
450 | argoffset += 16; | |
451 | } | |
452 | } | |
453 | } | |
68856ea3 | 454 | else if (len == 16 |
ebbac168 CL |
455 | && ((type->code () == TYPE_CODE_ARRAY |
456 | && type->is_vector () | |
457 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
458 | || (type->code () == TYPE_CODE_FLT | |
459 | && (gdbarch_long_double_format (gdbarch) | |
460 | == floatformats_ieee_quad)))) | |
7b112f9c | 461 | { |
68856ea3 | 462 | /* Vector parameter passed in an Altivec register, or |
ebbac168 CL |
463 | when that runs out, 16 byte aligned stack location. |
464 | IEEE FLOAT 128-bit also passes parameters in vector | |
465 | registers. */ | |
7b112f9c JT |
466 | if (vreg <= 13) |
467 | { | |
68856ea3 | 468 | if (write_pass) |
b66f5587 | 469 | regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val); |
7b112f9c JT |
470 | vreg++; |
471 | } | |
472 | else | |
473 | { | |
68856ea3 AC |
474 | argoffset = align_up (argoffset, 16); |
475 | if (write_pass) | |
476 | write_memory (sp + argoffset, val, 16); | |
7b112f9c JT |
477 | argoffset += 16; |
478 | } | |
479 | } | |
944fcfab | 480 | else if (len == 8 |
78134374 | 481 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 482 | && type->is_vector () |
55eddb0f | 483 | && tdep->vector_abi == POWERPC_VEC_SPE) |
944fcfab | 484 | { |
68856ea3 | 485 | /* Vector parameter passed in an e500 register, or when |
dda83cd7 SM |
486 | that runs out, 8 byte aligned stack location. Note |
487 | that since e500 vector and general purpose registers | |
488 | both map onto the same underlying register set, a | |
489 | "greg" and not a "vreg" is consumed here. A cooked | |
490 | write stores the value in the correct locations | |
491 | within the raw register cache. */ | |
944fcfab AC |
492 | if (greg <= 10) |
493 | { | |
68856ea3 | 494 | if (write_pass) |
b66f5587 | 495 | regcache->cooked_write (tdep->ppc_ev0_regnum + greg, val); |
944fcfab AC |
496 | greg++; |
497 | } | |
498 | else | |
499 | { | |
68856ea3 AC |
500 | argoffset = align_up (argoffset, 8); |
501 | if (write_pass) | |
502 | write_memory (sp + argoffset, val, 8); | |
944fcfab AC |
503 | argoffset += 8; |
504 | } | |
505 | } | |
68856ea3 AC |
506 | else |
507 | { | |
508 | /* Reduce the parameter down to something that fits in a | |
dda83cd7 | 509 | "word". */ |
0f068fb5 AH |
510 | gdb_byte word[PPC_MAX_REGISTER_SIZE]; |
511 | memset (word, 0, PPC_MAX_REGISTER_SIZE); | |
68856ea3 | 512 | if (len > tdep->wordsize |
78134374 SM |
513 | || type->code () == TYPE_CODE_STRUCT |
514 | || type->code () == TYPE_CODE_UNION) | |
68856ea3 | 515 | { |
55eddb0f | 516 | /* Structs and large values are put in an |
0df8b418 | 517 | aligned stack slot ... */ |
78134374 | 518 | if (type->code () == TYPE_CODE_ARRAY |
bd63c870 | 519 | && type->is_vector () |
55eddb0f DJ |
520 | && len >= 16) |
521 | structoffset = align_up (structoffset, 16); | |
522 | else | |
523 | structoffset = align_up (structoffset, 8); | |
524 | ||
68856ea3 AC |
525 | if (write_pass) |
526 | write_memory (sp + structoffset, val, len); | |
527 | /* ... and then a "word" pointing to that address is | |
944fcfab | 528 | passed as the parameter. */ |
e17a4113 | 529 | store_unsigned_integer (word, tdep->wordsize, byte_order, |
68856ea3 AC |
530 | sp + structoffset); |
531 | structoffset += len; | |
532 | } | |
78134374 | 533 | else if (type->code () == TYPE_CODE_INT) |
68856ea3 | 534 | /* Sign or zero extend the "int" into a "word". */ |
e17a4113 | 535 | store_unsigned_integer (word, tdep->wordsize, byte_order, |
68856ea3 AC |
536 | unpack_long (type, val)); |
537 | else | |
538 | /* Always goes in the low address. */ | |
539 | memcpy (word, val, len); | |
540 | /* Store that "word" in a register, or on the stack. | |
dda83cd7 | 541 | The words have "4" byte alignment. */ |
68856ea3 AC |
542 | if (greg <= 10) |
543 | { | |
544 | if (write_pass) | |
b66f5587 | 545 | regcache->cooked_write (tdep->ppc_gp0_regnum + greg, word); |
68856ea3 AC |
546 | greg++; |
547 | } | |
548 | else | |
549 | { | |
550 | argoffset = align_up (argoffset, tdep->wordsize); | |
551 | if (write_pass) | |
552 | write_memory (sp + argoffset, word, tdep->wordsize); | |
553 | argoffset += tdep->wordsize; | |
554 | } | |
555 | } | |
556 | } | |
557 | ||
558 | /* Compute the actual stack space requirements. */ | |
559 | if (!write_pass) | |
560 | { | |
561 | /* Remember the amount of space needed by the arguments. */ | |
562 | argspace = argoffset; | |
563 | /* Allocate space for both the arguments and the structures. */ | |
564 | sp -= (argoffset + structoffset); | |
565 | /* Ensure that the stack is still 16 byte aligned. */ | |
566 | sp = align_down (sp, 16); | |
567 | } | |
65ada037 MK |
568 | |
569 | /* The psABI says that "A caller of a function that takes a | |
570 | variable argument list shall set condition register bit 6 to | |
571 | 1 if it passes one or more arguments in the floating-point | |
0df8b418 | 572 | registers. It is strongly recommended that the caller set the |
65ada037 MK |
573 | bit to 0 otherwise..." Doing this for normal functions too |
574 | shouldn't hurt. */ | |
575 | if (write_pass) | |
576 | { | |
577 | ULONGEST cr; | |
578 | ||
579 | regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr); | |
580 | if (freg > 1) | |
581 | cr |= 0x02000000; | |
582 | else | |
583 | cr &= ~0x02000000; | |
584 | regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr); | |
585 | } | |
7b112f9c JT |
586 | } |
587 | ||
68856ea3 | 588 | /* Update %sp. */ |
40a6adc1 | 589 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
68856ea3 AC |
590 | |
591 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
e17a4113 | 592 | write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp); |
68856ea3 | 593 | |
e56a0ecc AC |
594 | /* Point the inferior function call's return address at the dummy's |
595 | breakpoint. */ | |
68856ea3 | 596 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); |
e56a0ecc | 597 | |
7b112f9c JT |
598 | return sp; |
599 | } | |
600 | ||
e765b44c | 601 | /* Handle the return-value conventions for Decimal Floating Point values. */ |
f486487f | 602 | static enum return_value_convention |
1300a2f4 TJB |
603 | get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype, |
604 | struct regcache *regcache, gdb_byte *readbuf, | |
605 | const gdb_byte *writebuf) | |
606 | { | |
08106042 | 607 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
1300a2f4 | 608 | |
78134374 | 609 | gdb_assert (valtype->code () == TYPE_CODE_DECFLOAT); |
1300a2f4 TJB |
610 | |
611 | /* 32-bit and 64-bit decimal floats in f1. */ | |
df86565b | 612 | if (valtype->length () <= 8) |
1300a2f4 TJB |
613 | { |
614 | if (writebuf != NULL) | |
615 | { | |
0f068fb5 | 616 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
1300a2f4 TJB |
617 | const gdb_byte *p; |
618 | ||
619 | /* 32-bit decimal float is right aligned in the doubleword. */ | |
df86565b | 620 | if (valtype->length () == 4) |
1300a2f4 TJB |
621 | { |
622 | memcpy (regval + 4, writebuf, 4); | |
623 | p = regval; | |
624 | } | |
625 | else | |
626 | p = writebuf; | |
627 | ||
b66f5587 | 628 | regcache->cooked_write (tdep->ppc_fp0_regnum + 1, p); |
1300a2f4 TJB |
629 | } |
630 | if (readbuf != NULL) | |
631 | { | |
dca08e1f | 632 | regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf); |
1300a2f4 TJB |
633 | |
634 | /* Left align 32-bit decimal float. */ | |
df86565b | 635 | if (valtype->length () == 4) |
1300a2f4 TJB |
636 | memcpy (readbuf, readbuf + 4, 4); |
637 | } | |
638 | } | |
639 | /* 128-bit decimal floats in f2,f3. */ | |
df86565b | 640 | else if (valtype->length () == 16) |
1300a2f4 TJB |
641 | { |
642 | if (writebuf != NULL || readbuf != NULL) | |
643 | { | |
644 | int i; | |
645 | ||
646 | for (i = 0; i < 2; i++) | |
647 | { | |
648 | if (writebuf != NULL) | |
b66f5587 SM |
649 | regcache->cooked_write (tdep->ppc_fp0_regnum + 2 + i, |
650 | writebuf + i * 8); | |
1300a2f4 | 651 | if (readbuf != NULL) |
dca08e1f SM |
652 | regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i, |
653 | readbuf + i * 8); | |
1300a2f4 TJB |
654 | } |
655 | } | |
656 | } | |
657 | else | |
658 | /* Can't happen. */ | |
f34652de | 659 | internal_error (_("Unknown decimal float size.")); |
1300a2f4 TJB |
660 | |
661 | return RETURN_VALUE_REGISTER_CONVENTION; | |
662 | } | |
663 | ||
e754ae69 AC |
664 | /* Handle the return-value conventions specified by the SysV 32-bit |
665 | PowerPC ABI (including all the supplements): | |
666 | ||
667 | no floating-point: floating-point values returned using 32-bit | |
668 | general-purpose registers. | |
669 | ||
670 | Altivec: 128-bit vectors returned using vector registers. | |
671 | ||
672 | e500: 64-bit vectors returned using the full full 64 bit EV | |
673 | register, floating-point values returned using 32-bit | |
674 | general-purpose registers. | |
675 | ||
676 | GCC (broken): Small struct values right (instead of left) aligned | |
677 | when returned in general-purpose registers. */ | |
678 | ||
679 | static enum return_value_convention | |
54fcddd0 UW |
680 | do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type, |
681 | struct type *type, struct regcache *regcache, | |
682 | gdb_byte *readbuf, const gdb_byte *writebuf, | |
683 | int broken_gcc) | |
e754ae69 | 684 | { |
08106042 | 685 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e17a4113 | 686 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
88aed45e | 687 | int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0; |
54fcddd0 | 688 | |
e754ae69 | 689 | gdb_assert (tdep->wordsize == 4); |
54fcddd0 | 690 | |
78134374 | 691 | if (type->code () == TYPE_CODE_FLT |
df86565b | 692 | && type->length () <= 8 |
55eddb0f | 693 | && !tdep->soft_float) |
e754ae69 | 694 | { |
963e2bb7 | 695 | if (readbuf) |
e754ae69 AC |
696 | { |
697 | /* Floats and doubles stored in "f1". Convert the value to | |
698 | the required type. */ | |
0f068fb5 | 699 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
366f009f | 700 | struct type *regtype = register_type (gdbarch, |
dda83cd7 | 701 | tdep->ppc_fp0_regnum + 1); |
dca08e1f | 702 | regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval); |
3b2ca824 | 703 | target_float_convert (regval, regtype, readbuf, type); |
e754ae69 | 704 | } |
963e2bb7 | 705 | if (writebuf) |
e754ae69 AC |
706 | { |
707 | /* Floats and doubles stored in "f1". Convert the value to | |
708 | the register's "double" type. */ | |
0f068fb5 | 709 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
366f009f | 710 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
3b2ca824 | 711 | target_float_convert (writebuf, type, regval, regtype); |
b66f5587 | 712 | regcache->cooked_write (tdep->ppc_fp0_regnum + 1, regval); |
e754ae69 AC |
713 | } |
714 | return RETURN_VALUE_REGISTER_CONVENTION; | |
715 | } | |
78134374 | 716 | if (type->code () == TYPE_CODE_FLT |
df86565b | 717 | && type->length () == 16 |
b14d30e1 | 718 | && !tdep->soft_float |
0df8b418 MS |
719 | && (gdbarch_long_double_format (gdbarch) |
720 | == floatformats_ibm_long_double)) | |
b14d30e1 JM |
721 | { |
722 | /* IBM long double stored in f1 and f2. */ | |
723 | if (readbuf) | |
724 | { | |
dca08e1f SM |
725 | regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf); |
726 | regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8); | |
b14d30e1 JM |
727 | } |
728 | if (writebuf) | |
729 | { | |
b66f5587 SM |
730 | regcache->cooked_write (tdep->ppc_fp0_regnum + 1, writebuf); |
731 | regcache->cooked_write (tdep->ppc_fp0_regnum + 2, writebuf + 8); | |
b14d30e1 JM |
732 | } |
733 | return RETURN_VALUE_REGISTER_CONVENTION; | |
734 | } | |
df86565b | 735 | if (type->length () == 16 |
78134374 | 736 | && ((type->code () == TYPE_CODE_FLT |
0df8b418 MS |
737 | && (gdbarch_long_double_format (gdbarch) |
738 | == floatformats_ibm_long_double)) | |
78134374 | 739 | || (type->code () == TYPE_CODE_DECFLOAT && tdep->soft_float))) |
b14d30e1 | 740 | { |
00fbcec4 JM |
741 | /* Soft-float IBM long double or _Decimal128 stored in r3, r4, |
742 | r5, r6. */ | |
b14d30e1 JM |
743 | if (readbuf) |
744 | { | |
dca08e1f SM |
745 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf); |
746 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4); | |
747 | regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8); | |
748 | regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12); | |
b14d30e1 JM |
749 | } |
750 | if (writebuf) | |
751 | { | |
b66f5587 SM |
752 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf); |
753 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4); | |
754 | regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8); | |
755 | regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12); | |
b14d30e1 JM |
756 | } |
757 | return RETURN_VALUE_REGISTER_CONVENTION; | |
758 | } | |
df86565b SM |
759 | if ((type->code () == TYPE_CODE_INT && type->length () == 8) |
760 | || (type->code () == TYPE_CODE_FLT && type->length () == 8) | |
761 | || (type->code () == TYPE_CODE_DECFLOAT && type->length () == 8 | |
00fbcec4 | 762 | && tdep->soft_float)) |
e754ae69 | 763 | { |
963e2bb7 | 764 | if (readbuf) |
e754ae69 | 765 | { |
00fbcec4 JM |
766 | /* A long long, double or _Decimal64 stored in the 32 bit |
767 | r3/r4. */ | |
dca08e1f SM |
768 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0); |
769 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4); | |
e754ae69 | 770 | } |
963e2bb7 | 771 | if (writebuf) |
e754ae69 | 772 | { |
00fbcec4 JM |
773 | /* A long long, double or _Decimal64 stored in the 32 bit |
774 | r3/r4. */ | |
b66f5587 SM |
775 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0); |
776 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4); | |
e754ae69 AC |
777 | } |
778 | return RETURN_VALUE_REGISTER_CONVENTION; | |
779 | } | |
78134374 | 780 | if (type->code () == TYPE_CODE_DECFLOAT && !tdep->soft_float) |
1300a2f4 TJB |
781 | return get_decimal_float_return_value (gdbarch, type, regcache, readbuf, |
782 | writebuf); | |
78134374 SM |
783 | else if ((type->code () == TYPE_CODE_INT |
784 | || type->code () == TYPE_CODE_CHAR | |
785 | || type->code () == TYPE_CODE_BOOL | |
786 | || type->code () == TYPE_CODE_PTR | |
aa006118 | 787 | || TYPE_IS_REFERENCE (type) |
78134374 | 788 | || type->code () == TYPE_CODE_ENUM) |
df86565b | 789 | && type->length () <= tdep->wordsize) |
e754ae69 | 790 | { |
963e2bb7 | 791 | if (readbuf) |
e754ae69 AC |
792 | { |
793 | /* Some sort of integer stored in r3. Since TYPE isn't | |
794 | bigger than the register, sign extension isn't a problem | |
795 | - just do everything unsigned. */ | |
796 | ULONGEST regval; | |
797 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
798 | ®val); | |
df86565b | 799 | store_unsigned_integer (readbuf, type->length (), byte_order, |
e17a4113 | 800 | regval); |
e754ae69 | 801 | } |
963e2bb7 | 802 | if (writebuf) |
e754ae69 AC |
803 | { |
804 | /* Some sort of integer stored in r3. Use unpack_long since | |
805 | that should handle any required sign extension. */ | |
806 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 807 | unpack_long (type, writebuf)); |
e754ae69 AC |
808 | } |
809 | return RETURN_VALUE_REGISTER_CONVENTION; | |
810 | } | |
54fcddd0 UW |
811 | /* OpenCL vectors < 16 bytes are returned as distinct |
812 | scalars in f1..f2 or r3..r10. */ | |
78134374 | 813 | if (type->code () == TYPE_CODE_ARRAY |
bd63c870 | 814 | && type->is_vector () |
df86565b | 815 | && type->length () < 16 |
54fcddd0 UW |
816 | && opencl_abi) |
817 | { | |
27710edb | 818 | struct type *eltype = check_typedef (type->target_type ()); |
df86565b | 819 | int i, nelt = type->length () / eltype->length (); |
54fcddd0 UW |
820 | |
821 | for (i = 0; i < nelt; i++) | |
822 | { | |
df86565b | 823 | int offset = i * eltype->length (); |
54fcddd0 | 824 | |
78134374 | 825 | if (eltype->code () == TYPE_CODE_FLT) |
54fcddd0 UW |
826 | { |
827 | int regnum = tdep->ppc_fp0_regnum + 1 + i; | |
0f068fb5 | 828 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
54fcddd0 UW |
829 | struct type *regtype = register_type (gdbarch, regnum); |
830 | ||
831 | if (writebuf != NULL) | |
832 | { | |
3b2ca824 UW |
833 | target_float_convert (writebuf + offset, eltype, |
834 | regval, regtype); | |
b66f5587 | 835 | regcache->cooked_write (regnum, regval); |
54fcddd0 UW |
836 | } |
837 | if (readbuf != NULL) | |
838 | { | |
dca08e1f | 839 | regcache->cooked_read (regnum, regval); |
3b2ca824 UW |
840 | target_float_convert (regval, regtype, |
841 | readbuf + offset, eltype); | |
54fcddd0 UW |
842 | } |
843 | } | |
844 | else | |
845 | { | |
846 | int regnum = tdep->ppc_gp0_regnum + 3 + i; | |
847 | ULONGEST regval; | |
848 | ||
849 | if (writebuf != NULL) | |
850 | { | |
851 | regval = unpack_long (eltype, writebuf + offset); | |
852 | regcache_cooked_write_unsigned (regcache, regnum, regval); | |
853 | } | |
854 | if (readbuf != NULL) | |
855 | { | |
856 | regcache_cooked_read_unsigned (regcache, regnum, ®val); | |
857 | store_unsigned_integer (readbuf + offset, | |
df86565b | 858 | eltype->length (), byte_order, |
54fcddd0 UW |
859 | regval); |
860 | } | |
861 | } | |
862 | } | |
863 | ||
864 | return RETURN_VALUE_REGISTER_CONVENTION; | |
865 | } | |
866 | /* OpenCL vectors >= 16 bytes are returned in v2..v9. */ | |
78134374 | 867 | if (type->code () == TYPE_CODE_ARRAY |
bd63c870 | 868 | && type->is_vector () |
df86565b | 869 | && type->length () >= 16 |
54fcddd0 UW |
870 | && opencl_abi) |
871 | { | |
df86565b | 872 | int n_regs = type->length () / 16; |
54fcddd0 UW |
873 | int i; |
874 | ||
875 | for (i = 0; i < n_regs; i++) | |
876 | { | |
877 | int offset = i * 16; | |
878 | int regnum = tdep->ppc_vr0_regnum + 2 + i; | |
879 | ||
880 | if (writebuf != NULL) | |
b66f5587 | 881 | regcache->cooked_write (regnum, writebuf + offset); |
54fcddd0 | 882 | if (readbuf != NULL) |
dca08e1f | 883 | regcache->cooked_read (regnum, readbuf + offset); |
54fcddd0 UW |
884 | } |
885 | ||
886 | return RETURN_VALUE_REGISTER_CONVENTION; | |
887 | } | |
df86565b | 888 | if (type->length () == 16 |
78134374 | 889 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 890 | && type->is_vector () |
55eddb0f | 891 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) |
e754ae69 | 892 | { |
963e2bb7 | 893 | if (readbuf) |
e754ae69 AC |
894 | { |
895 | /* Altivec places the return value in "v2". */ | |
dca08e1f | 896 | regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf); |
e754ae69 | 897 | } |
963e2bb7 | 898 | if (writebuf) |
e754ae69 AC |
899 | { |
900 | /* Altivec places the return value in "v2". */ | |
b66f5587 | 901 | regcache->cooked_write (tdep->ppc_vr0_regnum + 2, writebuf); |
e754ae69 AC |
902 | } |
903 | return RETURN_VALUE_REGISTER_CONVENTION; | |
904 | } | |
df86565b | 905 | if (type->length () == 16 |
78134374 | 906 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 907 | && type->is_vector () |
55eddb0f DJ |
908 | && tdep->vector_abi == POWERPC_VEC_GENERIC) |
909 | { | |
910 | /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6. | |
911 | GCC without AltiVec returns them in memory, but it warns about | |
912 | ABI risks in that case; we don't try to support it. */ | |
913 | if (readbuf) | |
914 | { | |
dca08e1f SM |
915 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0); |
916 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4); | |
917 | regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8); | |
918 | regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12); | |
55eddb0f DJ |
919 | } |
920 | if (writebuf) | |
921 | { | |
b66f5587 SM |
922 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0); |
923 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4); | |
924 | regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8); | |
925 | regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12); | |
55eddb0f DJ |
926 | } |
927 | return RETURN_VALUE_REGISTER_CONVENTION; | |
928 | } | |
df86565b | 929 | if (type->length () == 8 |
78134374 | 930 | && type->code () == TYPE_CODE_ARRAY |
bd63c870 | 931 | && type->is_vector () |
55eddb0f | 932 | && tdep->vector_abi == POWERPC_VEC_SPE) |
e754ae69 AC |
933 | { |
934 | /* The e500 ABI places return values for the 64-bit DSP types | |
935 | (__ev64_opaque__) in r3. However, in GDB-speak, ev3 | |
936 | corresponds to the entire r3 value for e500, whereas GDB's r3 | |
937 | only corresponds to the least significant 32-bits. So place | |
938 | the 64-bit DSP type's value in ev3. */ | |
963e2bb7 | 939 | if (readbuf) |
dca08e1f | 940 | regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf); |
963e2bb7 | 941 | if (writebuf) |
b66f5587 | 942 | regcache->cooked_write (tdep->ppc_ev0_regnum + 3, writebuf); |
e754ae69 AC |
943 | return RETURN_VALUE_REGISTER_CONVENTION; |
944 | } | |
df86565b | 945 | if (broken_gcc && type->length () <= 8) |
e754ae69 | 946 | { |
61bf9ae0 MK |
947 | /* GCC screwed up for structures or unions whose size is less |
948 | than or equal to 8 bytes.. Instead of left-aligning, it | |
949 | right-aligns the data into the buffer formed by r3, r4. */ | |
0f068fb5 | 950 | gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2]; |
df86565b | 951 | int len = type->length (); |
61bf9ae0 MK |
952 | int offset = (2 * tdep->wordsize - len) % tdep->wordsize; |
953 | ||
963e2bb7 | 954 | if (readbuf) |
e754ae69 | 955 | { |
dca08e1f SM |
956 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, |
957 | regvals + 0 * tdep->wordsize); | |
61bf9ae0 | 958 | if (len > tdep->wordsize) |
dca08e1f SM |
959 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, |
960 | regvals + 1 * tdep->wordsize); | |
61bf9ae0 | 961 | memcpy (readbuf, regvals + offset, len); |
e754ae69 | 962 | } |
963e2bb7 | 963 | if (writebuf) |
e754ae69 | 964 | { |
61bf9ae0 MK |
965 | memset (regvals, 0, sizeof regvals); |
966 | memcpy (regvals + offset, writebuf, len); | |
b66f5587 SM |
967 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, |
968 | regvals + 0 * tdep->wordsize); | |
61bf9ae0 | 969 | if (len > tdep->wordsize) |
b66f5587 SM |
970 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, |
971 | regvals + 1 * tdep->wordsize); | |
e754ae69 | 972 | } |
61bf9ae0 | 973 | |
e754ae69 AC |
974 | return RETURN_VALUE_REGISTER_CONVENTION; |
975 | } | |
df86565b | 976 | if (type->length () <= 8) |
e754ae69 | 977 | { |
963e2bb7 | 978 | if (readbuf) |
e754ae69 AC |
979 | { |
980 | /* This matches SVr4 PPC, it does not match GCC. */ | |
981 | /* The value is right-padded to 8 bytes and then loaded, as | |
982 | two "words", into r3/r4. */ | |
0f068fb5 | 983 | gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2]; |
dca08e1f SM |
984 | regcache->cooked_read (tdep->ppc_gp0_regnum + 3, |
985 | regvals + 0 * tdep->wordsize); | |
df86565b | 986 | if (type->length () > tdep->wordsize) |
dca08e1f SM |
987 | regcache->cooked_read (tdep->ppc_gp0_regnum + 4, |
988 | regvals + 1 * tdep->wordsize); | |
df86565b | 989 | memcpy (readbuf, regvals, type->length ()); |
e754ae69 | 990 | } |
963e2bb7 | 991 | if (writebuf) |
e754ae69 AC |
992 | { |
993 | /* This matches SVr4 PPC, it does not match GCC. */ | |
994 | /* The value is padded out to 8 bytes and then loaded, as | |
995 | two "words" into r3/r4. */ | |
0f068fb5 | 996 | gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2]; |
e754ae69 | 997 | memset (regvals, 0, sizeof regvals); |
df86565b | 998 | memcpy (regvals, writebuf, type->length ()); |
b66f5587 SM |
999 | regcache->cooked_write (tdep->ppc_gp0_regnum + 3, |
1000 | regvals + 0 * tdep->wordsize); | |
df86565b | 1001 | if (type->length () > tdep->wordsize) |
b66f5587 SM |
1002 | regcache->cooked_write (tdep->ppc_gp0_regnum + 4, |
1003 | regvals + 1 * tdep->wordsize); | |
e754ae69 AC |
1004 | } |
1005 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1006 | } | |
1007 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1008 | } | |
1009 | ||
05580c65 | 1010 | enum return_value_convention |
6a3a010b | 1011 | ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
1012 | struct type *valtype, struct regcache *regcache, |
1013 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
e754ae69 | 1014 | { |
6a3a010b | 1015 | return do_ppc_sysv_return_value (gdbarch, |
d0c97917 | 1016 | function ? function->type () : NULL, |
6a3a010b | 1017 | valtype, regcache, readbuf, writebuf, 0); |
e754ae69 AC |
1018 | } |
1019 | ||
05580c65 | 1020 | enum return_value_convention |
963e2bb7 | 1021 | ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, |
6a3a010b | 1022 | struct value *function, |
963e2bb7 AC |
1023 | struct type *valtype, |
1024 | struct regcache *regcache, | |
50fd1280 | 1025 | gdb_byte *readbuf, const gdb_byte *writebuf) |
e754ae69 | 1026 | { |
6a3a010b | 1027 | return do_ppc_sysv_return_value (gdbarch, |
d0c97917 | 1028 | function ? function->type () : NULL, |
6a3a010b | 1029 | valtype, regcache, readbuf, writebuf, 1); |
944fcfab | 1030 | } |
afd48b75 | 1031 | |
b6e1c027 AC |
1032 | /* The helper function for 64-bit SYSV push_dummy_call. Converts the |
1033 | function's code address back into the function's descriptor | |
1034 | address. | |
1035 | ||
1036 | Find a value for the TOC register. Every symbol should have both | |
1037 | ".FN" and "FN" in the minimal symbol table. "FN" points at the | |
1038 | FN's descriptor, while ".FN" points at the entry point (which | |
1039 | matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the | |
1040 | FN's descriptor address (while at the same time being careful to | |
1041 | find "FN" in the same object file as ".FN"). */ | |
1042 | ||
1043 | static int | |
1044 | convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr) | |
1045 | { | |
1046 | struct obj_section *dot_fn_section; | |
7cbd4a93 | 1047 | struct bound_minimal_symbol dot_fn; |
3b7344d5 | 1048 | struct bound_minimal_symbol fn; |
7cbd4a93 | 1049 | |
b6e1c027 AC |
1050 | /* Find the minimal symbol that corresponds to CODE_ADDR (should |
1051 | have a name of the form ".FN"). */ | |
1052 | dot_fn = lookup_minimal_symbol_by_pc (code_addr); | |
c9d95fa3 | 1053 | if (dot_fn.minsym == NULL || dot_fn.minsym->linkage_name ()[0] != '.') |
b6e1c027 AC |
1054 | return 0; |
1055 | /* Get the section that contains CODE_ADDR. Need this for the | |
1056 | "objfile" that it contains. */ | |
1057 | dot_fn_section = find_pc_section (code_addr); | |
1058 | if (dot_fn_section == NULL || dot_fn_section->objfile == NULL) | |
1059 | return 0; | |
1060 | /* Now find the corresponding "FN" (dropping ".") minimal symbol's | |
1061 | address. Only look for the minimal symbol in ".FN"'s object file | |
1062 | - avoids problems when two object files (i.e., shared libraries) | |
1063 | contain a minimal symbol with the same name. */ | |
c9d95fa3 | 1064 | fn = lookup_minimal_symbol (dot_fn.minsym->linkage_name () + 1, NULL, |
b6e1c027 | 1065 | dot_fn_section->objfile); |
3b7344d5 | 1066 | if (fn.minsym == NULL) |
b6e1c027 AC |
1067 | return 0; |
1068 | /* Found a descriptor. */ | |
4aeddc50 | 1069 | (*desc_addr) = fn.value_address (); |
b6e1c027 AC |
1070 | return 1; |
1071 | } | |
1072 | ||
cc0e89c5 UW |
1073 | /* Walk down the type tree of TYPE counting consecutive base elements. |
1074 | If *FIELD_TYPE is NULL, then set it to the first valid floating point | |
1075 | or vector type. If a non-floating point or vector type is found, or | |
1076 | if a floating point or vector type that doesn't match a non-NULL | |
1077 | *FIELD_TYPE is found, then return -1, otherwise return the count in the | |
1078 | sub-tree. */ | |
1079 | ||
1080 | static LONGEST | |
1081 | ppc64_aggregate_candidate (struct type *type, | |
1082 | struct type **field_type) | |
1083 | { | |
1084 | type = check_typedef (type); | |
1085 | ||
78134374 | 1086 | switch (type->code ()) |
cc0e89c5 UW |
1087 | { |
1088 | case TYPE_CODE_FLT: | |
1089 | case TYPE_CODE_DECFLOAT: | |
1090 | if (!*field_type) | |
1091 | *field_type = type; | |
78134374 | 1092 | if ((*field_type)->code () == type->code () |
df86565b | 1093 | && (*field_type)->length () == type->length ()) |
cc0e89c5 UW |
1094 | return 1; |
1095 | break; | |
1096 | ||
1097 | case TYPE_CODE_COMPLEX: | |
27710edb | 1098 | type = type->target_type (); |
78134374 SM |
1099 | if (type->code () == TYPE_CODE_FLT |
1100 | || type->code () == TYPE_CODE_DECFLOAT) | |
cc0e89c5 UW |
1101 | { |
1102 | if (!*field_type) | |
1103 | *field_type = type; | |
78134374 | 1104 | if ((*field_type)->code () == type->code () |
df86565b | 1105 | && (*field_type)->length () == type->length ()) |
cc0e89c5 UW |
1106 | return 2; |
1107 | } | |
1108 | break; | |
1109 | ||
1110 | case TYPE_CODE_ARRAY: | |
bd63c870 | 1111 | if (type->is_vector ()) |
cc0e89c5 UW |
1112 | { |
1113 | if (!*field_type) | |
1114 | *field_type = type; | |
78134374 | 1115 | if ((*field_type)->code () == type->code () |
df86565b | 1116 | && (*field_type)->length () == type->length ()) |
cc0e89c5 UW |
1117 | return 1; |
1118 | } | |
1119 | else | |
1120 | { | |
1121 | LONGEST count, low_bound, high_bound; | |
1122 | ||
1123 | count = ppc64_aggregate_candidate | |
27710edb | 1124 | (type->target_type (), field_type); |
cc0e89c5 UW |
1125 | if (count == -1) |
1126 | return -1; | |
1127 | ||
1128 | if (!get_array_bounds (type, &low_bound, &high_bound)) | |
1129 | return -1; | |
cb9045be TV |
1130 | |
1131 | LONGEST nr_array_elements = (low_bound > high_bound | |
1132 | ? 0 | |
1133 | : (high_bound - low_bound + 1)); | |
1134 | count *= nr_array_elements; | |
cc0e89c5 UW |
1135 | |
1136 | /* There must be no padding. */ | |
1137 | if (count == 0) | |
df86565b SM |
1138 | return type->length () == 0 ? 0 : -1; |
1139 | else if (type->length () != count * (*field_type)->length ()) | |
cc0e89c5 UW |
1140 | return -1; |
1141 | ||
1142 | return count; | |
1143 | } | |
1144 | break; | |
1145 | ||
1146 | case TYPE_CODE_STRUCT: | |
1147 | case TYPE_CODE_UNION: | |
1148 | { | |
1149 | LONGEST count = 0; | |
1150 | int i; | |
1151 | ||
1f704f76 | 1152 | for (i = 0; i < type->num_fields (); i++) |
cc0e89c5 UW |
1153 | { |
1154 | LONGEST sub_count; | |
1155 | ||
c819a338 | 1156 | if (type->field (i).is_static ()) |
cc0e89c5 UW |
1157 | continue; |
1158 | ||
1159 | sub_count = ppc64_aggregate_candidate | |
940da03e | 1160 | (type->field (i).type (), field_type); |
cc0e89c5 UW |
1161 | if (sub_count == -1) |
1162 | return -1; | |
1163 | ||
78134374 | 1164 | if (type->code () == TYPE_CODE_STRUCT) |
cc0e89c5 UW |
1165 | count += sub_count; |
1166 | else | |
325fac50 | 1167 | count = std::max (count, sub_count); |
cc0e89c5 UW |
1168 | } |
1169 | ||
1170 | /* There must be no padding. */ | |
1171 | if (count == 0) | |
df86565b SM |
1172 | return type->length () == 0 ? 0 : -1; |
1173 | else if (type->length () != count * (*field_type)->length ()) | |
cc0e89c5 UW |
1174 | return -1; |
1175 | ||
1176 | return count; | |
1177 | } | |
1178 | break; | |
1179 | ||
1180 | default: | |
1181 | break; | |
1182 | } | |
1183 | ||
1184 | return -1; | |
1185 | } | |
1186 | ||
1187 | /* If an argument of type TYPE is a homogeneous float or vector aggregate | |
1188 | that shall be passed in FP/vector registers according to the ELFv2 ABI, | |
1189 | return the homogeneous element type in *ELT_TYPE and the number of | |
1190 | elements in *N_ELTS, and return non-zero. Otherwise, return zero. */ | |
1191 | ||
1192 | static int | |
1193 | ppc64_elfv2_abi_homogeneous_aggregate (struct type *type, | |
ebbac168 CL |
1194 | struct type **elt_type, int *n_elts, |
1195 | struct gdbarch *gdbarch) | |
cc0e89c5 UW |
1196 | { |
1197 | /* Complex types at the top level are treated separately. However, | |
1198 | complex types can be elements of homogeneous aggregates. */ | |
78134374 SM |
1199 | if (type->code () == TYPE_CODE_STRUCT |
1200 | || type->code () == TYPE_CODE_UNION | |
bd63c870 | 1201 | || (type->code () == TYPE_CODE_ARRAY && !type->is_vector ())) |
cc0e89c5 UW |
1202 | { |
1203 | struct type *field_type = NULL; | |
1204 | LONGEST field_count = ppc64_aggregate_candidate (type, &field_type); | |
1205 | ||
1206 | if (field_count > 0) | |
1207 | { | |
ebbac168 CL |
1208 | int n_regs; |
1209 | ||
1210 | if (field_type->code () == TYPE_CODE_FLT | |
1211 | && (gdbarch_long_double_format (gdbarch) | |
1212 | == floatformats_ieee_quad)) | |
1213 | /* IEEE Float 128-bit uses one vector register. */ | |
1214 | n_regs = 1; | |
1215 | ||
1216 | else if (field_type->code () == TYPE_CODE_FLT | |
1217 | || field_type->code () == TYPE_CODE_DECFLOAT) | |
df86565b | 1218 | n_regs = (field_type->length () + 7) >> 3; |
ebbac168 CL |
1219 | |
1220 | else | |
1221 | n_regs = 1; | |
cc0e89c5 UW |
1222 | |
1223 | /* The ELFv2 ABI allows homogeneous aggregates to occupy | |
1224 | up to 8 registers. */ | |
1225 | if (field_count * n_regs <= 8) | |
1226 | { | |
1227 | if (elt_type) | |
1228 | *elt_type = field_type; | |
1229 | if (n_elts) | |
1230 | *n_elts = (int) field_count; | |
1231 | /* Note that field_count is LONGEST since it may hold the size | |
1232 | of an array, while *n_elts is int since its value is bounded | |
1233 | by the number of registers used for argument passing. The | |
1234 | cast cannot overflow due to the bounds checking above. */ | |
1235 | return 1; | |
1236 | } | |
1237 | } | |
1238 | } | |
1239 | ||
1240 | return 0; | |
1241 | } | |
1242 | ||
e765b44c UW |
1243 | /* Structure holding the next argument position. */ |
1244 | struct ppc64_sysv_argpos | |
1245 | { | |
1246 | /* Register cache holding argument registers. If this is NULL, | |
1247 | we only simulate argument processing without actually updating | |
1248 | any registers or memory. */ | |
1249 | struct regcache *regcache; | |
1250 | /* Next available general-purpose argument register. */ | |
1251 | int greg; | |
1252 | /* Next available floating-point argument register. */ | |
1253 | int freg; | |
1254 | /* Next available vector argument register. */ | |
1255 | int vreg; | |
1256 | /* The address, at which the next general purpose parameter | |
1257 | (integer, struct, float, vector, ...) should be saved. */ | |
1258 | CORE_ADDR gparam; | |
1259 | /* The address, at which the next by-reference parameter | |
1260 | (non-Altivec vector, variably-sized type) should be saved. */ | |
1261 | CORE_ADDR refparam; | |
1262 | }; | |
1263 | ||
1264 | /* VAL is a value of length LEN. Store it into the argument area on the | |
1265 | stack and load it into the corresponding general-purpose registers | |
1266 | required by the ABI, and update ARGPOS. | |
1267 | ||
1268 | If ALIGN is nonzero, it specifies the minimum alignment required | |
1269 | for the on-stack copy of the argument. */ | |
d81e75c0 | 1270 | |
e765b44c UW |
1271 | static void |
1272 | ppc64_sysv_abi_push_val (struct gdbarch *gdbarch, | |
1273 | const bfd_byte *val, int len, int align, | |
1274 | struct ppc64_sysv_argpos *argpos) | |
1275 | { | |
08106042 | 1276 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1277 | int offset = 0; |
1278 | ||
1279 | /* Enforce alignment of stack location, if requested. */ | |
1280 | if (align > tdep->wordsize) | |
1281 | { | |
1282 | CORE_ADDR aligned_gparam = align_up (argpos->gparam, align); | |
1283 | ||
1284 | argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize; | |
1285 | argpos->gparam = aligned_gparam; | |
1286 | } | |
1287 | ||
1288 | /* The ABI (version 1.9) specifies that values smaller than one | |
1289 | doubleword are right-aligned and those larger are left-aligned. | |
1290 | GCC versions before 3.4 implemented this incorrectly; see | |
1291 | <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */ | |
d63167af UW |
1292 | if (len < tdep->wordsize |
1293 | && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
e765b44c UW |
1294 | offset = tdep->wordsize - len; |
1295 | ||
1296 | if (argpos->regcache) | |
1297 | write_memory (argpos->gparam + offset, val, len); | |
1298 | argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize); | |
1299 | ||
1300 | while (len >= tdep->wordsize) | |
1301 | { | |
1302 | if (argpos->regcache && argpos->greg <= 10) | |
b66f5587 SM |
1303 | argpos->regcache->cooked_write (tdep->ppc_gp0_regnum + argpos->greg, |
1304 | val); | |
e765b44c UW |
1305 | argpos->greg++; |
1306 | len -= tdep->wordsize; | |
1307 | val += tdep->wordsize; | |
1308 | } | |
1309 | ||
1310 | if (len > 0) | |
1311 | { | |
1312 | if (argpos->regcache && argpos->greg <= 10) | |
e4c4a59b SM |
1313 | argpos->regcache->cooked_write_part |
1314 | (tdep->ppc_gp0_regnum + argpos->greg, offset, len, val); | |
e765b44c UW |
1315 | argpos->greg++; |
1316 | } | |
1317 | } | |
1318 | ||
1319 | /* The same as ppc64_sysv_abi_push_val, but using a single-word integer | |
1320 | value VAL as argument. */ | |
d81e75c0 TD |
1321 | |
1322 | static void | |
e765b44c UW |
1323 | ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val, |
1324 | struct ppc64_sysv_argpos *argpos) | |
d81e75c0 | 1325 | { |
08106042 | 1326 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c | 1327 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
0f068fb5 | 1328 | gdb_byte buf[PPC_MAX_REGISTER_SIZE]; |
d81e75c0 | 1329 | |
e765b44c UW |
1330 | if (argpos->regcache) |
1331 | store_unsigned_integer (buf, tdep->wordsize, byte_order, val); | |
1332 | ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos); | |
1333 | } | |
1334 | ||
1335 | /* VAL is a value of TYPE, a (binary or decimal) floating-point type. | |
1336 | Load it into a floating-point register if required by the ABI, | |
1337 | and update ARGPOS. */ | |
1338 | ||
1339 | static void | |
1340 | ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch, | |
1341 | struct type *type, const bfd_byte *val, | |
1342 | struct ppc64_sysv_argpos *argpos) | |
1343 | { | |
08106042 | 1344 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1345 | if (tdep->soft_float) |
1346 | return; | |
1347 | ||
df86565b | 1348 | if (type->length () <= 8 |
78134374 | 1349 | && type->code () == TYPE_CODE_FLT) |
d81e75c0 | 1350 | { |
e765b44c | 1351 | /* Floats and doubles go in f1 .. f13. 32-bit floats are converted |
24b21115 | 1352 | to double first. */ |
e765b44c UW |
1353 | if (argpos->regcache && argpos->freg <= 13) |
1354 | { | |
1355 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; | |
1356 | struct type *regtype = register_type (gdbarch, regnum); | |
0f068fb5 | 1357 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
d81e75c0 | 1358 | |
3b2ca824 | 1359 | target_float_convert (val, type, regval, regtype); |
b66f5587 | 1360 | argpos->regcache->cooked_write (regnum, regval); |
e765b44c | 1361 | } |
d81e75c0 | 1362 | |
e765b44c UW |
1363 | argpos->freg++; |
1364 | } | |
df86565b | 1365 | else if (type->length () <= 8 |
78134374 | 1366 | && type->code () == TYPE_CODE_DECFLOAT) |
e765b44c UW |
1367 | { |
1368 | /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are | |
1369 | placed in the least significant word. */ | |
1370 | if (argpos->regcache && argpos->freg <= 13) | |
1371 | { | |
1372 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; | |
5b757e5d UW |
1373 | int offset = 0; |
1374 | ||
1375 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
df86565b | 1376 | offset = 8 - type->length (); |
d81e75c0 | 1377 | |
e4c4a59b | 1378 | argpos->regcache->cooked_write_part (regnum, offset, |
df86565b | 1379 | type->length (), val); |
e765b44c | 1380 | } |
d81e75c0 | 1381 | |
e765b44c UW |
1382 | argpos->freg++; |
1383 | } | |
df86565b | 1384 | else if (type->length () == 16 |
78134374 | 1385 | && type->code () == TYPE_CODE_FLT |
e765b44c UW |
1386 | && (gdbarch_long_double_format (gdbarch) |
1387 | == floatformats_ibm_long_double)) | |
1388 | { | |
1389 | /* IBM long double stored in two consecutive FPRs. */ | |
1390 | if (argpos->regcache && argpos->freg <= 13) | |
d81e75c0 | 1391 | { |
e765b44c UW |
1392 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; |
1393 | ||
b66f5587 | 1394 | argpos->regcache->cooked_write (regnum, val); |
e765b44c | 1395 | if (argpos->freg <= 12) |
b66f5587 | 1396 | argpos->regcache->cooked_write (regnum + 1, val + 8); |
d81e75c0 | 1397 | } |
d81e75c0 | 1398 | |
e765b44c UW |
1399 | argpos->freg += 2; |
1400 | } | |
df86565b | 1401 | else if (type->length () == 16 |
78134374 | 1402 | && type->code () == TYPE_CODE_DECFLOAT) |
e765b44c UW |
1403 | { |
1404 | /* 128-bit decimal floating-point values are stored in and even/odd | |
1405 | pair of FPRs, with the even FPR holding the most significant half. */ | |
1406 | argpos->freg += argpos->freg & 1; | |
d81e75c0 | 1407 | |
e765b44c | 1408 | if (argpos->regcache && argpos->freg <= 12) |
d81e75c0 | 1409 | { |
e765b44c | 1410 | int regnum = tdep->ppc_fp0_regnum + argpos->freg; |
0ff3e01f UW |
1411 | int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0; |
1412 | int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8; | |
d81e75c0 | 1413 | |
b66f5587 SM |
1414 | argpos->regcache->cooked_write (regnum, val + hipart); |
1415 | argpos->regcache->cooked_write (regnum + 1, val + lopart); | |
d81e75c0 | 1416 | } |
e765b44c UW |
1417 | |
1418 | argpos->freg += 2; | |
d81e75c0 | 1419 | } |
e765b44c UW |
1420 | } |
1421 | ||
1422 | /* VAL is a value of AltiVec vector type. Load it into a vector register | |
1423 | if required by the ABI, and update ARGPOS. */ | |
1424 | ||
1425 | static void | |
1426 | ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val, | |
1427 | struct ppc64_sysv_argpos *argpos) | |
1428 | { | |
08106042 | 1429 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c UW |
1430 | |
1431 | if (argpos->regcache && argpos->vreg <= 13) | |
b66f5587 | 1432 | argpos->regcache->cooked_write (tdep->ppc_vr0_regnum + argpos->vreg, val); |
e765b44c UW |
1433 | |
1434 | argpos->vreg++; | |
1435 | } | |
1436 | ||
1437 | /* VAL is a value of TYPE. Load it into memory and/or registers | |
1438 | as required by the ABI, and update ARGPOS. */ | |
1439 | ||
1440 | static void | |
1441 | ppc64_sysv_abi_push_param (struct gdbarch *gdbarch, | |
1442 | struct type *type, const bfd_byte *val, | |
1443 | struct ppc64_sysv_argpos *argpos) | |
1444 | { | |
08106042 | 1445 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e765b44c | 1446 | |
78134374 | 1447 | if (type->code () == TYPE_CODE_FLT |
df86565b | 1448 | && type->length () == 16 |
ebbac168 CL |
1449 | && (gdbarch_long_double_format (gdbarch) |
1450 | == floatformats_ieee_quad)) | |
1451 | { | |
1452 | /* IEEE FLOAT128, args in vector registers. */ | |
df86565b | 1453 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), 16, argpos); |
ebbac168 CL |
1454 | ppc64_sysv_abi_push_vreg (gdbarch, val, argpos); |
1455 | } | |
1456 | else if (type->code () == TYPE_CODE_FLT | |
1457 | || type->code () == TYPE_CODE_DECFLOAT) | |
e765b44c UW |
1458 | { |
1459 | /* Floating-point scalars are passed in floating-point registers. */ | |
df86565b | 1460 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), 0, argpos); |
e765b44c UW |
1461 | ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos); |
1462 | } | |
bd63c870 | 1463 | else if (type->code () == TYPE_CODE_ARRAY && type->is_vector () |
e765b44c | 1464 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC |
df86565b | 1465 | && type->length () == 16) |
e765b44c UW |
1466 | { |
1467 | /* AltiVec vectors are passed aligned, and in vector registers. */ | |
df86565b | 1468 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), 16, argpos); |
e765b44c UW |
1469 | ppc64_sysv_abi_push_vreg (gdbarch, val, argpos); |
1470 | } | |
bd63c870 | 1471 | else if (type->code () == TYPE_CODE_ARRAY && type->is_vector () |
df86565b | 1472 | && type->length () >= 16) |
d81e75c0 | 1473 | { |
e765b44c UW |
1474 | /* Non-Altivec vectors are passed by reference. */ |
1475 | ||
1476 | /* Copy value onto the stack ... */ | |
1477 | CORE_ADDR addr = align_up (argpos->refparam, 16); | |
1478 | if (argpos->regcache) | |
df86565b SM |
1479 | write_memory (addr, val, type->length ()); |
1480 | argpos->refparam = align_up (addr + type->length (), tdep->wordsize); | |
e765b44c UW |
1481 | |
1482 | /* ... and pass a pointer to the copy as parameter. */ | |
1483 | ppc64_sysv_abi_push_integer (gdbarch, addr, argpos); | |
1484 | } | |
78134374 SM |
1485 | else if ((type->code () == TYPE_CODE_INT |
1486 | || type->code () == TYPE_CODE_ENUM | |
1487 | || type->code () == TYPE_CODE_BOOL | |
1488 | || type->code () == TYPE_CODE_CHAR | |
1489 | || type->code () == TYPE_CODE_PTR | |
aa006118 | 1490 | || TYPE_IS_REFERENCE (type)) |
df86565b | 1491 | && type->length () <= tdep->wordsize) |
e765b44c UW |
1492 | { |
1493 | ULONGEST word = 0; | |
1494 | ||
1495 | if (argpos->regcache) | |
d81e75c0 | 1496 | { |
e765b44c UW |
1497 | /* Sign extend the value, then store it unsigned. */ |
1498 | word = unpack_long (type, val); | |
1499 | ||
1500 | /* Convert any function code addresses into descriptors. */ | |
d4094b6a | 1501 | if (tdep->elf_abi == POWERPC_ELF_V1 |
78134374 SM |
1502 | && (type->code () == TYPE_CODE_PTR |
1503 | || type->code () == TYPE_CODE_REF)) | |
e765b44c UW |
1504 | { |
1505 | struct type *target_type | |
27710edb | 1506 | = check_typedef (type->target_type ()); |
e765b44c | 1507 | |
78134374 SM |
1508 | if (target_type->code () == TYPE_CODE_FUNC |
1509 | || target_type->code () == TYPE_CODE_METHOD) | |
e765b44c UW |
1510 | { |
1511 | CORE_ADDR desc = word; | |
1512 | ||
1513 | convert_code_addr_to_desc_addr (word, &desc); | |
1514 | word = desc; | |
1515 | } | |
1516 | } | |
d81e75c0 | 1517 | } |
e765b44c UW |
1518 | |
1519 | ppc64_sysv_abi_push_integer (gdbarch, word, argpos); | |
1520 | } | |
1521 | else | |
1522 | { | |
ff84aaf3 TV |
1523 | /* Align == 0 is correct for ppc64_sysv_abi_push_freg, |
1524 | Align == 16 is correct for ppc64_sysv_abi_push_vreg. | |
1525 | Default to 0. */ | |
1526 | int align = 0; | |
e765b44c UW |
1527 | |
1528 | /* The ABI (version 1.9) specifies that structs containing a | |
1529 | single floating-point value, at any level of nesting of | |
1530 | single-member structs, are passed in floating-point registers. */ | |
78134374 | 1531 | if (type->code () == TYPE_CODE_STRUCT |
ebbac168 | 1532 | && type->num_fields () == 1 && tdep->elf_abi == POWERPC_ELF_V1) |
d81e75c0 | 1533 | { |
78134374 | 1534 | while (type->code () == TYPE_CODE_STRUCT |
1f704f76 | 1535 | && type->num_fields () == 1) |
940da03e | 1536 | type = check_typedef (type->field (0).type ()); |
e765b44c | 1537 | |
ebbac168 CL |
1538 | if (type->code () == TYPE_CODE_FLT) { |
1539 | /* Handle the case of 128-bit floats for both IEEE and IBM long double | |
1540 | formats. */ | |
df86565b | 1541 | if (type->length () == 16 |
ebbac168 CL |
1542 | && (gdbarch_long_double_format (gdbarch) |
1543 | == floatformats_ieee_quad)) | |
ff84aaf3 TV |
1544 | { |
1545 | ppc64_sysv_abi_push_vreg (gdbarch, val, argpos); | |
1546 | align = 16; | |
1547 | } | |
ebbac168 CL |
1548 | else |
1549 | ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos); | |
1550 | } | |
d81e75c0 | 1551 | } |
cc0e89c5 UW |
1552 | |
1553 | /* In the ELFv2 ABI, homogeneous floating-point or vector | |
1554 | aggregates are passed in a series of registers. */ | |
1555 | if (tdep->elf_abi == POWERPC_ELF_V2) | |
1556 | { | |
1557 | struct type *eltype; | |
1558 | int i, nelt; | |
1559 | ||
ebbac168 CL |
1560 | if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt, |
1561 | gdbarch)) | |
cc0e89c5 UW |
1562 | for (i = 0; i < nelt; i++) |
1563 | { | |
df86565b | 1564 | const gdb_byte *elval = val + i * eltype->length (); |
cc0e89c5 | 1565 | |
78134374 | 1566 | if (eltype->code () == TYPE_CODE_FLT |
df86565b | 1567 | && eltype->length () == 16 |
ebbac168 CL |
1568 | && (gdbarch_long_double_format (gdbarch) |
1569 | == floatformats_ieee_quad)) | |
287de656 | 1570 | /* IEEE FLOAT128, args in vector registers. */ |
ff84aaf3 TV |
1571 | { |
1572 | ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos); | |
1573 | align = 16; | |
1574 | } | |
ebbac168 | 1575 | else if (eltype->code () == TYPE_CODE_FLT |
287de656 | 1576 | || eltype->code () == TYPE_CODE_DECFLOAT) |
ebbac168 CL |
1577 | /* IBM long double and all other floats and decfloats, args |
1578 | are in a pair of floating point registers. */ | |
cc0e89c5 | 1579 | ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos); |
78134374 | 1580 | else if (eltype->code () == TYPE_CODE_ARRAY |
bd63c870 | 1581 | && eltype->is_vector () |
cc0e89c5 | 1582 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC |
df86565b | 1583 | && eltype->length () == 16) |
ff84aaf3 TV |
1584 | { |
1585 | ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos); | |
1586 | align = 16; | |
1587 | } | |
cc0e89c5 UW |
1588 | } |
1589 | } | |
ff84aaf3 | 1590 | |
df86565b | 1591 | ppc64_sysv_abi_push_val (gdbarch, val, type->length (), align, argpos); |
d81e75c0 TD |
1592 | } |
1593 | } | |
1594 | ||
0df8b418 | 1595 | /* Pass the arguments in either registers, or in the stack. Using the |
8be9034a AC |
1596 | ppc 64 bit SysV ABI. |
1597 | ||
1598 | This implements a dumbed down version of the ABI. It always writes | |
1599 | values to memory, GPR and FPR, even when not necessary. Doing this | |
0df8b418 | 1600 | greatly simplifies the logic. */ |
8be9034a AC |
1601 | |
1602 | CORE_ADDR | |
0df8b418 MS |
1603 | ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, |
1604 | struct value *function, | |
8be9034a AC |
1605 | struct regcache *regcache, CORE_ADDR bp_addr, |
1606 | int nargs, struct value **args, CORE_ADDR sp, | |
cf84fa6b AH |
1607 | function_call_return_method return_method, |
1608 | CORE_ADDR struct_addr) | |
8be9034a | 1609 | { |
7d9b040b | 1610 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
08106042 | 1611 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
e17a4113 | 1612 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d0c97917 | 1613 | int opencl_abi = ppc_sysv_use_opencl_abi (function->type ()); |
fb4443d8 | 1614 | ULONGEST back_chain; |
8be9034a AC |
1615 | /* See for-loop comment below. */ |
1616 | int write_pass; | |
24e9cda0 UW |
1617 | /* Size of the by-reference parameter copy region, the final value is |
1618 | computed in the for-loop below. */ | |
1619 | LONGEST refparam_size = 0; | |
8be9034a AC |
1620 | /* Size of the general parameter region, the final value is computed |
1621 | in the for-loop below. */ | |
1622 | LONGEST gparam_size = 0; | |
1623 | /* Kevin writes ... I don't mind seeing tdep->wordsize used in the | |
0df8b418 | 1624 | calls to align_up(), align_down(), etc. because this makes it |
8be9034a AC |
1625 | easier to reuse this code (in a copy/paste sense) in the future, |
1626 | but it is a 64-bit ABI and asserting that the wordsize is 8 bytes | |
1627 | at some point makes it easier to verify that this function is | |
1628 | correct without having to do a non-local analysis to figure out | |
1629 | the possible values of tdep->wordsize. */ | |
1630 | gdb_assert (tdep->wordsize == 8); | |
1631 | ||
55eddb0f DJ |
1632 | /* This function exists to support a calling convention that |
1633 | requires floating-point registers. It shouldn't be used on | |
1634 | processors that lack them. */ | |
1635 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
1636 | ||
fb4443d8 UW |
1637 | /* By this stage in the proceedings, SP has been decremented by "red |
1638 | zone size" + "struct return size". Fetch the stack-pointer from | |
1639 | before this and use that as the BACK_CHAIN. */ | |
40a6adc1 | 1640 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 1641 | &back_chain); |
fb4443d8 | 1642 | |
8be9034a AC |
1643 | /* Go through the argument list twice. |
1644 | ||
1645 | Pass 1: Compute the function call's stack space and register | |
1646 | requirements. | |
1647 | ||
1648 | Pass 2: Replay the same computation but this time also write the | |
1649 | values out to the target. */ | |
1650 | ||
1651 | for (write_pass = 0; write_pass < 2; write_pass++) | |
1652 | { | |
1653 | int argno; | |
e765b44c UW |
1654 | |
1655 | struct ppc64_sysv_argpos argpos; | |
1656 | argpos.greg = 3; | |
1657 | argpos.freg = 1; | |
1658 | argpos.vreg = 2; | |
8be9034a AC |
1659 | |
1660 | if (!write_pass) | |
1661 | { | |
24e9cda0 UW |
1662 | /* During the first pass, GPARAM and REFPARAM are more like |
1663 | offsets (start address zero) than addresses. That way | |
1664 | they accumulate the total stack space each region | |
1665 | requires. */ | |
e765b44c UW |
1666 | argpos.regcache = NULL; |
1667 | argpos.gparam = 0; | |
1668 | argpos.refparam = 0; | |
8be9034a AC |
1669 | } |
1670 | else | |
1671 | { | |
24e9cda0 UW |
1672 | /* Decrement the stack pointer making space for the Altivec |
1673 | and general on-stack parameters. Set refparam and gparam | |
1674 | to their corresponding regions. */ | |
e765b44c UW |
1675 | argpos.regcache = regcache; |
1676 | argpos.refparam = align_down (sp - refparam_size, 16); | |
1677 | argpos.gparam = align_down (argpos.refparam - gparam_size, 16); | |
52f548e4 UW |
1678 | /* Add in space for the TOC, link editor double word (v1 only), |
1679 | compiler double word (v1 only), LR save area, CR save area, | |
1680 | and backchain. */ | |
1681 | if (tdep->elf_abi == POWERPC_ELF_V1) | |
1682 | sp = align_down (argpos.gparam - 48, 16); | |
1683 | else | |
1684 | sp = align_down (argpos.gparam - 32, 16); | |
8be9034a AC |
1685 | } |
1686 | ||
1687 | /* If the function is returning a `struct', then there is an | |
dda83cd7 SM |
1688 | extra hidden parameter (which will be passed in r3) |
1689 | containing the address of that struct.. In that case we | |
1690 | should advance one word and start from r4 register to copy | |
1691 | parameters. This also consumes one on-stack parameter slot. */ | |
cf84fa6b | 1692 | if (return_method == return_method_struct) |
e765b44c | 1693 | ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos); |
8be9034a AC |
1694 | |
1695 | for (argno = 0; argno < nargs; argno++) | |
1696 | { | |
1697 | struct value *arg = args[argno]; | |
d0c97917 | 1698 | struct type *type = check_typedef (arg->type ()); |
efaf1ae0 | 1699 | const bfd_byte *val = arg->contents ().data (); |
ce0451ad | 1700 | |
78134374 | 1701 | if (type->code () == TYPE_CODE_COMPLEX) |
8be9034a | 1702 | { |
e765b44c | 1703 | /* Complex types are passed as if two independent scalars. */ |
27710edb | 1704 | struct type *eltype = check_typedef (type->target_type ()); |
1300a2f4 | 1705 | |
e765b44c UW |
1706 | ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos); |
1707 | ppc64_sysv_abi_push_param (gdbarch, eltype, | |
df86565b | 1708 | val + eltype->length (), &argpos); |
1300a2f4 | 1709 | } |
bd63c870 | 1710 | else if (type->code () == TYPE_CODE_ARRAY && type->is_vector () |
54fcddd0 UW |
1711 | && opencl_abi) |
1712 | { | |
1713 | /* OpenCL vectors shorter than 16 bytes are passed as if | |
e765b44c UW |
1714 | a series of independent scalars; OpenCL vectors 16 bytes |
1715 | or longer are passed as if a series of AltiVec vectors. */ | |
1716 | struct type *eltype; | |
1717 | int i, nelt; | |
54fcddd0 | 1718 | |
df86565b | 1719 | if (type->length () < 16) |
27710edb | 1720 | eltype = check_typedef (type->target_type ()); |
e765b44c UW |
1721 | else |
1722 | eltype = register_type (gdbarch, tdep->ppc_vr0_regnum); | |
1723 | ||
df86565b | 1724 | nelt = type->length () / eltype->length (); |
54fcddd0 UW |
1725 | for (i = 0; i < nelt; i++) |
1726 | { | |
df86565b | 1727 | const gdb_byte *elval = val + i * eltype->length (); |
54fcddd0 | 1728 | |
e765b44c | 1729 | ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos); |
8be9034a | 1730 | } |
8be9034a AC |
1731 | } |
1732 | else | |
1733 | { | |
e765b44c UW |
1734 | /* All other types are passed as single arguments. */ |
1735 | ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos); | |
8be9034a AC |
1736 | } |
1737 | } | |
1738 | ||
1739 | if (!write_pass) | |
1740 | { | |
24e9cda0 | 1741 | /* Save the true region sizes ready for the second pass. */ |
e765b44c | 1742 | refparam_size = argpos.refparam; |
24e9cda0 | 1743 | /* Make certain that the general parameter save area is at |
8be9034a | 1744 | least the minimum 8 registers (or doublewords) in size. */ |
e765b44c | 1745 | if (argpos.greg < 8) |
8be9034a AC |
1746 | gparam_size = 8 * tdep->wordsize; |
1747 | else | |
e765b44c | 1748 | gparam_size = argpos.gparam; |
8be9034a AC |
1749 | } |
1750 | } | |
1751 | ||
1752 | /* Update %sp. */ | |
40a6adc1 | 1753 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
8be9034a AC |
1754 | |
1755 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
e17a4113 | 1756 | write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain); |
8be9034a AC |
1757 | |
1758 | /* Point the inferior function call's return address at the dummy's | |
1759 | breakpoint. */ | |
1760 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); | |
1761 | ||
d4094b6a UW |
1762 | /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use |
1763 | that to find the TOC. If we're calling via a function pointer, | |
1764 | the pointer itself identifies the descriptor. */ | |
1765 | if (tdep->elf_abi == POWERPC_ELF_V1) | |
1766 | { | |
d0c97917 | 1767 | struct type *ftype = check_typedef (function->type ()); |
d4094b6a UW |
1768 | CORE_ADDR desc_addr = value_as_address (function); |
1769 | ||
78134374 | 1770 | if (ftype->code () == TYPE_CODE_PTR |
d4094b6a UW |
1771 | || convert_code_addr_to_desc_addr (func_addr, &desc_addr)) |
1772 | { | |
1773 | /* The TOC is the second double word in the descriptor. */ | |
1774 | CORE_ADDR toc = | |
1775 | read_memory_unsigned_integer (desc_addr + tdep->wordsize, | |
1776 | tdep->wordsize, byte_order); | |
1777 | ||
1778 | regcache_cooked_write_unsigned (regcache, | |
1779 | tdep->ppc_gp0_regnum + 2, toc); | |
1780 | } | |
1781 | } | |
1782 | ||
1783 | /* In the ELFv2 ABI, we need to pass the target address in r12 since | |
1784 | we may be calling a global entry point. */ | |
1785 | if (tdep->elf_abi == POWERPC_ELF_V2) | |
1786 | regcache_cooked_write_unsigned (regcache, | |
1787 | tdep->ppc_gp0_regnum + 12, func_addr); | |
8be9034a AC |
1788 | |
1789 | return sp; | |
1790 | } | |
1791 | ||
e765b44c UW |
1792 | /* Subroutine of ppc64_sysv_abi_return_value that handles "base" types: |
1793 | integer, floating-point, and AltiVec vector types. | |
afd48b75 | 1794 | |
e765b44c UW |
1795 | This routine also handles components of aggregate return types; |
1796 | INDEX describes which part of the aggregate is to be handled. | |
afd48b75 | 1797 | |
e765b44c UW |
1798 | Returns true if VALTYPE is some such base type that could be handled, |
1799 | false otherwise. */ | |
1800 | static int | |
1801 | ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype, | |
1802 | struct regcache *regcache, gdb_byte *readbuf, | |
1803 | const gdb_byte *writebuf, int index) | |
afd48b75 | 1804 | { |
08106042 | 1805 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
16796152 | 1806 | |
e765b44c | 1807 | /* Integers live in GPRs starting at r3. */ |
78134374 SM |
1808 | if ((valtype->code () == TYPE_CODE_INT |
1809 | || valtype->code () == TYPE_CODE_ENUM | |
1810 | || valtype->code () == TYPE_CODE_CHAR | |
9a73e1ca JB |
1811 | || valtype->code () == TYPE_CODE_BOOL |
1812 | || valtype->code () == TYPE_CODE_RANGE | |
1813 | || is_fixed_point_type (valtype)) | |
df86565b | 1814 | && valtype->length () <= 8) |
afd48b75 | 1815 | { |
e765b44c UW |
1816 | int regnum = tdep->ppc_gp0_regnum + 3 + index; |
1817 | ||
963e2bb7 | 1818 | if (writebuf != NULL) |
afd48b75 | 1819 | { |
9a73e1ca JB |
1820 | LONGEST return_val; |
1821 | ||
1822 | if (is_fixed_point_type (valtype)) | |
1823 | { | |
1824 | /* Fixed point type values need to be returned unscaled. */ | |
1825 | gdb_mpz unscaled; | |
1826 | ||
e5783467 | 1827 | unscaled.read (gdb::make_array_view (writebuf, |
df86565b | 1828 | valtype->length ()), |
9a73e1ca JB |
1829 | type_byte_order (valtype), |
1830 | valtype->is_unsigned ()); | |
1831 | return_val = unscaled.as_integer<LONGEST> (); | |
1832 | } | |
1833 | else | |
1834 | return_val = unpack_long (valtype, writebuf); | |
1835 | ||
afd48b75 | 1836 | /* Be careful to sign extend the value. */ |
9a73e1ca | 1837 | regcache_cooked_write_unsigned (regcache, regnum, return_val); |
afd48b75 | 1838 | } |
963e2bb7 | 1839 | if (readbuf != NULL) |
afd48b75 | 1840 | { |
e765b44c | 1841 | /* Extract the integer from GPR. Since this is truncating the |
afd48b75 AC |
1842 | value, there isn't a sign extension problem. */ |
1843 | ULONGEST regval; | |
e765b44c UW |
1844 | |
1845 | regcache_cooked_read_unsigned (regcache, regnum, ®val); | |
df86565b | 1846 | store_unsigned_integer (readbuf, valtype->length (), |
e765b44c | 1847 | gdbarch_byte_order (gdbarch), regval); |
afd48b75 | 1848 | } |
e765b44c | 1849 | return 1; |
afd48b75 | 1850 | } |
e765b44c UW |
1851 | |
1852 | /* Floats and doubles go in f1 .. f13. 32-bit floats are converted | |
1853 | to double first. */ | |
df86565b | 1854 | if (valtype->length () <= 8 |
78134374 | 1855 | && valtype->code () == TYPE_CODE_FLT) |
afd48b75 | 1856 | { |
e765b44c UW |
1857 | int regnum = tdep->ppc_fp0_regnum + 1 + index; |
1858 | struct type *regtype = register_type (gdbarch, regnum); | |
0f068fb5 | 1859 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
e765b44c | 1860 | |
963e2bb7 | 1861 | if (writebuf != NULL) |
e765b44c | 1862 | { |
3b2ca824 | 1863 | target_float_convert (writebuf, valtype, regval, regtype); |
b66f5587 | 1864 | regcache->cooked_write (regnum, regval); |
e765b44c | 1865 | } |
963e2bb7 | 1866 | if (readbuf != NULL) |
e765b44c | 1867 | { |
dca08e1f | 1868 | regcache->cooked_read (regnum, regval); |
3b2ca824 | 1869 | target_float_convert (regval, regtype, readbuf, valtype); |
e765b44c UW |
1870 | } |
1871 | return 1; | |
afd48b75 | 1872 | } |
54fcddd0 | 1873 | |
e765b44c UW |
1874 | /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are |
1875 | placed in the least significant word. */ | |
df86565b | 1876 | if (valtype->length () <= 8 |
78134374 | 1877 | && valtype->code () == TYPE_CODE_DECFLOAT) |
e765b44c UW |
1878 | { |
1879 | int regnum = tdep->ppc_fp0_regnum + 1 + index; | |
5b757e5d UW |
1880 | int offset = 0; |
1881 | ||
1882 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
df86565b | 1883 | offset = 8 - valtype->length (); |
54fcddd0 | 1884 | |
e765b44c | 1885 | if (writebuf != NULL) |
df86565b | 1886 | regcache->cooked_write_part (regnum, offset, valtype->length (), |
e4c4a59b | 1887 | writebuf); |
e765b44c | 1888 | if (readbuf != NULL) |
df86565b | 1889 | regcache->cooked_read_part (regnum, offset, valtype->length (), |
73bb0000 | 1890 | readbuf); |
e765b44c UW |
1891 | return 1; |
1892 | } | |
54fcddd0 | 1893 | |
e765b44c | 1894 | /* IBM long double stored in two consecutive FPRs. */ |
df86565b | 1895 | if (valtype->length () == 16 |
78134374 | 1896 | && valtype->code () == TYPE_CODE_FLT |
e765b44c UW |
1897 | && (gdbarch_long_double_format (gdbarch) |
1898 | == floatformats_ibm_long_double)) | |
1899 | { | |
1900 | int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index; | |
54fcddd0 | 1901 | |
e765b44c UW |
1902 | if (writebuf != NULL) |
1903 | { | |
b66f5587 SM |
1904 | regcache->cooked_write (regnum, writebuf); |
1905 | regcache->cooked_write (regnum + 1, writebuf + 8); | |
54fcddd0 | 1906 | } |
e765b44c UW |
1907 | if (readbuf != NULL) |
1908 | { | |
dca08e1f SM |
1909 | regcache->cooked_read (regnum, readbuf); |
1910 | regcache->cooked_read (regnum + 1, readbuf + 8); | |
e765b44c UW |
1911 | } |
1912 | return 1; | |
54fcddd0 | 1913 | } |
e765b44c UW |
1914 | |
1915 | /* 128-bit decimal floating-point values are stored in an even/odd | |
1916 | pair of FPRs, with the even FPR holding the most significant half. */ | |
df86565b | 1917 | if (valtype->length () == 16 |
78134374 | 1918 | && valtype->code () == TYPE_CODE_DECFLOAT) |
54fcddd0 | 1919 | { |
e765b44c | 1920 | int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index; |
0ff3e01f UW |
1921 | int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0; |
1922 | int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8; | |
54fcddd0 | 1923 | |
e765b44c | 1924 | if (writebuf != NULL) |
54fcddd0 | 1925 | { |
b66f5587 SM |
1926 | regcache->cooked_write (regnum, writebuf + hipart); |
1927 | regcache->cooked_write (regnum + 1, writebuf + lopart); | |
54fcddd0 | 1928 | } |
e765b44c UW |
1929 | if (readbuf != NULL) |
1930 | { | |
dca08e1f SM |
1931 | regcache->cooked_read (regnum, readbuf + hipart); |
1932 | regcache->cooked_read (regnum + 1, readbuf + lopart); | |
e765b44c UW |
1933 | } |
1934 | return 1; | |
54fcddd0 | 1935 | } |
e765b44c | 1936 | |
ebbac168 CL |
1937 | /* AltiVec vectors are returned in VRs starting at v2. |
1938 | IEEE FLOAT 128-bit are stored in vector register. */ | |
1939 | ||
df86565b | 1940 | if (valtype->length () == 16 |
ebbac168 CL |
1941 | && ((valtype->code () == TYPE_CODE_ARRAY |
1942 | && valtype->is_vector () | |
1943 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
1944 | || (valtype->code () == TYPE_CODE_FLT | |
1945 | && (gdbarch_long_double_format (gdbarch) | |
1946 | == floatformats_ieee_quad)))) | |
afd48b75 | 1947 | { |
e765b44c UW |
1948 | int regnum = tdep->ppc_vr0_regnum + 2 + index; |
1949 | ||
1950 | if (writebuf != NULL) | |
b66f5587 | 1951 | regcache->cooked_write (regnum, writebuf); |
e765b44c | 1952 | if (readbuf != NULL) |
dca08e1f | 1953 | regcache->cooked_read (regnum, readbuf); |
e765b44c | 1954 | return 1; |
afd48b75 | 1955 | } |
e765b44c | 1956 | |
a1da2672 | 1957 | /* Short vectors are returned in GPRs starting at r3. */ |
df86565b | 1958 | if (valtype->length () <= 8 |
bd63c870 | 1959 | && valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector ()) |
a1da2672 UW |
1960 | { |
1961 | int regnum = tdep->ppc_gp0_regnum + 3 + index; | |
1962 | int offset = 0; | |
1963 | ||
1964 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
df86565b | 1965 | offset = 8 - valtype->length (); |
a1da2672 UW |
1966 | |
1967 | if (writebuf != NULL) | |
df86565b | 1968 | regcache->cooked_write_part (regnum, offset, valtype->length (), |
e4c4a59b | 1969 | writebuf); |
a1da2672 | 1970 | if (readbuf != NULL) |
df86565b | 1971 | regcache->cooked_read_part (regnum, offset, valtype->length (), |
73bb0000 | 1972 | readbuf); |
a1da2672 UW |
1973 | return 1; |
1974 | } | |
1975 | ||
e765b44c UW |
1976 | return 0; |
1977 | } | |
1978 | ||
1979 | /* The 64 bit ABI return value convention. | |
1980 | ||
1981 | Return non-zero if the return-value is stored in a register, return | |
1982 | 0 if the return-value is instead stored on the stack (a.k.a., | |
1983 | struct return convention). | |
1984 | ||
1985 | For a return-value stored in a register: when WRITEBUF is non-NULL, | |
1986 | copy the buffer to the corresponding register return-value location | |
1987 | location; when READBUF is non-NULL, fill the buffer from the | |
1988 | corresponding register return-value location. */ | |
1989 | enum return_value_convention | |
1990 | ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function, | |
1991 | struct type *valtype, struct regcache *regcache, | |
1992 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
1993 | { | |
08106042 | 1994 | ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch); |
d0c97917 | 1995 | struct type *func_type = function ? function->type () : NULL; |
e765b44c UW |
1996 | int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0; |
1997 | struct type *eltype; | |
b926417a | 1998 | int nelt, ok; |
e765b44c UW |
1999 | |
2000 | /* This function exists to support a calling convention that | |
2001 | requires floating-point registers. It shouldn't be used on | |
2002 | processors that lack them. */ | |
2003 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
2004 | ||
2005 | /* Complex types are returned as if two independent scalars. */ | |
78134374 | 2006 | if (valtype->code () == TYPE_CODE_COMPLEX) |
afd48b75 | 2007 | { |
27710edb | 2008 | eltype = check_typedef (valtype->target_type ()); |
e765b44c | 2009 | |
b926417a | 2010 | for (int i = 0; i < 2; i++) |
afd48b75 | 2011 | { |
e765b44c UW |
2012 | ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache, |
2013 | readbuf, writebuf, i); | |
2014 | gdb_assert (ok); | |
2015 | ||
2016 | if (readbuf) | |
df86565b | 2017 | readbuf += eltype->length (); |
e765b44c | 2018 | if (writebuf) |
df86565b | 2019 | writebuf += eltype->length (); |
afd48b75 AC |
2020 | } |
2021 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2022 | } | |
e765b44c UW |
2023 | |
2024 | /* OpenCL vectors shorter than 16 bytes are returned as if | |
2025 | a series of independent scalars; OpenCL vectors 16 bytes | |
2026 | or longer are returned as if a series of AltiVec vectors. */ | |
bd63c870 | 2027 | if (valtype->code () == TYPE_CODE_ARRAY && valtype->is_vector () |
e765b44c | 2028 | && opencl_abi) |
afd48b75 | 2029 | { |
df86565b | 2030 | if (valtype->length () < 16) |
27710edb | 2031 | eltype = check_typedef (valtype->target_type ()); |
e765b44c UW |
2032 | else |
2033 | eltype = register_type (gdbarch, tdep->ppc_vr0_regnum); | |
2034 | ||
df86565b | 2035 | nelt = valtype->length () / eltype->length (); |
b926417a | 2036 | for (int i = 0; i < nelt; i++) |
afd48b75 | 2037 | { |
e765b44c UW |
2038 | ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache, |
2039 | readbuf, writebuf, i); | |
2040 | gdb_assert (ok); | |
2041 | ||
2042 | if (readbuf) | |
df86565b | 2043 | readbuf += eltype->length (); |
e765b44c | 2044 | if (writebuf) |
df86565b | 2045 | writebuf += eltype->length (); |
afd48b75 AC |
2046 | } |
2047 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2048 | } | |
e765b44c UW |
2049 | |
2050 | /* All pointers live in r3. */ | |
78134374 | 2051 | if (valtype->code () == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype)) |
afd48b75 | 2052 | { |
e765b44c UW |
2053 | int regnum = tdep->ppc_gp0_regnum + 3; |
2054 | ||
2055 | if (writebuf != NULL) | |
b66f5587 | 2056 | regcache->cooked_write (regnum, writebuf); |
e765b44c | 2057 | if (readbuf != NULL) |
dca08e1f | 2058 | regcache->cooked_read (regnum, readbuf); |
afd48b75 AC |
2059 | return RETURN_VALUE_REGISTER_CONVENTION; |
2060 | } | |
e765b44c UW |
2061 | |
2062 | /* Small character arrays are returned, right justified, in r3. */ | |
78134374 | 2063 | if (valtype->code () == TYPE_CODE_ARRAY |
bd63c870 | 2064 | && !valtype->is_vector () |
df86565b | 2065 | && valtype->length () <= 8 |
27710edb | 2066 | && valtype->target_type ()->code () == TYPE_CODE_INT |
df86565b | 2067 | && valtype->target_type ()->length () == 1) |
e765b44c UW |
2068 | { |
2069 | int regnum = tdep->ppc_gp0_regnum + 3; | |
df86565b | 2070 | int offset = (register_size (gdbarch, regnum) - valtype->length ()); |
e765b44c UW |
2071 | |
2072 | if (writebuf != NULL) | |
df86565b | 2073 | regcache->cooked_write_part (regnum, offset, valtype->length (), |
e4c4a59b | 2074 | writebuf); |
e765b44c | 2075 | if (readbuf != NULL) |
df86565b | 2076 | regcache->cooked_read_part (regnum, offset, valtype->length (), |
73bb0000 | 2077 | readbuf); |
e765b44c UW |
2078 | return RETURN_VALUE_REGISTER_CONVENTION; |
2079 | } | |
2080 | ||
cc0e89c5 UW |
2081 | /* In the ELFv2 ABI, homogeneous floating-point or vector |
2082 | aggregates are returned in registers. */ | |
2083 | if (tdep->elf_abi == POWERPC_ELF_V2 | |
ebbac168 CL |
2084 | && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt, |
2085 | gdbarch) | |
78134374 SM |
2086 | && (eltype->code () == TYPE_CODE_FLT |
2087 | || eltype->code () == TYPE_CODE_DECFLOAT | |
2088 | || (eltype->code () == TYPE_CODE_ARRAY | |
bd63c870 | 2089 | && eltype->is_vector () |
a1da2672 | 2090 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC |
df86565b | 2091 | && eltype->length () == 16))) |
cc0e89c5 | 2092 | { |
b926417a | 2093 | for (int i = 0; i < nelt; i++) |
cc0e89c5 UW |
2094 | { |
2095 | ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache, | |
2096 | readbuf, writebuf, i); | |
2097 | gdb_assert (ok); | |
2098 | ||
2099 | if (readbuf) | |
df86565b | 2100 | readbuf += eltype->length (); |
cc0e89c5 | 2101 | if (writebuf) |
df86565b | 2102 | writebuf += eltype->length (); |
cc0e89c5 UW |
2103 | } |
2104 | ||
2105 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2106 | } | |
2107 | ||
24b27e5e CL |
2108 | if (!language_pass_by_reference (valtype).trivially_copyable |
2109 | && valtype->code () == TYPE_CODE_STRUCT) | |
2110 | return RETURN_VALUE_STRUCT_CONVENTION; | |
2111 | ||
cc0e89c5 UW |
2112 | /* In the ELFv2 ABI, aggregate types of up to 16 bytes are |
2113 | returned in registers r3:r4. */ | |
2114 | if (tdep->elf_abi == POWERPC_ELF_V2 | |
df86565b | 2115 | && valtype->length () <= 16 |
78134374 SM |
2116 | && (valtype->code () == TYPE_CODE_STRUCT |
2117 | || valtype->code () == TYPE_CODE_UNION | |
2118 | || (valtype->code () == TYPE_CODE_ARRAY | |
bd63c870 | 2119 | && !valtype->is_vector ()))) |
cc0e89c5 | 2120 | { |
df86565b | 2121 | int n_regs = ((valtype->length () + tdep->wordsize - 1) |
cc0e89c5 | 2122 | / tdep->wordsize); |
cc0e89c5 | 2123 | |
b926417a | 2124 | for (int i = 0; i < n_regs; i++) |
cc0e89c5 | 2125 | { |
0f068fb5 | 2126 | gdb_byte regval[PPC_MAX_REGISTER_SIZE]; |
cc0e89c5 UW |
2127 | int regnum = tdep->ppc_gp0_regnum + 3 + i; |
2128 | int offset = i * tdep->wordsize; | |
df86565b | 2129 | int len = valtype->length () - offset; |
cc0e89c5 UW |
2130 | |
2131 | if (len > tdep->wordsize) | |
2132 | len = tdep->wordsize; | |
2133 | ||
2134 | if (writebuf != NULL) | |
2135 | { | |
2136 | memset (regval, 0, sizeof regval); | |
2137 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG | |
2138 | && offset == 0) | |
2139 | memcpy (regval + tdep->wordsize - len, writebuf, len); | |
2140 | else | |
2141 | memcpy (regval, writebuf + offset, len); | |
b66f5587 | 2142 | regcache->cooked_write (regnum, regval); |
cc0e89c5 UW |
2143 | } |
2144 | if (readbuf != NULL) | |
2145 | { | |
dca08e1f | 2146 | regcache->cooked_read (regnum, regval); |
cc0e89c5 UW |
2147 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG |
2148 | && offset == 0) | |
2149 | memcpy (readbuf, regval + tdep->wordsize - len, len); | |
2150 | else | |
2151 | memcpy (readbuf + offset, regval, len); | |
2152 | } | |
2153 | } | |
2154 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2155 | } | |
2156 | ||
e765b44c UW |
2157 | /* Handle plain base types. */ |
2158 | if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache, | |
2159 | readbuf, writebuf, 0)) | |
2160 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2161 | ||
afd48b75 AC |
2162 | return RETURN_VALUE_STRUCT_CONVENTION; |
2163 | } | |
2164 | ||
53fd08b6 | 2165 | CORE_ADDR |
fbdecfbf | 2166 | ppc_sysv_get_return_buf_addr (struct type *val_type, frame_info_ptr cur_frame) |
a0eda3df CL |
2167 | { |
2168 | /* The PowerPC ABI specifies aggregates that are not returned by value | |
2169 | are returned in a storage buffer provided by the caller. The | |
2170 | address of the storage buffer is provided as a hidden first input | |
53fd08b6 | 2171 | argument in register r3. The PowerPC ABI does not guarantee that |
a0eda3df CL |
2172 | register r3 will not be changed while executing the function. Hence, it |
2173 | cannot be assumed that r3 will still contain the address of the storage | |
2174 | buffer when execution reaches the end of the function. | |
2175 | ||
2176 | This function attempts to determine the value of r3 on entry to the | |
2177 | function using the DW_OP_entry_value DWARF entries. This requires | |
2178 | compiling the user program with -fvar-tracking to resolve the | |
2179 | DW_TAG_call_sites in the binary file. */ | |
2180 | ||
2181 | union call_site_parameter_u kind_u; | |
2182 | enum call_site_parameter_kind kind; | |
2183 | CORE_ADDR return_val = 0; | |
2184 | ||
2185 | kind_u.dwarf_reg = 3; /* First passed arg/return value is in r3. */ | |
2186 | kind = CALL_SITE_PARAMETER_DWARF_REG; | |
2187 | ||
2188 | /* val_type is the type of the return value. Need the pointer type | |
2189 | to the return value. */ | |
2190 | val_type = lookup_pointer_type (val_type); | |
2191 | ||
2192 | try | |
2193 | { | |
2194 | return_val = value_as_address (value_of_dwarf_reg_entry (val_type, | |
2195 | cur_frame, | |
2196 | kind, kind_u)); | |
2197 | } | |
2198 | catch (const gdb_exception_error &e) | |
2199 | { | |
2200 | warning ("Cannot determine the function return value.\n" | |
2201 | "Try compiling with -fvar-tracking."); | |
2202 | } | |
2203 | return return_val; | |
2204 | } |