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Remove some forward declarations in ldemul.h and ldfile.h, and
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1/* Cache and manage the values of registers for GDB, the GNU debugger.
2 Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
27
28/*
29 * DATA STRUCTURE
30 *
31 * Here is the actual register cache.
32 */
33
34/* NOTE: this is a write-back cache. There is no "dirty" bit for
35 recording if the register values have been changed (eg. by the
36 user). Therefore all registers must be written back to the
37 target when appropriate. */
38
39/* REGISTERS contains the cached register values (in target byte order). */
40
41char *registers;
42
43/* REGISTER_VALID is 0 if the register needs to be fetched,
44 1 if it has been fetched, and
45 -1 if the register value was not available.
46 "Not available" means don't try to fetch it again. */
47
48signed char *register_valid;
49
50/* The thread/process associated with the current set of registers.
51 For now, -1 is special, and means `no current process'. */
52
53static int registers_pid = -1;
54
55/*
56 * FUNCTIONS:
57 */
58
59/* REGISTER_CACHED()
60
61 Returns 0 if the value is not in the cache (needs fetch).
62 >0 if the value is in the cache.
63 <0 if the value is permanently unavailable (don't ask again). */
64
65int
66register_cached (int regnum)
67{
68 return register_valid[regnum];
69}
70
71/* FIND_SAVED_REGISTER ()
72
73 Return the address in which frame FRAME's value of register REGNUM
74 has been saved in memory. Or return zero if it has not been saved.
75 If REGNUM specifies the SP, the value we return is actually
76 the SP value, not an address where it was saved. */
77
78CORE_ADDR
79find_saved_register (struct frame_info *frame, int regnum)
80{
81 register struct frame_info *frame1 = NULL;
82 register CORE_ADDR addr = 0;
83
84 if (frame == NULL) /* No regs saved if want current frame */
85 return 0;
86
87#ifdef HAVE_REGISTER_WINDOWS
88 /* We assume that a register in a register window will only be saved
89 in one place (since the name changes and/or disappears as you go
90 towards inner frames), so we only call get_frame_saved_regs on
91 the current frame. This is directly in contradiction to the
92 usage below, which assumes that registers used in a frame must be
93 saved in a lower (more interior) frame. This change is a result
94 of working on a register window machine; get_frame_saved_regs
95 always returns the registers saved within a frame, within the
96 context (register namespace) of that frame. */
97
98 /* However, note that we don't want this to return anything if
99 nothing is saved (if there's a frame inside of this one). Also,
100 callers to this routine asking for the stack pointer want the
101 stack pointer saved for *this* frame; this is returned from the
102 next frame. */
103
104 if (REGISTER_IN_WINDOW_P (regnum))
105 {
106 frame1 = get_next_frame (frame);
107 if (!frame1)
108 return 0; /* Registers of this frame are active. */
109
110 /* Get the SP from the next frame in; it will be this
111 current frame. */
112 if (regnum != SP_REGNUM)
113 frame1 = frame;
114
115 FRAME_INIT_SAVED_REGS (frame1);
116 return frame1->saved_regs[regnum]; /* ... which might be zero */
117 }
118#endif /* HAVE_REGISTER_WINDOWS */
119
120 /* Note that this next routine assumes that registers used in
121 frame x will be saved only in the frame that x calls and
122 frames interior to it. This is not true on the sparc, but the
123 above macro takes care of it, so we should be all right. */
124 while (1)
125 {
126 QUIT;
127 frame1 = get_prev_frame (frame1);
128 if (frame1 == 0 || frame1 == frame)
129 break;
130 FRAME_INIT_SAVED_REGS (frame1);
131 if (frame1->saved_regs[regnum])
132 addr = frame1->saved_regs[regnum];
133 }
134
135 return addr;
136}
137
138/* DEFAULT_GET_SAVED_REGISTER ()
139
140 Find register number REGNUM relative to FRAME and put its (raw,
141 target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the
142 variable was optimized out (and thus can't be fetched). Set *LVAL
143 to lval_memory, lval_register, or not_lval, depending on whether
144 the value was fetched from memory, from a register, or in a strange
145 and non-modifiable way (e.g. a frame pointer which was calculated
146 rather than fetched). Set *ADDRP to the address, either in memory
147 on as a REGISTER_BYTE offset into the registers array.
148
149 Note that this implementation never sets *LVAL to not_lval. But
150 it can be replaced by defining GET_SAVED_REGISTER and supplying
151 your own.
152
153 The argument RAW_BUFFER must point to aligned memory. */
154
155static void
156default_get_saved_register (char *raw_buffer,
157 int *optimized,
158 CORE_ADDR *addrp,
159 struct frame_info *frame,
160 int regnum,
161 enum lval_type *lval)
162{
163 CORE_ADDR addr;
164
165 if (!target_has_registers)
166 error ("No registers.");
167
168 /* Normal systems don't optimize out things with register numbers. */
169 if (optimized != NULL)
170 *optimized = 0;
171 addr = find_saved_register (frame, regnum);
172 if (addr != 0)
173 {
174 if (lval != NULL)
175 *lval = lval_memory;
176 if (regnum == SP_REGNUM)
177 {
178 if (raw_buffer != NULL)
179 {
180 /* Put it back in target format. */
181 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
182 (LONGEST) addr);
183 }
184 if (addrp != NULL)
185 *addrp = 0;
186 return;
187 }
188 if (raw_buffer != NULL)
189 target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
190 }
191 else
192 {
193 if (lval != NULL)
194 *lval = lval_register;
195 addr = REGISTER_BYTE (regnum);
196 if (raw_buffer != NULL)
197 read_register_gen (regnum, raw_buffer);
198 }
199 if (addrp != NULL)
200 *addrp = addr;
201}
202
203#if !defined (GET_SAVED_REGISTER)
204#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
205 default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
206#endif
207
208void
209get_saved_register (char *raw_buffer,
210 int *optimized,
211 CORE_ADDR *addrp,
212 struct frame_info *frame,
213 int regnum,
214 enum lval_type *lval)
215{
216 GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
217}
218
219/* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
220
221 Copy the bytes of register REGNUM, relative to the input stack frame,
222 into our memory at MYADDR, in target byte order.
223 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
224
225 Returns 1 if could not be read, 0 if could. */
226
227/* FIXME: This function increases the confusion between FP_REGNUM
228 and the virtual/pseudo-frame pointer. */
229
230static int
231read_relative_register_raw_bytes_for_frame (int regnum,
232 char *myaddr,
233 struct frame_info *frame)
234{
235 int optim;
236 if (regnum == FP_REGNUM && frame)
237 {
238 /* Put it back in target format. */
239 store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
240 (LONGEST) FRAME_FP (frame));
241
242 return 0;
243 }
244
245 get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
246 regnum, (enum lval_type *) NULL);
247
248 if (register_valid[regnum] < 0)
249 return 1; /* register value not available */
250
251 return optim;
252}
253
254/* READ_RELATIVE_REGISTER_RAW_BYTES
255
256 Copy the bytes of register REGNUM, relative to the current stack
257 frame, into our memory at MYADDR, in target byte order.
258 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
259
260 Returns 1 if could not be read, 0 if could. */
261
262int
263read_relative_register_raw_bytes (int regnum, char *myaddr)
264{
265 return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
266 selected_frame);
267}
268
269
270/* Low level examining and depositing of registers.
271
272 The caller is responsible for making sure that the inferior is
273 stopped before calling the fetching routines, or it will get
274 garbage. (a change from GDB version 3, in which the caller got the
275 value from the last stop). */
276
277/* REGISTERS_CHANGED ()
278
279 Indicate that registers may have changed, so invalidate the cache. */
280
281void
282registers_changed (void)
283{
284 int i;
285 int numregs = ARCH_NUM_REGS;
286
287 registers_pid = -1;
288
289 /* Force cleanup of any alloca areas if using C alloca instead of
290 a builtin alloca. This particular call is used to clean up
291 areas allocated by low level target code which may build up
292 during lengthy interactions between gdb and the target before
293 gdb gives control to the user (ie watchpoints). */
294 alloca (0);
295
296 for (i = 0; i < numregs; i++)
297 register_valid[i] = 0;
298
299 if (registers_changed_hook)
300 registers_changed_hook ();
301}
302
303/* REGISTERS_FETCHED ()
304
305 Indicate that all registers have been fetched, so mark them all valid. */
306
307
308void
309registers_fetched (void)
310{
311 int i;
312 int numregs = ARCH_NUM_REGS;
313
314 for (i = 0; i < numregs; i++)
315 register_valid[i] = 1;
316}
317
318/* read_register_bytes and write_register_bytes are generally a *BAD*
319 idea. They are inefficient because they need to check for partial
320 updates, which can only be done by scanning through all of the
321 registers and seeing if the bytes that are being read/written fall
322 inside of an invalid register. [The main reason this is necessary
323 is that register sizes can vary, so a simple index won't suffice.]
324 It is far better to call read_register_gen and write_register_gen
325 if you want to get at the raw register contents, as it only takes a
326 regno as an argument, and therefore can't do a partial register
327 update.
328
329 Prior to the recent fixes to check for partial updates, both read
330 and write_register_bytes always checked to see if any registers
331 were stale, and then called target_fetch_registers (-1) to update
332 the whole set. This caused really slowed things down for remote
333 targets. */
334
335/* Copy INLEN bytes of consecutive data from registers
336 starting with the INREGBYTE'th byte of register data
337 into memory at MYADDR. */
338
339void
340read_register_bytes (int inregbyte, char *myaddr, int inlen)
341{
342 int inregend = inregbyte + inlen;
343 int regno;
344
345 if (registers_pid != inferior_pid)
346 {
347 registers_changed ();
348 registers_pid = inferior_pid;
349 }
350
351 /* See if we are trying to read bytes from out-of-date registers. If so,
352 update just those registers. */
353
354 for (regno = 0; regno < NUM_REGS; regno++)
355 {
356 int regstart, regend;
357
358 if (register_valid[regno])
359 continue;
360
361 if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
362 continue;
363
364 regstart = REGISTER_BYTE (regno);
365 regend = regstart + REGISTER_RAW_SIZE (regno);
366
367 if (regend <= inregbyte || inregend <= regstart)
368 /* The range the user wants to read doesn't overlap with regno. */
369 continue;
370
371 /* We've found an invalid register where at least one byte will be read.
372 Update it from the target. */
373 target_fetch_registers (regno);
374
375 if (!register_valid[regno])
376 error ("read_register_bytes: Couldn't update register %d.", regno);
377 }
378
379 if (myaddr != NULL)
380 memcpy (myaddr, &registers[inregbyte], inlen);
381}
382
383/* Read register REGNO into memory at MYADDR, which must be large
384 enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the
385 register is known to be the size of a CORE_ADDR or smaller,
386 read_register can be used instead. */
387
388void
389read_register_gen (int regno, char *myaddr)
390{
391 if (registers_pid != inferior_pid)
392 {
393 registers_changed ();
394 registers_pid = inferior_pid;
395 }
396
397 if (!register_valid[regno])
398 target_fetch_registers (regno);
399 memcpy (myaddr, &registers[REGISTER_BYTE (regno)],
400 REGISTER_RAW_SIZE (regno));
401}
402
403/* Write register REGNO at MYADDR to the target. MYADDR points at
404 REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */
405
406/* Registers we shouldn't try to store. */
407#if !defined (CANNOT_STORE_REGISTER)
408#define CANNOT_STORE_REGISTER(regno) 0
409#endif
410
411void
412write_register_gen (int regno, char *myaddr)
413{
414 int size;
415
416 /* On the sparc, writing %g0 is a no-op, so we don't even want to
417 change the registers array if something writes to this register. */
418 if (CANNOT_STORE_REGISTER (regno))
419 return;
420
421 if (registers_pid != inferior_pid)
422 {
423 registers_changed ();
424 registers_pid = inferior_pid;
425 }
426
427 size = REGISTER_RAW_SIZE (regno);
428
429 /* If we have a valid copy of the register, and new value == old value,
430 then don't bother doing the actual store. */
431
432 if (register_valid[regno]
433 && memcmp (&registers[REGISTER_BYTE (regno)], myaddr, size) == 0)
434 return;
435
436 target_prepare_to_store ();
437
438 memcpy (&registers[REGISTER_BYTE (regno)], myaddr, size);
439
440 register_valid[regno] = 1;
441
442 target_store_registers (regno);
443}
444
445/* Copy INLEN bytes of consecutive data from memory at MYADDR
446 into registers starting with the MYREGSTART'th byte of register data. */
447
448void
449write_register_bytes (int myregstart, char *myaddr, int inlen)
450{
451 int myregend = myregstart + inlen;
452 int regno;
453
454 target_prepare_to_store ();
455
456 /* Scan through the registers updating any that are covered by the
457 range myregstart<=>myregend using write_register_gen, which does
458 nice things like handling threads, and avoiding updates when the
459 new and old contents are the same. */
460
461 for (regno = 0; regno < NUM_REGS; regno++)
462 {
463 int regstart, regend;
464
465 regstart = REGISTER_BYTE (regno);
466 regend = regstart + REGISTER_RAW_SIZE (regno);
467
468 /* Is this register completely outside the range the user is writing? */
469 if (myregend <= regstart || regend <= myregstart)
470 /* do nothing */ ;
471
472 /* Is this register completely within the range the user is writing? */
473 else if (myregstart <= regstart && regend <= myregend)
474 write_register_gen (regno, myaddr + (regstart - myregstart));
475
476 /* The register partially overlaps the range being written. */
477 else
478 {
479 char regbuf[MAX_REGISTER_RAW_SIZE];
480 /* What's the overlap between this register's bytes and
481 those the caller wants to write? */
482 int overlapstart = max (regstart, myregstart);
483 int overlapend = min (regend, myregend);
484
485 /* We may be doing a partial update of an invalid register.
486 Update it from the target before scribbling on it. */
487 read_register_gen (regno, regbuf);
488
489 memcpy (registers + overlapstart,
490 myaddr + (overlapstart - myregstart),
491 overlapend - overlapstart);
492
493 target_store_registers (regno);
494 }
495 }
496}
497
498
499/* Return the raw contents of register REGNO, regarding it as an
500 integer. This probably should be returning LONGEST rather than
501 CORE_ADDR. */
502
503CORE_ADDR
504read_register (int regno)
505{
506 if (registers_pid != inferior_pid)
507 {
508 registers_changed ();
509 registers_pid = inferior_pid;
510 }
511
512 if (!register_valid[regno])
513 target_fetch_registers (regno);
514
515 return ((CORE_ADDR)
516 extract_unsigned_integer (&registers[REGISTER_BYTE (regno)],
517 REGISTER_RAW_SIZE (regno)));
518}
519
520CORE_ADDR
521read_register_pid (int regno, int pid)
522{
523 int save_pid;
524 CORE_ADDR retval;
525
526 if (pid == inferior_pid)
527 return read_register (regno);
528
529 save_pid = inferior_pid;
530
531 inferior_pid = pid;
532
533 retval = read_register (regno);
534
535 inferior_pid = save_pid;
536
537 return retval;
538}
539
540/* Store VALUE, into the raw contents of register number REGNO. */
541
542void
543write_register (int regno, LONGEST val)
544{
545 PTR buf;
546 int size;
547
548 /* On the sparc, writing %g0 is a no-op, so we don't even want to
549 change the registers array if something writes to this register. */
550 if (CANNOT_STORE_REGISTER (regno))
551 return;
552
553 if (registers_pid != inferior_pid)
554 {
555 registers_changed ();
556 registers_pid = inferior_pid;
557 }
558
559 size = REGISTER_RAW_SIZE (regno);
560 buf = alloca (size);
561 store_signed_integer (buf, size, (LONGEST) val);
562
563 /* If we have a valid copy of the register, and new value == old value,
564 then don't bother doing the actual store. */
565
566 if (register_valid[regno]
567 && memcmp (&registers[REGISTER_BYTE (regno)], buf, size) == 0)
568 return;
569
570 target_prepare_to_store ();
571
572 memcpy (&registers[REGISTER_BYTE (regno)], buf, size);
573
574 register_valid[regno] = 1;
575
576 target_store_registers (regno);
577}
578
579void
580write_register_pid (int regno, CORE_ADDR val, int pid)
581{
582 int save_pid;
583
584 if (pid == inferior_pid)
585 {
586 write_register (regno, val);
587 return;
588 }
589
590 save_pid = inferior_pid;
591
592 inferior_pid = pid;
593
594 write_register (regno, val);
595
596 inferior_pid = save_pid;
597}
598
599/* SUPPLY_REGISTER()
600
601 Record that register REGNO contains VAL. This is used when the
602 value is obtained from the inferior or core dump, so there is no
603 need to store the value there.
604
605 If VAL is a NULL pointer, then it's probably an unsupported register.
606 We just set it's value to all zeros. We might want to record this
607 fact, and report it to the users of read_register and friends. */
608
609void
610supply_register (int regno, char *val)
611{
612#if 1
613 if (registers_pid != inferior_pid)
614 {
615 registers_changed ();
616 registers_pid = inferior_pid;
617 }
618#endif
619
620 register_valid[regno] = 1;
621 if (val)
622 memcpy (&registers[REGISTER_BYTE (regno)], val,
623 REGISTER_RAW_SIZE (regno));
624 else
625 memset (&registers[REGISTER_BYTE (regno)], '\000',
626 REGISTER_RAW_SIZE (regno));
627
628 /* On some architectures, e.g. HPPA, there are a few stray bits in
629 some registers, that the rest of the code would like to ignore. */
630
631#ifdef CLEAN_UP_REGISTER_VALUE
632 CLEAN_UP_REGISTER_VALUE (regno, &registers[REGISTER_BYTE (regno)]);
633#endif
634}
635
636/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
637 Special handling for registers PC, SP, and FP. */
638
639/* This routine is getting awfully cluttered with #if's. It's probably
640 time to turn this into READ_PC and define it in the tm.h file.
641 Ditto for write_pc.
642
643 1999-06-08: The following were re-written so that it assumes the
644 existance of a TARGET_READ_PC et.al. macro. A default generic
645 version of that macro is made available where needed.
646
647 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
648 by the multi-arch framework, it will eventually be possible to
649 eliminate the intermediate read_pc_pid(). The client would call
650 TARGET_READ_PC directly. (cagney). */
651
652#ifndef TARGET_READ_PC
653#define TARGET_READ_PC generic_target_read_pc
654#endif
655
656CORE_ADDR
657generic_target_read_pc (int pid)
658{
659#ifdef PC_REGNUM
660 if (PC_REGNUM >= 0)
661 {
662 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
663 return pc_val;
664 }
665#endif
666 internal_error ("generic_target_read_pc");
667 return 0;
668}
669
670CORE_ADDR
671read_pc_pid (int pid)
672{
673 int saved_inferior_pid;
674 CORE_ADDR pc_val;
675
676 /* In case pid != inferior_pid. */
677 saved_inferior_pid = inferior_pid;
678 inferior_pid = pid;
679
680 pc_val = TARGET_READ_PC (pid);
681
682 inferior_pid = saved_inferior_pid;
683 return pc_val;
684}
685
686CORE_ADDR
687read_pc (void)
688{
689 return read_pc_pid (inferior_pid);
690}
691
692#ifndef TARGET_WRITE_PC
693#define TARGET_WRITE_PC generic_target_write_pc
694#endif
695
696void
697generic_target_write_pc (CORE_ADDR pc, int pid)
698{
699#ifdef PC_REGNUM
700 if (PC_REGNUM >= 0)
701 write_register_pid (PC_REGNUM, pc, pid);
702 if (NPC_REGNUM >= 0)
703 write_register_pid (NPC_REGNUM, pc + 4, pid);
704 if (NNPC_REGNUM >= 0)
705 write_register_pid (NNPC_REGNUM, pc + 8, pid);
706#else
707 internal_error ("generic_target_write_pc");
708#endif
709}
710
711void
712write_pc_pid (CORE_ADDR pc, int pid)
713{
714 int saved_inferior_pid;
715
716 /* In case pid != inferior_pid. */
717 saved_inferior_pid = inferior_pid;
718 inferior_pid = pid;
719
720 TARGET_WRITE_PC (pc, pid);
721
722 inferior_pid = saved_inferior_pid;
723}
724
725void
726write_pc (CORE_ADDR pc)
727{
728 write_pc_pid (pc, inferior_pid);
729}
730
731/* Cope with strage ways of getting to the stack and frame pointers */
732
733#ifndef TARGET_READ_SP
734#define TARGET_READ_SP generic_target_read_sp
735#endif
736
737CORE_ADDR
738generic_target_read_sp (void)
739{
740#ifdef SP_REGNUM
741 if (SP_REGNUM >= 0)
742 return read_register (SP_REGNUM);
743#endif
744 internal_error ("generic_target_read_sp");
745}
746
747CORE_ADDR
748read_sp (void)
749{
750 return TARGET_READ_SP ();
751}
752
753#ifndef TARGET_WRITE_SP
754#define TARGET_WRITE_SP generic_target_write_sp
755#endif
756
757void
758generic_target_write_sp (CORE_ADDR val)
759{
760#ifdef SP_REGNUM
761 if (SP_REGNUM >= 0)
762 {
763 write_register (SP_REGNUM, val);
764 return;
765 }
766#endif
767 internal_error ("generic_target_write_sp");
768}
769
770void
771write_sp (CORE_ADDR val)
772{
773 TARGET_WRITE_SP (val);
774}
775
776#ifndef TARGET_READ_FP
777#define TARGET_READ_FP generic_target_read_fp
778#endif
779
780CORE_ADDR
781generic_target_read_fp (void)
782{
783#ifdef FP_REGNUM
784 if (FP_REGNUM >= 0)
785 return read_register (FP_REGNUM);
786#endif
787 internal_error ("generic_target_read_fp");
788}
789
790CORE_ADDR
791read_fp (void)
792{
793 return TARGET_READ_FP ();
794}
795
796#ifndef TARGET_WRITE_FP
797#define TARGET_WRITE_FP generic_target_write_fp
798#endif
799
800void
801generic_target_write_fp (CORE_ADDR val)
802{
803#ifdef FP_REGNUM
804 if (FP_REGNUM >= 0)
805 {
806 write_register (FP_REGNUM, val);
807 return;
808 }
809#endif
810 internal_error ("generic_target_write_fp");
811}
812
813void
814write_fp (CORE_ADDR val)
815{
816 TARGET_WRITE_FP (val);
817}
818
819static void
820build_regcache (void)
821{
822 /* We allocate some extra slop since we do a lot of memcpy's around
823 `registers', and failing-soft is better than failing hard. */
824 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
825 int sizeof_register_valid = NUM_REGS * sizeof (*register_valid);
826 registers = xmalloc (sizeof_registers);
827 memset (registers, 0, sizeof_registers);
828 register_valid = xmalloc (sizeof_register_valid);
829 memset (register_valid, 0, sizeof_register_valid);
830}
831
832void
833_initialize_regcache (void)
834{
835 build_regcache ();
836
837 register_gdbarch_swap (&registers, sizeof (registers), NULL);
838 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
839 register_gdbarch_swap (NULL, 0, build_regcache);
840}