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baa835b4
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1/* Target-dependent code for the Renesas RX for GDB, the GNU debugger.
2
d01e8234 3 Copyright (C) 2008-2025 Free Software Foundation, Inc.
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4
5 Contributed by Red Hat, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
baa835b4 22#include "arch-utils.h"
ec452525 23#include "extract-store-integer.h"
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24#include "prologue-value.h"
25#include "target.h"
26#include "regcache.h"
27#include "opcode/rx.h"
28#include "dis-asm.h"
29#include "gdbtypes.h"
30#include "frame.h"
31#include "frame-unwind.h"
32#include "frame-base.h"
33#include "value.h"
34#include "gdbcore.h"
82ca8957 35#include "dwarf2/frame.h"
e3ec872f
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36#include "remote.h"
37#include "target-descriptions.h"
76eb8ef1 38#include "gdbarch.h"
99d9c3b9 39#include "inferior.h"
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40
41#include "elf/rx.h"
42#include "elf-bfd.h"
325fac50 43#include <algorithm>
baa835b4 44
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45#include "features/rx.c"
46
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47/* Certain important register numbers. */
48enum
49{
50 RX_SP_REGNUM = 0,
51 RX_R1_REGNUM = 1,
52 RX_R4_REGNUM = 4,
53 RX_FP_REGNUM = 6,
54 RX_R15_REGNUM = 15,
1b485e67 55 RX_USP_REGNUM = 16,
fd6e021d 56 RX_PSW_REGNUM = 18,
baa835b4 57 RX_PC_REGNUM = 19,
0561fea4 58 RX_BPSW_REGNUM = 21,
1b485e67 59 RX_BPC_REGNUM = 22,
0561fea4 60 RX_FPSW_REGNUM = 24,
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61 RX_ACC_REGNUM = 25,
62 RX_NUM_REGS = 26
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63};
64
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65/* RX frame types. */
66enum rx_frame_type {
67 RX_FRAME_TYPE_NORMAL,
68 RX_FRAME_TYPE_EXCEPTION,
69 RX_FRAME_TYPE_FAST_INTERRUPT
70};
71
baa835b4 72/* Architecture specific data. */
ab25d9bb 73struct rx_gdbarch_tdep : gdbarch_tdep_base
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74{
75 /* The ELF header flags specify the multilib used. */
345bd07c 76 int elf_flags = 0;
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77
78 /* Type of PSW and BPSW. */
345bd07c 79 struct type *rx_psw_type = nullptr;
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80
81 /* Type of FPSW. */
345bd07c 82 struct type *rx_fpsw_type = nullptr;
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83};
84
85/* This structure holds the results of a prologue analysis. */
86struct rx_prologue
87{
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88 /* Frame type, either a normal frame or one of two types of exception
89 frames. */
90 enum rx_frame_type frame_type;
91
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92 /* The offset from the frame base to the stack pointer --- always
93 zero or negative.
94
95 Calling this a "size" is a bit misleading, but given that the
96 stack grows downwards, using offsets for everything keeps one
97 from going completely sign-crazy: you never change anything's
98 sign for an ADD instruction; always change the second operand's
99 sign for a SUB instruction; and everything takes care of
100 itself. */
101 int frame_size;
102
103 /* Non-zero if this function has initialized the frame pointer from
104 the stack pointer, zero otherwise. */
105 int has_frame_ptr;
106
107 /* If has_frame_ptr is non-zero, this is the offset from the frame
108 base to where the frame pointer points. This is always zero or
109 negative. */
110 int frame_ptr_offset;
111
112 /* The address of the first instruction at which the frame has been
113 set up and the arguments are where the debug info says they are
114 --- as best as we can tell. */
115 CORE_ADDR prologue_end;
116
117 /* reg_offset[R] is the offset from the CFA at which register R is
118 saved, or 1 if register R has not been saved. (Real values are
119 always zero or negative.) */
120 int reg_offset[RX_NUM_REGS];
121};
122
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123/* RX register names */
124static const char *const rx_register_names[] = {
125 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
126 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
127 "usp", "isp", "psw", "pc", "intb", "bpsw","bpc","fintv",
128 "fpsw", "acc",
129};
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130
131
132/* Function for finding saved registers in a 'struct pv_area'; this
f7b7ed97 133 function is passed to pv_area::scan.
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134
135 If VALUE is a saved register, ADDR says it was saved at a constant
136 offset from the frame base, and SIZE indicates that the whole
137 register was saved, record its offset. */
138static void
139check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
140{
141 struct rx_prologue *result = (struct rx_prologue *) result_untyped;
142
143 if (value.kind == pvk_register
144 && value.k == 0
145 && pv_is_register (addr, RX_SP_REGNUM)
99d9c3b9 146 && size == register_size (current_inferior ()->arch (), value.reg))
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147 result->reg_offset[value.reg] = addr.k;
148}
149
150/* Define a "handle" struct for fetching the next opcode. */
151struct rx_get_opcode_byte_handle
152{
153 CORE_ADDR pc;
154};
155
156/* Fetch a byte on behalf of the opcode decoder. HANDLE contains
157 the memory address of the next byte to fetch. If successful,
158 the address in the handle is updated and the byte fetched is
159 returned as the value of the function. If not successful, -1
160 is returned. */
161static int
162rx_get_opcode_byte (void *handle)
163{
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164 struct rx_get_opcode_byte_handle *opcdata
165 = (struct rx_get_opcode_byte_handle *) handle;
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166 int status;
167 gdb_byte byte;
168
a0e28e54 169 status = target_read_code (opcdata->pc, &byte, 1);
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170 if (status == 0)
171 {
172 opcdata->pc += 1;
173 return byte;
174 }
175 else
176 return -1;
177}
178
179/* Analyze a prologue starting at START_PC, going no further than
180 LIMIT_PC. Fill in RESULT as appropriate. */
1b485e67 181
baa835b4 182static void
1b485e67 183rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
dda83cd7 184 enum rx_frame_type frame_type,
1b485e67 185 struct rx_prologue *result)
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186{
187 CORE_ADDR pc, next_pc;
188 int rn;
189 pv_t reg[RX_NUM_REGS];
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190 CORE_ADDR after_last_frame_setup_insn = start_pc;
191
192 memset (result, 0, sizeof (*result));
193
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194 result->frame_type = frame_type;
195
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196 for (rn = 0; rn < RX_NUM_REGS; rn++)
197 {
198 reg[rn] = pv_register (rn, 0);
199 result->reg_offset[rn] = 1;
200 }
201
99d9c3b9 202 pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (current_inferior ()->arch ()));
baa835b4 203
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204 if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT)
205 {
206 /* This code won't do anything useful at present, but this is
dda83cd7 207 what happens for fast interrupts. */
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208 reg[RX_BPSW_REGNUM] = reg[RX_PSW_REGNUM];
209 reg[RX_BPC_REGNUM] = reg[RX_PC_REGNUM];
210 }
211 else
212 {
213 /* When an exception occurs, the PSW is saved to the interrupt stack
dda83cd7 214 first. */
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215 if (frame_type == RX_FRAME_TYPE_EXCEPTION)
216 {
217 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 218 stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PSW_REGNUM]);
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219 }
220
221 /* The call instruction (or an exception/interrupt) has saved the return
dda83cd7 222 address on the stack. */
1b485e67 223 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 224 stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PC_REGNUM]);
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225
226 }
227
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228
229 pc = start_pc;
230 while (pc < limit_pc)
231 {
232 int bytes_read;
233 struct rx_get_opcode_byte_handle opcode_handle;
234 RX_Opcode_Decoded opc;
235
236 opcode_handle.pc = pc;
237 bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
238 &opcode_handle);
239 next_pc = pc + bytes_read;
240
241 if (opc.id == RXO_pushm /* pushm r1, r2 */
242 && opc.op[1].type == RX_Operand_Register
243 && opc.op[2].type == RX_Operand_Register)
244 {
245 int r1, r2;
246 int r;
247
248 r1 = opc.op[1].reg;
249 r2 = opc.op[2].reg;
250 for (r = r2; r >= r1; r--)
251 {
252 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 253 stack.store (reg[RX_SP_REGNUM], 4, reg[r]);
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254 }
255 after_last_frame_setup_insn = next_pc;
256 }
257 else if (opc.id == RXO_mov /* mov.l rdst, rsrc */
258 && opc.op[0].type == RX_Operand_Register
259 && opc.op[1].type == RX_Operand_Register
260 && opc.size == RX_Long)
261 {
262 int rdst, rsrc;
263
264 rdst = opc.op[0].reg;
265 rsrc = opc.op[1].reg;
266 reg[rdst] = reg[rsrc];
267 if (rdst == RX_FP_REGNUM && rsrc == RX_SP_REGNUM)
268 after_last_frame_setup_insn = next_pc;
269 }
270 else if (opc.id == RXO_mov /* mov.l rsrc, [-SP] */
271 && opc.op[0].type == RX_Operand_Predec
272 && opc.op[0].reg == RX_SP_REGNUM
273 && opc.op[1].type == RX_Operand_Register
274 && opc.size == RX_Long)
275 {
276 int rsrc;
277
278 rsrc = opc.op[1].reg;
279 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 280 stack.store (reg[RX_SP_REGNUM], 4, reg[rsrc]);
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281 after_last_frame_setup_insn = next_pc;
282 }
283 else if (opc.id == RXO_add /* add #const, rsrc, rdst */
284 && opc.op[0].type == RX_Operand_Register
285 && opc.op[1].type == RX_Operand_Immediate
286 && opc.op[2].type == RX_Operand_Register)
287 {
288 int rdst = opc.op[0].reg;
289 int addend = opc.op[1].addend;
290 int rsrc = opc.op[2].reg;
291 reg[rdst] = pv_add_constant (reg[rsrc], addend);
292 /* Negative adjustments to the stack pointer or frame pointer
293 are (most likely) part of the prologue. */
294 if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0)
295 after_last_frame_setup_insn = next_pc;
296 }
297 else if (opc.id == RXO_mov
298 && opc.op[0].type == RX_Operand_Indirect
299 && opc.op[1].type == RX_Operand_Register
300 && opc.size == RX_Long
301 && (opc.op[0].reg == RX_SP_REGNUM
302 || opc.op[0].reg == RX_FP_REGNUM)
303 && (RX_R1_REGNUM <= opc.op[1].reg
304 && opc.op[1].reg <= RX_R4_REGNUM))
305 {
306 /* This moves an argument register to the stack. Don't
307 record it, but allow it to be a part of the prologue. */
308 }
309 else if (opc.id == RXO_branch
310 && opc.op[0].type == RX_Operand_Immediate
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311 && next_pc < opc.op[0].addend)
312 {
313 /* When a loop appears as the first statement of a function
314 body, gcc 4.x will use a BRA instruction to branch to the
315 loop condition checking code. This BRA instruction is
316 marked as part of the prologue. We therefore set next_pc
317 to this branch target and also stop the prologue scan.
318 The instructions at and beyond the branch target should
319 no longer be associated with the prologue.
320
321 Note that we only consider forward branches here. We
322 presume that a forward branch is being used to skip over
323 a loop body.
324
325 A backwards branch is covered by the default case below.
326 If we were to encounter a backwards branch, that would
327 most likely mean that we've scanned through a loop body.
328 We definitely want to stop the prologue scan when this
329 happens and that is precisely what is done by the default
330 case below. */
331
332 after_last_frame_setup_insn = opc.op[0].addend;
333 break; /* Scan no further if we hit this case. */
334 }
335 else
336 {
337 /* Terminate the prologue scan. */
338 break;
339 }
340
341 pc = next_pc;
342 }
343
344 /* Is the frame size (offset, really) a known constant? */
345 if (pv_is_register (reg[RX_SP_REGNUM], RX_SP_REGNUM))
346 result->frame_size = reg[RX_SP_REGNUM].k;
347
348 /* Was the frame pointer initialized? */
349 if (pv_is_register (reg[RX_FP_REGNUM], RX_SP_REGNUM))
350 {
351 result->has_frame_ptr = 1;
352 result->frame_ptr_offset = reg[RX_FP_REGNUM].k;
353 }
354
355 /* Record where all the registers were saved. */
f7b7ed97 356 stack.scan (check_for_saved, (void *) result);
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357
358 result->prologue_end = after_last_frame_setup_insn;
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359}
360
361
362/* Implement the "skip_prologue" gdbarch method. */
363static CORE_ADDR
364rx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
365{
2c02bd72 366 const char *name;
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367 CORE_ADDR func_addr, func_end;
368 struct rx_prologue p;
369
370 /* Try to find the extent of the function that contains PC. */
371 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
372 return pc;
373
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374 /* The frame type doesn't matter here, since we only care about
375 where the prologue ends. We'll use RX_FRAME_TYPE_NORMAL. */
376 rx_analyze_prologue (pc, func_end, RX_FRAME_TYPE_NORMAL, &p);
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377 return p.prologue_end;
378}
379
380/* Given a frame described by THIS_FRAME, decode the prologue of its
381 associated function if there is not cache entry as specified by
382 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
383 return that struct as the value of this function. */
1b485e67 384
baa835b4 385static struct rx_prologue *
8480a37e 386rx_analyze_frame_prologue (const frame_info_ptr &this_frame,
1b485e67 387 enum rx_frame_type frame_type,
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388 void **this_prologue_cache)
389{
390 if (!*this_prologue_cache)
391 {
392 CORE_ADDR func_start, stop_addr;
393
394 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rx_prologue);
395
396 func_start = get_frame_func (this_frame);
397 stop_addr = get_frame_pc (this_frame);
398
399 /* If we couldn't find any function containing the PC, then
dda83cd7 400 just initialize the prologue cache, but don't do anything. */
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401 if (!func_start)
402 stop_addr = func_start;
403
1b485e67 404 rx_analyze_prologue (func_start, stop_addr, frame_type,
19ba03f4 405 (struct rx_prologue *) *this_prologue_cache);
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406 }
407
19ba03f4 408 return (struct rx_prologue *) *this_prologue_cache;
baa835b4
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409}
410
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411/* Determine type of frame by scanning the function for a return
412 instruction. */
413
414static enum rx_frame_type
8480a37e 415rx_frame_type (const frame_info_ptr &this_frame, void **this_cache)
1b485e67
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416{
417 const char *name;
418 CORE_ADDR pc, start_pc, lim_pc;
419 int bytes_read;
420 struct rx_get_opcode_byte_handle opcode_handle;
421 RX_Opcode_Decoded opc;
422
423 gdb_assert (this_cache != NULL);
424
425 /* If we have a cached value, return it. */
426
427 if (*this_cache != NULL)
428 {
19ba03f4 429 struct rx_prologue *p = (struct rx_prologue *) *this_cache;
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430
431 return p->frame_type;
432 }
433
434 /* No cached value; scan the function. The frame type is cached in
435 rx_analyze_prologue / rx_analyze_frame_prologue. */
436
437 pc = get_frame_pc (this_frame);
438
439 /* Attempt to find the last address in the function. If it cannot
440 be determined, set the limit to be a short ways past the frame's
441 pc. */
442 if (!find_pc_partial_function (pc, &name, &start_pc, &lim_pc))
443 lim_pc = pc + 20;
444
445 while (pc < lim_pc)
446 {
447 opcode_handle.pc = pc;
448 bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
449 &opcode_handle);
450
451 if (bytes_read <= 0 || opc.id == RXO_rts)
452 return RX_FRAME_TYPE_NORMAL;
453 else if (opc.id == RXO_rtfi)
454 return RX_FRAME_TYPE_FAST_INTERRUPT;
455 else if (opc.id == RXO_rte)
dda83cd7 456 return RX_FRAME_TYPE_EXCEPTION;
1b485e67
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457
458 pc += bytes_read;
459 }
460
461 return RX_FRAME_TYPE_NORMAL;
462}
463
464
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465/* Given the next frame and a prologue cache, return this frame's
466 base. */
1b485e67 467
baa835b4 468static CORE_ADDR
8480a37e 469rx_frame_base (const frame_info_ptr &this_frame, void **this_cache)
baa835b4 470{
1b485e67 471 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
baa835b4 472 struct rx_prologue *p
1b485e67 473 = rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
baa835b4
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474
475 /* In functions that use alloca, the distance between the stack
476 pointer and the frame base varies dynamically, so we can't use
477 the SP plus static information like prologue analysis to find the
478 frame base. However, such functions must have a frame pointer,
479 to be able to restore the SP on exit. So whenever we do have a
480 frame pointer, use that to find the base. */
481 if (p->has_frame_ptr)
482 {
483 CORE_ADDR fp = get_frame_register_unsigned (this_frame, RX_FP_REGNUM);
484 return fp - p->frame_ptr_offset;
485 }
486 else
487 {
488 CORE_ADDR sp = get_frame_register_unsigned (this_frame, RX_SP_REGNUM);
489 return sp - p->frame_size;
490 }
491}
492
493/* Implement the "frame_this_id" method for unwinding frames. */
1b485e67 494
baa835b4 495static void
8480a37e 496rx_frame_this_id (const frame_info_ptr &this_frame, void **this_cache,
dda83cd7 497 struct frame_id *this_id)
baa835b4 498{
1b485e67 499 *this_id = frame_id_build (rx_frame_base (this_frame, this_cache),
baa835b4
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500 get_frame_func (this_frame));
501}
502
503/* Implement the "frame_prev_register" method for unwinding frames. */
1b485e67 504
baa835b4 505static struct value *
8480a37e 506rx_frame_prev_register (const frame_info_ptr &this_frame, void **this_cache,
dda83cd7 507 int regnum)
baa835b4 508{
1b485e67 509 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
baa835b4 510 struct rx_prologue *p
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511 = rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
512 CORE_ADDR frame_base = rx_frame_base (this_frame, this_cache);
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513
514 if (regnum == RX_SP_REGNUM)
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515 {
516 if (frame_type == RX_FRAME_TYPE_EXCEPTION)
dda83cd7 517 {
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518 struct value *psw_val;
519 CORE_ADDR psw;
520
521 psw_val = rx_frame_prev_register (this_frame, this_cache,
dda83cd7 522 RX_PSW_REGNUM);
50888e42 523 psw = extract_unsigned_integer
efaf1ae0 524 (psw_val->contents_all ().data (), 4,
50888e42 525 gdbarch_byte_order (get_frame_arch (this_frame)));
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526
527 if ((psw & 0x20000 /* U bit */) != 0)
528 return rx_frame_prev_register (this_frame, this_cache,
dda83cd7 529 RX_USP_REGNUM);
1b485e67 530
dda83cd7 531 /* Fall through for the case where U bit is zero. */
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532 }
533
534 return frame_unwind_got_constant (this_frame, regnum, frame_base);
535 }
536
537 if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT)
538 {
539 if (regnum == RX_PC_REGNUM)
dda83cd7
SM
540 return rx_frame_prev_register (this_frame, this_cache,
541 RX_BPC_REGNUM);
1b485e67 542 if (regnum == RX_PSW_REGNUM)
dda83cd7
SM
543 return rx_frame_prev_register (this_frame, this_cache,
544 RX_BPSW_REGNUM);
1b485e67 545 }
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546
547 /* If prologue analysis says we saved this register somewhere,
548 return a description of the stack slot holding it. */
1b485e67 549 if (p->reg_offset[regnum] != 1)
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550 return frame_unwind_got_memory (this_frame, regnum,
551 frame_base + p->reg_offset[regnum]);
552
553 /* Otherwise, presume we haven't changed the value of this
554 register, and get it from the next frame. */
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555 return frame_unwind_got_register (this_frame, regnum, regnum);
556}
557
558/* Return TRUE if the frame indicated by FRAME_TYPE is a normal frame. */
559
560static int
561normal_frame_p (enum rx_frame_type frame_type)
562{
563 return (frame_type == RX_FRAME_TYPE_NORMAL);
564}
565
566/* Return TRUE if the frame indicated by FRAME_TYPE is an exception
567 frame. */
568
569static int
570exception_frame_p (enum rx_frame_type frame_type)
571{
572 return (frame_type == RX_FRAME_TYPE_EXCEPTION
dda83cd7 573 || frame_type == RX_FRAME_TYPE_FAST_INTERRUPT);
1b485e67
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574}
575
576/* Common code used by both normal and exception frame sniffers. */
577
578static int
579rx_frame_sniffer_common (const struct frame_unwind *self,
8480a37e 580 const frame_info_ptr &this_frame,
1b485e67
KB
581 void **this_cache,
582 int (*sniff_p)(enum rx_frame_type) )
583{
584 gdb_assert (this_cache != NULL);
585
586 if (*this_cache == NULL)
587 {
588 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
589
590 if (sniff_p (frame_type))
dda83cd7 591 {
1b485e67
KB
592 /* The call below will fill in the cache, including the frame
593 type. */
594 (void) rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
595
596 return 1;
dda83cd7 597 }
1b485e67 598 else
dda83cd7 599 return 0;
1b485e67 600 }
baa835b4 601 else
1b485e67 602 {
19ba03f4 603 struct rx_prologue *p = (struct rx_prologue *) *this_cache;
1b485e67
KB
604
605 return sniff_p (p->frame_type);
606 }
607}
608
609/* Frame sniffer for normal (non-exception) frames. */
610
611static int
612rx_frame_sniffer (const struct frame_unwind *self,
8480a37e 613 const frame_info_ptr &this_frame,
1b485e67
KB
614 void **this_cache)
615{
616 return rx_frame_sniffer_common (self, this_frame, this_cache,
dda83cd7 617 normal_frame_p);
1b485e67
KB
618}
619
620/* Frame sniffer for exception frames. */
621
622static int
623rx_exception_sniffer (const struct frame_unwind *self,
8480a37e 624 const frame_info_ptr &this_frame,
1b485e67
KB
625 void **this_cache)
626{
627 return rx_frame_sniffer_common (self, this_frame, this_cache,
dda83cd7 628 exception_frame_p);
baa835b4
KB
629}
630
1b485e67
KB
631/* Data structure for normal code using instruction-based prologue
632 analyzer. */
633
1239e7cf 634static const struct frame_unwind_legacy rx_frame_unwind (
a154d838 635 "rx prologue",
baa835b4 636 NORMAL_FRAME,
ce36ef63 637 FRAME_UNWIND_ARCH,
e0f68161 638 default_frame_unwind_stop_reason,
baa835b4
KB
639 rx_frame_this_id,
640 rx_frame_prev_register,
641 NULL,
1b485e67 642 rx_frame_sniffer
1239e7cf 643);
1b485e67
KB
644
645/* Data structure for exception code using instruction-based prologue
646 analyzer. */
647
1239e7cf 648static const struct frame_unwind_legacy rx_exception_unwind (
a154d838 649 "rx exception",
1b485e67
KB
650 /* SIGTRAMP_FRAME could be used here, but backtraces are less informative. */
651 NORMAL_FRAME,
ce36ef63 652 FRAME_UNWIND_ARCH,
1b485e67
KB
653 default_frame_unwind_stop_reason,
654 rx_frame_this_id,
655 rx_frame_prev_register,
656 NULL,
657 rx_exception_sniffer
1239e7cf 658);
baa835b4 659
baa835b4
KB
660/* Implement the "push_dummy_call" gdbarch method. */
661static CORE_ADDR
662rx_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
663 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
cf84fa6b
AH
664 struct value **args, CORE_ADDR sp,
665 function_call_return_method return_method,
baa835b4
KB
666 CORE_ADDR struct_addr)
667{
668 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
669 int write_pass;
670 int sp_off = 0;
671 CORE_ADDR cfa;
672 int num_register_candidate_args;
673
d0c97917 674 struct type *func_type = function->type ();
baa835b4
KB
675
676 /* Dereference function pointer types. */
78134374 677 while (func_type->code () == TYPE_CODE_PTR)
27710edb 678 func_type = func_type->target_type ();
baa835b4
KB
679
680 /* The end result had better be a function or a method. */
78134374
SM
681 gdb_assert (func_type->code () == TYPE_CODE_FUNC
682 || func_type->code () == TYPE_CODE_METHOD);
baa835b4
KB
683
684 /* Functions with a variable number of arguments have all of their
685 variable arguments and the last non-variable argument passed
686 on the stack.
687
688 Otherwise, we can pass up to four arguments on the stack.
689
690 Once computed, we leave this value alone. I.e. we don't update
691 it in case of a struct return going in a register or an argument
692 requiring multiple registers, etc. We rely instead on the value
693 of the ``arg_reg'' variable to get these other details correct. */
694
a409645d 695 if (func_type->has_varargs ())
1f704f76 696 num_register_candidate_args = func_type->num_fields () - 1;
baa835b4
KB
697 else
698 num_register_candidate_args = 4;
699
700 /* We make two passes; the first does the stack allocation,
701 the second actually stores the arguments. */
702 for (write_pass = 0; write_pass <= 1; write_pass++)
703 {
704 int i;
705 int arg_reg = RX_R1_REGNUM;
706
707 if (write_pass)
708 sp = align_down (sp - sp_off, 4);
709 sp_off = 0;
710
cf84fa6b 711 if (return_method == return_method_struct)
baa835b4 712 {
27710edb 713 struct type *return_type = func_type->target_type ();
baa835b4 714
78134374
SM
715 gdb_assert (return_type->code () == TYPE_CODE_STRUCT
716 || func_type->code () == TYPE_CODE_UNION);
baa835b4 717
df86565b
SM
718 if (return_type->length () > 16
719 || return_type->length () % 4 != 0)
baa835b4
KB
720 {
721 if (write_pass)
722 regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM,
723 struct_addr);
724 }
725 }
726
727 /* Push the arguments. */
728 for (i = 0; i < nargs; i++)
729 {
730 struct value *arg = args[i];
efaf1ae0 731 const gdb_byte *arg_bits = arg->contents_all ().data ();
d0c97917 732 struct type *arg_type = check_typedef (arg->type ());
df86565b 733 ULONGEST arg_size = arg_type->length ();
baa835b4 734
cf84fa6b
AH
735 if (i == 0 && struct_addr != 0
736 && return_method != return_method_struct
78134374 737 && arg_type->code () == TYPE_CODE_PTR
baa835b4
KB
738 && extract_unsigned_integer (arg_bits, 4,
739 byte_order) == struct_addr)
740 {
741 /* This argument represents the address at which C++ (and
dda83cd7
SM
742 possibly other languages) store their return value.
743 Put this value in R15. */
baa835b4
KB
744 if (write_pass)
745 regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM,
746 struct_addr);
747 }
78134374
SM
748 else if (arg_type->code () != TYPE_CODE_STRUCT
749 && arg_type->code () != TYPE_CODE_UNION
94715c17 750 && arg_size <= 8)
baa835b4
KB
751 {
752 /* Argument is a scalar. */
753 if (arg_size == 8)
754 {
755 if (i < num_register_candidate_args
756 && arg_reg <= RX_R4_REGNUM - 1)
757 {
758 /* If argument registers are going to be used to pass
dda83cd7
SM
759 an 8 byte scalar, the ABI specifies that two registers
760 must be available. */
baa835b4
KB
761 if (write_pass)
762 {
763 regcache_cooked_write_unsigned (regcache, arg_reg,
764 extract_unsigned_integer
765 (arg_bits, 4,
766 byte_order));
767 regcache_cooked_write_unsigned (regcache,
768 arg_reg + 1,
769 extract_unsigned_integer
770 (arg_bits + 4, 4,
771 byte_order));
772 }
773 arg_reg += 2;
774 }
775 else
776 {
777 sp_off = align_up (sp_off, 4);
778 /* Otherwise, pass the 8 byte scalar on the stack. */
779 if (write_pass)
780 write_memory (sp + sp_off, arg_bits, 8);
781 sp_off += 8;
782 }
783 }
784 else
785 {
786 ULONGEST u;
787
788 gdb_assert (arg_size <= 4);
789
790 u =
791 extract_unsigned_integer (arg_bits, arg_size, byte_order);
792
793 if (i < num_register_candidate_args
794 && arg_reg <= RX_R4_REGNUM)
795 {
796 if (write_pass)
797 regcache_cooked_write_unsigned (regcache, arg_reg, u);
798 arg_reg += 1;
799 }
800 else
801 {
802 int p_arg_size = 4;
803
7f9f399b 804 if (func_type->is_prototyped ()
1f704f76 805 && i < func_type->num_fields ())
baa835b4
KB
806 {
807 struct type *p_arg_type =
940da03e 808 func_type->field (i).type ();
df86565b 809 p_arg_size = p_arg_type->length ();
baa835b4
KB
810 }
811
812 sp_off = align_up (sp_off, p_arg_size);
813
814 if (write_pass)
815 write_memory_unsigned_integer (sp + sp_off,
816 p_arg_size, byte_order,
817 u);
818 sp_off += p_arg_size;
819 }
820 }
821 }
822 else
823 {
824 /* Argument is a struct or union. Pass as much of the struct
dda83cd7 825 in registers, if possible. Pass the rest on the stack. */
baa835b4
KB
826 while (arg_size > 0)
827 {
828 if (i < num_register_candidate_args
829 && arg_reg <= RX_R4_REGNUM
830 && arg_size <= 4 * (RX_R4_REGNUM - arg_reg + 1)
831 && arg_size % 4 == 0)
832 {
325fac50 833 int len = std::min (arg_size, (ULONGEST) 4);
baa835b4
KB
834
835 if (write_pass)
836 regcache_cooked_write_unsigned (regcache, arg_reg,
837 extract_unsigned_integer
838 (arg_bits, len,
839 byte_order));
840 arg_bits += len;
841 arg_size -= len;
842 arg_reg++;
843 }
844 else
845 {
846 sp_off = align_up (sp_off, 4);
847 if (write_pass)
848 write_memory (sp + sp_off, arg_bits, arg_size);
849 sp_off += align_up (arg_size, 4);
850 arg_size = 0;
851 }
852 }
853 }
854 }
855 }
856
857 /* Keep track of the stack address prior to pushing the return address.
858 This is the value that we'll return. */
859 cfa = sp;
860
861 /* Push the return address. */
862 sp = sp - 4;
863 write_memory_unsigned_integer (sp, 4, byte_order, bp_addr);
864
865 /* Update the stack pointer. */
866 regcache_cooked_write_unsigned (regcache, RX_SP_REGNUM, sp);
867
868 return cfa;
869}
870
871/* Implement the "return_value" gdbarch method. */
872static enum return_value_convention
873rx_return_value (struct gdbarch *gdbarch,
6a3a010b 874 struct value *function,
baa835b4
KB
875 struct type *valtype,
876 struct regcache *regcache,
877 gdb_byte *readbuf, const gdb_byte *writebuf)
878{
879 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
df86565b 880 ULONGEST valtype_len = valtype->length ();
baa835b4 881
df86565b 882 if (valtype->length () > 16
78134374
SM
883 || ((valtype->code () == TYPE_CODE_STRUCT
884 || valtype->code () == TYPE_CODE_UNION)
df86565b 885 && valtype->length () % 4 != 0))
baa835b4
KB
886 return RETURN_VALUE_STRUCT_CONVENTION;
887
888 if (readbuf)
889 {
890 ULONGEST u;
891 int argreg = RX_R1_REGNUM;
892 int offset = 0;
893
894 while (valtype_len > 0)
895 {
325fac50 896 int len = std::min (valtype_len, (ULONGEST) 4);
baa835b4
KB
897
898 regcache_cooked_read_unsigned (regcache, argreg, &u);
899 store_unsigned_integer (readbuf + offset, len, byte_order, u);
900 valtype_len -= len;
901 offset += len;
902 argreg++;
903 }
904 }
905
906 if (writebuf)
907 {
908 ULONGEST u;
909 int argreg = RX_R1_REGNUM;
910 int offset = 0;
911
912 while (valtype_len > 0)
913 {
325fac50 914 int len = std::min (valtype_len, (ULONGEST) 4);
baa835b4
KB
915
916 u = extract_unsigned_integer (writebuf + offset, len, byte_order);
917 regcache_cooked_write_unsigned (regcache, argreg, u);
918 valtype_len -= len;
919 offset += len;
920 argreg++;
921 }
922 }
923
924 return RETURN_VALUE_REGISTER_CONVENTION;
925}
926
04180708 927constexpr gdb_byte rx_break_insn[] = { 0x00 };
598cc9dc 928
04180708 929typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint;
baa835b4 930
fd6e021d
KB
931/* Implement the dwarf_reg_to_regnum" gdbarch method. */
932
933static int
934rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
935{
936 if (0 <= reg && reg <= 15)
937 return reg;
938 else if (reg == 16)
939 return RX_PSW_REGNUM;
940 else if (reg == 17)
941 return RX_PC_REGNUM;
942 else
0fde2c53 943 return -1;
fd6e021d
KB
944}
945
baa835b4
KB
946/* Allocate and initialize a gdbarch object. */
947static struct gdbarch *
948rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
949{
baa835b4 950 int elf_flags;
c1e1314d 951 tdesc_arch_data_up tdesc_data;
e3ec872f 952 const struct target_desc *tdesc = info.target_desc;
baa835b4
KB
953
954 /* Extract the elf_flags if available. */
955 if (info.abfd != NULL
956 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
957 elf_flags = elf_elfheader (info.abfd)->e_flags;
958 else
959 elf_flags = 0;
960
961
962 /* Try to find the architecture in the list of already defined
963 architectures. */
964 for (arches = gdbarch_list_lookup_by_info (arches, &info);
965 arches != NULL;
966 arches = gdbarch_list_lookup_by_info (arches->next, &info))
967 {
345bd07c 968 rx_gdbarch_tdep *tdep
08106042 969 = gdbarch_tdep<rx_gdbarch_tdep> (arches->gdbarch);
345bd07c
SM
970
971 if (tdep->elf_flags != elf_flags)
baa835b4
KB
972 continue;
973
974 return arches->gdbarch;
975 }
976
e3ec872f
YS
977 if (tdesc == NULL)
978 tdesc = tdesc_rx;
979
980 /* Check any target description for validity. */
981 if (tdesc_has_registers (tdesc))
982 {
983 const struct tdesc_feature *feature;
984 bool valid_p = true;
985
986 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.core");
987
988 if (feature != NULL)
989 {
990 tdesc_data = tdesc_data_alloc ();
991 for (int i = 0; i < RX_NUM_REGS; i++)
c1e1314d
TT
992 valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
993 rx_register_names[i]);
e3ec872f
YS
994 }
995
996 if (!valid_p)
c1e1314d 997 return NULL;
e3ec872f
YS
998 }
999
1000 gdb_assert(tdesc_data != NULL);
1001
2b16913c
SM
1002 gdbarch *gdbarch
1003 = gdbarch_alloc (&info, gdbarch_tdep_up (new rx_gdbarch_tdep));
1004 rx_gdbarch_tdep *tdep = gdbarch_tdep<rx_gdbarch_tdep> (gdbarch);
1005
baa835b4
KB
1006 tdep->elf_flags = elf_flags;
1007
1008 set_gdbarch_num_regs (gdbarch, RX_NUM_REGS);
c1e1314d 1009 tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
e3ec872f 1010
baa835b4 1011 set_gdbarch_num_pseudo_regs (gdbarch, 0);
baa835b4
KB
1012 set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM);
1013 set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM);
1014 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1015 set_gdbarch_decr_pc_after_break (gdbarch, 1);
04180708
YQ
1016 set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc);
1017 set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind);
baa835b4
KB
1018 set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue);
1019
baa835b4
KB
1020 /* Target builtin data types. */
1021 set_gdbarch_char_signed (gdbarch, 0);
1022 set_gdbarch_short_bit (gdbarch, 16);
1023 set_gdbarch_int_bit (gdbarch, 32);
1024 set_gdbarch_long_bit (gdbarch, 32);
1025 set_gdbarch_long_long_bit (gdbarch, 64);
1026 set_gdbarch_ptr_bit (gdbarch, 32);
1027 set_gdbarch_float_bit (gdbarch, 32);
1028 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
e3ec872f 1029
baa835b4
KB
1030 if (elf_flags & E_FLAG_RX_64BIT_DOUBLES)
1031 {
1032 set_gdbarch_double_bit (gdbarch, 64);
1033 set_gdbarch_long_double_bit (gdbarch, 64);
1034 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1035 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1036 }
1037 else
1038 {
1039 set_gdbarch_double_bit (gdbarch, 32);
1040 set_gdbarch_long_double_bit (gdbarch, 32);
1041 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1042 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1043 }
1044
fd6e021d
KB
1045 /* DWARF register mapping. */
1046 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum);
1047
baa835b4 1048 /* Frame unwinding. */
1b485e67 1049 frame_unwind_append_unwinder (gdbarch, &rx_exception_unwind);
baa835b4 1050 dwarf2_append_unwinders (gdbarch);
baa835b4
KB
1051 frame_unwind_append_unwinder (gdbarch, &rx_frame_unwind);
1052
47c47d69
AB
1053 /* Methods setting up a dummy call, and extracting the return value from
1054 a call. */
baa835b4
KB
1055 set_gdbarch_push_dummy_call (gdbarch, rx_push_dummy_call);
1056 set_gdbarch_return_value (gdbarch, rx_return_value);
1057
1058 /* Virtual tables. */
1059 set_gdbarch_vbit_in_delta (gdbarch, 1);
1060
1061 return gdbarch;
1062}
1063
1064/* Register the above initialization routine. */
693be288 1065
5fe70629 1066INIT_GDB_FILE (rx_tdep)
baa835b4 1067{
ec29a63c 1068 gdbarch_register (bfd_arch_rx, rx_gdbarch_init);
e3ec872f 1069 initialize_tdesc_rx ();
baa835b4 1070}