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5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
ecd75fc8 3 Copyright (C) 2001-2014 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
4ac33720 47#include "auxv.h"
237b092b 48#include "xml-syscall.h"
5769d3cd 49
55aa24fb
SDJ
50#include "stap-probe.h"
51#include "ax.h"
52#include "ax-gdb.h"
53#include "user-regs.h"
54#include "cli/cli-utils.h"
55#include <ctype.h>
04a83fee 56#include "elf/common.h"
55aa24fb 57
7803799a 58#include "features/s390-linux32.c"
c642a434
UW
59#include "features/s390-linux32v1.c"
60#include "features/s390-linux32v2.c"
7803799a 61#include "features/s390-linux64.c"
c642a434
UW
62#include "features/s390-linux64v1.c"
63#include "features/s390-linux64v2.c"
4ac33720 64#include "features/s390-te-linux64.c"
7803799a 65#include "features/s390x-linux64.c"
c642a434
UW
66#include "features/s390x-linux64v1.c"
67#include "features/s390x-linux64v2.c"
4ac33720 68#include "features/s390x-te-linux64.c"
7803799a 69
237b092b
AA
70#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
71#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
72
d0f54f9d
JB
73/* The tdep structure. */
74
75struct gdbarch_tdep
5769d3cd 76{
b0cf273e
JB
77 /* ABI version. */
78 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
79
7803799a
UW
80 /* Pseudo register numbers. */
81 int gpr_full_regnum;
82 int pc_regnum;
83 int cc_regnum;
84
d0f54f9d
JB
85 /* Core file register sets. */
86 const struct regset *gregset;
87 int sizeof_gregset;
88
89 const struct regset *fpregset;
90 int sizeof_fpregset;
91};
92
93
7803799a
UW
94/* ABI call-saved register information. */
95
96static int
97s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 98{
7803799a
UW
99 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
100
101 switch (tdep->abi)
6707b003 102 {
7803799a
UW
103 case ABI_LINUX_S390:
104 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
105 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
106 || regnum == S390_A0_REGNUM)
107 return 1;
6707b003 108
7803799a
UW
109 break;
110
111 case ABI_LINUX_ZSERIES:
112 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
113 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
114 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
115 return 1;
116
117 break;
118 }
119
120 return 0;
5769d3cd
AC
121}
122
c642a434
UW
123static int
124s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
125{
126 /* The last-break address is read-only. */
127 return regnum == S390_LAST_BREAK_REGNUM;
128}
129
130static void
131s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
132{
133 struct gdbarch *gdbarch = get_regcache_arch (regcache);
134 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
135
136 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
137
138 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
139 messing with the PC we just installed, if we happen to be within
140 an interrupted system call that the kernel wants to restart.
141
142 Note that after we return from the dummy call, the SYSTEM_CALL and
143 ORIG_R2 registers will be automatically restored, and the kernel
144 continues to restart the system call at this point. */
145 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
146 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
147}
148
7803799a 149
d0f54f9d
JB
150/* DWARF Register Mapping. */
151
2ccd1468 152static const short s390_dwarf_regmap[] =
d0f54f9d
JB
153{
154 /* General Purpose Registers. */
155 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
156 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
157 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
158 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
159
160 /* Floating Point Registers. */
161 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
162 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
163 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
164 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
165
166 /* Control Registers (not mapped). */
34201ae3
UW
167 -1, -1, -1, -1, -1, -1, -1, -1,
168 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d
JB
169
170 /* Access Registers. */
171 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
172 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
173 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
174 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
175
176 /* Program Status Word. */
177 S390_PSWM_REGNUM,
7803799a
UW
178 S390_PSWA_REGNUM,
179
180 /* GPR Lower Half Access. */
181 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
182 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
183 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
184 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 185
94eae614 186 /* GNU/Linux-specific registers (not mapped). */
c642a434 187 -1, -1, -1,
d0f54f9d
JB
188};
189
190/* Convert DWARF register number REG to the appropriate register
191 number used by GDB. */
a78f21af 192static int
d3f73121 193s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 194{
7803799a
UW
195 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
196
197 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
198 GPRs. Note that call frame information still refers to the 32-bit
199 lower halves, because s390_adjust_frame_regnum uses register numbers
200 66 .. 81 to access GPRs. */
201 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
202 return tdep->gpr_full_regnum + reg;
d0f54f9d 203
16aff9a6 204 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 205 return s390_dwarf_regmap[reg];
d0f54f9d 206
7803799a
UW
207 warning (_("Unmapped DWARF Register #%d encountered."), reg);
208 return -1;
209}
d0f54f9d 210
7803799a
UW
211/* Translate a .eh_frame register to DWARF register, or adjust a
212 .debug_frame register. */
213static int
214s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
215{
216 /* See s390_dwarf_reg_to_regnum for comments. */
217 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
218}
219
d0f54f9d 220
7803799a
UW
221/* Pseudo registers. */
222
2ccd1468
UW
223static int
224regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
225{
226 return (tdep->gpr_full_regnum != -1
227 && regnum >= tdep->gpr_full_regnum
228 && regnum <= tdep->gpr_full_regnum + 15);
229}
230
7803799a
UW
231static const char *
232s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 233{
7803799a 234 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 235
7803799a
UW
236 if (regnum == tdep->pc_regnum)
237 return "pc";
d0f54f9d 238
7803799a
UW
239 if (regnum == tdep->cc_regnum)
240 return "cc";
d0f54f9d 241
2ccd1468 242 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
243 {
244 static const char *full_name[] = {
245 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
246 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
247 };
248 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 249 }
7803799a
UW
250
251 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
252}
253
7803799a
UW
254static struct type *
255s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 256{
7803799a 257 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 258
7803799a
UW
259 if (regnum == tdep->pc_regnum)
260 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 261
7803799a
UW
262 if (regnum == tdep->cc_regnum)
263 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 264
2ccd1468 265 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
266 return builtin_type (gdbarch)->builtin_uint64;
267
268 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
269}
270
05d1431c 271static enum register_status
7803799a
UW
272s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
273 int regnum, gdb_byte *buf)
d0f54f9d 274{
7803799a 275 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 276 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 277 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
278 ULONGEST val;
279
7803799a 280 if (regnum == tdep->pc_regnum)
d0f54f9d 281 {
05d1431c
PA
282 enum register_status status;
283
284 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
285 if (status == REG_VALID)
286 {
287 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
288 val &= 0x7fffffff;
289 store_unsigned_integer (buf, regsize, byte_order, val);
290 }
291 return status;
7803799a 292 }
d0f54f9d 293
7803799a
UW
294 if (regnum == tdep->cc_regnum)
295 {
05d1431c
PA
296 enum register_status status;
297
298 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
299 if (status == REG_VALID)
300 {
301 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
302 val = (val >> 12) & 3;
303 else
304 val = (val >> 44) & 3;
305 store_unsigned_integer (buf, regsize, byte_order, val);
306 }
307 return status;
7803799a 308 }
d0f54f9d 309
2ccd1468 310 if (regnum_is_gpr_full (tdep, regnum))
7803799a 311 {
05d1431c 312 enum register_status status;
7803799a 313 ULONGEST val_upper;
05d1431c 314
7803799a
UW
315 regnum -= tdep->gpr_full_regnum;
316
05d1431c
PA
317 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
318 if (status == REG_VALID)
319 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
320 &val_upper);
321 if (status == REG_VALID)
322 {
323 val |= val_upper << 32;
324 store_unsigned_integer (buf, regsize, byte_order, val);
325 }
326 return status;
d0f54f9d 327 }
7803799a
UW
328
329 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
330}
331
332static void
7803799a
UW
333s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
334 int regnum, const gdb_byte *buf)
d0f54f9d 335{
7803799a 336 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 337 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 338 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
339 ULONGEST val, psw;
340
7803799a 341 if (regnum == tdep->pc_regnum)
d0f54f9d 342 {
7803799a
UW
343 val = extract_unsigned_integer (buf, regsize, byte_order);
344 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
345 {
346 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
347 val = (psw & 0x80000000) | (val & 0x7fffffff);
348 }
349 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
350 return;
351 }
d0f54f9d 352
7803799a
UW
353 if (regnum == tdep->cc_regnum)
354 {
355 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 356 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
357 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
358 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
359 else
360 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
361 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
362 return;
363 }
d0f54f9d 364
2ccd1468 365 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
366 {
367 regnum -= tdep->gpr_full_regnum;
368 val = extract_unsigned_integer (buf, regsize, byte_order);
369 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
370 val & 0xffffffff);
371 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
372 val >> 32);
373 return;
d0f54f9d 374 }
7803799a
UW
375
376 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
377}
378
379/* 'float' values are stored in the upper half of floating-point
380 registers, even though we are otherwise a big-endian platform. */
381
9acbedc0 382static struct value *
2ed3c037
UW
383s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
384 int regnum, struct frame_id frame_id)
d0f54f9d 385{
2ed3c037
UW
386 struct value *value = default_value_from_register (gdbarch, type,
387 regnum, frame_id);
744a8059
SP
388 check_typedef (type);
389
390 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
391 && TYPE_LENGTH (type) < 8)
9acbedc0 392 set_value_offset (value, 0);
d0f54f9d 393
9acbedc0 394 return value;
d0f54f9d
JB
395}
396
397/* Register groups. */
398
a78f21af 399static int
7803799a
UW
400s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
401 struct reggroup *group)
d0f54f9d
JB
402{
403 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
404
d6db1fab
UW
405 /* We usually save/restore the whole PSW, which includes PC and CC.
406 However, some older gdbservers may not support saving/restoring
407 the whole PSW yet, and will return an XML register description
408 excluding those from the save/restore register groups. In those
409 cases, we still need to explicitly save/restore PC and CC in order
410 to push or pop frames. Since this doesn't hurt anything if we
411 already save/restore the whole PSW (it's just redundant), we add
412 PC and CC at this point unconditionally. */
d0f54f9d 413 if (group == save_reggroup || group == restore_reggroup)
7803799a 414 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
415
416 return default_register_reggroup_p (gdbarch, regnum, group);
417}
418
419
2ccd1468 420/* Maps for register sets. */
d0f54f9d 421
99b7da5d 422static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 423 {
99b7da5d
AA
424 { 1, S390_PSWM_REGNUM },
425 { 1, S390_PSWA_REGNUM },
426 { 16, S390_R0_REGNUM },
427 { 16, S390_A0_REGNUM },
428 { 1, S390_ORIG_R2_REGNUM },
429 { 0 }
2ccd1468 430 };
d0f54f9d 431
99b7da5d 432static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 433 {
99b7da5d
AA
434 { 1, S390_FPC_REGNUM, 8 },
435 { 16, S390_F0_REGNUM, 8 },
436 { 0 }
2ccd1468 437 };
d0f54f9d 438
99b7da5d 439static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 440 {
99b7da5d
AA
441 { 16, S390_R0_UPPER_REGNUM, 4 },
442 { 0 }
2ccd1468 443 };
7803799a 444
99b7da5d 445static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 446 {
99b7da5d
AA
447 { 1, REGCACHE_MAP_SKIP, 4 },
448 { 1, S390_LAST_BREAK_REGNUM, 4 },
449 { 0 }
2ccd1468 450 };
c642a434 451
99b7da5d 452static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 453 {
99b7da5d
AA
454 { 1, S390_LAST_BREAK_REGNUM, 8 },
455 { 0 }
2ccd1468
UW
456 };
457
99b7da5d 458static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 459 {
99b7da5d
AA
460 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
461 { 0 }
2ccd1468
UW
462 };
463
99b7da5d 464static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 465 {
99b7da5d
AA
466 { 1, S390_TDB_DWORD0_REGNUM, 8 },
467 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
468 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
469 { 1, S390_TDB_ATIA_REGNUM, 8 },
470 { 12, REGCACHE_MAP_SKIP, 8 },
471 { 16, S390_TDB_R0_REGNUM, 8 },
472 { 0 }
2ccd1468 473 };
c642a434 474
4ac33720 475
99b7da5d
AA
476/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
477 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
478
479static void
480s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
481 int regnum, const void *regs, size_t len)
482{
483 ULONGEST tdw;
484 enum register_status ret;
485 int i;
486
99b7da5d 487 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
488 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
489 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 490 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
491}
492
99b7da5d
AA
493const struct regset s390_gregset = {
494 s390_gregmap,
495 regcache_supply_regset,
496 regcache_collect_regset
d0f54f9d
JB
497};
498
99b7da5d
AA
499const struct regset s390_fpregset = {
500 s390_fpregmap,
501 regcache_supply_regset,
502 regcache_collect_regset
d0f54f9d
JB
503};
504
7803799a 505static const struct regset s390_upper_regset = {
34201ae3 506 s390_regmap_upper,
99b7da5d
AA
507 regcache_supply_regset,
508 regcache_collect_regset
7803799a
UW
509};
510
99b7da5d 511const struct regset s390_last_break_regset = {
c642a434 512 s390_regmap_last_break,
99b7da5d
AA
513 regcache_supply_regset,
514 regcache_collect_regset
c642a434
UW
515};
516
99b7da5d 517const struct regset s390x_last_break_regset = {
c642a434 518 s390x_regmap_last_break,
99b7da5d
AA
519 regcache_supply_regset,
520 regcache_collect_regset
c642a434
UW
521};
522
99b7da5d 523const struct regset s390_system_call_regset = {
c642a434 524 s390_regmap_system_call,
99b7da5d
AA
525 regcache_supply_regset,
526 regcache_collect_regset
c642a434
UW
527};
528
99b7da5d 529const struct regset s390_tdb_regset = {
4ac33720
UW
530 s390_regmap_tdb,
531 s390_supply_tdb_regset,
99b7da5d 532 regcache_collect_regset
4ac33720
UW
533};
534
c642a434
UW
535static struct core_regset_section s390_linux32_regset_sections[] =
536{
537 { ".reg", s390_sizeof_gregset, "general-purpose" },
538 { ".reg2", s390_sizeof_fpregset, "floating-point" },
539 { NULL, 0}
540};
541
542static struct core_regset_section s390_linux32v1_regset_sections[] =
543{
544 { ".reg", s390_sizeof_gregset, "general-purpose" },
545 { ".reg2", s390_sizeof_fpregset, "floating-point" },
546 { ".reg-s390-last-break", 8, "s390 last-break address" },
547 { NULL, 0}
548};
549
550static struct core_regset_section s390_linux32v2_regset_sections[] =
551{
552 { ".reg", s390_sizeof_gregset, "general-purpose" },
553 { ".reg2", s390_sizeof_fpregset, "floating-point" },
554 { ".reg-s390-last-break", 8, "s390 last-break address" },
555 { ".reg-s390-system-call", 4, "s390 system-call" },
556 { NULL, 0}
557};
558
559static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
560{
561 { ".reg", s390_sizeof_gregset, "general-purpose" },
562 { ".reg2", s390_sizeof_fpregset, "floating-point" },
563 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
564 { NULL, 0}
565};
566
c642a434
UW
567static struct core_regset_section s390_linux64v1_regset_sections[] =
568{
569 { ".reg", s390_sizeof_gregset, "general-purpose" },
570 { ".reg2", s390_sizeof_fpregset, "floating-point" },
571 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
572 { ".reg-s390-last-break", 8, "s930 last-break address" },
573 { NULL, 0}
574};
575
576static struct core_regset_section s390_linux64v2_regset_sections[] =
577{
578 { ".reg", s390_sizeof_gregset, "general-purpose" },
579 { ".reg2", s390_sizeof_fpregset, "floating-point" },
580 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
581 { ".reg-s390-last-break", 8, "s930 last-break address" },
582 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 583 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
584 { NULL, 0}
585};
586
587static struct core_regset_section s390x_linux64_regset_sections[] =
588{
589 { ".reg", s390x_sizeof_gregset, "general-purpose" },
590 { ".reg2", s390_sizeof_fpregset, "floating-point" },
591 { NULL, 0}
592};
593
594static struct core_regset_section s390x_linux64v1_regset_sections[] =
595{
596 { ".reg", s390x_sizeof_gregset, "general-purpose" },
597 { ".reg2", s390_sizeof_fpregset, "floating-point" },
598 { ".reg-s390-last-break", 8, "s930 last-break address" },
599 { NULL, 0}
600};
601
602static struct core_regset_section s390x_linux64v2_regset_sections[] =
603{
604 { ".reg", s390x_sizeof_gregset, "general-purpose" },
605 { ".reg2", s390_sizeof_fpregset, "floating-point" },
606 { ".reg-s390-last-break", 8, "s930 last-break address" },
607 { ".reg-s390-system-call", 4, "s390 system-call" },
4ac33720 608 { ".reg-s390-tdb", s390_sizeof_tdbregset, "s390 TDB" },
c642a434
UW
609 { NULL, 0}
610};
611
612
d0f54f9d
JB
613/* Return the appropriate register set for the core section identified
614 by SECT_NAME and SECT_SIZE. */
63807e1d 615static const struct regset *
d0f54f9d
JB
616s390_regset_from_core_section (struct gdbarch *gdbarch,
617 const char *sect_name, size_t sect_size)
618{
619 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
620
e31dcd20 621 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
622 return tdep->gregset;
623
e31dcd20 624 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
625 return tdep->fpregset;
626
7803799a
UW
627 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
628 return &s390_upper_regset;
629
c642a434
UW
630 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
631 return (gdbarch_ptr_bit (gdbarch) == 32
632 ? &s390_last_break_regset : &s390x_last_break_regset);
633
634 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
635 return &s390_system_call_regset;
636
4ac33720
UW
637 if (strcmp (sect_name, ".reg-s390-tdb") == 0 && sect_size >= 256)
638 return &s390_tdb_regset;
639
d0f54f9d 640 return NULL;
5769d3cd
AC
641}
642
7803799a
UW
643static const struct target_desc *
644s390_core_read_description (struct gdbarch *gdbarch,
645 struct target_ops *target, bfd *abfd)
646{
647 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
648 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
649 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a 650 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 651 CORE_ADDR hwcap = 0;
4ac33720
UW
652
653 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
654 if (!section)
655 return NULL;
656
657 switch (bfd_section_size (abfd, section))
658 {
659 case s390_sizeof_gregset:
c642a434 660 if (high_gprs)
4ac33720
UW
661 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 :
662 v2? tdesc_s390_linux64v2 :
c642a434
UW
663 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
664 else
665 return (v2? tdesc_s390_linux32v2 :
666 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
667
668 case s390x_sizeof_gregset:
4ac33720
UW
669 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 :
670 v2? tdesc_s390x_linux64v2 :
c642a434 671 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
672
673 default:
674 return NULL;
675 }
676}
677
d0f54f9d 678
4bc8c588
JB
679/* Decoding S/390 instructions. */
680
681/* Named opcode values for the S/390 instructions we recognize. Some
682 instructions have their opcode split across two fields; those are the
683 op1_* and op2_* enums. */
684enum
685 {
a8c99f38
JB
686 op1_lhi = 0xa7, op2_lhi = 0x08,
687 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 688 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 689 op_lr = 0x18,
a8c99f38
JB
690 op_lgr = 0xb904,
691 op_l = 0x58,
692 op1_ly = 0xe3, op2_ly = 0x58,
693 op1_lg = 0xe3, op2_lg = 0x04,
694 op_lm = 0x98,
695 op1_lmy = 0xeb, op2_lmy = 0x98,
696 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 697 op_st = 0x50,
a8c99f38 698 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 699 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 700 op_std = 0x60,
4bc8c588 701 op_stm = 0x90,
a8c99f38 702 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 703 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
704 op1_aghi = 0xa7, op2_aghi = 0x0b,
705 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
706 op1_agfi = 0xc2, op2_agfi = 0x08,
707 op1_afi = 0xc2, op2_afi = 0x09,
708 op1_algfi= 0xc2, op2_algfi= 0x0a,
709 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
710 op_ar = 0x1a,
711 op_agr = 0xb908,
712 op_a = 0x5a,
713 op1_ay = 0xe3, op2_ay = 0x5a,
714 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
715 op1_slgfi= 0xc2, op2_slgfi= 0x04,
716 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
717 op_sr = 0x1b,
718 op_sgr = 0xb909,
719 op_s = 0x5b,
720 op1_sy = 0xe3, op2_sy = 0x5b,
721 op1_sg = 0xe3, op2_sg = 0x09,
722 op_nr = 0x14,
723 op_ngr = 0xb980,
724 op_la = 0x41,
725 op1_lay = 0xe3, op2_lay = 0x71,
726 op1_larl = 0xc0, op2_larl = 0x00,
727 op_basr = 0x0d,
728 op_bas = 0x4d,
729 op_bcr = 0x07,
730 op_bc = 0x0d,
1db4e8a0
UW
731 op_bctr = 0x06,
732 op_bctgr = 0xb946,
733 op_bct = 0x46,
734 op1_bctg = 0xe3, op2_bctg = 0x46,
735 op_bxh = 0x86,
736 op1_bxhg = 0xeb, op2_bxhg = 0x44,
737 op_bxle = 0x87,
738 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
739 op1_bras = 0xa7, op2_bras = 0x05,
740 op1_brasl= 0xc0, op2_brasl= 0x05,
741 op1_brc = 0xa7, op2_brc = 0x04,
742 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
743 op1_brct = 0xa7, op2_brct = 0x06,
744 op1_brctg= 0xa7, op2_brctg= 0x07,
745 op_brxh = 0x84,
746 op1_brxhg= 0xec, op2_brxhg= 0x44,
747 op_brxle = 0x85,
748 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 749 op_svc = 0x0a,
4bc8c588
JB
750 };
751
752
a8c99f38
JB
753/* Read a single instruction from address AT. */
754
755#define S390_MAX_INSTR_SIZE 6
756static int
757s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
758{
759 static int s390_instrlen[] = { 2, 4, 4, 6 };
760 int instrlen;
761
8defab1a 762 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
763 return -1;
764 instrlen = s390_instrlen[instr[0] >> 6];
765 if (instrlen > 2)
766 {
8defab1a 767 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 768 return -1;
a8c99f38
JB
769 }
770 return instrlen;
771}
772
773
4bc8c588
JB
774/* The functions below are for recognizing and decoding S/390
775 instructions of various formats. Each of them checks whether INSN
776 is an instruction of the given format, with the specified opcodes.
777 If it is, it sets the remaining arguments to the values of the
778 instruction's fields, and returns a non-zero value; otherwise, it
779 returns zero.
780
781 These functions' arguments appear in the order they appear in the
782 instruction, not in the machine-language form. So, opcodes always
783 come first, even though they're sometimes scattered around the
784 instructions. And displacements appear before base and extension
785 registers, as they do in the assembly syntax, not at the end, as
786 they do in the machine language. */
a78f21af 787static int
4bc8c588
JB
788is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
789{
790 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
791 {
792 *r1 = (insn[1] >> 4) & 0xf;
793 /* i2 is a 16-bit signed quantity. */
794 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
795 return 1;
796 }
797 else
798 return 0;
799}
8ac0e65a 800
5769d3cd 801
4bc8c588
JB
802static int
803is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 804 unsigned int *r1, int *i2)
4bc8c588
JB
805{
806 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
807 {
808 *r1 = (insn[1] >> 4) & 0xf;
809 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
810 no sign extension is necessary, but we don't want to assume
811 that. */
4bc8c588 812 *i2 = (((insn[2] << 24)
34201ae3
UW
813 | (insn[3] << 16)
814 | (insn[4] << 8)
815 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
816 return 1;
817 }
818 else
819 return 0;
820}
821
822
823static int
824is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
825{
826 if (insn[0] == op)
827 {
828 *r1 = (insn[1] >> 4) & 0xf;
829 *r2 = insn[1] & 0xf;
830 return 1;
831 }
832 else
833 return 0;
834}
835
836
837static int
838is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
839{
840 if (((insn[0] << 8) | insn[1]) == op)
841 {
842 /* Yes, insn[3]. insn[2] is unused in RRE format. */
843 *r1 = (insn[3] >> 4) & 0xf;
844 *r2 = insn[3] & 0xf;
845 return 1;
846 }
847 else
848 return 0;
849}
850
851
852static int
853is_rs (bfd_byte *insn, int op,
eb1bd1fb 854 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
855{
856 if (insn[0] == op)
857 {
858 *r1 = (insn[1] >> 4) & 0xf;
859 *r3 = insn[1] & 0xf;
860 *b2 = (insn[2] >> 4) & 0xf;
861 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
862 return 1;
863 }
864 else
865 return 0;
866}
867
868
869static int
a8c99f38 870is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 871 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
872{
873 if (insn[0] == op1
4bc8c588
JB
874 && insn[5] == op2)
875 {
876 *r1 = (insn[1] >> 4) & 0xf;
877 *r3 = insn[1] & 0xf;
878 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 879 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 880 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 881 ^ 0x80000) - 0x80000;
4bc8c588
JB
882 return 1;
883 }
884 else
885 return 0;
886}
887
888
1db4e8a0
UW
889static int
890is_rsi (bfd_byte *insn, int op,
34201ae3 891 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
892{
893 if (insn[0] == op)
894 {
895 *r1 = (insn[1] >> 4) & 0xf;
896 *r3 = insn[1] & 0xf;
897 /* i2 is a 16-bit signed quantity. */
898 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
899 return 1;
900 }
901 else
902 return 0;
903}
904
905
906static int
907is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 908 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
909{
910 if (insn[0] == op1
911 && insn[5] == op2)
912 {
913 *r1 = (insn[1] >> 4) & 0xf;
914 *r3 = insn[1] & 0xf;
915 /* i2 is a 16-bit signed quantity. */
916 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
917 return 1;
918 }
919 else
920 return 0;
921}
922
923
4bc8c588
JB
924static int
925is_rx (bfd_byte *insn, int op,
eb1bd1fb 926 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
927{
928 if (insn[0] == op)
929 {
930 *r1 = (insn[1] >> 4) & 0xf;
931 *x2 = insn[1] & 0xf;
932 *b2 = (insn[2] >> 4) & 0xf;
933 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
934 return 1;
935 }
936 else
937 return 0;
938}
939
940
941static int
a8c99f38 942is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 943 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
944{
945 if (insn[0] == op1
4bc8c588
JB
946 && insn[5] == op2)
947 {
948 *r1 = (insn[1] >> 4) & 0xf;
949 *x2 = insn[1] & 0xf;
950 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 951 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 952 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 953 ^ 0x80000) - 0x80000;
4bc8c588
JB
954 return 1;
955 }
956 else
957 return 0;
958}
959
960
3fc46200 961/* Prologue analysis. */
4bc8c588 962
d0f54f9d
JB
963#define S390_NUM_GPRS 16
964#define S390_NUM_FPRS 16
4bc8c588 965
a8c99f38
JB
966struct s390_prologue_data {
967
ee1b3323
UW
968 /* The stack. */
969 struct pv_area *stack;
970
e17a4113 971 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
972 int gpr_size;
973 int fpr_size;
e17a4113 974 enum bfd_endian byte_order;
a8c99f38
JB
975
976 /* The general-purpose registers. */
3fc46200 977 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
978
979 /* The floating-point registers. */
3fc46200 980 pv_t fpr[S390_NUM_FPRS];
a8c99f38 981
121d8485
UW
982 /* The offset relative to the CFA where the incoming GPR N was saved
983 by the function prologue. 0 if not saved or unknown. */
984 int gpr_slot[S390_NUM_GPRS];
4bc8c588 985
121d8485
UW
986 /* Likewise for FPRs. */
987 int fpr_slot[S390_NUM_FPRS];
4bc8c588 988
121d8485
UW
989 /* Nonzero if the backchain was saved. This is assumed to be the
990 case when the incoming SP is saved at the current SP location. */
991 int back_chain_saved_p;
992};
4bc8c588 993
3fc46200
UW
994/* Return the effective address for an X-style instruction, like:
995
34201ae3 996 L R1, D2(X2, B2)
3fc46200
UW
997
998 Here, X2 and B2 are registers, and D2 is a signed 20-bit
999 constant; the effective address is the sum of all three. If either
1000 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1001 means that r0 can't be used as either X2 or B2. */
1002static pv_t
1003s390_addr (struct s390_prologue_data *data,
1004 int d2, unsigned int x2, unsigned int b2)
1005{
1006 pv_t result;
1007
1008 result = pv_constant (d2);
1009 if (x2)
1010 result = pv_add (result, data->gpr[x2]);
1011 if (b2)
1012 result = pv_add (result, data->gpr[b2]);
1013
1014 return result;
1015}
1016
1017/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1018static void
3fc46200
UW
1019s390_store (struct s390_prologue_data *data,
1020 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1021 pv_t value)
4bc8c588 1022{
3fc46200 1023 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1024 pv_t offset;
121d8485
UW
1025
1026 /* Check whether we are storing the backchain. */
3fc46200 1027 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1028
3fc46200 1029 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1030 if (size == data->gpr_size
3fc46200 1031 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1032 {
1033 data->back_chain_saved_p = 1;
1034 return;
1035 }
1036
1037
1038 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1039 if (!pv_area_store_would_trash (data->stack, addr))
1040 pv_area_store (data->stack, addr, size, value);
4bc8c588 1041
a8c99f38 1042
121d8485
UW
1043 /* Note: If this is some store we cannot identify, you might think we
1044 should forget our cached values, as any of those might have been hit.
1045
1046 However, we make the assumption that the register save areas are only
1047 ever stored to once in any given function, and we do recognize these
1048 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1049}
4bc8c588 1050
3fc46200
UW
1051/* Do a SIZE-byte load from D2(X2,B2). */
1052static pv_t
1053s390_load (struct s390_prologue_data *data,
1054 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1055
4bc8c588 1056{
3fc46200 1057 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1058
a8c99f38
JB
1059 /* If it's a load from an in-line constant pool, then we can
1060 simulate that, under the assumption that the code isn't
1061 going to change between the time the processor actually
1062 executed it creating the current frame, and the time when
1063 we're analyzing the code to unwind past that frame. */
3fc46200 1064 if (pv_is_constant (addr))
4bc8c588 1065 {
0542c86d 1066 struct target_section *secp;
3fc46200 1067 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1068 if (secp != NULL
34201ae3 1069 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1070 secp->the_bfd_section)
34201ae3
UW
1071 & SEC_READONLY))
1072 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1073 data->byte_order));
a8c99f38 1074 }
7666f43c 1075
121d8485 1076 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1077 return pv_area_fetch (data->stack, addr, size);
1078}
121d8485 1079
ee1b3323
UW
1080/* Function for finding saved registers in a 'struct pv_area'; we pass
1081 this to pv_area_scan.
121d8485 1082
ee1b3323
UW
1083 If VALUE is a saved register, ADDR says it was saved at a constant
1084 offset from the frame base, and SIZE indicates that the whole
1085 register was saved, record its offset in the reg_offset table in
1086 PROLOGUE_UNTYPED. */
1087static void
c378eb4e
MS
1088s390_check_for_saved (void *data_untyped, pv_t addr,
1089 CORE_ADDR size, pv_t value)
ee1b3323
UW
1090{
1091 struct s390_prologue_data *data = data_untyped;
1092 int i, offset;
1093
1094 if (!pv_is_register (addr, S390_SP_REGNUM))
1095 return;
1096
1097 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1098
ee1b3323
UW
1099 /* If we are storing the original value of a register, we want to
1100 record the CFA offset. If the same register is stored multiple
1101 times, the stack slot with the highest address counts. */
34201ae3 1102
ee1b3323
UW
1103 for (i = 0; i < S390_NUM_GPRS; i++)
1104 if (size == data->gpr_size
1105 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1106 if (data->gpr_slot[i] == 0
1107 || data->gpr_slot[i] > offset)
1108 {
1109 data->gpr_slot[i] = offset;
1110 return;
1111 }
1112
1113 for (i = 0; i < S390_NUM_FPRS; i++)
1114 if (size == data->fpr_size
1115 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1116 if (data->fpr_slot[i] == 0
1117 || data->fpr_slot[i] > offset)
1118 {
1119 data->fpr_slot[i] = offset;
1120 return;
1121 }
a8c99f38 1122}
4bc8c588 1123
a8c99f38
JB
1124/* Analyze the prologue of the function starting at START_PC,
1125 continuing at most until CURRENT_PC. Initialize DATA to
1126 hold all information we find out about the state of the registers
1127 and stack slots. Return the address of the instruction after
1128 the last one that changed the SP, FP, or back chain; or zero
1129 on error. */
1130static CORE_ADDR
1131s390_analyze_prologue (struct gdbarch *gdbarch,
1132 CORE_ADDR start_pc,
1133 CORE_ADDR current_pc,
1134 struct s390_prologue_data *data)
4bc8c588 1135{
a8c99f38
JB
1136 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1137
4bc8c588 1138 /* Our return value:
a8c99f38 1139 The address of the instruction after the last one that changed
34201ae3 1140 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1141 read memory. */
1142 CORE_ADDR result = start_pc;
4bc8c588 1143
4bc8c588
JB
1144 /* The current PC for our abstract interpretation. */
1145 CORE_ADDR pc;
1146
1147 /* The address of the next instruction after that. */
1148 CORE_ADDR next_pc;
34201ae3 1149
4bc8c588
JB
1150 /* Set up everything's initial value. */
1151 {
1152 int i;
1153
55f960e1 1154 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1155
a8c99f38
JB
1156 /* For the purpose of prologue tracking, we consider the GPR size to
1157 be equal to the ABI word size, even if it is actually larger
1158 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1159 data->gpr_size = word_size;
1160 data->fpr_size = 8;
e17a4113 1161 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1162
4bc8c588 1163 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1164 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1165
1166 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1167 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1168
121d8485
UW
1169 for (i = 0; i < S390_NUM_GPRS; i++)
1170 data->gpr_slot[i] = 0;
1171
1172 for (i = 0; i < S390_NUM_FPRS; i++)
1173 data->fpr_slot[i] = 0;
4bc8c588 1174
121d8485 1175 data->back_chain_saved_p = 0;
4bc8c588
JB
1176 }
1177
a8c99f38
JB
1178 /* Start interpreting instructions, until we hit the frame's
1179 current PC or the first branch instruction. */
1180 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1181 {
4bc8c588 1182 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1183 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1184
3fc46200
UW
1185 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1186 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1187 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1188
4bc8c588 1189 /* Fields for various kinds of instructions. */
a8c99f38
JB
1190 unsigned int b2, r1, r2, x2, r3;
1191 int i2, d2;
4bc8c588 1192
121d8485 1193 /* The values of SP and FP before this instruction,
34201ae3 1194 for detecting instructions that change them. */
3fc46200 1195 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1196 /* Likewise for the flag whether the back chain was saved. */
1197 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1198
1199 /* If we got an error trying to read the instruction, report it. */
1200 if (insn_len < 0)
34201ae3
UW
1201 {
1202 result = 0;
1203 break;
1204 }
4bc8c588
JB
1205
1206 next_pc = pc + insn_len;
1207
a8c99f38
JB
1208 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1209 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1210 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1211
4bc8c588 1212
3fc46200
UW
1213 /* LHI r1, i2 --- load halfword immediate. */
1214 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1215 /* LGFI r1, i2 --- load fullword immediate. */
1216 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1217 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1218 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1219 data->gpr[r1] = pv_constant (i2);
1220
1221 /* LR r1, r2 --- load from register. */
1222 /* LGR r1, r2 --- load from register (64-bit version). */
1223 else if (is_rr (insn32, op_lr, &r1, &r2)
1224 || is_rre (insn64, op_lgr, &r1, &r2))
1225 data->gpr[r1] = data->gpr[r2];
1226
1227 /* L r1, d2(x2, b2) --- load. */
1228 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1229 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1230 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1231 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1232 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1233 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1234
1235 /* ST r1, d2(x2, b2) --- store. */
1236 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1237 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1238 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1239 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1240 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1241 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1242
1243 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1244 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1245 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1246
1247 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1248 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1249 version). */
3fc46200
UW
1250 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1251 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1252 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1253 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1254 {
1255 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1256 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1257 }
4bc8c588 1258
3fc46200
UW
1259 /* AHI r1, i2 --- add halfword immediate. */
1260 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1261 /* AFI r1, i2 --- add fullword immediate. */
1262 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1263 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1264 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1265 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1266 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1267 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1268
1269 /* ALFI r1, i2 --- add logical immediate. */
1270 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1271 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1272 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1273 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1274 (CORE_ADDR)i2 & 0xffffffff);
1275
1276 /* AR r1, r2 -- add register. */
1277 /* AGR r1, r2 -- add register (64-bit version). */
1278 else if (is_rr (insn32, op_ar, &r1, &r2)
1279 || is_rre (insn64, op_agr, &r1, &r2))
1280 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1281
1282 /* A r1, d2(x2, b2) -- add. */
1283 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1284 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1285 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1286 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1287 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1288 data->gpr[r1] = pv_add (data->gpr[r1],
1289 s390_load (data, d2, x2, b2, data->gpr_size));
1290
1291 /* SLFI r1, i2 --- subtract logical immediate. */
1292 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1293 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1294 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1295 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1296 -((CORE_ADDR)i2 & 0xffffffff));
1297
1298 /* SR r1, r2 -- subtract register. */
1299 /* SGR r1, r2 -- subtract register (64-bit version). */
1300 else if (is_rr (insn32, op_sr, &r1, &r2)
1301 || is_rre (insn64, op_sgr, &r1, &r2))
1302 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1303
1304 /* S r1, d2(x2, b2) -- subtract. */
1305 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1306 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1307 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1308 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1309 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1310 data->gpr[r1] = pv_subtract (data->gpr[r1],
1311 s390_load (data, d2, x2, b2, data->gpr_size));
1312
1313 /* LA r1, d2(x2, b2) --- load address. */
1314 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1315 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1316 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1317 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1318
1319 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1320 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1321 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1322
3fc46200 1323 /* BASR r1, 0 --- branch and save.
34201ae3 1324 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1325 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1326 && r2 == 0)
3fc46200 1327 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1328
3fc46200 1329 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1330 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1331 {
1332 data->gpr[r1] = pv_constant (next_pc);
1333 next_pc = pc + i2 * 2;
4bc8c588 1334
34201ae3
UW
1335 /* We'd better not interpret any backward branches. We'll
1336 never terminate. */
1337 if (next_pc <= pc)
1338 break;
1339 }
4bc8c588 1340
a8c99f38
JB
1341 /* Terminate search when hitting any other branch instruction. */
1342 else if (is_rr (insn, op_basr, &r1, &r2)
1343 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1344 || is_rr (insn, op_bcr, &r1, &r2)
1345 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1346 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1347 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1348 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1349 break;
1350
4bc8c588 1351 else
d4fb63e1
TT
1352 {
1353 /* An instruction we don't know how to simulate. The only
1354 safe thing to do would be to set every value we're tracking
1355 to 'unknown'. Instead, we'll be optimistic: we assume that
1356 we *can* interpret every instruction that the compiler uses
1357 to manipulate any of the data we're interested in here --
1358 then we can just ignore anything else. */
1359 }
4bc8c588
JB
1360
1361 /* Record the address after the last instruction that changed
34201ae3
UW
1362 the FP, SP, or backlink. Ignore instructions that changed
1363 them back to their original values --- those are probably
1364 restore instructions. (The back chain is never restored,
1365 just popped.) */
4bc8c588 1366 {
34201ae3
UW
1367 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1368 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1369
1370 if ((! pv_is_identical (pre_insn_sp, sp)
1371 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1372 && sp.kind != pvk_unknown)
34201ae3
UW
1373 || (! pv_is_identical (pre_insn_fp, fp)
1374 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1375 && fp.kind != pvk_unknown)
34201ae3
UW
1376 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1377 result = next_pc;
4bc8c588 1378 }
5769d3cd 1379 }
4bc8c588 1380
ee1b3323
UW
1381 /* Record where all the registers were saved. */
1382 pv_area_scan (data->stack, s390_check_for_saved, data);
1383
1384 free_pv_area (data->stack);
1385 data->stack = NULL;
1386
4bc8c588 1387 return result;
5769d3cd
AC
1388}
1389
34201ae3 1390/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1391 some "real" code. */
1392static CORE_ADDR
6093d2eb 1393s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1394{
1395 struct s390_prologue_data data;
1396 CORE_ADDR skip_pc;
6093d2eb 1397 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1398 return skip_pc ? skip_pc : pc;
1399}
1400
d0f54f9d
JB
1401/* Return true if we are in the functin's epilogue, i.e. after the
1402 instruction that destroyed the function's stack frame. */
1403static int
1404s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1405{
1406 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1407
1408 /* In frameless functions, there's not frame to destroy and thus
1409 we don't care about the epilogue.
1410
1411 In functions with frame, the epilogue sequence is a pair of
1412 a LM-type instruction that restores (amongst others) the
1413 return register %r14 and the stack pointer %r15, followed
1414 by a branch 'br %r14' --or equivalent-- that effects the
1415 actual return.
1416
1417 In that situation, this function needs to return 'true' in
1418 exactly one case: when pc points to that branch instruction.
1419
1420 Thus we try to disassemble the one instructions immediately
177b42fe 1421 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1422 modifying the stack pointer.
1423
1424 Note that disassembling backwards is not reliable, so there
1425 is a slight chance of false positives here ... */
1426
1427 bfd_byte insn[6];
1428 unsigned int r1, r3, b2;
1429 int d2;
1430
1431 if (word_size == 4
8defab1a 1432 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1433 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1434 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1435 return 1;
1436
a8c99f38 1437 if (word_size == 4
8defab1a 1438 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1439 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1440 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1441 return 1;
1442
d0f54f9d 1443 if (word_size == 8
8defab1a 1444 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1445 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1446 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1447 return 1;
1448
1449 return 0;
1450}
5769d3cd 1451
1db4e8a0
UW
1452/* Displaced stepping. */
1453
1454/* Fix up the state of registers and memory after having single-stepped
1455 a displaced instruction. */
1456static void
1457s390_displaced_step_fixup (struct gdbarch *gdbarch,
1458 struct displaced_step_closure *closure,
1459 CORE_ADDR from, CORE_ADDR to,
1460 struct regcache *regs)
1461{
1462 /* Since we use simple_displaced_step_copy_insn, our closure is a
1463 copy of the instruction. */
1464 gdb_byte *insn = (gdb_byte *) closure;
1465 static int s390_instrlen[] = { 2, 4, 4, 6 };
1466 int insnlen = s390_instrlen[insn[0] >> 6];
1467
1468 /* Fields for various kinds of instructions. */
1469 unsigned int b2, r1, r2, x2, r3;
1470 int i2, d2;
1471
1472 /* Get current PC and addressing mode bit. */
1473 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1474 ULONGEST amode = 0;
1db4e8a0
UW
1475
1476 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1477 {
1478 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1479 amode &= 0x80000000;
1480 }
1481
1482 if (debug_displaced)
1483 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1484 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1485 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1486 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1487
1488 /* Handle absolute branch and save instructions. */
1489 if (is_rr (insn, op_basr, &r1, &r2)
1490 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1491 {
1492 /* Recompute saved return address in R1. */
1493 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1494 amode | (from + insnlen));
1495 }
1496
1497 /* Handle absolute branch instructions. */
1498 else if (is_rr (insn, op_bcr, &r1, &r2)
1499 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1500 || is_rr (insn, op_bctr, &r1, &r2)
1501 || is_rre (insn, op_bctgr, &r1, &r2)
1502 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1503 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1504 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1505 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1506 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1507 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1508 {
1509 /* Update PC iff branch was *not* taken. */
1510 if (pc == to + insnlen)
1511 regcache_write_pc (regs, from + insnlen);
1512 }
1513
1514 /* Handle PC-relative branch and save instructions. */
1515 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1516 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1517 {
1518 /* Update PC. */
1519 regcache_write_pc (regs, pc - to + from);
1520 /* Recompute saved return address in R1. */
1521 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1522 amode | (from + insnlen));
1523 }
1524
1525 /* Handle PC-relative branch instructions. */
1526 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1527 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1528 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1529 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1530 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1531 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1532 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1533 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1534 {
1535 /* Update PC. */
1536 regcache_write_pc (regs, pc - to + from);
1537 }
1538
1539 /* Handle LOAD ADDRESS RELATIVE LONG. */
1540 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1541 {
0161e4b9
UW
1542 /* Update PC. */
1543 regcache_write_pc (regs, from + insnlen);
34201ae3 1544 /* Recompute output address in R1. */
1db4e8a0 1545 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1546 amode | (from + i2 * 2));
1db4e8a0
UW
1547 }
1548
1549 /* If we executed a breakpoint instruction, point PC right back at it. */
1550 else if (insn[0] == 0x0 && insn[1] == 0x1)
1551 regcache_write_pc (regs, from);
1552
1553 /* For any other insn, PC points right after the original instruction. */
1554 else
1555 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1556
1557 if (debug_displaced)
1558 fprintf_unfiltered (gdb_stdlog,
1559 "displaced: (s390) pc is now %s\n",
1560 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1561}
a8c99f38 1562
d6db1fab
UW
1563
1564/* Helper routine to unwind pseudo registers. */
1565
1566static struct value *
1567s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1568{
1569 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1570 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1571 struct type *type = register_type (gdbarch, regnum);
1572
1573 /* Unwind PC via PSW address. */
1574 if (regnum == tdep->pc_regnum)
1575 {
1576 struct value *val;
1577
1578 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1579 if (!value_optimized_out (val))
1580 {
1581 LONGEST pswa = value_as_long (val);
1582
1583 if (TYPE_LENGTH (type) == 4)
1584 return value_from_pointer (type, pswa & 0x7fffffff);
1585 else
1586 return value_from_pointer (type, pswa);
1587 }
1588 }
1589
1590 /* Unwind CC via PSW mask. */
1591 if (regnum == tdep->cc_regnum)
1592 {
1593 struct value *val;
1594
1595 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1596 if (!value_optimized_out (val))
1597 {
1598 LONGEST pswm = value_as_long (val);
1599
1600 if (TYPE_LENGTH (type) == 4)
1601 return value_from_longest (type, (pswm >> 12) & 3);
1602 else
1603 return value_from_longest (type, (pswm >> 44) & 3);
1604 }
1605 }
1606
1607 /* Unwind full GPRs to show at least the lower halves (as the
1608 upper halves are undefined). */
2ccd1468 1609 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1610 {
1611 int reg = regnum - tdep->gpr_full_regnum;
1612 struct value *val;
1613
1614 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1615 if (!value_optimized_out (val))
1616 return value_cast (type, val);
1617 }
1618
1619 return allocate_optimized_out_value (type);
1620}
1621
1622static struct value *
1623s390_trad_frame_prev_register (struct frame_info *this_frame,
1624 struct trad_frame_saved_reg saved_regs[],
1625 int regnum)
1626{
1627 if (regnum < S390_NUM_REGS)
1628 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1629 else
1630 return s390_unwind_pseudo_register (this_frame, regnum);
1631}
1632
1633
a8c99f38
JB
1634/* Normal stack frames. */
1635
1636struct s390_unwind_cache {
1637
1638 CORE_ADDR func;
1639 CORE_ADDR frame_base;
1640 CORE_ADDR local_base;
1641
1642 struct trad_frame_saved_reg *saved_regs;
1643};
1644
a78f21af 1645static int
f089c433 1646s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1647 struct s390_unwind_cache *info)
5769d3cd 1648{
f089c433 1649 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1650 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1651 struct s390_prologue_data data;
3fc46200
UW
1652 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1653 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1654 int i;
1655 CORE_ADDR cfa;
a8c99f38
JB
1656 CORE_ADDR func;
1657 CORE_ADDR result;
1658 ULONGEST reg;
1659 CORE_ADDR prev_sp;
1660 int frame_pointer;
1661 int size;
edb3359d 1662 struct frame_info *next_frame;
a8c99f38
JB
1663
1664 /* Try to find the function start address. If we can't find it, we don't
1665 bother searching for it -- with modern compilers this would be mostly
1666 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1667 or else a valid backchain ... */
f089c433 1668 func = get_frame_func (this_frame);
a8c99f38
JB
1669 if (!func)
1670 return 0;
5769d3cd 1671
a8c99f38
JB
1672 /* Try to analyze the prologue. */
1673 result = s390_analyze_prologue (gdbarch, func,
f089c433 1674 get_frame_pc (this_frame), &data);
a8c99f38 1675 if (!result)
5769d3cd 1676 return 0;
5769d3cd 1677
a8c99f38 1678 /* If this was successful, we should have found the instruction that
34201ae3 1679 sets the stack pointer register to the previous value of the stack
a8c99f38 1680 pointer minus the frame size. */
3fc46200 1681 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1682 return 0;
a8c99f38 1683
34201ae3 1684 /* A frame size of zero at this point can mean either a real
a8c99f38 1685 frameless function, or else a failure to find the prologue.
34201ae3 1686 Perform some sanity checks to verify we really have a
a8c99f38
JB
1687 frameless function. */
1688 if (sp->k == 0)
5769d3cd 1689 {
34201ae3
UW
1690 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1691 size zero. This is only possible if the next frame is a sentinel
a8c99f38 1692 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1693 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1694 needed, instead the code should simpliy rely on its
1695 analysis. */
edb3359d
DJ
1696 next_frame = get_next_frame (this_frame);
1697 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1698 next_frame = get_next_frame (next_frame);
1699 if (next_frame
f089c433 1700 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1701 return 0;
5769d3cd 1702
a8c99f38
JB
1703 /* If we really have a frameless function, %r14 must be valid
1704 -- in particular, it must point to a different function. */
f089c433 1705 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1706 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1707 if (get_pc_function_start (reg) == func)
5769d3cd 1708 {
a8c99f38
JB
1709 /* However, there is one case where it *is* valid for %r14
1710 to point to the same function -- if this is a recursive
1711 call, and we have stopped in the prologue *before* the
1712 stack frame was allocated.
1713
1714 Recognize this case by looking ahead a bit ... */
5769d3cd 1715
a8c99f38 1716 struct s390_prologue_data data2;
3fc46200 1717 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1718
1719 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
1720 && pv_is_register (*sp, S390_SP_REGNUM)
1721 && sp->k != 0))
a8c99f38 1722 return 0;
5769d3cd 1723 }
5769d3cd 1724 }
5769d3cd
AC
1725
1726
a8c99f38
JB
1727 /* OK, we've found valid prologue data. */
1728 size = -sp->k;
5769d3cd 1729
a8c99f38
JB
1730 /* If the frame pointer originally also holds the same value
1731 as the stack pointer, we're probably using it. If it holds
1732 some other value -- even a constant offset -- it is most
1733 likely used as temp register. */
3fc46200 1734 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1735 frame_pointer = S390_FRAME_REGNUM;
1736 else
1737 frame_pointer = S390_SP_REGNUM;
1738
34201ae3
UW
1739 /* If we've detected a function with stack frame, we'll still have to
1740 treat it as frameless if we're currently within the function epilog
c378eb4e 1741 code at a point where the frame pointer has already been restored.
a8c99f38 1742 This can only happen in an innermost frame. */
0e100dab
AC
1743 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1744 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1745 next_frame = get_next_frame (this_frame);
1746 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1747 next_frame = get_next_frame (next_frame);
f089c433 1748 if (size > 0
edb3359d 1749 && (next_frame == NULL
f089c433 1750 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1751 {
a8c99f38
JB
1752 /* See the comment in s390_in_function_epilogue_p on why this is
1753 not completely reliable ... */
f089c433 1754 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1755 {
a8c99f38
JB
1756 memset (&data, 0, sizeof (data));
1757 size = 0;
1758 frame_pointer = S390_SP_REGNUM;
5769d3cd 1759 }
5769d3cd 1760 }
5769d3cd 1761
a8c99f38
JB
1762 /* Once we know the frame register and the frame size, we can unwind
1763 the current value of the frame register from the next frame, and
34201ae3 1764 add back the frame size to arrive that the previous frame's
a8c99f38 1765 stack pointer value. */
f089c433 1766 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1767 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1768
7803799a
UW
1769 /* Set up ABI call-saved/call-clobbered registers. */
1770 for (i = 0; i < S390_NUM_REGS; i++)
1771 if (!s390_register_call_saved (gdbarch, i))
1772 trad_frame_set_unknown (info->saved_regs, i);
1773
1774 /* CC is always call-clobbered. */
d6db1fab 1775 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1776
121d8485
UW
1777 /* Record the addresses of all register spill slots the prologue parser
1778 has recognized. Consider only registers defined as call-saved by the
1779 ABI; for call-clobbered registers the parser may have recognized
1780 spurious stores. */
5769d3cd 1781
7803799a
UW
1782 for (i = 0; i < 16; i++)
1783 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1784 && data.gpr_slot[i] != 0)
121d8485 1785 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1786
7803799a
UW
1787 for (i = 0; i < 16; i++)
1788 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1789 && data.fpr_slot[i] != 0)
1790 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1791
1792 /* Function return will set PC to %r14. */
d6db1fab 1793 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1794
1795 /* In frameless functions, we unwind simply by moving the return
1796 address to the PC. However, if we actually stored to the
1797 save area, use that -- we might only think the function frameless
1798 because we're in the middle of the prologue ... */
1799 if (size == 0
d6db1fab 1800 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1801 {
d6db1fab 1802 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1803 }
a8c99f38
JB
1804
1805 /* Another sanity check: unless this is a frameless function,
1806 we should have found spill slots for SP and PC.
1807 If not, we cannot unwind further -- this happens e.g. in
1808 libc's thread_start routine. */
1809 if (size > 0)
5769d3cd 1810 {
a8c99f38 1811 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1812 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1813 prev_sp = -1;
5769d3cd 1814 }
a8c99f38
JB
1815
1816 /* We use the current value of the frame register as local_base,
1817 and the top of the register save area as frame_base. */
1818 if (prev_sp != -1)
1819 {
1820 info->frame_base = prev_sp + 16*word_size + 32;
1821 info->local_base = prev_sp - size;
1822 }
1823
1824 info->func = func;
1825 return 1;
5769d3cd
AC
1826}
1827
a78f21af 1828static void
f089c433 1829s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1830 struct s390_unwind_cache *info)
5769d3cd 1831{
f089c433 1832 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1833 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1834 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1835 CORE_ADDR backchain;
1836 ULONGEST reg;
1837 LONGEST sp;
7803799a
UW
1838 int i;
1839
1840 /* Set up ABI call-saved/call-clobbered registers. */
1841 for (i = 0; i < S390_NUM_REGS; i++)
1842 if (!s390_register_call_saved (gdbarch, i))
1843 trad_frame_set_unknown (info->saved_regs, i);
1844
1845 /* CC is always call-clobbered. */
d6db1fab 1846 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1847
1848 /* Get the backchain. */
f089c433 1849 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1850 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1851
1852 /* A zero backchain terminates the frame chain. As additional
1853 sanity check, let's verify that the spill slot for SP in the
1854 save area pointed to by the backchain in fact links back to
1855 the save area. */
1856 if (backchain != 0
e17a4113
UW
1857 && safe_read_memory_integer (backchain + 15*word_size,
1858 word_size, byte_order, &sp)
a8c99f38
JB
1859 && (CORE_ADDR)sp == backchain)
1860 {
1861 /* We don't know which registers were saved, but it will have
34201ae3
UW
1862 to be at least %r14 and %r15. This will allow us to continue
1863 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
1864 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1865 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1866
1867 /* Function return will set PC to %r14. */
d6db1fab 1868 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1869 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1870
1871 /* We use the current value of the frame register as local_base,
34201ae3 1872 and the top of the register save area as frame_base. */
a8c99f38
JB
1873 info->frame_base = backchain + 16*word_size + 32;
1874 info->local_base = reg;
1875 }
1876
f089c433 1877 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1878}
1879
a8c99f38 1880static struct s390_unwind_cache *
f089c433 1881s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1882 void **this_prologue_cache)
1883{
62261490 1884 volatile struct gdb_exception ex;
a8c99f38 1885 struct s390_unwind_cache *info;
62261490 1886
a8c99f38
JB
1887 if (*this_prologue_cache)
1888 return *this_prologue_cache;
1889
1890 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1891 *this_prologue_cache = info;
f089c433 1892 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1893 info->func = -1;
1894 info->frame_base = -1;
1895 info->local_base = -1;
1896
62261490
PA
1897 TRY_CATCH (ex, RETURN_MASK_ERROR)
1898 {
1899 /* Try to use prologue analysis to fill the unwind cache.
1900 If this fails, fall back to reading the stack backchain. */
1901 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1902 s390_backchain_frame_unwind_cache (this_frame, info);
1903 }
1904 if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
1905 throw_exception (ex);
a8c99f38
JB
1906
1907 return info;
1908}
5769d3cd 1909
a78f21af 1910static void
f089c433 1911s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1912 void **this_prologue_cache,
1913 struct frame_id *this_id)
5769d3cd 1914{
a8c99f38 1915 struct s390_unwind_cache *info
f089c433 1916 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 1917
a8c99f38
JB
1918 if (info->frame_base == -1)
1919 return;
5769d3cd 1920
a8c99f38 1921 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
1922}
1923
f089c433
UW
1924static struct value *
1925s390_frame_prev_register (struct frame_info *this_frame,
1926 void **this_prologue_cache, int regnum)
a8c99f38 1927{
7803799a 1928 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1929 struct s390_unwind_cache *info
f089c433 1930 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 1931
d6db1fab 1932 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1933}
1934
1935static const struct frame_unwind s390_frame_unwind = {
1936 NORMAL_FRAME,
8fbca658 1937 default_frame_unwind_stop_reason,
a8c99f38 1938 s390_frame_this_id,
f089c433
UW
1939 s390_frame_prev_register,
1940 NULL,
1941 default_frame_sniffer
a8c99f38
JB
1942};
1943
5769d3cd 1944
8e645ae7
AC
1945/* Code stubs and their stack frames. For things like PLTs and NULL
1946 function calls (where there is no true frame and the return address
1947 is in the RETADDR register). */
a8c99f38 1948
8e645ae7
AC
1949struct s390_stub_unwind_cache
1950{
a8c99f38
JB
1951 CORE_ADDR frame_base;
1952 struct trad_frame_saved_reg *saved_regs;
1953};
1954
8e645ae7 1955static struct s390_stub_unwind_cache *
f089c433 1956s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 1957 void **this_prologue_cache)
5769d3cd 1958{
f089c433 1959 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1960 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 1961 struct s390_stub_unwind_cache *info;
a8c99f38 1962 ULONGEST reg;
5c3cf190 1963
a8c99f38
JB
1964 if (*this_prologue_cache)
1965 return *this_prologue_cache;
5c3cf190 1966
8e645ae7 1967 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 1968 *this_prologue_cache = info;
f089c433 1969 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1970
1971 /* The return address is in register %r14. */
d6db1fab 1972 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
1973
1974 /* Retrieve stack pointer and determine our frame base. */
f089c433 1975 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
1976 info->frame_base = reg + 16*word_size + 32;
1977
1978 return info;
5769d3cd
AC
1979}
1980
a8c99f38 1981static void
f089c433 1982s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
1983 void **this_prologue_cache,
1984 struct frame_id *this_id)
5769d3cd 1985{
8e645ae7 1986 struct s390_stub_unwind_cache *info
f089c433
UW
1987 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1988 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 1989}
5769d3cd 1990
f089c433
UW
1991static struct value *
1992s390_stub_frame_prev_register (struct frame_info *this_frame,
1993 void **this_prologue_cache, int regnum)
8e645ae7
AC
1994{
1995 struct s390_stub_unwind_cache *info
f089c433 1996 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 1997 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1998}
1999
f089c433
UW
2000static int
2001s390_stub_frame_sniffer (const struct frame_unwind *self,
2002 struct frame_info *this_frame,
2003 void **this_prologue_cache)
a8c99f38 2004{
93d42b30 2005 CORE_ADDR addr_in_block;
8e645ae7
AC
2006 bfd_byte insn[S390_MAX_INSTR_SIZE];
2007
2008 /* If the current PC points to non-readable memory, we assume we
2009 have trapped due to an invalid function pointer call. We handle
2010 the non-existing current function like a PLT stub. */
f089c433 2011 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2012 if (in_plt_section (addr_in_block)
f089c433
UW
2013 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2014 return 1;
2015 return 0;
a8c99f38 2016}
5769d3cd 2017
f089c433
UW
2018static const struct frame_unwind s390_stub_frame_unwind = {
2019 NORMAL_FRAME,
8fbca658 2020 default_frame_unwind_stop_reason,
f089c433
UW
2021 s390_stub_frame_this_id,
2022 s390_stub_frame_prev_register,
2023 NULL,
2024 s390_stub_frame_sniffer
2025};
2026
5769d3cd 2027
a8c99f38 2028/* Signal trampoline stack frames. */
5769d3cd 2029
a8c99f38
JB
2030struct s390_sigtramp_unwind_cache {
2031 CORE_ADDR frame_base;
2032 struct trad_frame_saved_reg *saved_regs;
2033};
5769d3cd 2034
a8c99f38 2035static struct s390_sigtramp_unwind_cache *
f089c433 2036s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2037 void **this_prologue_cache)
5769d3cd 2038{
f089c433 2039 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2040 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2041 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2042 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2043 struct s390_sigtramp_unwind_cache *info;
2044 ULONGEST this_sp, prev_sp;
7803799a 2045 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2046 int i;
2047
2048 if (*this_prologue_cache)
2049 return *this_prologue_cache;
5769d3cd 2050
a8c99f38
JB
2051 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2052 *this_prologue_cache = info;
f089c433 2053 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2054
f089c433
UW
2055 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2056 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2057 next_cfa = this_sp + 16*word_size + 32;
2058
2059 /* New-style RT frame:
2060 retcode + alignment (8 bytes)
2061 siginfo (128 bytes)
c378eb4e 2062 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2063 if (next_ra == next_cfa)
2064 {
f0f63663 2065 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2066 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2067 upper GPR halves if present. */
2068 sigreg_high_off = 8;
a8c99f38
JB
2069 }
2070
2071 /* Old-style RT frame and all non-RT frames:
2072 old signal mask (8 bytes)
c378eb4e 2073 pointer to sigregs. */
5769d3cd
AC
2074 else
2075 {
e17a4113
UW
2076 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2077 word_size, byte_order);
7803799a
UW
2078 /* sigregs are followed by signo (4 bytes), then by the
2079 upper GPR halves if present. */
2080 sigreg_high_off = 4;
a8c99f38 2081 }
5769d3cd 2082
a8c99f38 2083 /* The sigregs structure looks like this:
34201ae3
UW
2084 long psw_mask;
2085 long psw_addr;
2086 long gprs[16];
2087 int acrs[16];
2088 int fpc;
2089 int __pad;
2090 double fprs[16]; */
5769d3cd 2091
7803799a
UW
2092 /* PSW mask and address. */
2093 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2094 sigreg_ptr += word_size;
7803799a 2095 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2096 sigreg_ptr += word_size;
2097
2098 /* Then the GPRs. */
2099 for (i = 0; i < 16; i++)
2100 {
2101 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2102 sigreg_ptr += word_size;
2103 }
2104
2105 /* Then the ACRs. */
2106 for (i = 0; i < 16; i++)
2107 {
2108 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2109 sigreg_ptr += 4;
5769d3cd 2110 }
5769d3cd 2111
a8c99f38
JB
2112 /* The floating-point control word. */
2113 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2114 sigreg_ptr += 8;
5769d3cd 2115
a8c99f38
JB
2116 /* And finally the FPRs. */
2117 for (i = 0; i < 16; i++)
2118 {
2119 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2120 sigreg_ptr += 8;
2121 }
2122
7803799a
UW
2123 /* If we have them, the GPR upper halves are appended at the end. */
2124 sigreg_ptr += sigreg_high_off;
2125 if (tdep->gpr_full_regnum != -1)
2126 for (i = 0; i < 16; i++)
2127 {
34201ae3 2128 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2129 sigreg_ptr += 4;
2130 }
2131
a8c99f38
JB
2132 /* Restore the previous frame's SP. */
2133 prev_sp = read_memory_unsigned_integer (
2134 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2135 word_size, byte_order);
5769d3cd 2136
a8c99f38
JB
2137 /* Determine our frame base. */
2138 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2139
a8c99f38 2140 return info;
5769d3cd
AC
2141}
2142
a8c99f38 2143static void
f089c433 2144s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2145 void **this_prologue_cache,
2146 struct frame_id *this_id)
5769d3cd 2147{
a8c99f38 2148 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2149 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2150 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2151}
2152
f089c433
UW
2153static struct value *
2154s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2155 void **this_prologue_cache, int regnum)
a8c99f38
JB
2156{
2157 struct s390_sigtramp_unwind_cache *info
f089c433 2158 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2159 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2160}
2161
f089c433
UW
2162static int
2163s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2164 struct frame_info *this_frame,
2165 void **this_prologue_cache)
5769d3cd 2166{
f089c433 2167 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2168 bfd_byte sigreturn[2];
4c8287ac 2169
8defab1a 2170 if (target_read_memory (pc, sigreturn, 2))
f089c433 2171 return 0;
4c8287ac 2172
237b092b 2173 if (sigreturn[0] != op_svc)
f089c433 2174 return 0;
5769d3cd 2175
a8c99f38
JB
2176 if (sigreturn[1] != 119 /* sigreturn */
2177 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2178 return 0;
34201ae3 2179
f089c433 2180 return 1;
5769d3cd
AC
2181}
2182
f089c433
UW
2183static const struct frame_unwind s390_sigtramp_frame_unwind = {
2184 SIGTRAMP_FRAME,
8fbca658 2185 default_frame_unwind_stop_reason,
f089c433
UW
2186 s390_sigtramp_frame_this_id,
2187 s390_sigtramp_frame_prev_register,
2188 NULL,
2189 s390_sigtramp_frame_sniffer
2190};
2191
237b092b
AA
2192/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2193 upon error. */
2194
2195static LONGEST
2196s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2197 ptid_t ptid)
2198{
2199 struct regcache *regs = get_thread_regcache (ptid);
2200 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2201 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2202 ULONGEST pc;
2203 ULONGEST svc_number = -1;
2204 unsigned opcode;
2205
2206 /* Assume that the PC points after the 2-byte SVC instruction. We
2207 don't currently support SVC via EXECUTE. */
2208 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2209 pc -= 2;
2210 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2211 if (opcode != op_svc)
2212 return -1;
2213
2214 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2215 byte_order);
2216 if (svc_number == 0)
2217 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2218
2219 return svc_number;
2220}
2221
4c8287ac 2222
a8c99f38
JB
2223/* Frame base handling. */
2224
2225static CORE_ADDR
f089c433 2226s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2227{
a8c99f38 2228 struct s390_unwind_cache *info
f089c433 2229 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2230 return info->frame_base;
2231}
2232
2233static CORE_ADDR
f089c433 2234s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2235{
2236 struct s390_unwind_cache *info
f089c433 2237 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2238 return info->local_base;
2239}
2240
2241static const struct frame_base s390_frame_base = {
2242 &s390_frame_unwind,
2243 s390_frame_base_address,
2244 s390_local_base_address,
2245 s390_local_base_address
2246};
2247
2248static CORE_ADDR
2249s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2250{
7803799a 2251 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2252 ULONGEST pc;
7803799a 2253 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2254 return gdbarch_addr_bits_remove (gdbarch, pc);
2255}
2256
2257static CORE_ADDR
2258s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2259{
2260 ULONGEST sp;
2261 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2262 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2263}
2264
2265
a431654a
AC
2266/* DWARF-2 frame support. */
2267
7803799a
UW
2268static struct value *
2269s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2270 int regnum)
2271{
d6db1fab 2272 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2273}
2274
a431654a
AC
2275static void
2276s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2277 struct dwarf2_frame_state_reg *reg,
4a4e5149 2278 struct frame_info *this_frame)
a431654a
AC
2279{
2280 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2281
d6db1fab
UW
2282 /* The condition code (and thus PSW mask) is call-clobbered. */
2283 if (regnum == S390_PSWM_REGNUM)
2284 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2285
2286 /* The PSW address unwinds to the return address. */
2287 else if (regnum == S390_PSWA_REGNUM)
2288 reg->how = DWARF2_FRAME_REG_RA;
2289
7803799a
UW
2290 /* Fixed registers are call-saved or call-clobbered
2291 depending on the ABI in use. */
d6db1fab 2292 else if (regnum < S390_NUM_REGS)
a431654a 2293 {
7803799a 2294 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2295 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2296 else
a431654a 2297 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2298 }
a431654a 2299
d6db1fab
UW
2300 /* We install a special function to unwind pseudos. */
2301 else
7803799a
UW
2302 {
2303 reg->how = DWARF2_FRAME_REG_FN;
2304 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2305 }
2306}
2307
2308
b0cf273e
JB
2309/* Dummy function calls. */
2310
78f8b424
JB
2311/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2312 "Integer-like" types are those that should be passed the way
2313 integers are: integers, enums, ranges, characters, and booleans. */
2314static int
2315is_integer_like (struct type *type)
2316{
2317 enum type_code code = TYPE_CODE (type);
2318
2319 return (code == TYPE_CODE_INT
34201ae3
UW
2320 || code == TYPE_CODE_ENUM
2321 || code == TYPE_CODE_RANGE
2322 || code == TYPE_CODE_CHAR
2323 || code == TYPE_CODE_BOOL);
78f8b424
JB
2324}
2325
78f8b424
JB
2326/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2327 "Pointer-like" types are those that should be passed the way
2328 pointers are: pointers and references. */
2329static int
2330is_pointer_like (struct type *type)
2331{
2332 enum type_code code = TYPE_CODE (type);
2333
2334 return (code == TYPE_CODE_PTR
34201ae3 2335 || code == TYPE_CODE_REF);
78f8b424
JB
2336}
2337
2338
20a940cc
JB
2339/* Return non-zero if TYPE is a `float singleton' or `double
2340 singleton', zero otherwise.
2341
2342 A `T singleton' is a struct type with one member, whose type is
2343 either T or a `T singleton'. So, the following are all float
2344 singletons:
2345
2346 struct { float x };
2347 struct { struct { float x; } x; };
2348 struct { struct { struct { float x; } x; } x; };
2349
2350 ... and so on.
2351
b0cf273e
JB
2352 All such structures are passed as if they were floats or doubles,
2353 as the (revised) ABI says. */
20a940cc
JB
2354static int
2355is_float_singleton (struct type *type)
2356{
b0cf273e
JB
2357 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2358 {
2359 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2360 CHECK_TYPEDEF (singleton_type);
2361
2362 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2363 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2364 || is_float_singleton (singleton_type));
2365 }
2366
2367 return 0;
20a940cc
JB
2368}
2369
2370
2371/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2372 "Struct-like" types are those that should be passed as structs are:
2373 structs and unions.
2374
2375 As an odd quirk, not mentioned in the ABI, GCC passes float and
2376 double singletons as if they were a plain float, double, etc. (The
2377 corresponding union types are handled normally.) So we exclude
2378 those types here. *shrug* */
2379static int
2380is_struct_like (struct type *type)
2381{
2382 enum type_code code = TYPE_CODE (type);
2383
2384 return (code == TYPE_CODE_UNION
34201ae3 2385 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
20a940cc
JB
2386}
2387
2388
2389/* Return non-zero if TYPE is a float-like type, zero otherwise.
2390 "Float-like" types are those that should be passed as
2391 floating-point values are.
2392
2393 You'd think this would just be floats, doubles, long doubles, etc.
2394 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2395 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2396 corresponding union types are handled normally.) So we include
20a940cc
JB
2397 those types here. *shrug* */
2398static int
2399is_float_like (struct type *type)
2400{
2401 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2402 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
34201ae3 2403 || is_float_singleton (type));
20a940cc
JB
2404}
2405
2406
78f8b424 2407static int
b0cf273e 2408is_power_of_two (unsigned int n)
78f8b424 2409{
b0cf273e 2410 return ((n & (n - 1)) == 0);
78f8b424
JB
2411}
2412
b0cf273e
JB
2413/* Return non-zero if TYPE should be passed as a pointer to a copy,
2414 zero otherwise. */
4d819d0e 2415static int
b0cf273e 2416s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2417{
354ecfd5 2418 if (TYPE_LENGTH (type) > 8)
b0cf273e 2419 return 1;
4d819d0e 2420
56b9d9ac
UW
2421 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2422 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2423 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2424}
2425
b0cf273e
JB
2426/* Return non-zero if TYPE should be passed in a float register
2427 if possible. */
78f8b424 2428static int
b0cf273e 2429s390_function_arg_float (struct type *type)
78f8b424 2430{
354ecfd5 2431 if (TYPE_LENGTH (type) > 8)
b0cf273e 2432 return 0;
78f8b424 2433
b0cf273e 2434 return is_float_like (type);
4d819d0e
JB
2435}
2436
b0cf273e
JB
2437/* Return non-zero if TYPE should be passed in an integer register
2438 (or a pair of integer registers) if possible. */
78f8b424 2439static int
b0cf273e 2440s390_function_arg_integer (struct type *type)
78f8b424 2441{
354ecfd5 2442 if (TYPE_LENGTH (type) > 8)
b0cf273e 2443 return 0;
78f8b424 2444
b0cf273e
JB
2445 return is_integer_like (type)
2446 || is_pointer_like (type)
354ecfd5 2447 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2448}
2449
78f8b424
JB
2450/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2451 word as required for the ABI. */
2452static LONGEST
e17a4113 2453extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2454{
e17a4113 2455 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2456 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2457
2458 /* Even structs get passed in the least significant bits of the
2459 register / memory word. It's not really right to extract them as
2460 an integer, but it does take care of the extension. */
2461 if (TYPE_UNSIGNED (type))
0fd88904 2462 return extract_unsigned_integer (value_contents (arg),
34201ae3 2463 TYPE_LENGTH (type), byte_order);
78f8b424 2464 else
0fd88904 2465 return extract_signed_integer (value_contents (arg),
34201ae3 2466 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2467}
2468
2469
78f8b424
JB
2470/* Return the alignment required by TYPE. */
2471static int
2472alignment_of (struct type *type)
2473{
2474 int alignment;
2475
2476 if (is_integer_like (type)
2477 || is_pointer_like (type)
a16b8bcd
UW
2478 || TYPE_CODE (type) == TYPE_CODE_FLT
2479 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2480 alignment = TYPE_LENGTH (type);
2481 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
34201ae3 2482 || TYPE_CODE (type) == TYPE_CODE_UNION)
78f8b424
JB
2483 {
2484 int i;
2485
2486 alignment = 1;
2487 for (i = 0; i < TYPE_NFIELDS (type); i++)
34201ae3
UW
2488 {
2489 int field_alignment
56b9d9ac 2490 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424 2491
34201ae3
UW
2492 if (field_alignment > alignment)
2493 alignment = field_alignment;
2494 }
78f8b424
JB
2495 }
2496 else
2497 alignment = 1;
2498
2499 /* Check that everything we ever return is a power of two. Lots of
2500 code doesn't want to deal with aligning things to arbitrary
2501 boundaries. */
2502 gdb_assert ((alignment & (alignment - 1)) == 0);
2503
2504 return alignment;
2505}
2506
2507
2508/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2509 place to be passed to a function, as specified by the "GNU/Linux
2510 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2511
2512 SP is the current stack pointer. We must put arguments, links,
2513 padding, etc. whereever they belong, and return the new stack
2514 pointer value.
34201ae3 2515
78f8b424
JB
2516 If STRUCT_RETURN is non-zero, then the function we're calling is
2517 going to return a structure by value; STRUCT_ADDR is the address of
2518 a block we've allocated for it on the stack.
2519
2520 Our caller has taken care of any type promotions needed to satisfy
2521 prototypes or the old K&R argument-passing rules. */
a78f21af 2522static CORE_ADDR
7d9b040b 2523s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2524 struct regcache *regcache, CORE_ADDR bp_addr,
2525 int nargs, struct value **args, CORE_ADDR sp,
2526 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2527{
b0cf273e
JB
2528 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2529 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2530 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2531 int i;
5769d3cd 2532
78f8b424
JB
2533 /* If the i'th argument is passed as a reference to a copy, then
2534 copy_addr[i] is the address of the copy we made. */
2535 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2536
c0cc4c83 2537 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2538 for (i = 0; i < nargs; i++)
2539 {
2540 struct value *arg = args[i];
56b9d9ac 2541 struct type *type = check_typedef (value_type (arg));
5769d3cd 2542
b0cf273e 2543 if (s390_function_arg_pass_by_reference (type))
34201ae3
UW
2544 {
2545 sp -= TYPE_LENGTH (type);
2546 sp = align_down (sp, alignment_of (type));
2547 copy_addr[i] = sp;
2548 }
5769d3cd 2549 }
5769d3cd 2550
78f8b424
JB
2551 /* Reserve space for the parameter area. As a conservative
2552 simplification, we assume that everything will be passed on the
34201ae3 2553 stack. Since every argument larger than 8 bytes will be
b0cf273e
JB
2554 passed by reference, we use this simple upper bound. */
2555 sp -= nargs * 8;
78f8b424 2556
78f8b424
JB
2557 /* After all that, make sure it's still aligned on an eight-byte
2558 boundary. */
5b03f266 2559 sp = align_down (sp, 8);
78f8b424 2560
c0cc4c83
UW
2561 /* Allocate the standard frame areas: the register save area, the
2562 word reserved for the compiler (which seems kind of meaningless),
2563 and the back chain pointer. */
2564 sp -= 16*word_size + 32;
2565
2566 /* Now we have the final SP value. Make sure we didn't underflow;
2567 on 31-bit, this would result in addresses with the high bit set,
2568 which causes confusion elsewhere. Note that if we error out
2569 here, stack and registers remain untouched. */
2570 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2571 error (_("Stack overflow"));
2572
2573
78f8b424
JB
2574 /* Finally, place the actual parameters, working from SP towards
2575 higher addresses. The code above is supposed to reserve enough
2576 space for this. */
2577 {
2578 int fr = 0;
2579 int gr = 2;
c0cc4c83 2580 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2581
b0cf273e 2582 /* A struct is returned using general register 2. */
4d819d0e 2583 if (struct_return)
b0cf273e
JB
2584 {
2585 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2586 struct_addr);
b0cf273e
JB
2587 gr++;
2588 }
4d819d0e 2589
78f8b424
JB
2590 for (i = 0; i < nargs; i++)
2591 {
34201ae3
UW
2592 struct value *arg = args[i];
2593 struct type *type = check_typedef (value_type (arg));
2594 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2595
2596 if (s390_function_arg_pass_by_reference (type))
2597 {
c0cc4c83
UW
2598 /* Actually copy the argument contents to the stack slot
2599 that was reserved above. */
2600 write_memory (copy_addr[i], value_contents (arg), length);
2601
b0cf273e
JB
2602 if (gr <= 6)
2603 {
2604 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2605 copy_addr[i]);
b0cf273e
JB
2606 gr++;
2607 }
2608 else
2609 {
e17a4113
UW
2610 write_memory_unsigned_integer (starg, word_size, byte_order,
2611 copy_addr[i]);
b0cf273e
JB
2612 starg += word_size;
2613 }
2614 }
2615 else if (s390_function_arg_float (type))
2616 {
2617 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2618 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2619 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2620 {
2621 /* When we store a single-precision value in an FP register,
2622 it occupies the leftmost bits. */
2623 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2624 0, length, value_contents (arg));
b0cf273e
JB
2625 fr += 2;
2626 }
2627 else
2628 {
2629 /* When we store a single-precision value in a stack slot,
2630 it occupies the rightmost bits. */
2631 starg = align_up (starg + length, word_size);
34201ae3 2632 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2633 }
2634 }
2635 else if (s390_function_arg_integer (type) && length <= word_size)
2636 {
2637 if (gr <= 6)
2638 {
2639 /* Integer arguments are always extended to word size. */
2640 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2641 extend_simple_arg (gdbarch,
2642 arg));
b0cf273e
JB
2643 gr++;
2644 }
2645 else
2646 {
2647 /* Integer arguments are always extended to word size. */
e17a4113 2648 write_memory_signed_integer (starg, word_size, byte_order,
34201ae3
UW
2649 extend_simple_arg (gdbarch, arg));
2650 starg += word_size;
b0cf273e
JB
2651 }
2652 }
2653 else if (s390_function_arg_integer (type) && length == 2*word_size)
2654 {
2655 if (gr <= 5)
2656 {
2657 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2658 value_contents (arg));
b0cf273e 2659 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2660 value_contents (arg) + word_size);
b0cf273e
JB
2661 gr += 2;
2662 }
2663 else
2664 {
2665 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2666 in it, then don't go back and use it again later. */
2667 gr = 7;
2668
0fd88904 2669 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2670 starg += length;
2671 }
2672 }
2673 else
e2e0b3e5 2674 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2675 }
2676 }
2677
8de7d199
UW
2678 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2679 if (word_size == 4)
2680 {
2681 ULONGEST pswa;
2682 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2683 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2684 }
b0cf273e 2685 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2686
b0cf273e
JB
2687 /* Store updated stack pointer. */
2688 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2689
a8c99f38 2690 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2691 which is actually the top of the register save area. */
2692 return sp + 16*word_size + 32;
5769d3cd
AC
2693}
2694
f089c433 2695/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2696 dummy frame. The frame ID's base needs to match the TOS value
2697 returned by push_dummy_call, and the PC match the dummy frame's
2698 breakpoint. */
2699static struct frame_id
f089c433 2700s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2701{
a8c99f38 2702 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2703 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2704 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2705
121d8485 2706 return frame_id_build (sp + 16*word_size + 32,
34201ae3 2707 get_frame_pc (this_frame));
b0cf273e 2708}
c8f9d51c 2709
4074e13c
JB
2710static CORE_ADDR
2711s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2712{
2713 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2714 always be aligned on an eight-byte boundary. */
2715 return (addr & -8);
2716}
2717
2718
b0cf273e
JB
2719/* Function return value access. */
2720
2721static enum return_value_convention
2722s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2723{
354ecfd5 2724 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2725 return RETURN_VALUE_STRUCT_CONVENTION;
2726
2727 switch (TYPE_CODE (type))
2728 {
2729 case TYPE_CODE_STRUCT:
2730 case TYPE_CODE_UNION:
2731 case TYPE_CODE_ARRAY:
56b9d9ac 2732 case TYPE_CODE_COMPLEX:
b0cf273e 2733 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2734
b0cf273e
JB
2735 default:
2736 return RETURN_VALUE_REGISTER_CONVENTION;
2737 }
c8f9d51c
JB
2738}
2739
b0cf273e 2740static enum return_value_convention
6a3a010b 2741s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2742 struct type *type, struct regcache *regcache,
2743 gdb_byte *out, const gdb_byte *in)
5769d3cd 2744{
e17a4113 2745 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2746 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2747 enum return_value_convention rvc;
2748 int length;
2749
2750 type = check_typedef (type);
2751 rvc = s390_return_value_convention (gdbarch, type);
2752 length = TYPE_LENGTH (type);
2753
b0cf273e
JB
2754 if (in)
2755 {
2756 switch (rvc)
2757 {
2758 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2759 if (TYPE_CODE (type) == TYPE_CODE_FLT
2760 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2761 {
2762 /* When we store a single-precision value in an FP register,
2763 it occupies the leftmost bits. */
34201ae3 2764 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2765 0, length, in);
2766 }
2767 else if (length <= word_size)
2768 {
2769 /* Integer arguments are always extended to word size. */
2770 if (TYPE_UNSIGNED (type))
2771 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2772 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2773 else
2774 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2775 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2776 }
2777 else if (length == 2*word_size)
2778 {
2779 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2780 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2781 }
2782 else
e2e0b3e5 2783 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2784 break;
2785
2786 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2787 error (_("Cannot set function return value."));
b0cf273e
JB
2788 break;
2789 }
2790 }
2791 else if (out)
2792 {
2793 switch (rvc)
2794 {
2795 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2796 if (TYPE_CODE (type) == TYPE_CODE_FLT
2797 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2798 {
2799 /* When we store a single-precision value in an FP register,
2800 it occupies the leftmost bits. */
34201ae3 2801 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2802 0, length, out);
2803 }
2804 else if (length <= word_size)
2805 {
2806 /* Integer arguments occupy the rightmost bits. */
34201ae3 2807 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
b0cf273e
JB
2808 word_size - length, length, out);
2809 }
2810 else if (length == 2*word_size)
2811 {
2812 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2813 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2814 }
2815 else
e2e0b3e5 2816 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2817 break;
5769d3cd 2818
b0cf273e 2819 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2820 error (_("Function return value unknown."));
b0cf273e
JB
2821 break;
2822 }
2823 }
2824
2825 return rvc;
2826}
5769d3cd
AC
2827
2828
a8c99f38
JB
2829/* Breakpoints. */
2830
43af2100 2831static const gdb_byte *
c378eb4e
MS
2832s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2833 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2834{
43af2100 2835 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2836
2837 *lenptr = sizeof (breakpoint);
2838 return breakpoint;
2839}
2840
5769d3cd 2841
a8c99f38 2842/* Address handling. */
5769d3cd
AC
2843
2844static CORE_ADDR
24568a2c 2845s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2846{
a8c99f38 2847 return addr & 0x7fffffff;
5769d3cd
AC
2848}
2849
ffc65945
KB
2850static int
2851s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2852{
2853 if (byte_size == 4)
119ac181 2854 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2855 else
2856 return 0;
2857}
2858
2859static const char *
2860s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2861{
119ac181 2862 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2863 return "mode32";
2864 else
2865 return NULL;
2866}
2867
a78f21af 2868static int
c378eb4e
MS
2869s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2870 const char *name,
ffc65945
KB
2871 int *type_flags_ptr)
2872{
2873 if (strcmp (name, "mode32") == 0)
2874 {
119ac181 2875 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2876 return 1;
2877 }
2878 else
2879 return 0;
2880}
2881
55aa24fb
SDJ
2882/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2883 gdbarch.h. */
2884
2885static int
2886s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2887{
2888 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2889 or indirection. */
2890 || *s == '%' /* Register access. */
2891 || isdigit (*s)); /* Literal number. */
2892}
2893
a8c99f38
JB
2894/* Set up gdbarch struct. */
2895
a78f21af 2896static struct gdbarch *
5769d3cd
AC
2897s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2898{
7803799a
UW
2899 const struct target_desc *tdesc = info.target_desc;
2900 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2901 struct gdbarch *gdbarch;
2902 struct gdbarch_tdep *tdep;
7803799a
UW
2903 int tdep_abi;
2904 int have_upper = 0;
c642a434
UW
2905 int have_linux_v1 = 0;
2906 int have_linux_v2 = 0;
7803799a 2907 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
2908 static const char *const stap_register_prefixes[] = { "%", NULL };
2909 static const char *const stap_register_indirection_prefixes[] = { "(",
2910 NULL };
2911 static const char *const stap_register_indirection_suffixes[] = { ")",
2912 NULL };
7803799a
UW
2913
2914 /* Default ABI and register size. */
2915 switch (info.bfd_arch_info->mach)
2916 {
2917 case bfd_mach_s390_31:
2918 tdep_abi = ABI_LINUX_S390;
2919 break;
2920
2921 case bfd_mach_s390_64:
2922 tdep_abi = ABI_LINUX_ZSERIES;
2923 break;
2924
2925 default:
2926 return NULL;
2927 }
2928
2929 /* Use default target description if none provided by the target. */
2930 if (!tdesc_has_registers (tdesc))
2931 {
2932 if (tdep_abi == ABI_LINUX_S390)
2933 tdesc = tdesc_s390_linux32;
2934 else
2935 tdesc = tdesc_s390x_linux64;
2936 }
2937
2938 /* Check any target description for validity. */
2939 if (tdesc_has_registers (tdesc))
2940 {
2941 static const char *const gprs[] = {
2942 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2943 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2944 };
2945 static const char *const fprs[] = {
2946 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2947 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
2948 };
2949 static const char *const acrs[] = {
2950 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
2951 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
2952 };
2953 static const char *const gprs_lower[] = {
2954 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
2955 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
2956 };
2957 static const char *const gprs_upper[] = {
2958 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
2959 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
2960 };
4ac33720
UW
2961 static const char *const tdb_regs[] = {
2962 "tdb0", "tac", "tct", "atia",
2963 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
2964 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
2965 };
7803799a
UW
2966 const struct tdesc_feature *feature;
2967 int i, valid_p = 1;
2968
2969 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
2970 if (feature == NULL)
2971 return NULL;
2972
2973 tdesc_data = tdesc_data_alloc ();
2974
2975 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2976 S390_PSWM_REGNUM, "pswm");
2977 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2978 S390_PSWA_REGNUM, "pswa");
2979
2980 if (tdesc_unnumbered_register (feature, "r0"))
2981 {
2982 for (i = 0; i < 16; i++)
2983 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2984 S390_R0_REGNUM + i, gprs[i]);
2985 }
2986 else
2987 {
2988 have_upper = 1;
2989
2990 for (i = 0; i < 16; i++)
2991 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2992 S390_R0_REGNUM + i,
2993 gprs_lower[i]);
2994 for (i = 0; i < 16; i++)
2995 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2996 S390_R0_UPPER_REGNUM + i,
2997 gprs_upper[i]);
2998 }
2999
3000 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3001 if (feature == NULL)
3002 {
3003 tdesc_data_cleanup (tdesc_data);
3004 return NULL;
3005 }
3006
3007 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3008 S390_FPC_REGNUM, "fpc");
3009 for (i = 0; i < 16; i++)
3010 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3011 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3012
7803799a
UW
3013 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3014 if (feature == NULL)
3015 {
3016 tdesc_data_cleanup (tdesc_data);
3017 return NULL;
3018 }
3019
3020 for (i = 0; i < 16; i++)
3021 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3022 S390_A0_REGNUM + i, acrs[i]);
3023
94eae614 3024 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3025 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3026 if (feature)
3027 {
3028 tdesc_numbered_register (feature, tdesc_data,
3029 S390_ORIG_R2_REGNUM, "orig_r2");
3030
3031 if (tdesc_numbered_register (feature, tdesc_data,
3032 S390_LAST_BREAK_REGNUM, "last_break"))
3033 have_linux_v1 = 1;
3034
3035 if (tdesc_numbered_register (feature, tdesc_data,
3036 S390_SYSTEM_CALL_REGNUM, "system_call"))
3037 have_linux_v2 = 1;
3038
3039 if (have_linux_v2 > have_linux_v1)
3040 valid_p = 0;
3041 }
3042
4ac33720
UW
3043 /* Transaction diagnostic block. */
3044 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3045 if (feature)
3046 {
3047 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3048 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3049 S390_TDB_DWORD0_REGNUM + i,
3050 tdb_regs[i]);
3051 }
3052
7803799a
UW
3053 if (!valid_p)
3054 {
3055 tdesc_data_cleanup (tdesc_data);
3056 return NULL;
3057 }
3058 }
5769d3cd 3059
7803799a
UW
3060 /* Find a candidate among extant architectures. */
3061 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3062 arches != NULL;
3063 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3064 {
3065 tdep = gdbarch_tdep (arches->gdbarch);
3066 if (!tdep)
3067 continue;
3068 if (tdep->abi != tdep_abi)
3069 continue;
3070 if ((tdep->gpr_full_regnum != -1) != have_upper)
3071 continue;
3072 if (tdesc_data != NULL)
3073 tdesc_data_cleanup (tdesc_data);
3074 return arches->gdbarch;
3075 }
5769d3cd 3076
7803799a 3077 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 3078 tdep = XCNEW (struct gdbarch_tdep);
7803799a 3079 tdep->abi = tdep_abi;
d0f54f9d 3080 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3081
3082 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3083 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3084
1de90795
UW
3085 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3086 We can safely let them default to 128-bit, since the debug info
3087 will give the size of type actually used in each case. */
3088 set_gdbarch_long_double_bit (gdbarch, 128);
3089 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3090
aaab4dba 3091 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3092 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3093 always. */
5769d3cd 3094 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3095 /* Stack grows downward. */
3096 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3097 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3098 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3099 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3100
7803799a 3101 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3102 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3103 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3104 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3105 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3106 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d 3107 set_gdbarch_regset_from_core_section (gdbarch,
34201ae3 3108 s390_regset_from_core_section);
7803799a 3109 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3110 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3111 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3112 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3113 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3114 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3115 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3116 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 3117 s390_pseudo_register_reggroup_p);
7803799a
UW
3118 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3119
3120 /* Assign pseudo register numbers. */
3121 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3122 last_pseudo_reg = first_pseudo_reg;
3123 tdep->gpr_full_regnum = -1;
3124 if (have_upper)
3125 {
3126 tdep->gpr_full_regnum = last_pseudo_reg;
3127 last_pseudo_reg += 16;
3128 }
3129 tdep->pc_regnum = last_pseudo_reg++;
3130 tdep->cc_regnum = last_pseudo_reg++;
3131 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3132 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3133
b0cf273e
JB
3134 /* Inferior function calls. */
3135 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3136 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3137 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3138 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3139
237b092b
AA
3140 /* Syscall handling. */
3141 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3142
a8c99f38 3143 /* Frame handling. */
a431654a 3144 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3145 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3146 dwarf2_append_unwinders (gdbarch);
a431654a 3147 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3148 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3149 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3150 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3151 frame_base_set_default (gdbarch, &s390_frame_base);
3152 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3153 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3154
1db4e8a0
UW
3155 /* Displaced stepping. */
3156 set_gdbarch_displaced_step_copy_insn (gdbarch,
34201ae3 3157 simple_displaced_step_copy_insn);
1db4e8a0
UW
3158 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3159 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 3160 simple_displaced_step_free_closure);
1db4e8a0 3161 set_gdbarch_displaced_step_location (gdbarch,
34201ae3 3162 displaced_step_at_entry_point);
1db4e8a0
UW
3163 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3164
70728992
PA
3165 /* Note that GNU/Linux is the only OS supported on this
3166 platform. */
3167 linux_init_abi (info, gdbarch);
3168
7803799a 3169 switch (tdep->abi)
5769d3cd 3170 {
7803799a 3171 case ABI_LINUX_S390:
d0f54f9d
JB
3172 tdep->gregset = &s390_gregset;
3173 tdep->sizeof_gregset = s390_sizeof_gregset;
3174 tdep->fpregset = &s390_fpregset;
3175 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3176
3177 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3178 set_solib_svr4_fetch_link_map_offsets
3179 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 3180
237b092b
AA
3181 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
3182
c642a434
UW
3183 if (have_upper)
3184 {
3185 if (have_linux_v2)
3186 set_gdbarch_core_regset_sections (gdbarch,
3187 s390_linux64v2_regset_sections);
3188 else if (have_linux_v1)
3189 set_gdbarch_core_regset_sections (gdbarch,
3190 s390_linux64v1_regset_sections);
3191 else
3192 set_gdbarch_core_regset_sections (gdbarch,
3193 s390_linux64_regset_sections);
3194 }
3195 else
3196 {
3197 if (have_linux_v2)
3198 set_gdbarch_core_regset_sections (gdbarch,
3199 s390_linux32v2_regset_sections);
3200 else if (have_linux_v1)
3201 set_gdbarch_core_regset_sections (gdbarch,
3202 s390_linux32v1_regset_sections);
3203 else
3204 set_gdbarch_core_regset_sections (gdbarch,
3205 s390_linux32_regset_sections);
3206 }
5769d3cd 3207 break;
b0cf273e 3208
7803799a 3209 case ABI_LINUX_ZSERIES:
99b7da5d 3210 tdep->gregset = &s390_gregset;
d0f54f9d
JB
3211 tdep->sizeof_gregset = s390x_sizeof_gregset;
3212 tdep->fpregset = &s390_fpregset;
3213 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3214
3215 set_gdbarch_long_bit (gdbarch, 64);
3216 set_gdbarch_long_long_bit (gdbarch, 64);
3217 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3218 set_solib_svr4_fetch_link_map_offsets
3219 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 3220 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 3221 s390_address_class_type_flags);
ffc65945 3222 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 3223 s390_address_class_type_flags_to_name);
ffc65945 3224 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 3225 s390_address_class_name_to_type_flags);
c642a434 3226
237b092b
AA
3227 set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390);
3228
c642a434
UW
3229 if (have_linux_v2)
3230 set_gdbarch_core_regset_sections (gdbarch,
3231 s390x_linux64v2_regset_sections);
3232 else if (have_linux_v1)
3233 set_gdbarch_core_regset_sections (gdbarch,
3234 s390x_linux64v1_regset_sections);
3235 else
3236 set_gdbarch_core_regset_sections (gdbarch,
3237 s390x_linux64_regset_sections);
5769d3cd
AC
3238 break;
3239 }
3240
36482093
AC
3241 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3242
982e9687
UW
3243 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3244
b2756930
KB
3245 /* Enable TLS support. */
3246 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 3247 svr4_fetch_objfile_link_map);
b2756930 3248
1dd635ac
UW
3249 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3250
55aa24fb 3251 /* SystemTap functions. */
05c0465e
SDJ
3252 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3253 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3254 stap_register_indirection_prefixes);
3255 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3256 stap_register_indirection_suffixes);
55aa24fb
SDJ
3257 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3258
5769d3cd
AC
3259 return gdbarch;
3260}
3261
3262
a78f21af
AC
3263extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3264
5769d3cd 3265void
5ae5f592 3266_initialize_s390_tdep (void)
5769d3cd 3267{
5769d3cd
AC
3268 /* Hook us into the gdbarch mechanism. */
3269 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3270
94eae614 3271 /* Initialize the GNU/Linux target descriptions. */
7803799a 3272 initialize_tdesc_s390_linux32 ();
c642a434
UW
3273 initialize_tdesc_s390_linux32v1 ();
3274 initialize_tdesc_s390_linux32v2 ();
7803799a 3275 initialize_tdesc_s390_linux64 ();
c642a434
UW
3276 initialize_tdesc_s390_linux64v1 ();
3277 initialize_tdesc_s390_linux64v2 ();
4ac33720 3278 initialize_tdesc_s390_te_linux64 ();
7803799a 3279 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3280 initialize_tdesc_s390x_linux64v1 ();
3281 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3282 initialize_tdesc_s390x_te_linux64 ();
5769d3cd 3283}