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5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
32d0add0 3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
4ac33720 47#include "auxv.h"
237b092b 48#include "xml-syscall.h"
5769d3cd 49
55aa24fb
SDJ
50#include "stap-probe.h"
51#include "ax.h"
52#include "ax-gdb.h"
53#include "user-regs.h"
54#include "cli/cli-utils.h"
55#include <ctype.h>
04a83fee 56#include "elf/common.h"
55aa24fb 57
7803799a 58#include "features/s390-linux32.c"
c642a434
UW
59#include "features/s390-linux32v1.c"
60#include "features/s390-linux32v2.c"
7803799a 61#include "features/s390-linux64.c"
c642a434
UW
62#include "features/s390-linux64v1.c"
63#include "features/s390-linux64v2.c"
4ac33720 64#include "features/s390-te-linux64.c"
550bdf96
AA
65#include "features/s390-vx-linux64.c"
66#include "features/s390-tevx-linux64.c"
7803799a 67#include "features/s390x-linux64.c"
c642a434
UW
68#include "features/s390x-linux64v1.c"
69#include "features/s390x-linux64v2.c"
4ac33720 70#include "features/s390x-te-linux64.c"
550bdf96
AA
71#include "features/s390x-vx-linux64.c"
72#include "features/s390x-tevx-linux64.c"
7803799a 73
237b092b
AA
74#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
75#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
76
52059ffd
TT
77enum s390_abi_kind
78{
79 ABI_LINUX_S390,
80 ABI_LINUX_ZSERIES
81};
82
d0f54f9d
JB
83/* The tdep structure. */
84
85struct gdbarch_tdep
5769d3cd 86{
b0cf273e 87 /* ABI version. */
52059ffd 88 enum s390_abi_kind abi;
b0cf273e 89
7803799a
UW
90 /* Pseudo register numbers. */
91 int gpr_full_regnum;
92 int pc_regnum;
93 int cc_regnum;
550bdf96 94 int v0_full_regnum;
7803799a 95
5aa82d05
AA
96 int have_linux_v1;
97 int have_linux_v2;
98 int have_tdb;
d0f54f9d
JB
99};
100
101
7803799a
UW
102/* ABI call-saved register information. */
103
104static int
105s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 106{
7803799a
UW
107 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
108
109 switch (tdep->abi)
6707b003 110 {
7803799a
UW
111 case ABI_LINUX_S390:
112 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
113 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
114 || regnum == S390_A0_REGNUM)
115 return 1;
6707b003 116
7803799a
UW
117 break;
118
119 case ABI_LINUX_ZSERIES:
120 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
121 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
122 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
123 return 1;
124
125 break;
126 }
127
128 return 0;
5769d3cd
AC
129}
130
c642a434
UW
131static int
132s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
133{
134 /* The last-break address is read-only. */
135 return regnum == S390_LAST_BREAK_REGNUM;
136}
137
138static void
139s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
140{
141 struct gdbarch *gdbarch = get_regcache_arch (regcache);
142 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
143
144 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
145
146 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
147 messing with the PC we just installed, if we happen to be within
148 an interrupted system call that the kernel wants to restart.
149
150 Note that after we return from the dummy call, the SYSTEM_CALL and
151 ORIG_R2 registers will be automatically restored, and the kernel
152 continues to restart the system call at this point. */
153 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
154 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
155}
156
7803799a 157
d0f54f9d
JB
158/* DWARF Register Mapping. */
159
2ccd1468 160static const short s390_dwarf_regmap[] =
d0f54f9d 161{
550bdf96 162 /* 0-15: General Purpose Registers. */
d0f54f9d
JB
163 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
164 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
165 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
166 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
167
550bdf96 168 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
d0f54f9d
JB
169 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
170 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
171 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
172 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
173
550bdf96 174 /* 32-47: Control Registers (not mapped). */
34201ae3
UW
175 -1, -1, -1, -1, -1, -1, -1, -1,
176 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d 177
550bdf96 178 /* 48-63: Access Registers. */
d0f54f9d
JB
179 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
180 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
181 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
182 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
183
550bdf96 184 /* 64-65: Program Status Word. */
d0f54f9d 185 S390_PSWM_REGNUM,
7803799a
UW
186 S390_PSWA_REGNUM,
187
550bdf96
AA
188 /* 66-67: Reserved. */
189 -1, -1,
190
191 /* 68-83: Vector Registers 16-31. */
192 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
193 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
194 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
195 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
196
197 /* End of "official" DWARF registers. The remainder of the map is
198 for GDB internal use only. */
199
7803799a
UW
200 /* GPR Lower Half Access. */
201 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
202 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
203 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
204 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
d0f54f9d
JB
205};
206
550bdf96
AA
207enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
208
d0f54f9d
JB
209/* Convert DWARF register number REG to the appropriate register
210 number used by GDB. */
a78f21af 211static int
d3f73121 212s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 213{
7803799a 214 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
550bdf96 215 int gdb_reg = -1;
7803799a 216
550bdf96
AA
217 /* In a 32-on-64 debug scenario, debug info refers to the full
218 64-bit GPRs. Note that call frame information still refers to
219 the 32-bit lower halves, because s390_adjust_frame_regnum uses
220 special register numbers to access GPRs. */
7803799a
UW
221 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
222 return tdep->gpr_full_regnum + reg;
d0f54f9d 223
16aff9a6 224 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
550bdf96
AA
225 gdb_reg = s390_dwarf_regmap[reg];
226
227 if (tdep->v0_full_regnum == -1)
228 {
229 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
230 gdb_reg = -1;
231 }
232 else
233 {
234 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
235 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
236 }
d0f54f9d 237
550bdf96 238 return gdb_reg;
7803799a 239}
d0f54f9d 240
7803799a
UW
241/* Translate a .eh_frame register to DWARF register, or adjust a
242 .debug_frame register. */
243static int
244s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
245{
246 /* See s390_dwarf_reg_to_regnum for comments. */
550bdf96 247 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
d0f54f9d
JB
248}
249
d0f54f9d 250
7803799a
UW
251/* Pseudo registers. */
252
2ccd1468
UW
253static int
254regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
255{
256 return (tdep->gpr_full_regnum != -1
257 && regnum >= tdep->gpr_full_regnum
258 && regnum <= tdep->gpr_full_regnum + 15);
259}
260
550bdf96
AA
261/* Check whether REGNUM indicates a full vector register (v0-v15).
262 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
263
264static int
265regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
266{
267 return (tdep->v0_full_regnum != -1
268 && regnum >= tdep->v0_full_regnum
269 && regnum <= tdep->v0_full_regnum + 15);
270}
271
87de11c0
AA
272/* Return the name of register REGNO. Return the empty string for
273 registers that shouldn't be visible. */
550bdf96
AA
274
275static const char *
276s390_register_name (struct gdbarch *gdbarch, int regnum)
277{
278 if (regnum >= S390_V0_LOWER_REGNUM
279 && regnum <= S390_V15_LOWER_REGNUM)
87de11c0 280 return "";
550bdf96
AA
281 return tdesc_register_name (gdbarch, regnum);
282}
283
7803799a
UW
284static const char *
285s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 286{
7803799a 287 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 288
7803799a
UW
289 if (regnum == tdep->pc_regnum)
290 return "pc";
d0f54f9d 291
7803799a
UW
292 if (regnum == tdep->cc_regnum)
293 return "cc";
d0f54f9d 294
2ccd1468 295 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
296 {
297 static const char *full_name[] = {
298 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
299 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
300 };
301 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 302 }
7803799a 303
550bdf96
AA
304 if (regnum_is_vxr_full (tdep, regnum))
305 {
306 static const char *full_name[] = {
307 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
308 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
309 };
310 return full_name[regnum - tdep->v0_full_regnum];
311 }
312
7803799a 313 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
314}
315
7803799a
UW
316static struct type *
317s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 318{
7803799a 319 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 320
7803799a
UW
321 if (regnum == tdep->pc_regnum)
322 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 323
7803799a
UW
324 if (regnum == tdep->cc_regnum)
325 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 326
2ccd1468 327 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
328 return builtin_type (gdbarch)->builtin_uint64;
329
550bdf96
AA
330 if (regnum_is_vxr_full (tdep, regnum))
331 return tdesc_find_type (gdbarch, "vec128");
332
7803799a 333 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
334}
335
05d1431c 336static enum register_status
7803799a
UW
337s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
338 int regnum, gdb_byte *buf)
d0f54f9d 339{
7803799a 340 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 341 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 342 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
343 ULONGEST val;
344
7803799a 345 if (regnum == tdep->pc_regnum)
d0f54f9d 346 {
05d1431c
PA
347 enum register_status status;
348
349 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
350 if (status == REG_VALID)
351 {
352 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
353 val &= 0x7fffffff;
354 store_unsigned_integer (buf, regsize, byte_order, val);
355 }
356 return status;
7803799a 357 }
d0f54f9d 358
7803799a
UW
359 if (regnum == tdep->cc_regnum)
360 {
05d1431c
PA
361 enum register_status status;
362
363 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
364 if (status == REG_VALID)
365 {
366 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
367 val = (val >> 12) & 3;
368 else
369 val = (val >> 44) & 3;
370 store_unsigned_integer (buf, regsize, byte_order, val);
371 }
372 return status;
7803799a 373 }
d0f54f9d 374
2ccd1468 375 if (regnum_is_gpr_full (tdep, regnum))
7803799a 376 {
05d1431c 377 enum register_status status;
7803799a 378 ULONGEST val_upper;
05d1431c 379
7803799a
UW
380 regnum -= tdep->gpr_full_regnum;
381
05d1431c
PA
382 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
383 if (status == REG_VALID)
384 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
385 &val_upper);
386 if (status == REG_VALID)
387 {
388 val |= val_upper << 32;
389 store_unsigned_integer (buf, regsize, byte_order, val);
390 }
391 return status;
d0f54f9d 392 }
7803799a 393
550bdf96
AA
394 if (regnum_is_vxr_full (tdep, regnum))
395 {
396 enum register_status status;
397
398 regnum -= tdep->v0_full_regnum;
399
400 status = regcache_raw_read (regcache, S390_F0_REGNUM + regnum, buf);
401 if (status == REG_VALID)
402 status = regcache_raw_read (regcache,
403 S390_V0_LOWER_REGNUM + regnum, buf + 8);
404 return status;
405 }
406
7803799a 407 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
408}
409
410static void
7803799a
UW
411s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
412 int regnum, const gdb_byte *buf)
d0f54f9d 413{
7803799a 414 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 415 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 416 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
417 ULONGEST val, psw;
418
7803799a 419 if (regnum == tdep->pc_regnum)
d0f54f9d 420 {
7803799a
UW
421 val = extract_unsigned_integer (buf, regsize, byte_order);
422 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
423 {
424 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
425 val = (psw & 0x80000000) | (val & 0x7fffffff);
426 }
427 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
428 return;
429 }
d0f54f9d 430
7803799a
UW
431 if (regnum == tdep->cc_regnum)
432 {
433 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 434 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
435 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
436 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
437 else
438 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
439 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
440 return;
441 }
d0f54f9d 442
2ccd1468 443 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
444 {
445 regnum -= tdep->gpr_full_regnum;
446 val = extract_unsigned_integer (buf, regsize, byte_order);
447 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
448 val & 0xffffffff);
449 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
450 val >> 32);
451 return;
d0f54f9d 452 }
7803799a 453
550bdf96
AA
454 if (regnum_is_vxr_full (tdep, regnum))
455 {
456 regnum -= tdep->v0_full_regnum;
457 regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf);
458 regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8);
459 return;
460 }
461
7803799a 462 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
463}
464
465/* 'float' values are stored in the upper half of floating-point
550bdf96
AA
466 registers, even though we are otherwise a big-endian platform. The
467 same applies to a 'float' value within a vector. */
d0f54f9d 468
9acbedc0 469static struct value *
2ed3c037
UW
470s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
471 int regnum, struct frame_id frame_id)
d0f54f9d 472{
550bdf96 473 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2ed3c037
UW
474 struct value *value = default_value_from_register (gdbarch, type,
475 regnum, frame_id);
744a8059
SP
476 check_typedef (type);
477
550bdf96
AA
478 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
479 && TYPE_LENGTH (type) < 8)
480 || regnum_is_vxr_full (tdep, regnum)
481 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
9acbedc0 482 set_value_offset (value, 0);
d0f54f9d 483
9acbedc0 484 return value;
d0f54f9d
JB
485}
486
487/* Register groups. */
488
a78f21af 489static int
7803799a
UW
490s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
491 struct reggroup *group)
d0f54f9d
JB
492{
493 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
494
d6db1fab
UW
495 /* We usually save/restore the whole PSW, which includes PC and CC.
496 However, some older gdbservers may not support saving/restoring
497 the whole PSW yet, and will return an XML register description
498 excluding those from the save/restore register groups. In those
499 cases, we still need to explicitly save/restore PC and CC in order
500 to push or pop frames. Since this doesn't hurt anything if we
501 already save/restore the whole PSW (it's just redundant), we add
502 PC and CC at this point unconditionally. */
d0f54f9d 503 if (group == save_reggroup || group == restore_reggroup)
7803799a 504 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d 505
550bdf96
AA
506 if (group == vector_reggroup)
507 return regnum_is_vxr_full (tdep, regnum);
508
509 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
510 return 0;
511
d0f54f9d
JB
512 return default_register_reggroup_p (gdbarch, regnum, group);
513}
514
515
2ccd1468 516/* Maps for register sets. */
d0f54f9d 517
99b7da5d 518static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 519 {
99b7da5d
AA
520 { 1, S390_PSWM_REGNUM },
521 { 1, S390_PSWA_REGNUM },
522 { 16, S390_R0_REGNUM },
523 { 16, S390_A0_REGNUM },
524 { 1, S390_ORIG_R2_REGNUM },
525 { 0 }
2ccd1468 526 };
d0f54f9d 527
99b7da5d 528static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 529 {
99b7da5d
AA
530 { 1, S390_FPC_REGNUM, 8 },
531 { 16, S390_F0_REGNUM, 8 },
532 { 0 }
2ccd1468 533 };
d0f54f9d 534
99b7da5d 535static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 536 {
99b7da5d
AA
537 { 16, S390_R0_UPPER_REGNUM, 4 },
538 { 0 }
2ccd1468 539 };
7803799a 540
99b7da5d 541static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 542 {
99b7da5d
AA
543 { 1, REGCACHE_MAP_SKIP, 4 },
544 { 1, S390_LAST_BREAK_REGNUM, 4 },
545 { 0 }
2ccd1468 546 };
c642a434 547
99b7da5d 548static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 549 {
99b7da5d
AA
550 { 1, S390_LAST_BREAK_REGNUM, 8 },
551 { 0 }
2ccd1468
UW
552 };
553
99b7da5d 554static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 555 {
99b7da5d
AA
556 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
557 { 0 }
2ccd1468
UW
558 };
559
99b7da5d 560static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 561 {
99b7da5d
AA
562 { 1, S390_TDB_DWORD0_REGNUM, 8 },
563 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
564 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
565 { 1, S390_TDB_ATIA_REGNUM, 8 },
566 { 12, REGCACHE_MAP_SKIP, 8 },
567 { 16, S390_TDB_R0_REGNUM, 8 },
568 { 0 }
2ccd1468 569 };
c642a434 570
550bdf96
AA
571static const struct regcache_map_entry s390_regmap_vxrs_low[] =
572 {
573 { 16, S390_V0_LOWER_REGNUM, 8 },
574 { 0 }
575 };
576
577static const struct regcache_map_entry s390_regmap_vxrs_high[] =
578 {
579 { 16, S390_V16_REGNUM, 16 },
580 { 0 }
581 };
582
4ac33720 583
99b7da5d
AA
584/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
585 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
586
587static void
588s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
589 int regnum, const void *regs, size_t len)
590{
591 ULONGEST tdw;
592 enum register_status ret;
593 int i;
594
99b7da5d 595 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
596 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
597 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 598 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
599}
600
99b7da5d
AA
601const struct regset s390_gregset = {
602 s390_gregmap,
603 regcache_supply_regset,
604 regcache_collect_regset
d0f54f9d
JB
605};
606
99b7da5d
AA
607const struct regset s390_fpregset = {
608 s390_fpregmap,
609 regcache_supply_regset,
610 regcache_collect_regset
d0f54f9d
JB
611};
612
7803799a 613static const struct regset s390_upper_regset = {
34201ae3 614 s390_regmap_upper,
99b7da5d
AA
615 regcache_supply_regset,
616 regcache_collect_regset
7803799a
UW
617};
618
99b7da5d 619const struct regset s390_last_break_regset = {
c642a434 620 s390_regmap_last_break,
99b7da5d
AA
621 regcache_supply_regset,
622 regcache_collect_regset
c642a434
UW
623};
624
99b7da5d 625const struct regset s390x_last_break_regset = {
c642a434 626 s390x_regmap_last_break,
99b7da5d
AA
627 regcache_supply_regset,
628 regcache_collect_regset
c642a434
UW
629};
630
99b7da5d 631const struct regset s390_system_call_regset = {
c642a434 632 s390_regmap_system_call,
99b7da5d
AA
633 regcache_supply_regset,
634 regcache_collect_regset
c642a434
UW
635};
636
99b7da5d 637const struct regset s390_tdb_regset = {
4ac33720
UW
638 s390_regmap_tdb,
639 s390_supply_tdb_regset,
99b7da5d 640 regcache_collect_regset
4ac33720
UW
641};
642
550bdf96
AA
643const struct regset s390_vxrs_low_regset = {
644 s390_regmap_vxrs_low,
645 regcache_supply_regset,
646 regcache_collect_regset
647};
648
649const struct regset s390_vxrs_high_regset = {
650 s390_regmap_vxrs_high,
651 regcache_supply_regset,
652 regcache_collect_regset
653};
654
5aa82d05
AA
655/* Iterate over supported core file register note sections. */
656
657static void
658s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
659 iterate_over_regset_sections_cb *cb,
660 void *cb_data,
661 const struct regcache *regcache)
662{
663 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8f0435f7
AA
664 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
665 s390_sizeof_gregset : s390x_sizeof_gregset);
5aa82d05 666
8f0435f7
AA
667 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
668 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
5aa82d05
AA
669
670 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
8f0435f7
AA
671 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
672 "s390 GPR upper halves", cb_data);
5aa82d05
AA
673
674 if (tdep->have_linux_v1)
8f0435f7
AA
675 cb (".reg-s390-last-break", 8,
676 (gdbarch_ptr_bit (gdbarch) == 32
677 ? &s390_last_break_regset : &s390x_last_break_regset),
678 "s930 last-break address", cb_data);
5aa82d05
AA
679
680 if (tdep->have_linux_v2)
8f0435f7
AA
681 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
682 "s390 system-call", cb_data);
5aa82d05
AA
683
684 /* If regcache is set, we are in "write" (gcore) mode. In this
685 case, don't iterate over the TDB unless its registers are
686 available. */
687 if (tdep->have_tdb
688 && (regcache == NULL
689 || REG_VALID == regcache_register_status (regcache,
690 S390_TDB_DWORD0_REGNUM)))
8f0435f7
AA
691 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
692 "s390 TDB", cb_data);
550bdf96
AA
693
694 if (tdep->v0_full_regnum != -1)
695 {
696 cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset,
697 "s390 vector registers 0-15 lower half", cb_data);
698 cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset,
699 "s390 vector registers 16-31", cb_data);
700 }
5aa82d05
AA
701}
702
7803799a
UW
703static const struct target_desc *
704s390_core_read_description (struct gdbarch *gdbarch,
705 struct target_ops *target, bfd *abfd)
706{
7803799a 707 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 708 CORE_ADDR hwcap = 0;
550bdf96 709 int high_gprs, v1, v2, te, vx;
4ac33720
UW
710
711 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
712 if (!section)
713 return NULL;
714
550bdf96
AA
715 high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs")
716 != NULL);
717 v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL);
718 v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL);
719 vx = (hwcap & HWCAP_S390_VX);
720 te = (hwcap & HWCAP_S390_TE);
721
7803799a
UW
722 switch (bfd_section_size (abfd, section))
723 {
724 case s390_sizeof_gregset:
c642a434 725 if (high_gprs)
550bdf96
AA
726 return (te && vx ? tdesc_s390_tevx_linux64 :
727 vx ? tdesc_s390_vx_linux64 :
728 te ? tdesc_s390_te_linux64 :
729 v2 ? tdesc_s390_linux64v2 :
730 v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64);
c642a434 731 else
550bdf96
AA
732 return (v2 ? tdesc_s390_linux32v2 :
733 v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
734
735 case s390x_sizeof_gregset:
550bdf96
AA
736 return (te && vx ? tdesc_s390x_tevx_linux64 :
737 vx ? tdesc_s390x_vx_linux64 :
738 te ? tdesc_s390x_te_linux64 :
739 v2 ? tdesc_s390x_linux64v2 :
740 v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
741
742 default:
743 return NULL;
744 }
745}
746
d0f54f9d 747
4bc8c588
JB
748/* Decoding S/390 instructions. */
749
750/* Named opcode values for the S/390 instructions we recognize. Some
751 instructions have their opcode split across two fields; those are the
752 op1_* and op2_* enums. */
753enum
754 {
a8c99f38
JB
755 op1_lhi = 0xa7, op2_lhi = 0x08,
756 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 757 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 758 op_lr = 0x18,
a8c99f38
JB
759 op_lgr = 0xb904,
760 op_l = 0x58,
761 op1_ly = 0xe3, op2_ly = 0x58,
762 op1_lg = 0xe3, op2_lg = 0x04,
763 op_lm = 0x98,
764 op1_lmy = 0xeb, op2_lmy = 0x98,
765 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 766 op_st = 0x50,
a8c99f38 767 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 768 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 769 op_std = 0x60,
4bc8c588 770 op_stm = 0x90,
a8c99f38 771 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 772 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
773 op1_aghi = 0xa7, op2_aghi = 0x0b,
774 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
775 op1_agfi = 0xc2, op2_agfi = 0x08,
776 op1_afi = 0xc2, op2_afi = 0x09,
777 op1_algfi= 0xc2, op2_algfi= 0x0a,
778 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
779 op_ar = 0x1a,
780 op_agr = 0xb908,
781 op_a = 0x5a,
782 op1_ay = 0xe3, op2_ay = 0x5a,
783 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
784 op1_slgfi= 0xc2, op2_slgfi= 0x04,
785 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
786 op_sr = 0x1b,
787 op_sgr = 0xb909,
788 op_s = 0x5b,
789 op1_sy = 0xe3, op2_sy = 0x5b,
790 op1_sg = 0xe3, op2_sg = 0x09,
791 op_nr = 0x14,
792 op_ngr = 0xb980,
793 op_la = 0x41,
794 op1_lay = 0xe3, op2_lay = 0x71,
795 op1_larl = 0xc0, op2_larl = 0x00,
796 op_basr = 0x0d,
797 op_bas = 0x4d,
798 op_bcr = 0x07,
799 op_bc = 0x0d,
1db4e8a0
UW
800 op_bctr = 0x06,
801 op_bctgr = 0xb946,
802 op_bct = 0x46,
803 op1_bctg = 0xe3, op2_bctg = 0x46,
804 op_bxh = 0x86,
805 op1_bxhg = 0xeb, op2_bxhg = 0x44,
806 op_bxle = 0x87,
807 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
808 op1_bras = 0xa7, op2_bras = 0x05,
809 op1_brasl= 0xc0, op2_brasl= 0x05,
810 op1_brc = 0xa7, op2_brc = 0x04,
811 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
812 op1_brct = 0xa7, op2_brct = 0x06,
813 op1_brctg= 0xa7, op2_brctg= 0x07,
814 op_brxh = 0x84,
815 op1_brxhg= 0xec, op2_brxhg= 0x44,
816 op_brxle = 0x85,
817 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 818 op_svc = 0x0a,
4bc8c588
JB
819 };
820
821
a8c99f38
JB
822/* Read a single instruction from address AT. */
823
824#define S390_MAX_INSTR_SIZE 6
825static int
826s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
827{
828 static int s390_instrlen[] = { 2, 4, 4, 6 };
829 int instrlen;
830
8defab1a 831 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
832 return -1;
833 instrlen = s390_instrlen[instr[0] >> 6];
834 if (instrlen > 2)
835 {
8defab1a 836 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 837 return -1;
a8c99f38
JB
838 }
839 return instrlen;
840}
841
842
4bc8c588
JB
843/* The functions below are for recognizing and decoding S/390
844 instructions of various formats. Each of them checks whether INSN
845 is an instruction of the given format, with the specified opcodes.
846 If it is, it sets the remaining arguments to the values of the
847 instruction's fields, and returns a non-zero value; otherwise, it
848 returns zero.
849
850 These functions' arguments appear in the order they appear in the
851 instruction, not in the machine-language form. So, opcodes always
852 come first, even though they're sometimes scattered around the
853 instructions. And displacements appear before base and extension
854 registers, as they do in the assembly syntax, not at the end, as
855 they do in the machine language. */
a78f21af 856static int
4bc8c588
JB
857is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
858{
859 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
860 {
861 *r1 = (insn[1] >> 4) & 0xf;
862 /* i2 is a 16-bit signed quantity. */
863 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
864 return 1;
865 }
866 else
867 return 0;
868}
8ac0e65a 869
5769d3cd 870
4bc8c588
JB
871static int
872is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 873 unsigned int *r1, int *i2)
4bc8c588
JB
874{
875 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
876 {
877 *r1 = (insn[1] >> 4) & 0xf;
878 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
879 no sign extension is necessary, but we don't want to assume
880 that. */
4bc8c588 881 *i2 = (((insn[2] << 24)
34201ae3
UW
882 | (insn[3] << 16)
883 | (insn[4] << 8)
884 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
885 return 1;
886 }
887 else
888 return 0;
889}
890
891
892static int
893is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
894{
895 if (insn[0] == op)
896 {
897 *r1 = (insn[1] >> 4) & 0xf;
898 *r2 = insn[1] & 0xf;
899 return 1;
900 }
901 else
902 return 0;
903}
904
905
906static int
907is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
908{
909 if (((insn[0] << 8) | insn[1]) == op)
910 {
911 /* Yes, insn[3]. insn[2] is unused in RRE format. */
912 *r1 = (insn[3] >> 4) & 0xf;
913 *r2 = insn[3] & 0xf;
914 return 1;
915 }
916 else
917 return 0;
918}
919
920
921static int
922is_rs (bfd_byte *insn, int op,
eb1bd1fb 923 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
924{
925 if (insn[0] == op)
926 {
927 *r1 = (insn[1] >> 4) & 0xf;
928 *r3 = insn[1] & 0xf;
929 *b2 = (insn[2] >> 4) & 0xf;
930 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
931 return 1;
932 }
933 else
934 return 0;
935}
936
937
938static int
a8c99f38 939is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 940 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
941{
942 if (insn[0] == op1
4bc8c588
JB
943 && insn[5] == op2)
944 {
945 *r1 = (insn[1] >> 4) & 0xf;
946 *r3 = insn[1] & 0xf;
947 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 948 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 949 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 950 ^ 0x80000) - 0x80000;
4bc8c588
JB
951 return 1;
952 }
953 else
954 return 0;
955}
956
957
1db4e8a0
UW
958static int
959is_rsi (bfd_byte *insn, int op,
34201ae3 960 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
961{
962 if (insn[0] == op)
963 {
964 *r1 = (insn[1] >> 4) & 0xf;
965 *r3 = insn[1] & 0xf;
966 /* i2 is a 16-bit signed quantity. */
967 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
968 return 1;
969 }
970 else
971 return 0;
972}
973
974
975static int
976is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 977 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
978{
979 if (insn[0] == op1
980 && insn[5] == op2)
981 {
982 *r1 = (insn[1] >> 4) & 0xf;
983 *r3 = insn[1] & 0xf;
984 /* i2 is a 16-bit signed quantity. */
985 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
986 return 1;
987 }
988 else
989 return 0;
990}
991
992
4bc8c588
JB
993static int
994is_rx (bfd_byte *insn, int op,
eb1bd1fb 995 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
996{
997 if (insn[0] == op)
998 {
999 *r1 = (insn[1] >> 4) & 0xf;
1000 *x2 = insn[1] & 0xf;
1001 *b2 = (insn[2] >> 4) & 0xf;
1002 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1003 return 1;
1004 }
1005 else
1006 return 0;
1007}
1008
1009
1010static int
a8c99f38 1011is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 1012 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
1013{
1014 if (insn[0] == op1
4bc8c588
JB
1015 && insn[5] == op2)
1016 {
1017 *r1 = (insn[1] >> 4) & 0xf;
1018 *x2 = insn[1] & 0xf;
1019 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 1020 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 1021 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 1022 ^ 0x80000) - 0x80000;
4bc8c588
JB
1023 return 1;
1024 }
1025 else
1026 return 0;
1027}
1028
1029
3fc46200 1030/* Prologue analysis. */
4bc8c588 1031
d0f54f9d
JB
1032#define S390_NUM_GPRS 16
1033#define S390_NUM_FPRS 16
4bc8c588 1034
a8c99f38
JB
1035struct s390_prologue_data {
1036
ee1b3323
UW
1037 /* The stack. */
1038 struct pv_area *stack;
1039
e17a4113 1040 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1041 int gpr_size;
1042 int fpr_size;
e17a4113 1043 enum bfd_endian byte_order;
a8c99f38
JB
1044
1045 /* The general-purpose registers. */
3fc46200 1046 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1047
1048 /* The floating-point registers. */
3fc46200 1049 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1050
121d8485
UW
1051 /* The offset relative to the CFA where the incoming GPR N was saved
1052 by the function prologue. 0 if not saved or unknown. */
1053 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1054
121d8485
UW
1055 /* Likewise for FPRs. */
1056 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1057
121d8485
UW
1058 /* Nonzero if the backchain was saved. This is assumed to be the
1059 case when the incoming SP is saved at the current SP location. */
1060 int back_chain_saved_p;
1061};
4bc8c588 1062
3fc46200
UW
1063/* Return the effective address for an X-style instruction, like:
1064
34201ae3 1065 L R1, D2(X2, B2)
3fc46200
UW
1066
1067 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1068 constant; the effective address is the sum of all three. If either
1069 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1070 means that r0 can't be used as either X2 or B2. */
1071static pv_t
1072s390_addr (struct s390_prologue_data *data,
1073 int d2, unsigned int x2, unsigned int b2)
1074{
1075 pv_t result;
1076
1077 result = pv_constant (d2);
1078 if (x2)
1079 result = pv_add (result, data->gpr[x2]);
1080 if (b2)
1081 result = pv_add (result, data->gpr[b2]);
1082
1083 return result;
1084}
1085
1086/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1087static void
3fc46200
UW
1088s390_store (struct s390_prologue_data *data,
1089 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1090 pv_t value)
4bc8c588 1091{
3fc46200 1092 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1093 pv_t offset;
121d8485
UW
1094
1095 /* Check whether we are storing the backchain. */
3fc46200 1096 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1097
3fc46200 1098 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1099 if (size == data->gpr_size
3fc46200 1100 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1101 {
1102 data->back_chain_saved_p = 1;
1103 return;
1104 }
1105
1106
1107 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1108 if (!pv_area_store_would_trash (data->stack, addr))
1109 pv_area_store (data->stack, addr, size, value);
4bc8c588 1110
a8c99f38 1111
121d8485
UW
1112 /* Note: If this is some store we cannot identify, you might think we
1113 should forget our cached values, as any of those might have been hit.
1114
1115 However, we make the assumption that the register save areas are only
1116 ever stored to once in any given function, and we do recognize these
1117 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1118}
4bc8c588 1119
3fc46200
UW
1120/* Do a SIZE-byte load from D2(X2,B2). */
1121static pv_t
1122s390_load (struct s390_prologue_data *data,
1123 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 1124
4bc8c588 1125{
3fc46200 1126 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1127
a8c99f38
JB
1128 /* If it's a load from an in-line constant pool, then we can
1129 simulate that, under the assumption that the code isn't
1130 going to change between the time the processor actually
1131 executed it creating the current frame, and the time when
1132 we're analyzing the code to unwind past that frame. */
3fc46200 1133 if (pv_is_constant (addr))
4bc8c588 1134 {
0542c86d 1135 struct target_section *secp;
3fc46200 1136 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1137 if (secp != NULL
34201ae3 1138 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1139 secp->the_bfd_section)
34201ae3
UW
1140 & SEC_READONLY))
1141 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1142 data->byte_order));
a8c99f38 1143 }
7666f43c 1144
121d8485 1145 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1146 return pv_area_fetch (data->stack, addr, size);
1147}
121d8485 1148
ee1b3323
UW
1149/* Function for finding saved registers in a 'struct pv_area'; we pass
1150 this to pv_area_scan.
121d8485 1151
ee1b3323
UW
1152 If VALUE is a saved register, ADDR says it was saved at a constant
1153 offset from the frame base, and SIZE indicates that the whole
1154 register was saved, record its offset in the reg_offset table in
1155 PROLOGUE_UNTYPED. */
1156static void
c378eb4e
MS
1157s390_check_for_saved (void *data_untyped, pv_t addr,
1158 CORE_ADDR size, pv_t value)
ee1b3323
UW
1159{
1160 struct s390_prologue_data *data = data_untyped;
1161 int i, offset;
1162
1163 if (!pv_is_register (addr, S390_SP_REGNUM))
1164 return;
1165
1166 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1167
ee1b3323
UW
1168 /* If we are storing the original value of a register, we want to
1169 record the CFA offset. If the same register is stored multiple
1170 times, the stack slot with the highest address counts. */
34201ae3 1171
ee1b3323
UW
1172 for (i = 0; i < S390_NUM_GPRS; i++)
1173 if (size == data->gpr_size
1174 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1175 if (data->gpr_slot[i] == 0
1176 || data->gpr_slot[i] > offset)
1177 {
1178 data->gpr_slot[i] = offset;
1179 return;
1180 }
1181
1182 for (i = 0; i < S390_NUM_FPRS; i++)
1183 if (size == data->fpr_size
1184 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1185 if (data->fpr_slot[i] == 0
1186 || data->fpr_slot[i] > offset)
1187 {
1188 data->fpr_slot[i] = offset;
1189 return;
1190 }
a8c99f38 1191}
4bc8c588 1192
a8c99f38
JB
1193/* Analyze the prologue of the function starting at START_PC,
1194 continuing at most until CURRENT_PC. Initialize DATA to
1195 hold all information we find out about the state of the registers
1196 and stack slots. Return the address of the instruction after
1197 the last one that changed the SP, FP, or back chain; or zero
1198 on error. */
1199static CORE_ADDR
1200s390_analyze_prologue (struct gdbarch *gdbarch,
1201 CORE_ADDR start_pc,
1202 CORE_ADDR current_pc,
1203 struct s390_prologue_data *data)
4bc8c588 1204{
a8c99f38
JB
1205 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1206
4bc8c588 1207 /* Our return value:
a8c99f38 1208 The address of the instruction after the last one that changed
34201ae3 1209 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1210 read memory. */
1211 CORE_ADDR result = start_pc;
4bc8c588 1212
4bc8c588
JB
1213 /* The current PC for our abstract interpretation. */
1214 CORE_ADDR pc;
1215
1216 /* The address of the next instruction after that. */
1217 CORE_ADDR next_pc;
34201ae3 1218
4bc8c588
JB
1219 /* Set up everything's initial value. */
1220 {
1221 int i;
1222
55f960e1 1223 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1224
a8c99f38
JB
1225 /* For the purpose of prologue tracking, we consider the GPR size to
1226 be equal to the ABI word size, even if it is actually larger
1227 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1228 data->gpr_size = word_size;
1229 data->fpr_size = 8;
e17a4113 1230 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1231
4bc8c588 1232 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1233 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1234
1235 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1236 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1237
121d8485
UW
1238 for (i = 0; i < S390_NUM_GPRS; i++)
1239 data->gpr_slot[i] = 0;
1240
1241 for (i = 0; i < S390_NUM_FPRS; i++)
1242 data->fpr_slot[i] = 0;
4bc8c588 1243
121d8485 1244 data->back_chain_saved_p = 0;
4bc8c588
JB
1245 }
1246
a8c99f38
JB
1247 /* Start interpreting instructions, until we hit the frame's
1248 current PC or the first branch instruction. */
1249 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1250 {
4bc8c588 1251 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1252 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1253
3fc46200
UW
1254 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1255 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1256 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1257
4bc8c588 1258 /* Fields for various kinds of instructions. */
a8c99f38
JB
1259 unsigned int b2, r1, r2, x2, r3;
1260 int i2, d2;
4bc8c588 1261
121d8485 1262 /* The values of SP and FP before this instruction,
34201ae3 1263 for detecting instructions that change them. */
3fc46200 1264 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1265 /* Likewise for the flag whether the back chain was saved. */
1266 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1267
1268 /* If we got an error trying to read the instruction, report it. */
1269 if (insn_len < 0)
34201ae3
UW
1270 {
1271 result = 0;
1272 break;
1273 }
4bc8c588
JB
1274
1275 next_pc = pc + insn_len;
1276
a8c99f38
JB
1277 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1278 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1279 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1280
4bc8c588 1281
3fc46200
UW
1282 /* LHI r1, i2 --- load halfword immediate. */
1283 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1284 /* LGFI r1, i2 --- load fullword immediate. */
1285 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1286 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1287 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1288 data->gpr[r1] = pv_constant (i2);
1289
1290 /* LR r1, r2 --- load from register. */
1291 /* LGR r1, r2 --- load from register (64-bit version). */
1292 else if (is_rr (insn32, op_lr, &r1, &r2)
1293 || is_rre (insn64, op_lgr, &r1, &r2))
1294 data->gpr[r1] = data->gpr[r2];
1295
1296 /* L r1, d2(x2, b2) --- load. */
1297 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1298 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1299 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1300 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1301 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1302 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1303
1304 /* ST r1, d2(x2, b2) --- store. */
1305 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1306 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1307 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1308 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1309 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1310 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1311
1312 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1313 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1314 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1315
1316 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1317 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1318 version). */
3fc46200
UW
1319 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1320 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1321 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1322 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1323 {
1324 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1325 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1326 }
4bc8c588 1327
3fc46200
UW
1328 /* AHI r1, i2 --- add halfword immediate. */
1329 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1330 /* AFI r1, i2 --- add fullword immediate. */
1331 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1332 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1333 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1334 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1335 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1336 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1337
1338 /* ALFI r1, i2 --- add logical immediate. */
1339 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1340 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1341 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1342 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1343 (CORE_ADDR)i2 & 0xffffffff);
1344
1345 /* AR r1, r2 -- add register. */
1346 /* AGR r1, r2 -- add register (64-bit version). */
1347 else if (is_rr (insn32, op_ar, &r1, &r2)
1348 || is_rre (insn64, op_agr, &r1, &r2))
1349 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1350
1351 /* A r1, d2(x2, b2) -- add. */
1352 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1353 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1354 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1355 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1356 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1357 data->gpr[r1] = pv_add (data->gpr[r1],
1358 s390_load (data, d2, x2, b2, data->gpr_size));
1359
1360 /* SLFI r1, i2 --- subtract logical immediate. */
1361 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1362 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1363 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1364 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1365 -((CORE_ADDR)i2 & 0xffffffff));
1366
1367 /* SR r1, r2 -- subtract register. */
1368 /* SGR r1, r2 -- subtract register (64-bit version). */
1369 else if (is_rr (insn32, op_sr, &r1, &r2)
1370 || is_rre (insn64, op_sgr, &r1, &r2))
1371 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1372
1373 /* S r1, d2(x2, b2) -- subtract. */
1374 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1375 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1376 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1377 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1378 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1379 data->gpr[r1] = pv_subtract (data->gpr[r1],
1380 s390_load (data, d2, x2, b2, data->gpr_size));
1381
1382 /* LA r1, d2(x2, b2) --- load address. */
1383 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1384 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1385 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1386 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1387
1388 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1389 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1390 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1391
3fc46200 1392 /* BASR r1, 0 --- branch and save.
34201ae3 1393 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1394 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1395 && r2 == 0)
3fc46200 1396 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1397
3fc46200 1398 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1399 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1400 {
1401 data->gpr[r1] = pv_constant (next_pc);
1402 next_pc = pc + i2 * 2;
4bc8c588 1403
34201ae3
UW
1404 /* We'd better not interpret any backward branches. We'll
1405 never terminate. */
1406 if (next_pc <= pc)
1407 break;
1408 }
4bc8c588 1409
a8c99f38
JB
1410 /* Terminate search when hitting any other branch instruction. */
1411 else if (is_rr (insn, op_basr, &r1, &r2)
1412 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1413 || is_rr (insn, op_bcr, &r1, &r2)
1414 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1415 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1416 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1417 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1418 break;
1419
4bc8c588 1420 else
d4fb63e1
TT
1421 {
1422 /* An instruction we don't know how to simulate. The only
1423 safe thing to do would be to set every value we're tracking
1424 to 'unknown'. Instead, we'll be optimistic: we assume that
1425 we *can* interpret every instruction that the compiler uses
1426 to manipulate any of the data we're interested in here --
1427 then we can just ignore anything else. */
1428 }
4bc8c588
JB
1429
1430 /* Record the address after the last instruction that changed
34201ae3
UW
1431 the FP, SP, or backlink. Ignore instructions that changed
1432 them back to their original values --- those are probably
1433 restore instructions. (The back chain is never restored,
1434 just popped.) */
4bc8c588 1435 {
34201ae3
UW
1436 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1437 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1438
1439 if ((! pv_is_identical (pre_insn_sp, sp)
1440 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1441 && sp.kind != pvk_unknown)
34201ae3
UW
1442 || (! pv_is_identical (pre_insn_fp, fp)
1443 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1444 && fp.kind != pvk_unknown)
34201ae3
UW
1445 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1446 result = next_pc;
4bc8c588 1447 }
5769d3cd 1448 }
4bc8c588 1449
ee1b3323
UW
1450 /* Record where all the registers were saved. */
1451 pv_area_scan (data->stack, s390_check_for_saved, data);
1452
1453 free_pv_area (data->stack);
1454 data->stack = NULL;
1455
4bc8c588 1456 return result;
5769d3cd
AC
1457}
1458
34201ae3 1459/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1460 some "real" code. */
1461static CORE_ADDR
6093d2eb 1462s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1463{
1464 struct s390_prologue_data data;
1465 CORE_ADDR skip_pc;
6093d2eb 1466 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1467 return skip_pc ? skip_pc : pc;
1468}
1469
d0f54f9d
JB
1470/* Return true if we are in the functin's epilogue, i.e. after the
1471 instruction that destroyed the function's stack frame. */
1472static int
1473s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1474{
1475 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1476
1477 /* In frameless functions, there's not frame to destroy and thus
1478 we don't care about the epilogue.
1479
1480 In functions with frame, the epilogue sequence is a pair of
1481 a LM-type instruction that restores (amongst others) the
1482 return register %r14 and the stack pointer %r15, followed
1483 by a branch 'br %r14' --or equivalent-- that effects the
1484 actual return.
1485
1486 In that situation, this function needs to return 'true' in
1487 exactly one case: when pc points to that branch instruction.
1488
1489 Thus we try to disassemble the one instructions immediately
177b42fe 1490 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1491 modifying the stack pointer.
1492
1493 Note that disassembling backwards is not reliable, so there
1494 is a slight chance of false positives here ... */
1495
1496 bfd_byte insn[6];
1497 unsigned int r1, r3, b2;
1498 int d2;
1499
1500 if (word_size == 4
8defab1a 1501 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1502 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1503 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1504 return 1;
1505
a8c99f38 1506 if (word_size == 4
8defab1a 1507 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1508 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1509 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1510 return 1;
1511
d0f54f9d 1512 if (word_size == 8
8defab1a 1513 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1514 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1515 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1516 return 1;
1517
1518 return 0;
1519}
5769d3cd 1520
1db4e8a0
UW
1521/* Displaced stepping. */
1522
1523/* Fix up the state of registers and memory after having single-stepped
1524 a displaced instruction. */
1525static void
1526s390_displaced_step_fixup (struct gdbarch *gdbarch,
1527 struct displaced_step_closure *closure,
1528 CORE_ADDR from, CORE_ADDR to,
1529 struct regcache *regs)
1530{
1531 /* Since we use simple_displaced_step_copy_insn, our closure is a
1532 copy of the instruction. */
1533 gdb_byte *insn = (gdb_byte *) closure;
1534 static int s390_instrlen[] = { 2, 4, 4, 6 };
1535 int insnlen = s390_instrlen[insn[0] >> 6];
1536
1537 /* Fields for various kinds of instructions. */
1538 unsigned int b2, r1, r2, x2, r3;
1539 int i2, d2;
1540
1541 /* Get current PC and addressing mode bit. */
1542 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1543 ULONGEST amode = 0;
1db4e8a0
UW
1544
1545 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1546 {
1547 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1548 amode &= 0x80000000;
1549 }
1550
1551 if (debug_displaced)
1552 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1553 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1554 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1555 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1556
1557 /* Handle absolute branch and save instructions. */
1558 if (is_rr (insn, op_basr, &r1, &r2)
1559 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1560 {
1561 /* Recompute saved return address in R1. */
1562 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1563 amode | (from + insnlen));
1564 }
1565
1566 /* Handle absolute branch instructions. */
1567 else if (is_rr (insn, op_bcr, &r1, &r2)
1568 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1569 || is_rr (insn, op_bctr, &r1, &r2)
1570 || is_rre (insn, op_bctgr, &r1, &r2)
1571 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1572 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1573 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1574 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1575 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1576 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1577 {
1578 /* Update PC iff branch was *not* taken. */
1579 if (pc == to + insnlen)
1580 regcache_write_pc (regs, from + insnlen);
1581 }
1582
1583 /* Handle PC-relative branch and save instructions. */
1584 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1585 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1586 {
1587 /* Update PC. */
1588 regcache_write_pc (regs, pc - to + from);
1589 /* Recompute saved return address in R1. */
1590 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1591 amode | (from + insnlen));
1592 }
1593
1594 /* Handle PC-relative branch instructions. */
1595 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1596 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1597 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1598 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1599 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1600 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1601 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1602 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1603 {
1604 /* Update PC. */
1605 regcache_write_pc (regs, pc - to + from);
1606 }
1607
1608 /* Handle LOAD ADDRESS RELATIVE LONG. */
1609 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1610 {
0161e4b9
UW
1611 /* Update PC. */
1612 regcache_write_pc (regs, from + insnlen);
34201ae3 1613 /* Recompute output address in R1. */
1db4e8a0 1614 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1615 amode | (from + i2 * 2));
1db4e8a0
UW
1616 }
1617
1618 /* If we executed a breakpoint instruction, point PC right back at it. */
1619 else if (insn[0] == 0x0 && insn[1] == 0x1)
1620 regcache_write_pc (regs, from);
1621
1622 /* For any other insn, PC points right after the original instruction. */
1623 else
1624 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1625
1626 if (debug_displaced)
1627 fprintf_unfiltered (gdb_stdlog,
1628 "displaced: (s390) pc is now %s\n",
1629 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1630}
a8c99f38 1631
d6db1fab
UW
1632
1633/* Helper routine to unwind pseudo registers. */
1634
1635static struct value *
1636s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1637{
1638 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1639 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1640 struct type *type = register_type (gdbarch, regnum);
1641
1642 /* Unwind PC via PSW address. */
1643 if (regnum == tdep->pc_regnum)
1644 {
1645 struct value *val;
1646
1647 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1648 if (!value_optimized_out (val))
1649 {
1650 LONGEST pswa = value_as_long (val);
1651
1652 if (TYPE_LENGTH (type) == 4)
1653 return value_from_pointer (type, pswa & 0x7fffffff);
1654 else
1655 return value_from_pointer (type, pswa);
1656 }
1657 }
1658
1659 /* Unwind CC via PSW mask. */
1660 if (regnum == tdep->cc_regnum)
1661 {
1662 struct value *val;
1663
1664 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1665 if (!value_optimized_out (val))
1666 {
1667 LONGEST pswm = value_as_long (val);
1668
1669 if (TYPE_LENGTH (type) == 4)
1670 return value_from_longest (type, (pswm >> 12) & 3);
1671 else
1672 return value_from_longest (type, (pswm >> 44) & 3);
1673 }
1674 }
1675
1676 /* Unwind full GPRs to show at least the lower halves (as the
1677 upper halves are undefined). */
2ccd1468 1678 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1679 {
1680 int reg = regnum - tdep->gpr_full_regnum;
1681 struct value *val;
1682
1683 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1684 if (!value_optimized_out (val))
1685 return value_cast (type, val);
1686 }
1687
1688 return allocate_optimized_out_value (type);
1689}
1690
1691static struct value *
1692s390_trad_frame_prev_register (struct frame_info *this_frame,
1693 struct trad_frame_saved_reg saved_regs[],
1694 int regnum)
1695{
1696 if (regnum < S390_NUM_REGS)
1697 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1698 else
1699 return s390_unwind_pseudo_register (this_frame, regnum);
1700}
1701
1702
a8c99f38
JB
1703/* Normal stack frames. */
1704
1705struct s390_unwind_cache {
1706
1707 CORE_ADDR func;
1708 CORE_ADDR frame_base;
1709 CORE_ADDR local_base;
1710
1711 struct trad_frame_saved_reg *saved_regs;
1712};
1713
a78f21af 1714static int
f089c433 1715s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1716 struct s390_unwind_cache *info)
5769d3cd 1717{
f089c433 1718 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1719 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1720 struct s390_prologue_data data;
3fc46200
UW
1721 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1722 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1723 int i;
1724 CORE_ADDR cfa;
a8c99f38
JB
1725 CORE_ADDR func;
1726 CORE_ADDR result;
1727 ULONGEST reg;
1728 CORE_ADDR prev_sp;
1729 int frame_pointer;
1730 int size;
edb3359d 1731 struct frame_info *next_frame;
a8c99f38
JB
1732
1733 /* Try to find the function start address. If we can't find it, we don't
1734 bother searching for it -- with modern compilers this would be mostly
1735 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1736 or else a valid backchain ... */
f089c433 1737 func = get_frame_func (this_frame);
a8c99f38
JB
1738 if (!func)
1739 return 0;
5769d3cd 1740
a8c99f38
JB
1741 /* Try to analyze the prologue. */
1742 result = s390_analyze_prologue (gdbarch, func,
f089c433 1743 get_frame_pc (this_frame), &data);
a8c99f38 1744 if (!result)
5769d3cd 1745 return 0;
5769d3cd 1746
a8c99f38 1747 /* If this was successful, we should have found the instruction that
34201ae3 1748 sets the stack pointer register to the previous value of the stack
a8c99f38 1749 pointer minus the frame size. */
3fc46200 1750 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1751 return 0;
a8c99f38 1752
34201ae3 1753 /* A frame size of zero at this point can mean either a real
a8c99f38 1754 frameless function, or else a failure to find the prologue.
34201ae3 1755 Perform some sanity checks to verify we really have a
a8c99f38
JB
1756 frameless function. */
1757 if (sp->k == 0)
5769d3cd 1758 {
34201ae3
UW
1759 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1760 size zero. This is only possible if the next frame is a sentinel
a8c99f38 1761 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1762 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1763 needed, instead the code should simpliy rely on its
1764 analysis. */
edb3359d
DJ
1765 next_frame = get_next_frame (this_frame);
1766 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1767 next_frame = get_next_frame (next_frame);
1768 if (next_frame
f089c433 1769 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1770 return 0;
5769d3cd 1771
a8c99f38
JB
1772 /* If we really have a frameless function, %r14 must be valid
1773 -- in particular, it must point to a different function. */
f089c433 1774 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1775 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1776 if (get_pc_function_start (reg) == func)
5769d3cd 1777 {
a8c99f38
JB
1778 /* However, there is one case where it *is* valid for %r14
1779 to point to the same function -- if this is a recursive
1780 call, and we have stopped in the prologue *before* the
1781 stack frame was allocated.
1782
1783 Recognize this case by looking ahead a bit ... */
5769d3cd 1784
a8c99f38 1785 struct s390_prologue_data data2;
3fc46200 1786 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1787
1788 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
1789 && pv_is_register (*sp, S390_SP_REGNUM)
1790 && sp->k != 0))
a8c99f38 1791 return 0;
5769d3cd 1792 }
5769d3cd 1793 }
5769d3cd
AC
1794
1795
a8c99f38
JB
1796 /* OK, we've found valid prologue data. */
1797 size = -sp->k;
5769d3cd 1798
a8c99f38
JB
1799 /* If the frame pointer originally also holds the same value
1800 as the stack pointer, we're probably using it. If it holds
1801 some other value -- even a constant offset -- it is most
1802 likely used as temp register. */
3fc46200 1803 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1804 frame_pointer = S390_FRAME_REGNUM;
1805 else
1806 frame_pointer = S390_SP_REGNUM;
1807
34201ae3
UW
1808 /* If we've detected a function with stack frame, we'll still have to
1809 treat it as frameless if we're currently within the function epilog
c378eb4e 1810 code at a point where the frame pointer has already been restored.
a8c99f38 1811 This can only happen in an innermost frame. */
0e100dab
AC
1812 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1813 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1814 next_frame = get_next_frame (this_frame);
1815 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1816 next_frame = get_next_frame (next_frame);
f089c433 1817 if (size > 0
edb3359d 1818 && (next_frame == NULL
f089c433 1819 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1820 {
a8c99f38
JB
1821 /* See the comment in s390_in_function_epilogue_p on why this is
1822 not completely reliable ... */
f089c433 1823 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1824 {
a8c99f38
JB
1825 memset (&data, 0, sizeof (data));
1826 size = 0;
1827 frame_pointer = S390_SP_REGNUM;
5769d3cd 1828 }
5769d3cd 1829 }
5769d3cd 1830
a8c99f38
JB
1831 /* Once we know the frame register and the frame size, we can unwind
1832 the current value of the frame register from the next frame, and
34201ae3 1833 add back the frame size to arrive that the previous frame's
a8c99f38 1834 stack pointer value. */
f089c433 1835 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1836 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1837
7803799a
UW
1838 /* Set up ABI call-saved/call-clobbered registers. */
1839 for (i = 0; i < S390_NUM_REGS; i++)
1840 if (!s390_register_call_saved (gdbarch, i))
1841 trad_frame_set_unknown (info->saved_regs, i);
1842
1843 /* CC is always call-clobbered. */
d6db1fab 1844 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1845
121d8485
UW
1846 /* Record the addresses of all register spill slots the prologue parser
1847 has recognized. Consider only registers defined as call-saved by the
1848 ABI; for call-clobbered registers the parser may have recognized
1849 spurious stores. */
5769d3cd 1850
7803799a
UW
1851 for (i = 0; i < 16; i++)
1852 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1853 && data.gpr_slot[i] != 0)
121d8485 1854 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1855
7803799a
UW
1856 for (i = 0; i < 16; i++)
1857 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1858 && data.fpr_slot[i] != 0)
1859 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1860
1861 /* Function return will set PC to %r14. */
d6db1fab 1862 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1863
1864 /* In frameless functions, we unwind simply by moving the return
1865 address to the PC. However, if we actually stored to the
1866 save area, use that -- we might only think the function frameless
1867 because we're in the middle of the prologue ... */
1868 if (size == 0
d6db1fab 1869 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1870 {
d6db1fab 1871 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1872 }
a8c99f38
JB
1873
1874 /* Another sanity check: unless this is a frameless function,
1875 we should have found spill slots for SP and PC.
1876 If not, we cannot unwind further -- this happens e.g. in
1877 libc's thread_start routine. */
1878 if (size > 0)
5769d3cd 1879 {
a8c99f38 1880 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1881 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1882 prev_sp = -1;
5769d3cd 1883 }
a8c99f38
JB
1884
1885 /* We use the current value of the frame register as local_base,
1886 and the top of the register save area as frame_base. */
1887 if (prev_sp != -1)
1888 {
1889 info->frame_base = prev_sp + 16*word_size + 32;
1890 info->local_base = prev_sp - size;
1891 }
1892
1893 info->func = func;
1894 return 1;
5769d3cd
AC
1895}
1896
a78f21af 1897static void
f089c433 1898s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1899 struct s390_unwind_cache *info)
5769d3cd 1900{
f089c433 1901 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1902 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1903 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1904 CORE_ADDR backchain;
1905 ULONGEST reg;
1906 LONGEST sp;
7803799a
UW
1907 int i;
1908
1909 /* Set up ABI call-saved/call-clobbered registers. */
1910 for (i = 0; i < S390_NUM_REGS; i++)
1911 if (!s390_register_call_saved (gdbarch, i))
1912 trad_frame_set_unknown (info->saved_regs, i);
1913
1914 /* CC is always call-clobbered. */
d6db1fab 1915 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1916
1917 /* Get the backchain. */
f089c433 1918 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1919 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1920
1921 /* A zero backchain terminates the frame chain. As additional
1922 sanity check, let's verify that the spill slot for SP in the
1923 save area pointed to by the backchain in fact links back to
1924 the save area. */
1925 if (backchain != 0
e17a4113
UW
1926 && safe_read_memory_integer (backchain + 15*word_size,
1927 word_size, byte_order, &sp)
a8c99f38
JB
1928 && (CORE_ADDR)sp == backchain)
1929 {
1930 /* We don't know which registers were saved, but it will have
34201ae3
UW
1931 to be at least %r14 and %r15. This will allow us to continue
1932 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
1933 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1934 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1935
1936 /* Function return will set PC to %r14. */
d6db1fab 1937 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1938 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1939
1940 /* We use the current value of the frame register as local_base,
34201ae3 1941 and the top of the register save area as frame_base. */
a8c99f38
JB
1942 info->frame_base = backchain + 16*word_size + 32;
1943 info->local_base = reg;
1944 }
1945
f089c433 1946 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1947}
1948
a8c99f38 1949static struct s390_unwind_cache *
f089c433 1950s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1951 void **this_prologue_cache)
1952{
62261490 1953 volatile struct gdb_exception ex;
a8c99f38 1954 struct s390_unwind_cache *info;
62261490 1955
a8c99f38
JB
1956 if (*this_prologue_cache)
1957 return *this_prologue_cache;
1958
1959 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1960 *this_prologue_cache = info;
f089c433 1961 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1962 info->func = -1;
1963 info->frame_base = -1;
1964 info->local_base = -1;
1965
62261490
PA
1966 TRY_CATCH (ex, RETURN_MASK_ERROR)
1967 {
1968 /* Try to use prologue analysis to fill the unwind cache.
1969 If this fails, fall back to reading the stack backchain. */
1970 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1971 s390_backchain_frame_unwind_cache (this_frame, info);
1972 }
1973 if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
1974 throw_exception (ex);
a8c99f38
JB
1975
1976 return info;
1977}
5769d3cd 1978
a78f21af 1979static void
f089c433 1980s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1981 void **this_prologue_cache,
1982 struct frame_id *this_id)
5769d3cd 1983{
a8c99f38 1984 struct s390_unwind_cache *info
f089c433 1985 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 1986
a8c99f38
JB
1987 if (info->frame_base == -1)
1988 return;
5769d3cd 1989
a8c99f38 1990 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
1991}
1992
f089c433
UW
1993static struct value *
1994s390_frame_prev_register (struct frame_info *this_frame,
1995 void **this_prologue_cache, int regnum)
a8c99f38 1996{
7803799a 1997 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1998 struct s390_unwind_cache *info
f089c433 1999 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2000
d6db1fab 2001 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2002}
2003
2004static const struct frame_unwind s390_frame_unwind = {
2005 NORMAL_FRAME,
8fbca658 2006 default_frame_unwind_stop_reason,
a8c99f38 2007 s390_frame_this_id,
f089c433
UW
2008 s390_frame_prev_register,
2009 NULL,
2010 default_frame_sniffer
a8c99f38
JB
2011};
2012
5769d3cd 2013
8e645ae7
AC
2014/* Code stubs and their stack frames. For things like PLTs and NULL
2015 function calls (where there is no true frame and the return address
2016 is in the RETADDR register). */
a8c99f38 2017
8e645ae7
AC
2018struct s390_stub_unwind_cache
2019{
a8c99f38
JB
2020 CORE_ADDR frame_base;
2021 struct trad_frame_saved_reg *saved_regs;
2022};
2023
8e645ae7 2024static struct s390_stub_unwind_cache *
f089c433 2025s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2026 void **this_prologue_cache)
5769d3cd 2027{
f089c433 2028 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2029 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2030 struct s390_stub_unwind_cache *info;
a8c99f38 2031 ULONGEST reg;
5c3cf190 2032
a8c99f38
JB
2033 if (*this_prologue_cache)
2034 return *this_prologue_cache;
5c3cf190 2035
8e645ae7 2036 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2037 *this_prologue_cache = info;
f089c433 2038 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2039
2040 /* The return address is in register %r14. */
d6db1fab 2041 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2042
2043 /* Retrieve stack pointer and determine our frame base. */
f089c433 2044 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2045 info->frame_base = reg + 16*word_size + 32;
2046
2047 return info;
5769d3cd
AC
2048}
2049
a8c99f38 2050static void
f089c433 2051s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2052 void **this_prologue_cache,
2053 struct frame_id *this_id)
5769d3cd 2054{
8e645ae7 2055 struct s390_stub_unwind_cache *info
f089c433
UW
2056 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2057 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2058}
5769d3cd 2059
f089c433
UW
2060static struct value *
2061s390_stub_frame_prev_register (struct frame_info *this_frame,
2062 void **this_prologue_cache, int regnum)
8e645ae7
AC
2063{
2064 struct s390_stub_unwind_cache *info
f089c433 2065 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2066 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2067}
2068
f089c433
UW
2069static int
2070s390_stub_frame_sniffer (const struct frame_unwind *self,
2071 struct frame_info *this_frame,
2072 void **this_prologue_cache)
a8c99f38 2073{
93d42b30 2074 CORE_ADDR addr_in_block;
8e645ae7
AC
2075 bfd_byte insn[S390_MAX_INSTR_SIZE];
2076
2077 /* If the current PC points to non-readable memory, we assume we
2078 have trapped due to an invalid function pointer call. We handle
2079 the non-existing current function like a PLT stub. */
f089c433 2080 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 2081 if (in_plt_section (addr_in_block)
f089c433
UW
2082 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2083 return 1;
2084 return 0;
a8c99f38 2085}
5769d3cd 2086
f089c433
UW
2087static const struct frame_unwind s390_stub_frame_unwind = {
2088 NORMAL_FRAME,
8fbca658 2089 default_frame_unwind_stop_reason,
f089c433
UW
2090 s390_stub_frame_this_id,
2091 s390_stub_frame_prev_register,
2092 NULL,
2093 s390_stub_frame_sniffer
2094};
2095
5769d3cd 2096
a8c99f38 2097/* Signal trampoline stack frames. */
5769d3cd 2098
a8c99f38
JB
2099struct s390_sigtramp_unwind_cache {
2100 CORE_ADDR frame_base;
2101 struct trad_frame_saved_reg *saved_regs;
2102};
5769d3cd 2103
a8c99f38 2104static struct s390_sigtramp_unwind_cache *
f089c433 2105s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2106 void **this_prologue_cache)
5769d3cd 2107{
f089c433 2108 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2109 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2110 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2111 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2112 struct s390_sigtramp_unwind_cache *info;
2113 ULONGEST this_sp, prev_sp;
7803799a 2114 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2115 int i;
2116
2117 if (*this_prologue_cache)
2118 return *this_prologue_cache;
5769d3cd 2119
a8c99f38
JB
2120 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2121 *this_prologue_cache = info;
f089c433 2122 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2123
f089c433
UW
2124 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2125 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2126 next_cfa = this_sp + 16*word_size + 32;
2127
2128 /* New-style RT frame:
2129 retcode + alignment (8 bytes)
2130 siginfo (128 bytes)
c378eb4e 2131 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2132 if (next_ra == next_cfa)
2133 {
f0f63663 2134 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2135 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2136 upper GPR halves if present. */
2137 sigreg_high_off = 8;
a8c99f38
JB
2138 }
2139
2140 /* Old-style RT frame and all non-RT frames:
2141 old signal mask (8 bytes)
c378eb4e 2142 pointer to sigregs. */
5769d3cd
AC
2143 else
2144 {
e17a4113
UW
2145 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2146 word_size, byte_order);
7803799a
UW
2147 /* sigregs are followed by signo (4 bytes), then by the
2148 upper GPR halves if present. */
2149 sigreg_high_off = 4;
a8c99f38 2150 }
5769d3cd 2151
a8c99f38 2152 /* The sigregs structure looks like this:
34201ae3
UW
2153 long psw_mask;
2154 long psw_addr;
2155 long gprs[16];
2156 int acrs[16];
2157 int fpc;
2158 int __pad;
2159 double fprs[16]; */
5769d3cd 2160
7803799a
UW
2161 /* PSW mask and address. */
2162 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2163 sigreg_ptr += word_size;
7803799a 2164 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2165 sigreg_ptr += word_size;
2166
2167 /* Then the GPRs. */
2168 for (i = 0; i < 16; i++)
2169 {
2170 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2171 sigreg_ptr += word_size;
2172 }
2173
2174 /* Then the ACRs. */
2175 for (i = 0; i < 16; i++)
2176 {
2177 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2178 sigreg_ptr += 4;
5769d3cd 2179 }
5769d3cd 2180
a8c99f38
JB
2181 /* The floating-point control word. */
2182 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2183 sigreg_ptr += 8;
5769d3cd 2184
a8c99f38
JB
2185 /* And finally the FPRs. */
2186 for (i = 0; i < 16; i++)
2187 {
2188 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2189 sigreg_ptr += 8;
2190 }
2191
7803799a
UW
2192 /* If we have them, the GPR upper halves are appended at the end. */
2193 sigreg_ptr += sigreg_high_off;
2194 if (tdep->gpr_full_regnum != -1)
2195 for (i = 0; i < 16; i++)
2196 {
34201ae3 2197 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2198 sigreg_ptr += 4;
2199 }
2200
a8c99f38
JB
2201 /* Restore the previous frame's SP. */
2202 prev_sp = read_memory_unsigned_integer (
2203 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2204 word_size, byte_order);
5769d3cd 2205
a8c99f38
JB
2206 /* Determine our frame base. */
2207 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2208
a8c99f38 2209 return info;
5769d3cd
AC
2210}
2211
a8c99f38 2212static void
f089c433 2213s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2214 void **this_prologue_cache,
2215 struct frame_id *this_id)
5769d3cd 2216{
a8c99f38 2217 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2218 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2219 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2220}
2221
f089c433
UW
2222static struct value *
2223s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2224 void **this_prologue_cache, int regnum)
a8c99f38
JB
2225{
2226 struct s390_sigtramp_unwind_cache *info
f089c433 2227 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2228 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2229}
2230
f089c433
UW
2231static int
2232s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2233 struct frame_info *this_frame,
2234 void **this_prologue_cache)
5769d3cd 2235{
f089c433 2236 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2237 bfd_byte sigreturn[2];
4c8287ac 2238
8defab1a 2239 if (target_read_memory (pc, sigreturn, 2))
f089c433 2240 return 0;
4c8287ac 2241
237b092b 2242 if (sigreturn[0] != op_svc)
f089c433 2243 return 0;
5769d3cd 2244
a8c99f38
JB
2245 if (sigreturn[1] != 119 /* sigreturn */
2246 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2247 return 0;
34201ae3 2248
f089c433 2249 return 1;
5769d3cd
AC
2250}
2251
f089c433
UW
2252static const struct frame_unwind s390_sigtramp_frame_unwind = {
2253 SIGTRAMP_FRAME,
8fbca658 2254 default_frame_unwind_stop_reason,
f089c433
UW
2255 s390_sigtramp_frame_this_id,
2256 s390_sigtramp_frame_prev_register,
2257 NULL,
2258 s390_sigtramp_frame_sniffer
2259};
2260
237b092b
AA
2261/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2262 upon error. */
2263
2264static LONGEST
2265s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2266 ptid_t ptid)
2267{
2268 struct regcache *regs = get_thread_regcache (ptid);
2269 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2270 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2271 ULONGEST pc;
2272 ULONGEST svc_number = -1;
2273 unsigned opcode;
2274
2275 /* Assume that the PC points after the 2-byte SVC instruction. We
2276 don't currently support SVC via EXECUTE. */
2277 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2278 pc -= 2;
2279 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2280 if (opcode != op_svc)
2281 return -1;
2282
2283 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2284 byte_order);
2285 if (svc_number == 0)
2286 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2287
2288 return svc_number;
2289}
2290
4c8287ac 2291
a8c99f38
JB
2292/* Frame base handling. */
2293
2294static CORE_ADDR
f089c433 2295s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2296{
a8c99f38 2297 struct s390_unwind_cache *info
f089c433 2298 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2299 return info->frame_base;
2300}
2301
2302static CORE_ADDR
f089c433 2303s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2304{
2305 struct s390_unwind_cache *info
f089c433 2306 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2307 return info->local_base;
2308}
2309
2310static const struct frame_base s390_frame_base = {
2311 &s390_frame_unwind,
2312 s390_frame_base_address,
2313 s390_local_base_address,
2314 s390_local_base_address
2315};
2316
2317static CORE_ADDR
2318s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2319{
7803799a 2320 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2321 ULONGEST pc;
7803799a 2322 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2323 return gdbarch_addr_bits_remove (gdbarch, pc);
2324}
2325
2326static CORE_ADDR
2327s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2328{
2329 ULONGEST sp;
2330 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2331 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2332}
2333
2334
a431654a
AC
2335/* DWARF-2 frame support. */
2336
7803799a
UW
2337static struct value *
2338s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2339 int regnum)
2340{
d6db1fab 2341 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2342}
2343
a431654a
AC
2344static void
2345s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2346 struct dwarf2_frame_state_reg *reg,
4a4e5149 2347 struct frame_info *this_frame)
a431654a
AC
2348{
2349 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2350
d6db1fab
UW
2351 /* The condition code (and thus PSW mask) is call-clobbered. */
2352 if (regnum == S390_PSWM_REGNUM)
2353 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2354
2355 /* The PSW address unwinds to the return address. */
2356 else if (regnum == S390_PSWA_REGNUM)
2357 reg->how = DWARF2_FRAME_REG_RA;
2358
7803799a
UW
2359 /* Fixed registers are call-saved or call-clobbered
2360 depending on the ABI in use. */
d6db1fab 2361 else if (regnum < S390_NUM_REGS)
a431654a 2362 {
7803799a 2363 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2364 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2365 else
a431654a 2366 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2367 }
a431654a 2368
d6db1fab
UW
2369 /* We install a special function to unwind pseudos. */
2370 else
7803799a
UW
2371 {
2372 reg->how = DWARF2_FRAME_REG_FN;
2373 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2374 }
2375}
2376
2377
b0cf273e
JB
2378/* Dummy function calls. */
2379
78f8b424
JB
2380/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2381 "Integer-like" types are those that should be passed the way
2382 integers are: integers, enums, ranges, characters, and booleans. */
2383static int
2384is_integer_like (struct type *type)
2385{
2386 enum type_code code = TYPE_CODE (type);
2387
2388 return (code == TYPE_CODE_INT
34201ae3
UW
2389 || code == TYPE_CODE_ENUM
2390 || code == TYPE_CODE_RANGE
2391 || code == TYPE_CODE_CHAR
2392 || code == TYPE_CODE_BOOL);
78f8b424
JB
2393}
2394
78f8b424
JB
2395/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2396 "Pointer-like" types are those that should be passed the way
2397 pointers are: pointers and references. */
2398static int
2399is_pointer_like (struct type *type)
2400{
2401 enum type_code code = TYPE_CODE (type);
2402
2403 return (code == TYPE_CODE_PTR
34201ae3 2404 || code == TYPE_CODE_REF);
78f8b424
JB
2405}
2406
2407
20a940cc
JB
2408/* Return non-zero if TYPE is a `float singleton' or `double
2409 singleton', zero otherwise.
2410
2411 A `T singleton' is a struct type with one member, whose type is
2412 either T or a `T singleton'. So, the following are all float
2413 singletons:
2414
2415 struct { float x };
2416 struct { struct { float x; } x; };
2417 struct { struct { struct { float x; } x; } x; };
2418
2419 ... and so on.
2420
b0cf273e
JB
2421 All such structures are passed as if they were floats or doubles,
2422 as the (revised) ABI says. */
20a940cc
JB
2423static int
2424is_float_singleton (struct type *type)
2425{
b0cf273e
JB
2426 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2427 {
2428 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2429 CHECK_TYPEDEF (singleton_type);
2430
2431 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2432 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2433 || is_float_singleton (singleton_type));
2434 }
2435
2436 return 0;
20a940cc
JB
2437}
2438
2439
2440/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2441 "Struct-like" types are those that should be passed as structs are:
2442 structs and unions.
2443
2444 As an odd quirk, not mentioned in the ABI, GCC passes float and
2445 double singletons as if they were a plain float, double, etc. (The
2446 corresponding union types are handled normally.) So we exclude
2447 those types here. *shrug* */
2448static int
2449is_struct_like (struct type *type)
2450{
2451 enum type_code code = TYPE_CODE (type);
2452
2453 return (code == TYPE_CODE_UNION
34201ae3 2454 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
20a940cc
JB
2455}
2456
2457
2458/* Return non-zero if TYPE is a float-like type, zero otherwise.
2459 "Float-like" types are those that should be passed as
2460 floating-point values are.
2461
2462 You'd think this would just be floats, doubles, long doubles, etc.
2463 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2464 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2465 corresponding union types are handled normally.) So we include
20a940cc
JB
2466 those types here. *shrug* */
2467static int
2468is_float_like (struct type *type)
2469{
2470 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2471 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
34201ae3 2472 || is_float_singleton (type));
20a940cc
JB
2473}
2474
2475
78f8b424 2476static int
b0cf273e 2477is_power_of_two (unsigned int n)
78f8b424 2478{
b0cf273e 2479 return ((n & (n - 1)) == 0);
78f8b424
JB
2480}
2481
b0cf273e
JB
2482/* Return non-zero if TYPE should be passed as a pointer to a copy,
2483 zero otherwise. */
4d819d0e 2484static int
b0cf273e 2485s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2486{
354ecfd5 2487 if (TYPE_LENGTH (type) > 8)
b0cf273e 2488 return 1;
4d819d0e 2489
56b9d9ac
UW
2490 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2491 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2492 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2493}
2494
b0cf273e
JB
2495/* Return non-zero if TYPE should be passed in a float register
2496 if possible. */
78f8b424 2497static int
b0cf273e 2498s390_function_arg_float (struct type *type)
78f8b424 2499{
354ecfd5 2500 if (TYPE_LENGTH (type) > 8)
b0cf273e 2501 return 0;
78f8b424 2502
b0cf273e 2503 return is_float_like (type);
4d819d0e
JB
2504}
2505
b0cf273e
JB
2506/* Return non-zero if TYPE should be passed in an integer register
2507 (or a pair of integer registers) if possible. */
78f8b424 2508static int
b0cf273e 2509s390_function_arg_integer (struct type *type)
78f8b424 2510{
354ecfd5 2511 if (TYPE_LENGTH (type) > 8)
b0cf273e 2512 return 0;
78f8b424 2513
b0cf273e
JB
2514 return is_integer_like (type)
2515 || is_pointer_like (type)
354ecfd5 2516 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2517}
2518
78f8b424
JB
2519/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2520 word as required for the ABI. */
2521static LONGEST
e17a4113 2522extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2523{
e17a4113 2524 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2525 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2526
2527 /* Even structs get passed in the least significant bits of the
2528 register / memory word. It's not really right to extract them as
2529 an integer, but it does take care of the extension. */
2530 if (TYPE_UNSIGNED (type))
0fd88904 2531 return extract_unsigned_integer (value_contents (arg),
34201ae3 2532 TYPE_LENGTH (type), byte_order);
78f8b424 2533 else
0fd88904 2534 return extract_signed_integer (value_contents (arg),
34201ae3 2535 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2536}
2537
2538
78f8b424
JB
2539/* Return the alignment required by TYPE. */
2540static int
2541alignment_of (struct type *type)
2542{
2543 int alignment;
2544
2545 if (is_integer_like (type)
2546 || is_pointer_like (type)
a16b8bcd
UW
2547 || TYPE_CODE (type) == TYPE_CODE_FLT
2548 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2549 alignment = TYPE_LENGTH (type);
2550 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
34201ae3 2551 || TYPE_CODE (type) == TYPE_CODE_UNION)
78f8b424
JB
2552 {
2553 int i;
2554
2555 alignment = 1;
2556 for (i = 0; i < TYPE_NFIELDS (type); i++)
34201ae3
UW
2557 {
2558 int field_alignment
56b9d9ac 2559 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424 2560
34201ae3
UW
2561 if (field_alignment > alignment)
2562 alignment = field_alignment;
2563 }
78f8b424
JB
2564 }
2565 else
2566 alignment = 1;
2567
2568 /* Check that everything we ever return is a power of two. Lots of
2569 code doesn't want to deal with aligning things to arbitrary
2570 boundaries. */
2571 gdb_assert ((alignment & (alignment - 1)) == 0);
2572
2573 return alignment;
2574}
2575
2576
2577/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2578 place to be passed to a function, as specified by the "GNU/Linux
2579 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2580
2581 SP is the current stack pointer. We must put arguments, links,
2582 padding, etc. whereever they belong, and return the new stack
2583 pointer value.
34201ae3 2584
78f8b424
JB
2585 If STRUCT_RETURN is non-zero, then the function we're calling is
2586 going to return a structure by value; STRUCT_ADDR is the address of
2587 a block we've allocated for it on the stack.
2588
2589 Our caller has taken care of any type promotions needed to satisfy
2590 prototypes or the old K&R argument-passing rules. */
a78f21af 2591static CORE_ADDR
7d9b040b 2592s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2593 struct regcache *regcache, CORE_ADDR bp_addr,
2594 int nargs, struct value **args, CORE_ADDR sp,
2595 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2596{
b0cf273e
JB
2597 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2598 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2599 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2600 int i;
5769d3cd 2601
78f8b424
JB
2602 /* If the i'th argument is passed as a reference to a copy, then
2603 copy_addr[i] is the address of the copy we made. */
2604 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2605
c0cc4c83 2606 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2607 for (i = 0; i < nargs; i++)
2608 {
2609 struct value *arg = args[i];
56b9d9ac 2610 struct type *type = check_typedef (value_type (arg));
5769d3cd 2611
b0cf273e 2612 if (s390_function_arg_pass_by_reference (type))
34201ae3
UW
2613 {
2614 sp -= TYPE_LENGTH (type);
2615 sp = align_down (sp, alignment_of (type));
2616 copy_addr[i] = sp;
2617 }
5769d3cd 2618 }
5769d3cd 2619
78f8b424
JB
2620 /* Reserve space for the parameter area. As a conservative
2621 simplification, we assume that everything will be passed on the
34201ae3 2622 stack. Since every argument larger than 8 bytes will be
b0cf273e
JB
2623 passed by reference, we use this simple upper bound. */
2624 sp -= nargs * 8;
78f8b424 2625
78f8b424
JB
2626 /* After all that, make sure it's still aligned on an eight-byte
2627 boundary. */
5b03f266 2628 sp = align_down (sp, 8);
78f8b424 2629
c0cc4c83
UW
2630 /* Allocate the standard frame areas: the register save area, the
2631 word reserved for the compiler (which seems kind of meaningless),
2632 and the back chain pointer. */
2633 sp -= 16*word_size + 32;
2634
2635 /* Now we have the final SP value. Make sure we didn't underflow;
2636 on 31-bit, this would result in addresses with the high bit set,
2637 which causes confusion elsewhere. Note that if we error out
2638 here, stack and registers remain untouched. */
2639 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2640 error (_("Stack overflow"));
2641
2642
78f8b424
JB
2643 /* Finally, place the actual parameters, working from SP towards
2644 higher addresses. The code above is supposed to reserve enough
2645 space for this. */
2646 {
2647 int fr = 0;
2648 int gr = 2;
c0cc4c83 2649 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2650
b0cf273e 2651 /* A struct is returned using general register 2. */
4d819d0e 2652 if (struct_return)
b0cf273e
JB
2653 {
2654 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2655 struct_addr);
b0cf273e
JB
2656 gr++;
2657 }
4d819d0e 2658
78f8b424
JB
2659 for (i = 0; i < nargs; i++)
2660 {
34201ae3
UW
2661 struct value *arg = args[i];
2662 struct type *type = check_typedef (value_type (arg));
2663 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2664
2665 if (s390_function_arg_pass_by_reference (type))
2666 {
c0cc4c83
UW
2667 /* Actually copy the argument contents to the stack slot
2668 that was reserved above. */
2669 write_memory (copy_addr[i], value_contents (arg), length);
2670
b0cf273e
JB
2671 if (gr <= 6)
2672 {
2673 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2674 copy_addr[i]);
b0cf273e
JB
2675 gr++;
2676 }
2677 else
2678 {
e17a4113
UW
2679 write_memory_unsigned_integer (starg, word_size, byte_order,
2680 copy_addr[i]);
b0cf273e
JB
2681 starg += word_size;
2682 }
2683 }
2684 else if (s390_function_arg_float (type))
2685 {
2686 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2687 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2688 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2689 {
2690 /* When we store a single-precision value in an FP register,
2691 it occupies the leftmost bits. */
2692 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2693 0, length, value_contents (arg));
b0cf273e
JB
2694 fr += 2;
2695 }
2696 else
2697 {
2698 /* When we store a single-precision value in a stack slot,
2699 it occupies the rightmost bits. */
2700 starg = align_up (starg + length, word_size);
34201ae3 2701 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2702 }
2703 }
2704 else if (s390_function_arg_integer (type) && length <= word_size)
2705 {
2706 if (gr <= 6)
2707 {
2708 /* Integer arguments are always extended to word size. */
2709 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2710 extend_simple_arg (gdbarch,
2711 arg));
b0cf273e
JB
2712 gr++;
2713 }
2714 else
2715 {
2716 /* Integer arguments are always extended to word size. */
e17a4113 2717 write_memory_signed_integer (starg, word_size, byte_order,
34201ae3
UW
2718 extend_simple_arg (gdbarch, arg));
2719 starg += word_size;
b0cf273e
JB
2720 }
2721 }
2722 else if (s390_function_arg_integer (type) && length == 2*word_size)
2723 {
2724 if (gr <= 5)
2725 {
2726 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2727 value_contents (arg));
b0cf273e 2728 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2729 value_contents (arg) + word_size);
b0cf273e
JB
2730 gr += 2;
2731 }
2732 else
2733 {
2734 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2735 in it, then don't go back and use it again later. */
2736 gr = 7;
2737
0fd88904 2738 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2739 starg += length;
2740 }
2741 }
2742 else
e2e0b3e5 2743 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2744 }
2745 }
2746
8de7d199
UW
2747 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2748 if (word_size == 4)
2749 {
2750 ULONGEST pswa;
2751 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2752 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2753 }
b0cf273e 2754 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2755
b0cf273e
JB
2756 /* Store updated stack pointer. */
2757 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2758
a8c99f38 2759 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2760 which is actually the top of the register save area. */
2761 return sp + 16*word_size + 32;
5769d3cd
AC
2762}
2763
f089c433 2764/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2765 dummy frame. The frame ID's base needs to match the TOS value
2766 returned by push_dummy_call, and the PC match the dummy frame's
2767 breakpoint. */
2768static struct frame_id
f089c433 2769s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2770{
a8c99f38 2771 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2772 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2773 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2774
121d8485 2775 return frame_id_build (sp + 16*word_size + 32,
34201ae3 2776 get_frame_pc (this_frame));
b0cf273e 2777}
c8f9d51c 2778
4074e13c
JB
2779static CORE_ADDR
2780s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2781{
2782 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2783 always be aligned on an eight-byte boundary. */
2784 return (addr & -8);
2785}
2786
2787
b0cf273e
JB
2788/* Function return value access. */
2789
2790static enum return_value_convention
2791s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2792{
354ecfd5 2793 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2794 return RETURN_VALUE_STRUCT_CONVENTION;
2795
2796 switch (TYPE_CODE (type))
2797 {
2798 case TYPE_CODE_STRUCT:
2799 case TYPE_CODE_UNION:
2800 case TYPE_CODE_ARRAY:
56b9d9ac 2801 case TYPE_CODE_COMPLEX:
b0cf273e 2802 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2803
b0cf273e
JB
2804 default:
2805 return RETURN_VALUE_REGISTER_CONVENTION;
2806 }
c8f9d51c
JB
2807}
2808
b0cf273e 2809static enum return_value_convention
6a3a010b 2810s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2811 struct type *type, struct regcache *regcache,
2812 gdb_byte *out, const gdb_byte *in)
5769d3cd 2813{
e17a4113 2814 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2815 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2816 enum return_value_convention rvc;
2817 int length;
2818
2819 type = check_typedef (type);
2820 rvc = s390_return_value_convention (gdbarch, type);
2821 length = TYPE_LENGTH (type);
2822
b0cf273e
JB
2823 if (in)
2824 {
2825 switch (rvc)
2826 {
2827 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2828 if (TYPE_CODE (type) == TYPE_CODE_FLT
2829 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2830 {
2831 /* When we store a single-precision value in an FP register,
2832 it occupies the leftmost bits. */
34201ae3 2833 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2834 0, length, in);
2835 }
2836 else if (length <= word_size)
2837 {
2838 /* Integer arguments are always extended to word size. */
2839 if (TYPE_UNSIGNED (type))
2840 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2841 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2842 else
2843 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2844 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2845 }
2846 else if (length == 2*word_size)
2847 {
2848 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2849 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2850 }
2851 else
e2e0b3e5 2852 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2853 break;
2854
2855 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2856 error (_("Cannot set function return value."));
b0cf273e
JB
2857 break;
2858 }
2859 }
2860 else if (out)
2861 {
2862 switch (rvc)
2863 {
2864 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2865 if (TYPE_CODE (type) == TYPE_CODE_FLT
2866 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2867 {
2868 /* When we store a single-precision value in an FP register,
2869 it occupies the leftmost bits. */
34201ae3 2870 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2871 0, length, out);
2872 }
2873 else if (length <= word_size)
2874 {
2875 /* Integer arguments occupy the rightmost bits. */
34201ae3 2876 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
b0cf273e
JB
2877 word_size - length, length, out);
2878 }
2879 else if (length == 2*word_size)
2880 {
2881 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2882 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2883 }
2884 else
e2e0b3e5 2885 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2886 break;
5769d3cd 2887
b0cf273e 2888 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2889 error (_("Function return value unknown."));
b0cf273e
JB
2890 break;
2891 }
2892 }
2893
2894 return rvc;
2895}
5769d3cd
AC
2896
2897
a8c99f38
JB
2898/* Breakpoints. */
2899
43af2100 2900static const gdb_byte *
c378eb4e
MS
2901s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2902 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2903{
43af2100 2904 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2905
2906 *lenptr = sizeof (breakpoint);
2907 return breakpoint;
2908}
2909
5769d3cd 2910
a8c99f38 2911/* Address handling. */
5769d3cd
AC
2912
2913static CORE_ADDR
24568a2c 2914s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2915{
a8c99f38 2916 return addr & 0x7fffffff;
5769d3cd
AC
2917}
2918
ffc65945
KB
2919static int
2920s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2921{
2922 if (byte_size == 4)
119ac181 2923 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2924 else
2925 return 0;
2926}
2927
2928static const char *
2929s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2930{
119ac181 2931 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2932 return "mode32";
2933 else
2934 return NULL;
2935}
2936
a78f21af 2937static int
c378eb4e
MS
2938s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2939 const char *name,
ffc65945
KB
2940 int *type_flags_ptr)
2941{
2942 if (strcmp (name, "mode32") == 0)
2943 {
119ac181 2944 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2945 return 1;
2946 }
2947 else
2948 return 0;
2949}
2950
60abeae4
AA
2951/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
2952 "-mcmodel=large". */
a2658feb
JK
2953
2954static char *
2955s390_gcc_target_options (struct gdbarch *gdbarch)
2956{
60abeae4
AA
2957 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
2958}
2959
2960/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
2961 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
2962 always "s390". Note that an s390x compiler supports "-m31" as
2963 well. */
2964
2965static const char *
2966s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
2967{
2968 return "s390x?";
a2658feb
JK
2969}
2970
55aa24fb
SDJ
2971/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2972 gdbarch.h. */
2973
2974static int
2975s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2976{
2977 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2978 or indirection. */
2979 || *s == '%' /* Register access. */
2980 || isdigit (*s)); /* Literal number. */
2981}
2982
a8c99f38
JB
2983/* Set up gdbarch struct. */
2984
a78f21af 2985static struct gdbarch *
5769d3cd
AC
2986s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2987{
7803799a
UW
2988 const struct target_desc *tdesc = info.target_desc;
2989 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2990 struct gdbarch *gdbarch;
2991 struct gdbarch_tdep *tdep;
7803799a
UW
2992 int tdep_abi;
2993 int have_upper = 0;
c642a434
UW
2994 int have_linux_v1 = 0;
2995 int have_linux_v2 = 0;
5aa82d05 2996 int have_tdb = 0;
550bdf96 2997 int have_vx = 0;
7803799a 2998 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
2999 static const char *const stap_register_prefixes[] = { "%", NULL };
3000 static const char *const stap_register_indirection_prefixes[] = { "(",
3001 NULL };
3002 static const char *const stap_register_indirection_suffixes[] = { ")",
3003 NULL };
7803799a
UW
3004
3005 /* Default ABI and register size. */
3006 switch (info.bfd_arch_info->mach)
3007 {
3008 case bfd_mach_s390_31:
3009 tdep_abi = ABI_LINUX_S390;
3010 break;
3011
3012 case bfd_mach_s390_64:
3013 tdep_abi = ABI_LINUX_ZSERIES;
3014 break;
3015
3016 default:
3017 return NULL;
3018 }
3019
3020 /* Use default target description if none provided by the target. */
3021 if (!tdesc_has_registers (tdesc))
3022 {
3023 if (tdep_abi == ABI_LINUX_S390)
3024 tdesc = tdesc_s390_linux32;
3025 else
3026 tdesc = tdesc_s390x_linux64;
3027 }
3028
3029 /* Check any target description for validity. */
3030 if (tdesc_has_registers (tdesc))
3031 {
3032 static const char *const gprs[] = {
3033 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3034 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3035 };
3036 static const char *const fprs[] = {
3037 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3038 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3039 };
3040 static const char *const acrs[] = {
3041 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3042 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3043 };
3044 static const char *const gprs_lower[] = {
3045 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3046 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3047 };
3048 static const char *const gprs_upper[] = {
3049 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3050 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3051 };
4ac33720
UW
3052 static const char *const tdb_regs[] = {
3053 "tdb0", "tac", "tct", "atia",
3054 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
3055 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
3056 };
550bdf96
AA
3057 static const char *const vxrs_low[] = {
3058 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
3059 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
3060 };
3061 static const char *const vxrs_high[] = {
3062 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
3063 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
3064 };
7803799a
UW
3065 const struct tdesc_feature *feature;
3066 int i, valid_p = 1;
3067
3068 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3069 if (feature == NULL)
3070 return NULL;
3071
3072 tdesc_data = tdesc_data_alloc ();
3073
3074 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3075 S390_PSWM_REGNUM, "pswm");
3076 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3077 S390_PSWA_REGNUM, "pswa");
3078
3079 if (tdesc_unnumbered_register (feature, "r0"))
3080 {
3081 for (i = 0; i < 16; i++)
3082 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3083 S390_R0_REGNUM + i, gprs[i]);
3084 }
3085 else
3086 {
3087 have_upper = 1;
3088
3089 for (i = 0; i < 16; i++)
3090 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3091 S390_R0_REGNUM + i,
3092 gprs_lower[i]);
3093 for (i = 0; i < 16; i++)
3094 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3095 S390_R0_UPPER_REGNUM + i,
3096 gprs_upper[i]);
3097 }
3098
3099 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3100 if (feature == NULL)
3101 {
3102 tdesc_data_cleanup (tdesc_data);
3103 return NULL;
3104 }
3105
3106 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3107 S390_FPC_REGNUM, "fpc");
3108 for (i = 0; i < 16; i++)
3109 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3110 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3111
7803799a
UW
3112 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3113 if (feature == NULL)
3114 {
3115 tdesc_data_cleanup (tdesc_data);
3116 return NULL;
3117 }
3118
3119 for (i = 0; i < 16; i++)
3120 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3121 S390_A0_REGNUM + i, acrs[i]);
3122
94eae614 3123 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3124 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3125 if (feature)
3126 {
3127 tdesc_numbered_register (feature, tdesc_data,
3128 S390_ORIG_R2_REGNUM, "orig_r2");
3129
3130 if (tdesc_numbered_register (feature, tdesc_data,
3131 S390_LAST_BREAK_REGNUM, "last_break"))
3132 have_linux_v1 = 1;
3133
3134 if (tdesc_numbered_register (feature, tdesc_data,
3135 S390_SYSTEM_CALL_REGNUM, "system_call"))
3136 have_linux_v2 = 1;
3137
3138 if (have_linux_v2 > have_linux_v1)
3139 valid_p = 0;
3140 }
3141
4ac33720
UW
3142 /* Transaction diagnostic block. */
3143 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3144 if (feature)
3145 {
3146 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3147 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3148 S390_TDB_DWORD0_REGNUM + i,
3149 tdb_regs[i]);
5aa82d05 3150 have_tdb = 1;
4ac33720
UW
3151 }
3152
550bdf96
AA
3153 /* Vector registers. */
3154 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
3155 if (feature)
3156 {
3157 for (i = 0; i < 16; i++)
3158 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3159 S390_V0_LOWER_REGNUM + i,
3160 vxrs_low[i]);
3161 for (i = 0; i < 16; i++)
3162 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3163 S390_V16_REGNUM + i,
3164 vxrs_high[i]);
3165 have_vx = 1;
3166 }
3167
7803799a
UW
3168 if (!valid_p)
3169 {
3170 tdesc_data_cleanup (tdesc_data);
3171 return NULL;
3172 }
3173 }
5769d3cd 3174
7803799a
UW
3175 /* Find a candidate among extant architectures. */
3176 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3177 arches != NULL;
3178 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3179 {
3180 tdep = gdbarch_tdep (arches->gdbarch);
3181 if (!tdep)
3182 continue;
3183 if (tdep->abi != tdep_abi)
3184 continue;
3185 if ((tdep->gpr_full_regnum != -1) != have_upper)
3186 continue;
3187 if (tdesc_data != NULL)
3188 tdesc_data_cleanup (tdesc_data);
3189 return arches->gdbarch;
3190 }
5769d3cd 3191
7803799a 3192 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 3193 tdep = XCNEW (struct gdbarch_tdep);
7803799a 3194 tdep->abi = tdep_abi;
5aa82d05
AA
3195 tdep->have_linux_v1 = have_linux_v1;
3196 tdep->have_linux_v2 = have_linux_v2;
3197 tdep->have_tdb = have_tdb;
d0f54f9d 3198 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3199
3200 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3201 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3202
1de90795
UW
3203 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3204 We can safely let them default to 128-bit, since the debug info
3205 will give the size of type actually used in each case. */
3206 set_gdbarch_long_double_bit (gdbarch, 128);
3207 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3208
aaab4dba 3209 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3210 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3211 always. */
5769d3cd 3212 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3213 /* Stack grows downward. */
3214 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3215 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3216 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3217 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3218
7803799a 3219 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3220 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3221 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3222 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3223 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3224 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7803799a 3225 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
5aa82d05
AA
3226 set_gdbarch_iterate_over_regset_sections (gdbarch,
3227 s390_iterate_over_regset_sections);
c642a434
UW
3228 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3229 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3230 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3231 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3232 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3233 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3234 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 3235 s390_pseudo_register_reggroup_p);
7803799a 3236 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
550bdf96 3237 set_gdbarch_register_name (gdbarch, s390_register_name);
7803799a
UW
3238
3239 /* Assign pseudo register numbers. */
3240 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3241 last_pseudo_reg = first_pseudo_reg;
3242 tdep->gpr_full_regnum = -1;
3243 if (have_upper)
3244 {
3245 tdep->gpr_full_regnum = last_pseudo_reg;
3246 last_pseudo_reg += 16;
3247 }
550bdf96
AA
3248 tdep->v0_full_regnum = -1;
3249 if (have_vx)
3250 {
3251 tdep->v0_full_regnum = last_pseudo_reg;
3252 last_pseudo_reg += 16;
3253 }
7803799a
UW
3254 tdep->pc_regnum = last_pseudo_reg++;
3255 tdep->cc_regnum = last_pseudo_reg++;
3256 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3257 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3258
b0cf273e
JB
3259 /* Inferior function calls. */
3260 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3261 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3262 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3263 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3264
237b092b
AA
3265 /* Syscall handling. */
3266 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3267
a8c99f38 3268 /* Frame handling. */
a431654a 3269 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3270 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3271 dwarf2_append_unwinders (gdbarch);
a431654a 3272 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3273 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3274 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3275 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3276 frame_base_set_default (gdbarch, &s390_frame_base);
3277 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3278 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3279
1db4e8a0
UW
3280 /* Displaced stepping. */
3281 set_gdbarch_displaced_step_copy_insn (gdbarch,
34201ae3 3282 simple_displaced_step_copy_insn);
1db4e8a0
UW
3283 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3284 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 3285 simple_displaced_step_free_closure);
1db4e8a0 3286 set_gdbarch_displaced_step_location (gdbarch,
34201ae3 3287 displaced_step_at_entry_point);
1db4e8a0
UW
3288 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3289
70728992
PA
3290 /* Note that GNU/Linux is the only OS supported on this
3291 platform. */
3292 linux_init_abi (info, gdbarch);
3293
7803799a 3294 switch (tdep->abi)
5769d3cd 3295 {
7803799a 3296 case ABI_LINUX_S390:
5769d3cd 3297 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3298 set_solib_svr4_fetch_link_map_offsets
3299 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 3300
458c8db8 3301 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
5769d3cd 3302 break;
b0cf273e 3303
7803799a 3304 case ABI_LINUX_ZSERIES:
5769d3cd
AC
3305 set_gdbarch_long_bit (gdbarch, 64);
3306 set_gdbarch_long_long_bit (gdbarch, 64);
3307 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3308 set_solib_svr4_fetch_link_map_offsets
3309 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 3310 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 3311 s390_address_class_type_flags);
ffc65945 3312 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 3313 s390_address_class_type_flags_to_name);
ffc65945 3314 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 3315 s390_address_class_name_to_type_flags);
d851a69a 3316 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X);
5769d3cd
AC
3317 break;
3318 }
3319
36482093
AC
3320 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3321
982e9687
UW
3322 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3323
b2756930
KB
3324 /* Enable TLS support. */
3325 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 3326 svr4_fetch_objfile_link_map);
b2756930 3327
1dd635ac
UW
3328 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3329
55aa24fb 3330 /* SystemTap functions. */
05c0465e
SDJ
3331 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3332 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3333 stap_register_indirection_prefixes);
3334 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3335 stap_register_indirection_suffixes);
55aa24fb 3336 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
60abeae4
AA
3337 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
3338 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
55aa24fb 3339
5769d3cd
AC
3340 return gdbarch;
3341}
3342
3343
a78f21af
AC
3344extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3345
5769d3cd 3346void
5ae5f592 3347_initialize_s390_tdep (void)
5769d3cd 3348{
5769d3cd
AC
3349 /* Hook us into the gdbarch mechanism. */
3350 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3351
94eae614 3352 /* Initialize the GNU/Linux target descriptions. */
7803799a 3353 initialize_tdesc_s390_linux32 ();
c642a434
UW
3354 initialize_tdesc_s390_linux32v1 ();
3355 initialize_tdesc_s390_linux32v2 ();
7803799a 3356 initialize_tdesc_s390_linux64 ();
c642a434
UW
3357 initialize_tdesc_s390_linux64v1 ();
3358 initialize_tdesc_s390_linux64v2 ();
4ac33720 3359 initialize_tdesc_s390_te_linux64 ();
550bdf96
AA
3360 initialize_tdesc_s390_vx_linux64 ();
3361 initialize_tdesc_s390_tevx_linux64 ();
7803799a 3362 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3363 initialize_tdesc_s390x_linux64v1 ();
3364 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3365 initialize_tdesc_s390x_te_linux64 ();
550bdf96
AA
3366 initialize_tdesc_s390x_vx_linux64 ();
3367 initialize_tdesc_s390x_tevx_linux64 ();
5769d3cd 3368}