]>
Commit | Line | Data |
---|---|---|
e7b860fa | 1 | /* |
b891d010 | 2 | * Copyright 2015-2016 Toradex, Inc. |
e7b860fa | 3 | * |
b891d010 | 4 | * Configuration settings for the Toradex VF50/VF61 modules. |
e7b860fa SM |
5 | * |
6 | * Based on vf610twr.h: | |
7 | * Copyright 2013 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * SPDX-License-Identifier: GPL-2.0+ | |
10 | */ | |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
15 | #include <asm/arch/imx-regs.h> | |
e7b860fa | 16 | |
18fb0e3c | 17 | #define CONFIG_SYS_FSL_CLK |
e7b860fa | 18 | |
b891d010 | 19 | #define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ |
e7b860fa SM |
20 | |
21 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
22 | ||
e7b860fa SM |
23 | #ifdef CONFIG_CMD_FUSE |
24 | #define CONFIG_MXC_OCOTP | |
25 | #endif | |
26 | ||
80b9c3bb | 27 | #ifdef CONFIG_VIDEO_FSL_DCU_FB |
80b9c3bb SA |
28 | #define CONFIG_SPLASH_SCREEN_ALIGN |
29 | #define CONFIG_VIDEO_LOGO | |
30 | #define CONFIG_VIDEO_BMP_LOGO | |
31 | #define CONFIG_SYS_FSL_DCU_LE | |
32 | ||
33 | #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR | |
34 | #define DCU_LAYER_MAX_NUM 64 | |
35 | #endif | |
36 | ||
e7b860fa SM |
37 | /* Size of malloc() pool */ |
38 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) | |
39 | ||
e7b860fa SM |
40 | /* Allow to overwrite serial and ethaddr */ |
41 | #define CONFIG_ENV_OVERWRITE | |
b891d010 | 42 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
e7b860fa | 43 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
e7b860fa SM |
44 | |
45 | /* NAND support */ | |
8fca2d8c | 46 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
e7b860fa SM |
47 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
48 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR | |
49 | ||
50 | /* Dynamic MTD partition support */ | |
e7b860fa SM |
51 | #define CONFIG_MTD_PARTITIONS |
52 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ | |
e7b860fa | 53 | |
e7b860fa SM |
54 | #define CONFIG_FSL_ESDHC |
55 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
56 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 | |
57 | ||
e7b860fa SM |
58 | #define CONFIG_FEC_MXC |
59 | #define CONFIG_MII | |
60 | #define IMX_FEC_BASE ENET1_BASE_ADDR | |
61 | #define CONFIG_FEC_XCV_TYPE RMII | |
62 | #define CONFIG_FEC_MXC_PHYADDR 0 | |
e7b860fa SM |
63 | |
64 | #define CONFIG_IPADDR 192.168.10.2 | |
65 | #define CONFIG_NETMASK 255.255.255.0 | |
66 | #define CONFIG_SERVERIP 192.168.10.1 | |
67 | ||
e7b860fa SM |
68 | #define CONFIG_LOADADDR 0x80008000 |
69 | #define CONFIG_FDTADDR 0x84000000 | |
70 | ||
71 | /* We boot from the gfxRAM area of the OCRAM. */ | |
c0f432c3 SA |
72 | #define CONFIG_SYS_TEXT_BASE 0x3f401000 |
73 | #define CONFIG_BOARD_SIZE_LIMIT 520192 | |
e7b860fa SM |
74 | |
75 | #define SD_BOOTCMD \ | |
76 | "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ | |
77 | "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ | |
78 | "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ | |
79 | "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ | |
80 | "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ | |
faf1e62b | 81 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
e7b860fa SM |
82 | |
83 | #define NFS_BOOTCMD \ | |
84 | "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ | |
85 | "nfsboot=run setup; " \ | |
86 | "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ | |
87 | "${setupargs} ${vidargs}; echo Booting from NFS...;" \ | |
88 | "dhcp ${kernel_addr_r} && " \ | |
89 | "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ | |
faf1e62b | 90 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
e7b860fa SM |
91 | |
92 | #define UBI_BOOTCMD \ | |
93 | "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ | |
94 | "ubi.fm_autoconvert=1\0" \ | |
95 | "ubiboot=run setup; " \ | |
96 | "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ | |
97 | "${setupargs} ${vidargs}; echo Booting from NAND...; " \ | |
3ed82d6f SM |
98 | "ubi part ubi && " \ |
99 | "ubi read ${kernel_addr_r} kernel && " \ | |
100 | "ubi read ${fdt_addr_r} dtb && " \ | |
faf1e62b | 101 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
e7b860fa SM |
102 | |
103 | #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" | |
104 | ||
bba97cd2 SM |
105 | #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" |
106 | ||
e7b860fa SM |
107 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
108 | "kernel_addr_r=0x82000000\0" \ | |
109 | "fdt_addr_r=0x84000000\0" \ | |
110 | "kernel_file=zImage\0" \ | |
111 | "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ | |
112 | "fdt_board=eval-v3\0" \ | |
faf1e62b | 113 | "fdt_fixup=;\0" \ |
e7b860fa SM |
114 | "defargs=\0" \ |
115 | "console=ttyLP0\0" \ | |
116 | "setup=setenv setupargs " \ | |
117 | "console=tty1 console=${console}" \ | |
118 | ",${baudrate}n8 ${memargs}\0" \ | |
119 | "setsdupdate=mmc rescan && set interface mmc && " \ | |
120 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ | |
121 | "source ${loadaddr}\0" \ | |
122 | "setusbupdate=usb start && set interface usb && " \ | |
123 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ | |
124 | "source ${loadaddr}\0" \ | |
125 | "setupdate=run setsdupdate || run setusbupdate\0" \ | |
43ede0bc | 126 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
bba97cd2 | 127 | "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ |
80b9c3bb SA |
128 | "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ |
129 | "splashpos=m,m\0" \ | |
e7b860fa SM |
130 | SD_BOOTCMD \ |
131 | NFS_BOOTCMD \ | |
132 | UBI_BOOTCMD | |
133 | ||
134 | /* Miscellaneous configurable options */ | |
135 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
e7b860fa | 136 | #undef CONFIG_AUTO_COMPLETE |
aa5a0d98 | 137 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
e7b860fa SM |
138 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
139 | ||
e7b860fa SM |
140 | #define CONFIG_SYS_MEMTEST_START 0x80010000 |
141 | #define CONFIG_SYS_MEMTEST_END 0x87C00000 | |
142 | ||
143 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
144 | #define CONFIG_SYS_HZ 1000 | |
145 | #define CONFIG_CMDLINE_EDITING | |
146 | ||
e7b860fa SM |
147 | /* Physical memory map */ |
148 | #define CONFIG_NR_DRAM_BANKS 1 | |
149 | #define PHYS_SDRAM (0x80000000) | |
150 | #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) | |
151 | ||
152 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
153 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
154 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
155 | ||
156 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
157 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
158 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
159 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
160 | ||
161 | /* Environment organization */ | |
e7b860fa SM |
162 | |
163 | #ifdef CONFIG_ENV_IS_IN_MMC | |
164 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
165 | #define CONFIG_ENV_OFFSET (12 * 64 * 1024) | |
166 | #define CONFIG_ENV_SIZE (8 * 1024) | |
167 | #endif | |
168 | ||
169 | #ifdef CONFIG_ENV_IS_IN_NAND | |
170 | #define CONFIG_ENV_SIZE (64 * 2048) | |
171 | #define CONFIG_ENV_RANGE (4 * 64 * 2048) | |
172 | #define CONFIG_ENV_OFFSET (12 * 64 * 2048) | |
173 | #endif | |
174 | ||
bba97cd2 | 175 | /* USB Host Support */ |
bba97cd2 SM |
176 | #define CONFIG_USB_EHCI_VF |
177 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
178 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
179 | ||
bba97cd2 | 180 | /* USB DFU */ |
bba97cd2 SM |
181 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) |
182 | ||
183 | /* USB Storage */ | |
01acd6ab | 184 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
bba97cd2 | 185 | |
e7b860fa | 186 | #endif /* __CONFIG_H */ |