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59189a8b TH |
1 | /* |
2 | * Copyright (C) 2013 Gateworks Corporation | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __CONFIG_H | |
8 | #define __CONFIG_H | |
9 | ||
0cc11dea | 10 | /* SPL */ |
0cc11dea | 11 | /* Location in NAND to read U-Boot from */ |
55ff55e9 | 12 | #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M) |
0cc11dea | 13 | |
53940a50 TH |
14 | /* Falcon Mode */ |
15 | #define CONFIG_CMD_SPL | |
53940a50 TH |
16 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 |
17 | #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) | |
18 | ||
19 | /* Falcon Mode - NAND support: args@17MB kernel@18MB */ | |
20 | #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M) | |
21 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) | |
22 | ||
23 | /* Falcon Mode - MMC support: args@1MB kernel@2MB */ | |
24 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ | |
25 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) | |
26 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ | |
27 | ||
0cc11dea | 28 | #include "imx6_spl.h" /* common IMX6 SPL configuration */ |
59189a8b | 29 | #include "mx6_common.h" |
6eab98a0 | 30 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
59189a8b TH |
31 | |
32 | #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ | |
33 | ||
ea690917 | 34 | /* Serial ATAG */ |
59189a8b | 35 | #define CONFIG_SERIAL_TAG |
59189a8b TH |
36 | |
37 | /* Size of malloc() pool */ | |
55ff55e9 | 38 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
59189a8b TH |
39 | |
40 | /* Init Functions */ | |
59189a8b TH |
41 | #define CONFIG_MISC_INIT_R |
42 | ||
e1b4770c TH |
43 | /* Driver Model */ |
44 | #ifndef CONFIG_SPL_BUILD | |
e1b4770c | 45 | #define CONFIG_DM_GPIO |
50de5088 | 46 | #define CONFIG_DM_THERMAL |
e1b4770c TH |
47 | #endif |
48 | ||
50de5088 | 49 | /* Thermal */ |
1368f993 | 50 | #define CONFIG_IMX_THERMAL |
50de5088 | 51 | |
59189a8b TH |
52 | /* Serial */ |
53 | #define CONFIG_MXC_UART | |
54 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
55 | ||
56 | #ifdef CONFIG_SPI_FLASH | |
57 | ||
58 | /* SPI */ | |
59189a8b TH |
59 | #ifdef CONFIG_CMD_SF |
60 | #define CONFIG_MXC_SPI | |
61 | #define CONFIG_SPI_FLASH_MTD | |
62 | #define CONFIG_SPI_FLASH_BAR | |
59189a8b | 63 | #define CONFIG_SF_DEFAULT_BUS 0 |
155fa9af | 64 | #define CONFIG_SF_DEFAULT_CS 0 |
59189a8b TH |
65 | /* GPIO 3-19 (21248) */ |
66 | #define CONFIG_SF_DEFAULT_SPEED 30000000 | |
67 | #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) | |
68 | #endif | |
69 | ||
d883fcc6 | 70 | #elif defined(CONFIG_SPL_NAND_SUPPORT) |
59189a8b | 71 | /* Enable NAND support */ |
59189a8b TH |
72 | #ifdef CONFIG_CMD_NAND |
73 | #define CONFIG_NAND_MXS | |
74 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
75 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
76 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
77 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
78 | ||
79 | /* DMA stuff, needed for GPMI/MXS NAND support */ | |
80 | #define CONFIG_APBH_DMA | |
81 | #define CONFIG_APBH_DMA_BURST | |
82 | #define CONFIG_APBH_DMA_BURST8 | |
83 | #endif | |
84 | ||
85 | #endif /* CONFIG_SPI_FLASH */ | |
86 | ||
59189a8b | 87 | /* I2C Configs */ |
59189a8b TH |
88 | #define CONFIG_SYS_I2C |
89 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
90 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
91 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 92 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
9c0fe83e TH |
93 | #define CONFIG_SYS_I2C_SPEED 100000 |
94 | #define CONFIG_I2C_GSC 0 | |
f6747cda | 95 | #define CONFIG_I2C_EDID |
59189a8b TH |
96 | |
97 | /* MMC Configs */ | |
59189a8b | 98 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
59189a8b | 99 | |
1faca6ad TH |
100 | /* eMMC Configs */ |
101 | #define CONFIG_SUPPORT_EMMC_BOOT | |
102 | #define CONFIG_SUPPORT_EMMC_RPMB | |
103 | ||
59189a8b TH |
104 | /* |
105 | * SATA Configs | |
106 | */ | |
59189a8b TH |
107 | #ifdef CONFIG_CMD_SATA |
108 | #define CONFIG_DWC_AHSATA | |
109 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 | |
110 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
111 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR | |
112 | #define CONFIG_LBA48 | |
113 | #define CONFIG_LIBATA | |
114 | #endif | |
115 | ||
116 | /* | |
117 | * PCI express | |
118 | */ | |
59189a8b | 119 | #ifdef CONFIG_CMD_PCI |
59189a8b | 120 | #define CONFIG_PCI_SCAN_SHOW |
dad08286 | 121 | #define CONFIG_PCI_FIXUP_DEV |
59189a8b TH |
122 | #define CONFIG_PCIE_IMX |
123 | #endif | |
124 | ||
125 | /* | |
126 | * PMIC | |
127 | */ | |
128 | #define CONFIG_POWER | |
129 | #define CONFIG_POWER_I2C | |
130 | #define CONFIG_POWER_PFUZE100 | |
131 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
234d89da TH |
132 | #define CONFIG_POWER_LTC3676 |
133 | #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c | |
59189a8b TH |
134 | |
135 | /* Various command support */ | |
f7d9fcd1 | 136 | #define CONFIG_CMD_UNZIP /* gzwrite */ |
59189a8b TH |
137 | |
138 | /* Ethernet support */ | |
139 | #define CONFIG_FEC_MXC | |
140 | #define CONFIG_MII | |
141 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
142 | #define CONFIG_FEC_XCV_TYPE RGMII | |
59189a8b | 143 | #define CONFIG_FEC_MXC_PHYADDR 0 |
59189a8b TH |
144 | #define CONFIG_ARP_TIMEOUT 200UL |
145 | ||
146 | /* USB Configs */ | |
59189a8b TH |
147 | #define CONFIG_USB_HOST_ETHER |
148 | #define CONFIG_USB_ETHER_ASIX | |
149 | #define CONFIG_USB_ETHER_SMSC95XX | |
150 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
151 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ | |
152 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
153 | #define CONFIG_MXC_USB_FLAGS 0 | |
59189a8b | 154 | #define CONFIG_USBD_HS |
59189a8b TH |
155 | #define CONFIG_USB_ETHER |
156 | #define CONFIG_USB_ETH_CDC | |
157 | #define CONFIG_NETCONSOLE | |
158 | #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP | |
59189a8b | 159 | |
9543e954 | 160 | /* USB Mass Storage Gadget */ |
01acd6ab | 161 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
9543e954 | 162 | |
7a278f9f | 163 | /* Framebuffer and LCD */ |
7a278f9f | 164 | #define CONFIG_VIDEO_IPUV3 |
7a278f9f TH |
165 | #define CONFIG_VIDEO_LOGO |
166 | #define CONFIG_IPUV3_CLK 260000000 | |
7a278f9f TH |
167 | #define CONFIG_IMX_HDMI |
168 | #define CONFIG_IMX_VIDEO_SKIP | |
0a22c7f0 TH |
169 | #define CONFIG_VIDEO_BMP_LOGO |
170 | #define CONFIG_SPLASH_SCREEN_ALIGN | |
171 | #define CONFIG_HIDE_LOGO_VERSION /* Custom config to hide U-boot version */ | |
7a278f9f | 172 | |
59189a8b | 173 | /* Miscellaneous configurable options */ |
59189a8b | 174 | #define CONFIG_HWCONFIG |
899f589b | 175 | #define CONFIG_PREBOOT |
59189a8b TH |
176 | |
177 | /* Print Buffer Size */ | |
178 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
59189a8b TH |
179 | |
180 | /* Memory configuration */ | |
181 | #define CONFIG_SYS_MEMTEST_START 0x10000000 | |
182 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | |
183 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 | |
59189a8b TH |
184 | |
185 | /* Physical Memory Map */ | |
186 | #define CONFIG_NR_DRAM_BANKS 1 | |
187 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
188 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
189 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
190 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
191 | ||
192 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
193 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
194 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
195 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
196 | ||
59189a8b TH |
197 | /* |
198 | * MTD Command for mtdparts | |
199 | */ | |
59189a8b TH |
200 | #define CONFIG_MTD_DEVICE |
201 | #define CONFIG_MTD_PARTITIONS | |
202 | #ifdef CONFIG_SPI_FLASH | |
203 | #define MTDIDS_DEFAULT "nor0=nor" | |
204 | #define MTDPARTS_DEFAULT \ | |
205 | "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" | |
206 | #else | |
207 | #define MTDIDS_DEFAULT "nand0=nand" | |
208 | #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" | |
209 | #endif | |
210 | ||
211 | /* Persistent Environment Config */ | |
59189a8b | 212 | #if defined(CONFIG_ENV_IS_IN_MMC) |
59189a8b | 213 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
b69999ef | 214 | #define CONFIG_SYS_MMC_ENV_PART 1 |
0a9c2150 TH |
215 | #define CONFIG_ENV_OFFSET (709 * SZ_1K) |
216 | #define CONFIG_ENV_SIZE (128 * SZ_1K) | |
217 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K)) | |
59189a8b | 218 | #elif defined(CONFIG_ENV_IS_IN_NAND) |
55ff55e9 TH |
219 | #define CONFIG_ENV_OFFSET (16 * SZ_1M) |
220 | #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) | |
59189a8b | 221 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
55ff55e9 | 222 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K)) |
59189a8b TH |
223 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
224 | #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) | |
55ff55e9 TH |
225 | #define CONFIG_ENV_OFFSET (512 * SZ_1K) |
226 | #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) | |
227 | #define CONFIG_ENV_SIZE (8 * SZ_1K) | |
59189a8b TH |
228 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
229 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
230 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | |
231 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
232 | #endif | |
233 | ||
234 | /* Environment */ | |
59189a8b TH |
235 | #define CONFIG_IPADDR 192.168.1.1 |
236 | #define CONFIG_SERVERIP 192.168.1.146 | |
59189a8b TH |
237 | |
238 | #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ | |
f4416579 | 239 | "pcidisable=1\0" \ |
0a22c7f0 | 240 | "splashpos=m,m\0" \ |
04171690 | 241 | "usb_pgood_delay=2000\0" \ |
59189a8b TH |
242 | "console=ttymxc1\0" \ |
243 | "bootdevs=usb mmc sata flash\0" \ | |
5911c092 | 244 | "hwconfig=_UNKNOWN_\0" \ |
59189a8b TH |
245 | "video=\0" \ |
246 | \ | |
247 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
248 | "mtdids=" MTDIDS_DEFAULT "\0" \ | |
7698cdfd TH |
249 | "disk=0\0" \ |
250 | "part=1\0" \ | |
59189a8b TH |
251 | \ |
252 | "fdt_high=0xffffffff\0" \ | |
253 | "fdt_addr=0x18000000\0" \ | |
8cc25eb8 | 254 | "initrd_high=0xffffffff\0" \ |
4df0bff3 TH |
255 | "fixfdt=" \ |
256 | "fdt addr ${fdt_addr}\0" \ | |
e2801a96 | 257 | "bootdir=boot\0" \ |
59189a8b | 258 | "loadfdt=" \ |
1b740001 TH |
259 | "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ |
260 | "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ | |
4df0bff3 | 261 | "run fixfdt; " \ |
1b740001 TH |
262 | "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ |
263 | "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ | |
4df0bff3 | 264 | "run fixfdt; " \ |
1b740001 TH |
265 | "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ |
266 | "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ | |
4df0bff3 | 267 | "run fixfdt; " \ |
59189a8b TH |
268 | "fi\0" \ |
269 | \ | |
543a4aba | 270 | "fs=ext4\0" \ |
e2801a96 | 271 | "script=6x_bootscript-ventana\0" \ |
59189a8b | 272 | "loadscript=" \ |
e2801a96 | 273 | "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ |
50987095 | 274 | "source ${loadaddr}; " \ |
59189a8b TH |
275 | "fi\0" \ |
276 | \ | |
e2801a96 | 277 | "uimage=uImage\0" \ |
79942c4f | 278 | "mmc_root=mmcblk0p1\0" \ |
59189a8b | 279 | "mmc_boot=" \ |
543a4aba | 280 | "setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \ |
7698cdfd | 281 | "mmc dev ${disk} && mmc rescan && " \ |
560e8b3f | 282 | "setenv dtype mmc; run loadscript; " \ |
e2801a96 | 283 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b | 284 | "setenv bootargs console=${console},${baudrate} " \ |
79942c4f | 285 | "root=/dev/${mmc_root} rootfstype=${fs} " \ |
59189a8b | 286 | "rootwait rw ${video} ${extra}; " \ |
4df0bff3 | 287 | "if run loadfdt; then " \ |
59189a8b TH |
288 | "bootm ${loadaddr} - ${fdt_addr}; " \ |
289 | "else " \ | |
290 | "bootm; " \ | |
291 | "fi; " \ | |
292 | "fi\0" \ | |
293 | \ | |
294 | "sata_boot=" \ | |
543a4aba | 295 | "setenv fsload \"${fs}load sata ${disk}:${part}\"; " \ |
7698cdfd | 296 | "sata init && " \ |
560e8b3f | 297 | "setenv dtype sata; run loadscript; " \ |
e2801a96 | 298 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b | 299 | "setenv bootargs console=${console},${baudrate} " \ |
543a4aba | 300 | "root=/dev/sda1 rootfstype=${fs} " \ |
59189a8b | 301 | "rootwait rw ${video} ${extra}; " \ |
4df0bff3 | 302 | "if run loadfdt; then " \ |
59189a8b TH |
303 | "bootm ${loadaddr} - ${fdt_addr}; " \ |
304 | "else " \ | |
305 | "bootm; " \ | |
306 | "fi; " \ | |
307 | "fi\0" \ | |
308 | "usb_boot=" \ | |
543a4aba | 309 | "setenv fsload \"${fs}load usb ${disk}:${part}\"; " \ |
7698cdfd | 310 | "usb start && usb dev ${disk} && " \ |
560e8b3f | 311 | "setenv dtype usb; run loadscript; " \ |
e2801a96 | 312 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b | 313 | "setenv bootargs console=${console},${baudrate} " \ |
543a4aba | 314 | "root=/dev/sda1 rootfstype=${fs} " \ |
59189a8b | 315 | "rootwait rw ${video} ${extra}; " \ |
4df0bff3 | 316 | "if run loadfdt; then " \ |
59189a8b TH |
317 | "bootm ${loadaddr} - ${fdt_addr}; " \ |
318 | "else " \ | |
319 | "bootm; " \ | |
320 | "fi; " \ | |
321 | "fi\0" | |
322 | ||
323 | #ifdef CONFIG_SPI_FLASH | |
324 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
325 | CONFIG_EXTRA_ENV_SETTINGS_COMMON \ | |
326 | "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ | |
327 | "image_uboot=ventana/u-boot_spi.imx\0" \ | |
328 | \ | |
329 | "spi_koffset=0x90000\0" \ | |
330 | "spi_klen=0x200000\0" \ | |
331 | \ | |
332 | "spi_updateuboot=echo Updating uboot from " \ | |
333 | "${serverip}:${image_uboot}...; " \ | |
334 | "tftpboot ${loadaddr} ${image_uboot} && " \ | |
335 | "sf probe && sf erase 0 80000 && " \ | |
336 | "sf write ${loadaddr} 400 ${filesize}\0" \ | |
337 | "spi_update=echo Updating OS from ${serverip}:${image_os} " \ | |
338 | "to ${spi_koffset} ...; " \ | |
339 | "tftp ${loadaddr} ${image_os} && " \ | |
340 | "sf probe && " \ | |
341 | "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ | |
342 | \ | |
343 | "flash_boot=" \ | |
344 | "if sf probe && " \ | |
345 | "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ | |
346 | "setenv bootargs console=${console},${baudrate} " \ | |
347 | "root=/dev/mtdblock3 " \ | |
348 | "rootfstype=squashfs,jffs2 " \ | |
349 | "${video} ${extra}; " \ | |
350 | "bootm; " \ | |
351 | "fi\0" | |
352 | #else | |
353 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
354 | CONFIG_EXTRA_ENV_SETTINGS_COMMON \ | |
59189a8b | 355 | \ |
e2801a96 | 356 | "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ |
59189a8b TH |
357 | "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ |
358 | "tftp ${loadaddr} ${image_rootfs} && " \ | |
359 | "nand erase.part rootfs && " \ | |
360 | "nand write ${loadaddr} rootfs ${filesize}\0" \ | |
361 | \ | |
362 | "flash_boot=" \ | |
363 | "setenv fsload 'ubifsload'; " \ | |
e2801a96 TH |
364 | "ubi part rootfs; " \ |
365 | "if ubi check boot; then " \ | |
366 | "ubifsmount ubi0:boot; " \ | |
367 | "setenv root ubi0:rootfs ubi.mtd=2 " \ | |
368 | "rootfstype=squashfs,ubifs; " \ | |
369 | "setenv bootdir; " \ | |
370 | "elif ubi check rootfs; then " \ | |
371 | "ubifsmount ubi0:rootfs; " \ | |
372 | "setenv root ubi0:rootfs ubi.mtd=2 " \ | |
373 | "rootfstype=ubifs; " \ | |
374 | "fi; " \ | |
560e8b3f | 375 | "setenv dtype nand; run loadscript; " \ |
e2801a96 | 376 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b | 377 | "setenv bootargs console=${console},${baudrate} " \ |
e2801a96 | 378 | "root=${root} ${video} ${extra}; " \ |
4df0bff3 | 379 | "if run loadfdt; then " \ |
59189a8b TH |
380 | "ubifsumount; " \ |
381 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
382 | "else " \ | |
383 | "ubifsumount; bootm; " \ | |
384 | "fi; " \ | |
385 | "fi\0" | |
386 | #endif | |
387 | ||
388 | #define CONFIG_BOOTCOMMAND \ | |
389 | "for btype in ${bootdevs}; do " \ | |
390 | "echo; echo Attempting ${btype} boot...; " \ | |
391 | "if run ${btype}_boot; then; fi; " \ | |
392 | "done" | |
393 | ||
59189a8b | 394 | #endif /* __CONFIG_H */ |