[people/ms/u-boot.git] / include / configs / gw_ventana.h

/*
 * Copyright (C) 2013 Gateworks Corporation
 *
 * SPDX-License-Identifier: GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* SPL */
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)

/* Falcon Mode */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
#define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)

/* Falcon Mode - NAND support: args@17MB kernel@18MB */
#define CONFIG_CMD_SPL_NAND_OFS		(17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	(18 * SZ_1M)

/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x800	/* 1MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000	/* 2MB */

#include "imx6_spl.h"                  /* common IMX6 SPL configuration */
#include "mx6_common.h"
#undef CONFIG_SPL_EXT_SUPPORT

#define CONFIG_MACH_TYPE	4520   /* Gateworks Ventana Platform */

/* Serial ATAG */
#define CONFIG_SERIAL_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

/* Init Functions */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R

/* Driver Model */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_GPIO
#define CONFIG_DM_THERMAL
#endif

/* Thermal */
#define CONFIG_IMX_THERMAL

/* Serial */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	       UART2_BASE

#ifdef CONFIG_SPI_FLASH

/* SPI */
#ifdef CONFIG_CMD_SF
  #define CONFIG_MXC_SPI
  #define CONFIG_SPI_FLASH_MTD
  #define CONFIG_SPI_FLASH_BAR
  #define CONFIG_SF_DEFAULT_BUS              0
  #define CONFIG_SF_DEFAULT_CS               0
					     /* GPIO 3-19 (21248) */
  #define CONFIG_SF_DEFAULT_SPEED            30000000
  #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
#endif

#else
/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
  #define CONFIG_NAND_MXS
  #define CONFIG_SYS_MAX_NAND_DEVICE	1
  #define CONFIG_SYS_NAND_BASE		0x40000000
  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  #define CONFIG_SYS_NAND_ONFI_DETECTION

  /* DMA stuff, needed for GPMI/MXS NAND support */
  #define CONFIG_APBH_DMA
  #define CONFIG_APBH_DMA_BURST
  #define CONFIG_APBH_DMA_BURST8
#endif

#endif /* CONFIG_SPI_FLASH */

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_I2C_GSC			0
#define CONFIG_I2C_PMIC			1
#define CONFIG_I2C_EDID

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_SYS_FSL_USDHC_NUM       1

/* Filesystem support */
#define CONFIG_CMD_UBIFS

/*
 * SATA Configs
 */
#define CONFIG_CMD_SATA
#ifdef CONFIG_CMD_SATA
  #define CONFIG_DWC_AHSATA
  #define CONFIG_SYS_SATA_MAX_DEVICE	1
  #define CONFIG_DWC_AHSATA_PORT_ID	0
  #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
  #define CONFIG_LBA48
  #define CONFIG_LIBATA
#endif

/*
 * PCI express
 */
#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
#define CONFIG_PCIE_IMX
#endif

/*
 * PMIC
 */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
#define CONFIG_POWER_LTC3676
#define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c

/* Various command support */
#define CONFIG_CMD_BMODE         /* set eFUSE shadow for a boot dev and reset */
#define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE

/* Ethernet support */
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE             ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE      RGMII
#define CONFIG_FEC_MXC_PHYADDR   0
#define CONFIG_PHYLIB
#define CONFIG_ARP_TIMEOUT       200UL

/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET  /* For OTG port */
#define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS      0
#define CONFIG_USB_KEYBOARD
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP

/* USB Mass Storage Gadget */
#define CONFIG_USB_FUNCTION_MASS_STORAGE

/* Framebuffer and LCD */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK          260000000
#define CONFIG_CMD_HDMIDETECT
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP

/* Miscellaneous configurable options */
#define CONFIG_HWCONFIG

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

/* Memory configuration */
#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END	       0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_LZO
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#ifdef CONFIG_SPI_FLASH
#define MTDIDS_DEFAULT    "nor0=nor"
#define MTDPARTS_DEFAULT  \
	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
#else
#define MTDIDS_DEFAULT    "nand0=nand"
#define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
#endif

/* Persistent Environment Config */
#ifdef CONFIG_SPI_FLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#else
#define CONFIG_ENV_IS_IN_NAND
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
  #define CONFIG_SYS_MMC_ENV_DEV         0
  #define CONFIG_ENV_OFFSET              (709 * SZ_1K)
  #define CONFIG_ENV_SIZE                (128 * SZ_1K)
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (128 * SZ_1K))
#elif defined(CONFIG_ENV_IS_IN_NAND)
  #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
  #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
  #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
  #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
  #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
  #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
  #define CONFIG_ENV_SIZE		(8 * SZ_1K)
  #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
  #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
  #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
  #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
#endif

/* Environment */
#define CONFIG_IPADDR             192.168.1.1
#define CONFIG_SERVERIP           192.168.1.146
#define HWCONFIG_DEFAULT \
	"hwconfig=rs232;" \
	"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"usb_pgood_delay=2000\0" \
	"console=ttymxc1\0" \
	"bootdevs=usb mmc sata flash\0" \
	HWCONFIG_DEFAULT \
	"video=\0" \
	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	"disk=0\0" \
	"part=1\0" \
	\
	"fdt_high=0xffffffff\0" \
	"fdt_addr=0x18000000\0" \
	"initrd_high=0xffffffff\0" \
	"fixfdt=" \
		"fdt addr ${fdt_addr}\0" \
	"bootdir=boot\0" \
	"loadfdt=" \
		"if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \
			"echo Loaded DTB from boot/${fdt_file}; " \
			"run fixfdt; " \
		"elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \
			"echo Loaded DTB from boot/${fdt_file1}; " \
			"run fixfdt; " \
		"elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \
			"echo Loaded DTB from boot/${fdt_file2}; " \
			"run fixfdt; " \
		"fi\0" \
	\
	"script=6x_bootscript-ventana\0" \
	"loadscript=" \
		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
			"source; " \
		"fi\0" \
	\
	"uimage=uImage\0" \
	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
	"mmc_boot=" \
		"setenv fsload \"ext2load mmc ${disk}:${part}\"; " \
		"mmc dev ${disk} && mmc rescan && " \
		"setenv dtype mmc; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mmcblk0p1 rootfstype=ext4 " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	\
	"sata_boot=" \
		"setenv fsload \"ext2load sata ${disk}:${part}\"; " \
		"sata init && " \
		"setenv dtype sata; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=ext4 " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	"usb_boot=" \
		"setenv fsload \"ext2load usb ${disk}:${part}\"; " \
		"usb start && usb dev ${disk} && " \
		"setenv dtype usb; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=ext4 " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0"

#ifdef CONFIG_SPI_FLASH
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	"image_uboot=ventana/u-boot_spi.imx\0" \
	\
	"spi_koffset=0x90000\0" \
	"spi_klen=0x200000\0" \
	\
	"spi_updateuboot=echo Updating uboot from " \
		"${serverip}:${image_uboot}...; " \
		"tftpboot ${loadaddr} ${image_uboot} && " \
		"sf probe && sf erase 0 80000 && " \
			"sf write ${loadaddr} 400 ${filesize}\0" \
	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
		"to ${spi_koffset} ...; " \
		"tftp ${loadaddr} ${image_os} && " \
		"sf probe && " \
		"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	\
	"flash_boot=" \
		"if sf probe && " \
		"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mtdblock3 " \
				"rootfstype=squashfs,jffs2 " \
				"${video} ${extra}; " \
			"bootm; " \
		"fi\0"
#else
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	\
	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
		"tftp ${loadaddr} ${image_rootfs} && " \
		"nand erase.part rootfs && " \
		"nand write ${loadaddr} rootfs ${filesize}\0" \
	\
	"flash_boot=" \
		"setenv fsload 'ubifsload'; " \
		"ubi part rootfs; " \
		"if ubi check boot; then " \
			"ubifsmount ubi0:boot; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=squashfs,ubifs; " \
			"setenv bootdir; " \
		"elif ubi check rootfs; then " \
			"ubifsmount ubi0:rootfs; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=ubifs; " \
		"fi; " \
		"setenv dtype nand; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=${root} ${video} ${extra}; " \
			"if run loadfdt; then " \
				"ubifsumount; " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"ubifsumount; bootm; " \
			"fi; " \
		"fi\0"
#endif

#define CONFIG_BOOTCOMMAND \
	"for btype in ${bootdevs}; do " \
		"echo; echo Attempting ${btype} boot...; " \
		"if run ${btype}_boot; then; fi; " \
	"done"

/* Device Tree Support */
#define CONFIG_FDT_FIXUP_PARTITIONS

#endif			       /* __CONFIG_H */
Commit	Line	Data
59189a8b TH	1	/*
	2	* Copyright (C) 2013 Gateworks Corporation
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
	9
0cc11dea	10	/* SPL */
06c3564d	11	#define CONFIG_SPL_BOARD_INIT
0cc11dea TH	12	#define CONFIG_SPL_NAND_SUPPORT
0cc11dea TH	13	#define CONFIG_SPL_MMC_SUPPORT
e06a0362	14	#define CONFIG_SPL_POWER_SUPPORT
0cc11dea	15	/* Location in NAND to read U-Boot from */
55ff55e9	16	#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
0cc11dea	17
53940a50 TH	18	/* Falcon Mode */
	19	#define CONFIG_CMD_SPL
	20	#define CONFIG_SPL_OS_BOOT
53940a50 TH	21	#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
	22	#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
	23
	24	/* Falcon Mode - NAND support: args@17MB kernel@18MB */
	25	#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
	26	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
	27
	28	/* Falcon Mode - MMC support: args@1MB kernel@2MB */
	29	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
	30	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
	31	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
	32
0cc11dea	33	#include "imx6_spl.h" /* common IMX6 SPL configuration */
59189a8b	34	#include "mx6_common.h"
a0eb8c9b	35	#undef CONFIG_SPL_EXT_SUPPORT
59189a8b TH	36
	37	#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
	38
ea690917	39	/* Serial ATAG */
59189a8b	40	#define CONFIG_SERIAL_TAG
59189a8b TH	41
59189a8b TH	42	/* Size of malloc() pool */
55ff55e9	43	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
59189a8b TH	44
	45	/* Init Functions */
	46	#define CONFIG_BOARD_EARLY_INIT_F
	47	#define CONFIG_MISC_INIT_R
	48
e1b4770c TH	49	/* Driver Model */
e1b4770c TH	50	#ifndef CONFIG_SPL_BUILD
e1b4770c	51	#define CONFIG_DM_GPIO
50de5088	52	#define CONFIG_DM_THERMAL
e1b4770c TH	53	#endif
e1b4770c TH	54
50de5088	55	/* Thermal */
1368f993	56	#define CONFIG_IMX_THERMAL
50de5088	57
59189a8b TH	58	/* Serial */
	59	#define CONFIG_MXC_UART
	60	#define CONFIG_MXC_UART_BASE UART2_BASE
	61
	62	#ifdef CONFIG_SPI_FLASH
	63
	64	/* SPI */
59189a8b TH	65	#ifdef CONFIG_CMD_SF
	66	#define CONFIG_MXC_SPI
	67	#define CONFIG_SPI_FLASH_MTD
	68	#define CONFIG_SPI_FLASH_BAR
59189a8b	69	#define CONFIG_SF_DEFAULT_BUS 0
155fa9af	70	#define CONFIG_SF_DEFAULT_CS 0
59189a8b TH	71	/* GPIO 3-19 (21248) */
	72	#define CONFIG_SF_DEFAULT_SPEED 30000000
	73	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	74	#endif
	75
	76	#else
	77	/* Enable NAND support */
59189a8b TH	78	#define CONFIG_CMD_NAND
	79	#define CONFIG_CMD_NAND_TRIMFFS
	80	#ifdef CONFIG_CMD_NAND
	81	#define CONFIG_NAND_MXS
	82	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	83	#define CONFIG_SYS_NAND_BASE 0x40000000
	84	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	85	#define CONFIG_SYS_NAND_ONFI_DETECTION
	86
	87	/* DMA stuff, needed for GPMI/MXS NAND support */
	88	#define CONFIG_APBH_DMA
	89	#define CONFIG_APBH_DMA_BURST
	90	#define CONFIG_APBH_DMA_BURST8
	91	#endif
	92
	93	#endif /* CONFIG_SPI_FLASH */
	94
59189a8b	95	/* I2C Configs */
59189a8b TH	96	#define CONFIG_SYS_I2C
59189a8b TH	97	#define CONFIG_SYS_I2C_MXC
03544c66 AA	98	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	99	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	100	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
9c0fe83e TH	101	#define CONFIG_SYS_I2C_SPEED 100000
	102	#define CONFIG_I2C_GSC 0
	103	#define CONFIG_I2C_PMIC 1
f6747cda	104	#define CONFIG_I2C_EDID
59189a8b TH	105
59189a8b TH	106	/* MMC Configs */
59189a8b TH	107	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
59189a8b TH	108	#define CONFIG_SYS_FSL_USDHC_NUM 1
59189a8b TH	109
59189a8b TH	110	/* Filesystem support */
59189a8b	111	#define CONFIG_CMD_UBIFS
59189a8b	112
59189a8b TH	113	/*
	114	* SATA Configs
	115	*/
	116	#define CONFIG_CMD_SATA
	117	#ifdef CONFIG_CMD_SATA
	118	#define CONFIG_DWC_AHSATA
	119	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	120	#define CONFIG_DWC_AHSATA_PORT_ID 0
	121	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	122	#define CONFIG_LBA48
	123	#define CONFIG_LIBATA
	124	#endif
	125
	126	/*
	127	* PCI express
	128	*/
	129	#define CONFIG_CMD_PCI
	130	#ifdef CONFIG_CMD_PCI
	131	#define CONFIG_PCI
	132	#define CONFIG_PCI_PNP
	133	#define CONFIG_PCI_SCAN_SHOW
dad08286	134	#define CONFIG_PCI_FIXUP_DEV
59189a8b TH	135	#define CONFIG_PCIE_IMX
	136	#endif
	137
	138	/*
	139	* PMIC
	140	*/
	141	#define CONFIG_POWER
	142	#define CONFIG_POWER_I2C
	143	#define CONFIG_POWER_PFUZE100
	144	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
234d89da TH	145	#define CONFIG_POWER_LTC3676
234d89da TH	146	#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
59189a8b TH	147
59189a8b TH	148	/* Various command support */
59189a8b TH	149	#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
59189a8b TH	150	#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
59189a8b	151	#define CONFIG_CMD_GSC
9c0fe83e	152	#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
59189a8b TH	153	#define CONFIG_CMD_UBI
59189a8b TH	154	#define CONFIG_RBTREE
59189a8b TH	155
	156	/* Ethernet support */
	157	#define CONFIG_FEC_MXC
	158	#define CONFIG_MII
	159	#define IMX_FEC_BASE ENET_BASE_ADDR
	160	#define CONFIG_FEC_XCV_TYPE RGMII
59189a8b TH	161	#define CONFIG_FEC_MXC_PHYADDR 0
	162	#define CONFIG_PHYLIB
	163	#define CONFIG_ARP_TIMEOUT 200UL
	164
	165	/* USB Configs */
59189a8b TH	166	#define CONFIG_USB_EHCI
	167	#define CONFIG_USB_EHCI_MX6
	168	#define CONFIG_USB_STORAGE
	169	#define CONFIG_USB_HOST_ETHER
	170	#define CONFIG_USB_ETHER_ASIX
	171	#define CONFIG_USB_ETHER_SMSC95XX
	172	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	173	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	174	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	175	#define CONFIG_MXC_USB_FLAGS 0
	176	#define CONFIG_USB_KEYBOARD
59189a8b	177	#define CONFIG_USBD_HS
59189a8b TH	178	#define CONFIG_USB_ETHER
	179	#define CONFIG_USB_ETH_CDC
	180	#define CONFIG_NETCONSOLE
	181	#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
59189a8b	182
9543e954	183	/* USB Mass Storage Gadget */
01acd6ab	184	#define CONFIG_USB_FUNCTION_MASS_STORAGE
9543e954	185
7a278f9f TH	186	/* Framebuffer and LCD */
	187	#define CONFIG_VIDEO
	188	#define CONFIG_VIDEO_IPUV3
	189	#define CONFIG_CFB_CONSOLE
	190	#define CONFIG_VGA_AS_SINGLE_DEVICE
	191	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	192	#define CONFIG_VIDEO_BMP_RLE8
	193	#define CONFIG_SPLASH_SCREEN
	194	#define CONFIG_BMP_16BPP
	195	#define CONFIG_VIDEO_LOGO
	196	#define CONFIG_IPUV3_CLK 260000000
	197	#define CONFIG_CMD_HDMIDETECT
	198	#define CONFIG_CONSOLE_MUX
	199	#define CONFIG_IMX_HDMI
	200	#define CONFIG_IMX_VIDEO_SKIP
	201
59189a8b	202	/* Miscellaneous configurable options */
59189a8b TH	203	#define CONFIG_HWCONFIG
	204
	205	/* Print Buffer Size */
	206	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
59189a8b TH	207
	208	/* Memory configuration */
	209	#define CONFIG_SYS_MEMTEST_START 0x10000000
	210	#define CONFIG_SYS_MEMTEST_END 0x10010000
	211	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
59189a8b TH	212
	213	/* Physical Memory Map */
	214	#define CONFIG_NR_DRAM_BANKS 1
	215	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	216	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	217	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	218	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	219
	220	#define CONFIG_SYS_INIT_SP_OFFSET \
	221	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	222	#define CONFIG_SYS_INIT_SP_ADDR \
	223	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	224
59189a8b TH	225	/*
	226	* MTD Command for mtdparts
	227	*/
a380ce6e	228	#define CONFIG_LZO
59189a8b TH	229	#define CONFIG_CMD_MTDPARTS
	230	#define CONFIG_MTD_DEVICE
	231	#define CONFIG_MTD_PARTITIONS
	232	#ifdef CONFIG_SPI_FLASH
	233	#define MTDIDS_DEFAULT "nor0=nor"
	234	#define MTDPARTS_DEFAULT \
	235	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
	236	#else
	237	#define MTDIDS_DEFAULT "nand0=nand"
	238	#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
	239	#endif
	240
	241	/* Persistent Environment Config */
59189a8b TH	242	#ifdef CONFIG_SPI_FLASH
	243	#define CONFIG_ENV_IS_IN_SPI_FLASH
	244	#else
	245	#define CONFIG_ENV_IS_IN_NAND
	246	#endif
	247	#if defined(CONFIG_ENV_IS_IN_MMC)
59189a8b	248	#define CONFIG_SYS_MMC_ENV_DEV 0
0a9c2150 TH	249	#define CONFIG_ENV_OFFSET (709 * SZ_1K)
	250	#define CONFIG_ENV_SIZE (128 * SZ_1K)
	251	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K))
59189a8b	252	#elif defined(CONFIG_ENV_IS_IN_NAND)
55ff55e9 TH	253	#define CONFIG_ENV_OFFSET (16 * SZ_1M)
55ff55e9 TH	254	#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
59189a8b	255	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
55ff55e9	256	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
59189a8b TH	257	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
59189a8b TH	258	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
55ff55e9 TH	259	#define CONFIG_ENV_OFFSET (512 * SZ_1K)
	260	#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
	261	#define CONFIG_ENV_SIZE (8 * SZ_1K)
59189a8b TH	262	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	263	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	264	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	265	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	266	#endif
	267
	268	/* Environment */
59189a8b TH	269	#define CONFIG_IPADDR 192.168.1.1
	270	#define CONFIG_SERVERIP 192.168.1.146
	271	#define HWCONFIG_DEFAULT \
	272	"hwconfig=rs232;" \
	273	"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
	274
	275	#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
04171690	276	"usb_pgood_delay=2000\0" \
59189a8b TH	277	"console=ttymxc1\0" \
	278	"bootdevs=usb mmc sata flash\0" \
	279	HWCONFIG_DEFAULT \
	280	"video=\0" \
	281	\
	282	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	283	"mtdids=" MTDIDS_DEFAULT "\0" \
7698cdfd TH	284	"disk=0\0" \
7698cdfd TH	285	"part=1\0" \
59189a8b TH	286	\
	287	"fdt_high=0xffffffff\0" \
	288	"fdt_addr=0x18000000\0" \
8cc25eb8	289	"initrd_high=0xffffffff\0" \
4df0bff3 TH	290	"fixfdt=" \
4df0bff3 TH	291	"fdt addr ${fdt_addr}\0" \
e2801a96	292	"bootdir=boot\0" \
59189a8b	293	"loadfdt=" \
4df0bff3 TH	294	"if ${fsload} ${fdt_addr} boot/${fdt_file}; then " \
	295	"echo Loaded DTB from boot/${fdt_file}; " \
	296	"run fixfdt; " \
	297	"elif ${fsload} ${fdt_addr} boot/${fdt_file1}; then " \
	298	"echo Loaded DTB from boot/${fdt_file1}; " \
	299	"run fixfdt; " \
	300	"elif ${fsload} ${fdt_addr} boot/${fdt_file2}; then " \
	301	"echo Loaded DTB from boot/${fdt_file2}; " \
	302	"run fixfdt; " \
59189a8b TH	303	"fi\0" \
59189a8b TH	304	\
e2801a96	305	"script=6x_bootscript-ventana\0" \
59189a8b	306	"loadscript=" \
e2801a96	307	"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
59189a8b TH	308	"source; " \
	309	"fi\0" \
	310	\
e2801a96	311	"uimage=uImage\0" \
59189a8b TH	312	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
59189a8b TH	313	"mmc_boot=" \
7698cdfd TH	314	"setenv fsload \"ext2load mmc ${disk}:${part}\"; " \
7698cdfd TH	315	"mmc dev ${disk} && mmc rescan && " \
560e8b3f	316	"setenv dtype mmc; run loadscript; " \
e2801a96	317	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b TH	318	"setenv bootargs console=${console},${baudrate} " \
	319	"root=/dev/mmcblk0p1 rootfstype=ext4 " \
	320	"rootwait rw ${video} ${extra}; " \
4df0bff3	321	"if run loadfdt; then " \
59189a8b TH	322	"bootm ${loadaddr} - ${fdt_addr}; " \
	323	"else " \
	324	"bootm; " \
	325	"fi; " \
	326	"fi\0" \
	327	\
	328	"sata_boot=" \
7698cdfd TH	329	"setenv fsload \"ext2load sata ${disk}:${part}\"; " \
7698cdfd TH	330	"sata init && " \
560e8b3f	331	"setenv dtype sata; run loadscript; " \
e2801a96	332	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b TH	333	"setenv bootargs console=${console},${baudrate} " \
	334	"root=/dev/sda1 rootfstype=ext4 " \
	335	"rootwait rw ${video} ${extra}; " \
4df0bff3	336	"if run loadfdt; then " \
59189a8b TH	337	"bootm ${loadaddr} - ${fdt_addr}; " \
	338	"else " \
	339	"bootm; " \
	340	"fi; " \
	341	"fi\0" \
	342	"usb_boot=" \
7698cdfd TH	343	"setenv fsload \"ext2load usb ${disk}:${part}\"; " \
7698cdfd TH	344	"usb start && usb dev ${disk} && " \
560e8b3f	345	"setenv dtype usb; run loadscript; " \
e2801a96	346	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b TH	347	"setenv bootargs console=${console},${baudrate} " \
	348	"root=/dev/sda1 rootfstype=ext4 " \
	349	"rootwait rw ${video} ${extra}; " \
4df0bff3	350	"if run loadfdt; then " \
59189a8b TH	351	"bootm ${loadaddr} - ${fdt_addr}; " \
	352	"else " \
	353	"bootm; " \
	354	"fi; " \
	355	"fi\0"
	356
	357	#ifdef CONFIG_SPI_FLASH
	358	#define CONFIG_EXTRA_ENV_SETTINGS \
	359	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	360	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	361	"image_uboot=ventana/u-boot_spi.imx\0" \
	362	\
	363	"spi_koffset=0x90000\0" \
	364	"spi_klen=0x200000\0" \
	365	\
	366	"spi_updateuboot=echo Updating uboot from " \
	367	"${serverip}:${image_uboot}...; " \
	368	"tftpboot ${loadaddr} ${image_uboot} && " \
	369	"sf probe && sf erase 0 80000 && " \
	370	"sf write ${loadaddr} 400 ${filesize}\0" \
	371	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
	372	"to ${spi_koffset} ...; " \
	373	"tftp ${loadaddr} ${image_os} && " \
	374	"sf probe && " \
	375	"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	376	\
	377	"flash_boot=" \
	378	"if sf probe && " \
	379	"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
	380	"setenv bootargs console=${console},${baudrate} " \
	381	"root=/dev/mtdblock3 " \
	382	"rootfstype=squashfs,jffs2 " \
	383	"${video} ${extra}; " \
	384	"bootm; " \
	385	"fi\0"
	386	#else
	387	#define CONFIG_EXTRA_ENV_SETTINGS \
	388	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
59189a8b	389	\
e2801a96	390	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
59189a8b TH	391	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
	392	"tftp ${loadaddr} ${image_rootfs} && " \
	393	"nand erase.part rootfs && " \
	394	"nand write ${loadaddr} rootfs ${filesize}\0" \
	395	\
	396	"flash_boot=" \
	397	"setenv fsload 'ubifsload'; " \
e2801a96 TH	398	"ubi part rootfs; " \
	399	"if ubi check boot; then " \
	400	"ubifsmount ubi0:boot; " \
	401	"setenv root ubi0:rootfs ubi.mtd=2 " \
	402	"rootfstype=squashfs,ubifs; " \
	403	"setenv bootdir; " \
	404	"elif ubi check rootfs; then " \
	405	"ubifsmount ubi0:rootfs; " \
	406	"setenv root ubi0:rootfs ubi.mtd=2 " \
	407	"rootfstype=ubifs; " \
	408	"fi; " \
560e8b3f	409	"setenv dtype nand; run loadscript; " \
e2801a96	410	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	411	"setenv bootargs console=${console},${baudrate} " \
e2801a96	412	"root=${root} ${video} ${extra}; " \
4df0bff3	413	"if run loadfdt; then " \
59189a8b TH	414	"ubifsumount; " \
	415	"bootm ${loadaddr} - ${fdt_addr}; " \
	416	"else " \
	417	"ubifsumount; bootm; " \
	418	"fi; " \
	419	"fi\0"
	420	#endif
	421
	422	#define CONFIG_BOOTCOMMAND \
	423	"for btype in ${bootdevs}; do " \
	424	"echo; echo Attempting ${btype} boot...; " \
	425	"if run ${btype}_boot; then; fi; " \
	426	"done"
	427
	428	/* Device Tree Support */
59189a8b TH	429	#define CONFIG_FDT_FIXUP_PARTITIONS
59189a8b TH	430
59189a8b	431	#endif /* __CONFIG_H */