projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 76316a31 | 1 | /* |
| 4aecfb16 | 2 | * (C) Copyright 2007-2010 Michal Simek |
| 76316a31 | 3 | * |
| cb1bc63b | 4 | * Michal SIMEK <monstr@monstr.eu> |
| 76316a31 | 5 | * |
| 1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 76316a31 MS |
7 | */ |
| 8 | ||
| 9 | #ifndef __CONFIG_H | |
| 10 | #define __CONFIG_H | |
| 11 | ||
| 52a822ed | 12 | #include "../board/xilinx/microblaze-generic/xparameters.h" |
| 76316a31 | 13 | |
| 4aecfb16 | 14 | /* MicroBlaze CPU */ |
| 1a50f164 | 15 | #define MICROBLAZE_V5 1 |
| 76316a31 | 16 | |
| bcec8f49 | 17 | /* linear and spi flash memory */ |
| 1fe7e8fa SL |
18 | #ifdef XILINX_FLASH_START |
| 19 | #define FLASH | |
| bcec8f49 | 20 | #undef SPIFLASH |
| 1fe7e8fa SL |
21 | #undef RAMENV /* hold environment in flash */ |
| 22 | #else | |
| bcec8f49 | 23 | #ifdef XILINX_SPI_FLASH_BASEADDR |
| 1fe7e8fa | 24 | #undef FLASH |
| bcec8f49 SL |
25 | #define SPIFLASH |
| 26 | #undef RAMENV /* hold environment in flash */ | |
| 27 | #else | |
| 28 | #undef FLASH | |
| 29 | #undef SPIFLASH | |
| 1fe7e8fa SL |
30 | #define RAMENV /* hold environment in RAM */ |
| 31 | #endif | |
| bcec8f49 | 32 | #endif |
| 1fe7e8fa | 33 | |
| 76316a31 | 34 | /* uart */ |
| 67659e2e MS |
35 | # define CONFIG_BAUDRATE 115200 |
| 36 | /* The following table includes the supported baudrates */ | |
| 37 | # define CONFIG_SYS_BAUDRATE_TABLE \ | |
| 38 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} | |
| 39 | ||
| 76316a31 | 40 | /* setting reset address */ |
| 14d0a02a | 41 | /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ |
| 76316a31 MS |
42 | |
| 43 | /* gpio */ | |
| 4c6a6f02 | 44 | #ifdef XILINX_GPIO_BASEADDR |
| 4e779ad2 | 45 | # define CONFIG_XILINX_GPIO |
| 4aecfb16 | 46 | # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR |
| 4c6a6f02 | 47 | #endif |
| 38c4761c | 48 | #define CONFIG_BOARD_LATE_INIT |
| 76316a31 MS |
49 | |
| 50 | /* interrupt controller */ | |
| 4d49b280 | 51 | #ifdef XILINX_INTC_BASEADDR |
| 4aecfb16 MS |
52 | # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR |
| 53 | # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS | |
| 4d49b280 | 54 | #endif |
| 76316a31 MS |
55 | |
| 56 | /* timer */ | |
| bcbb046b | 57 | #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) |
| 4aecfb16 MS |
58 | # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR |
| 59 | # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ | |
| 4d49b280 | 60 | #endif |
| bcbb046b | 61 | |
| 0f21f98d MS |
62 | /* watchdog */ |
| 63 | #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) | |
| 64 | # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR | |
| 65 | # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ | |
| b5e9b9a9 MS |
66 | # ifndef CONFIG_SPL_BUILD |
| 67 | # define CONFIG_HW_WATCHDOG | |
| 68 | # define CONFIG_XILINX_TB_WATCHDOG | |
| 69 | # endif | |
| 0f21f98d MS |
70 | #endif |
| 71 | ||
| e945f6dc MS |
72 | #define CONFIG_SYS_MALLOC_LEN 0xC0000 |
| 73 | ||
| 74 | /* Stack location before relocation */ | |
| 4fcd0b33 MS |
75 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ |
| 76 | CONFIG_SYS_MALLOC_F_LEN) | |
| 76316a31 | 77 | |
| 8f371b18 SL |
78 | /* |
| 79 | * CFI flash memory layout - Example | |
| 80 | * CONFIG_SYS_FLASH_BASE = 0x2200_0000; | |
| 81 | * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB | |
| 82 | * | |
| 83 | * SECT_SIZE = 0x20000; 128kB is one sector | |
| 84 | * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store | |
| 85 | * | |
| 86 | * 0x2200_0000 CONFIG_SYS_FLASH_BASE | |
| 87 | * FREE 256kB | |
| 88 | * 0x2204_0000 CONFIG_ENV_ADDR | |
| 89 | * ENV_AREA 128kB | |
| 90 | * 0x2206_0000 | |
| 91 | * FREE | |
| 92 | * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE | |
| 93 | * | |
| 94 | */ | |
| 95 | ||
| 76316a31 | 96 | #ifdef FLASH |
| 4aecfb16 MS |
97 | # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START |
| 98 | # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE | |
| 99 | # define CONFIG_SYS_FLASH_CFI 1 | |
| 100 | # define CONFIG_FLASH_CFI_DRIVER 1 | |
| 101 | /* ?empty sector */ | |
| 102 | # define CONFIG_SYS_FLASH_EMPTY_INFO 1 | |
| 103 | /* max number of memory banks */ | |
| 104 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
| 105 | /* max number of sectors on one chip */ | |
| 106 | # define CONFIG_SYS_MAX_FLASH_SECT 512 | |
| 107 | /* hardware flash protection */ | |
| 108 | # define CONFIG_SYS_FLASH_PROTECTION | |
| 22ff7f4d MS |
109 | /* use buffered writes (20x faster) */ |
| 110 | # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 | |
| 4aecfb16 MS |
111 | # ifdef RAMENV |
| 112 | # define CONFIG_ENV_IS_NOWHERE 1 | |
| 113 | # define CONFIG_ENV_SIZE 0x1000 | |
| 114 | # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) | |
| 115 | ||
| bcec8f49 | 116 | # else /* FLASH && !RAMENV */ |
| 4aecfb16 MS |
117 | # define CONFIG_ENV_IS_IN_FLASH 1 |
| 118 | /* 128K(one sector) for env */ | |
| 119 | # define CONFIG_ENV_SECT_SIZE 0x20000 | |
| 120 | # define CONFIG_ENV_ADDR \ | |
| 121 | (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) | |
| 122 | # define CONFIG_ENV_SIZE 0x20000 | |
| bcec8f49 | 123 | # endif /* FLASH && !RAMBOOT */ |
| 76316a31 | 124 | #else /* !FLASH */ |
| bcec8f49 SL |
125 | |
| 126 | #ifdef SPIFLASH | |
| 127 | # define CONFIG_SYS_NO_FLASH 1 | |
| 128 | # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR | |
| bcec8f49 | 129 | # define CONFIG_SPI 1 |
| bcec8f49 SL |
130 | # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
| 131 | # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ | |
| 132 | # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS | |
| 133 | ||
| 134 | # ifdef RAMENV | |
| 135 | # define CONFIG_ENV_IS_NOWHERE 1 | |
| 136 | # define CONFIG_ENV_SIZE 0x1000 | |
| 137 | # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) | |
| 138 | ||
| 139 | # else /* SPIFLASH && !RAMENV */ | |
| 140 | # define CONFIG_ENV_IS_IN_SPI_FLASH 1 | |
| 141 | # define CONFIG_ENV_SPI_MODE SPI_MODE_3 | |
| 142 | # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
| 143 | # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
| 144 | /* 128K(two sectors) for env */ | |
| 145 | # define CONFIG_ENV_SECT_SIZE 0x10000 | |
| 146 | # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) | |
| 147 | /* Warning: adjust the offset in respect of other flash content and size */ | |
| 148 | # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ | |
| 149 | # endif /* SPIFLASH && !RAMBOOT */ | |
| 150 | #else /* !SPIFLASH */ | |
| 151 | ||
| 4aecfb16 MS |
152 | /* ENV in RAM */ |
| 153 | # define CONFIG_SYS_NO_FLASH 1 | |
| 154 | # define CONFIG_ENV_IS_NOWHERE 1 | |
| 155 | # define CONFIG_ENV_SIZE 0x1000 | |
| 156 | # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) | |
| bcec8f49 | 157 | #endif /* !SPIFLASH */ |
| 76316a31 MS |
158 | #endif /* !FLASH */ |
| 159 | ||
| e9b737de | 160 | #if defined(XILINX_USE_ICACHE) |
| 4aecfb16 | 161 | # define CONFIG_ICACHE |
| e9b737de | 162 | #else |
| 4aecfb16 | 163 | # undef CONFIG_ICACHE |
| e9b737de MS |
164 | #endif |
| 165 | ||
| 166 | #if defined(XILINX_USE_DCACHE) | |
| 4aecfb16 | 167 | # define CONFIG_DCACHE |
| e9b737de | 168 | #else |
| 4aecfb16 | 169 | # undef CONFIG_DCACHE |
| e9b737de MS |
170 | #endif |
| 171 | ||
| 5811830f MS |
172 | #ifndef XILINX_DCACHE_BYTE_SIZE |
| 173 | #define XILINX_DCACHE_BYTE_SIZE 32768 | |
| 174 | #endif | |
| 175 | ||
| 079a136c JL |
176 | /* |
| 177 | * BOOTP options | |
| 178 | */ | |
| 179 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 180 | #define CONFIG_BOOTP_BOOTPATH | |
| 181 | #define CONFIG_BOOTP_GATEWAY | |
| 182 | #define CONFIG_BOOTP_HOSTNAME | |
| 76316a31 | 183 | |
| 5dc11a51 JL |
184 | /* |
| 185 | * Command line configuration. | |
| 186 | */ | |
| 5dc11a51 | 187 | #define CONFIG_CMD_ASKENV |
| 5dc11a51 | 188 | #define CONFIG_CMD_IRQ |
| 5dc11a51 | 189 | #define CONFIG_CMD_MFSL |
| 4d49b280 | 190 | |
| e9b737de | 191 | #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) |
| 4aecfb16 | 192 | # define CONFIG_CMD_CACHE |
| e9b737de | 193 | #else |
| 4aecfb16 | 194 | # undef CONFIG_CMD_CACHE |
| e9b737de MS |
195 | #endif |
| 196 | ||
| 5dc11a51 | 197 | #if defined(FLASH) |
| 4aecfb16 | 198 | # define CONFIG_CMD_JFFS2 |
| 7cfb13a7 SL |
199 | # define CONFIG_CMD_UBI |
| 200 | # undef CONFIG_CMD_UBIFS | |
| 4aecfb16 | 201 | |
| bcec8f49 | 202 | # if !defined(RAMENV) |
| bcec8f49 SL |
203 | # define CONFIG_CMD_SAVES |
| 204 | # endif | |
| 205 | ||
| 206 | #else | |
| 207 | #if defined(SPIFLASH) | |
| 208 | # define CONFIG_CMD_SF | |
| 209 | ||
| 4aecfb16 | 210 | # if !defined(RAMENV) |
| 4aecfb16 MS |
211 | # define CONFIG_CMD_SAVES |
| 212 | # endif | |
| 853643d8 | 213 | #else |
| 4aecfb16 | 214 | # undef CONFIG_CMD_JFFS2 |
| 2cce2d32 SL |
215 | # undef CONFIG_CMD_UBI |
| 216 | # undef CONFIG_CMD_UBIFS | |
| 5dc11a51 | 217 | #endif |
| bcec8f49 | 218 | #endif |
| 76316a31 | 219 | |
| 5dc11a51 | 220 | #if defined(CONFIG_CMD_JFFS2) |
| 7cfb13a7 SL |
221 | # define CONFIG_MTD_PARTITIONS |
| 222 | #endif | |
| 223 | ||
| 224 | #if defined(CONFIG_CMD_UBIFS) | |
| 225 | # define CONFIG_CMD_UBI | |
| 226 | # define CONFIG_LZO | |
| 227 | #endif | |
| 228 | ||
| 229 | #if defined(CONFIG_CMD_UBI) | |
| 230 | # define CONFIG_MTD_PARTITIONS | |
| 231 | # define CONFIG_RBTREE | |
| 232 | #endif | |
| 233 | ||
| 234 | #if defined(CONFIG_MTD_PARTITIONS) | |
| 235 | /* MTD partitions */ | |
| 68d7d651 | 236 | #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ |
| 942556a9 SR |
237 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 238 | #define CONFIG_FLASH_CFI_MTD | |
| c82a541d | 239 | #define MTDIDS_DEFAULT "nor0=flash-0" |
| 144876a3 MS |
240 | |
| 241 | /* default mtd partition table */ | |
| c82a541d | 242 | #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ |
| 144876a3 MS |
243 | "256k(env),3m(kernel),1m(romfs),"\ |
| 244 | "1m(cramfs),-(jffs2)" | |
| 245 | #endif | |
| 246 | ||
| 4aecfb16 MS |
247 | /* size of console buffer */ |
| 248 | #define CONFIG_SYS_CBSIZE 512 | |
| 249 | /* print buffer size */ | |
| 250 | #define CONFIG_SYS_PBSIZE \ | |
| 251 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| 252 | /* max number of command args */ | |
| 253 | #define CONFIG_SYS_MAXARGS 15 | |
| 6d0f6bcf | 254 | #define CONFIG_SYS_LONGHELP |
| 4aecfb16 | 255 | /* default load address */ |
| 44a3a91c | 256 | #define CONFIG_SYS_LOAD_ADDR 0 |
| 76316a31 | 257 | |
| 330e5545 | 258 | #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ |
| 76316a31 | 259 | #define CONFIG_BOOTARGS "root=romfs" |
| 330e5545 | 260 | #define CONFIG_HOSTNAME XILINX_BOARD_NAME |
| 853643d8 | 261 | #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" |
| 76316a31 | 262 | #define CONFIG_IPADDR 192.168.0.3 |
| 853643d8 MS |
263 | #define CONFIG_SERVERIP 192.168.0.5 |
| 264 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
| 76316a31 MS |
265 | |
| 266 | /* architecture dependent code */ | |
| 6d0f6bcf | 267 | #define CONFIG_SYS_USR_EXCEP /* user exception */ |
| 76316a31 | 268 | |
| 0900bee9 | 269 | #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" |
| 144876a3 | 270 | |
| 4aecfb16 | 271 | #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ |
| c82a541d SL |
272 | "nor0=flash-0\0"\ |
| 273 | "mtdparts=mtdparts=flash-0:"\ | |
| 144876a3 | 274 | "256k(u-boot),256k(env),3m(kernel),"\ |
| 78376452 MS |
275 | "1m(romfs),1m(cramfs),-(jffs2)\0"\ |
| 276 | "nc=setenv stdout nc;"\ | |
| 277 | "setenv stdin nc\0" \ | |
| 278 | "serial=setenv stdout serial;"\ | |
| 279 | "setenv stdin serial\0" | |
| 144876a3 | 280 | |
| 188dc16b | 281 | #define CONFIG_CMDLINE_EDITING |
| 188dc16b | 282 | |
| 78376452 MS |
283 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
| 284 | ||
| 37e892d9 MS |
285 | /* Enable flat device tree support */ |
| 286 | #define CONFIG_LMB 1 | |
| 37e892d9 MS |
287 | #define CONFIG_OF_LIBFDT 1 |
| 288 | ||
| 4632b1ea | 289 | #if defined(CONFIG_XILINX_AXIEMAC) |
| f5e5e1ff SL |
290 | # define CONFIG_MII 1 |
| 291 | # define CONFIG_CMD_MII 1 | |
| 292 | # define CONFIG_PHY_GIGE 1 | |
| 293 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 | |
| f5e5e1ff SL |
294 | # define CONFIG_PHY_ATHEROS 1 |
| 295 | # define CONFIG_PHY_BROADCOM 1 | |
| 296 | # define CONFIG_PHY_DAVICOM 1 | |
| 297 | # define CONFIG_PHY_LXT 1 | |
| 298 | # define CONFIG_PHY_MARVELL 1 | |
| 299 | # define CONFIG_PHY_MICREL 1 | |
| 2014a3de | 300 | # define CONFIG_PHY_MICREL_KSZ9021 |
| f5e5e1ff SL |
301 | # define CONFIG_PHY_NATSEMI 1 |
| 302 | # define CONFIG_PHY_REALTEK 1 | |
| 303 | # define CONFIG_PHY_VITESSE 1 | |
| 304 | #else | |
| 305 | # undef CONFIG_MII | |
| 306 | # undef CONFIG_CMD_MII | |
| f5e5e1ff SL |
307 | #endif |
| 308 | ||
| 9d242745 | 309 | /* SPL part */ |
| 9d242745 MS |
310 | #define CONFIG_CMD_SPL |
| 311 | #define CONFIG_SPL_FRAMEWORK | |
| 312 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
| 313 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
| 314 | #define CONFIG_SPL_SERIAL_SUPPORT | |
| 315 | #define CONFIG_SPL_BOARD_INIT | |
| 316 | ||
| 317 | #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" | |
| 318 | ||
| 319 | #define CONFIG_SPL_RAM_DEVICE | |
| 4dd09742 MS |
320 | #ifdef CONFIG_SYS_FLASH_BASE |
| 321 | # define CONFIG_SPL_NOR_SUPPORT | |
| 322 | # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE | |
| 323 | #endif | |
| 9d242745 MS |
324 | |
| 325 | /* for booting directly linux */ | |
| 326 | #define CONFIG_SPL_OS_BOOT | |
| 327 | ||
| 328 | #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ | |
| 329 | 0x60000) | |
| 330 | #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ | |
| 331 | 0x40000) | |
| 332 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ | |
| 333 | 0x1000000) | |
| 334 | ||
| 335 | /* SP location before relocation, must use scratch RAM */ | |
| 336 | /* BRAM start */ | |
| 337 | #define CONFIG_SYS_INIT_RAM_ADDR 0x0 | |
| 338 | /* BRAM size - will be generated */ | |
| ca7d2266 | 339 | #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 |
| 9d242745 | 340 | |
| ca7d2266 MS |
341 | # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 342 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
| 343 | CONFIG_SYS_MALLOC_F_LEN) | |
| 9d242745 MS |
344 | |
| 345 | /* Just for sure that there is a space for stack */ | |
| 346 | #define CONFIG_SPL_STACK_SIZE 0x100 | |
| 347 | ||
| 9d242745 MS |
348 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE |
| 349 | ||
| 350 | #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ | |
| 351 | CONFIG_SYS_INIT_RAM_ADDR - \ | |
| ca7d2266 | 352 | CONFIG_SYS_MALLOC_F_LEN - \ |
| 9d242745 MS |
353 | CONFIG_SPL_STACK_SIZE) |
| 354 | ||
| 76316a31 | 355 | #endif /* __CONFIG_H */ |