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[people/ms/u-boot.git] / include / configs / mx53loco.h
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1/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 * Jason Liu <r64343@freescale.com>
4 *
5 * Configuration settings for Freescale MX53 low cost board.
6 *
3765b3e7 7 * SPDX-License-Identifier: GPL-2.0+
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8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13#define CONFIG_MX53
14
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15#define CONFIG_DISPLAY_BOARDINFO
16
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17#define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
18
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19#include <asm/arch/imx-regs.h>
20
21#define CONFIG_CMDLINE_TAG
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22#define CONFIG_SETUP_MEMORY_TAGS
23#define CONFIG_INITRD_TAG
24
18fb0e3c 25#define CONFIG_SYS_FSL_CLK
6ca896f9 26
938080dc 27/* Size of malloc() pool */
f714b0a9 28#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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29
30#define CONFIG_BOARD_EARLY_INIT_F
54bb8411 31#define CONFIG_BOARD_LATE_INIT
938080dc 32#define CONFIG_MXC_GPIO
54cd1dee 33#define CONFIG_REVISION_TAG
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34
35#define CONFIG_MXC_UART
40f6fffe 36#define CONFIG_MXC_UART_BASE UART1_BASE
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37
38/* MMC Configs */
39#define CONFIG_FSL_ESDHC
40#define CONFIG_SYS_FSL_ESDHC_ADDR 0
41#define CONFIG_SYS_FSL_ESDHC_NUM 2
42
43#define CONFIG_MMC
938080dc 44#define CONFIG_GENERIC_MMC
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45#define CONFIG_DOS_PARTITION
46
47/* Eth Configs */
938080dc 48#define CONFIG_MII
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49
50#define CONFIG_FEC_MXC
51#define IMX_FEC_BASE FEC_BASE_ADDR
52#define CONFIG_FEC_MXC_PHYADDR 0x1F
53
45cf6ada 54/* USB Configs */
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55#define CONFIG_USB_EHCI
56#define CONFIG_USB_EHCI_MX5
57#define CONFIG_USB_STORAGE
58#define CONFIG_USB_HOST_ETHER
59#define CONFIG_USB_ETHER_ASIX
a743415f 60#define CONFIG_USB_ETHER_MCS7830
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61#define CONFIG_USB_ETHER_SMSC95XX
62#define CONFIG_MXC_USB_PORT 1
63#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
64#define CONFIG_MXC_USB_FLAGS 0
65
e7e33722 66/* I2C Configs */
b089d039 67#define CONFIG_SYS_I2C
68#define CONFIG_SYS_I2C_MXC
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69#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
70#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e 71#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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72
73/* PMIC Controller */
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74#define CONFIG_POWER
75#define CONFIG_POWER_I2C
2988e866 76#define CONFIG_DIALOG_POWER
be3b51aa 77#define CONFIG_POWER_FSL
913702ca 78#define CONFIG_POWER_FSL_MC13892
e7e33722 79#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
5b547f3c 80#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
e7e33722 81
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82/* allow to overwrite serial and ethaddr */
83#define CONFIG_ENV_OVERWRITE
84#define CONFIG_CONS_INDEX 1
85#define CONFIG_BAUDRATE 115200
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86
87/* Command definition */
ec62c07a 88#define CONFIG_SUPPORT_RAW_INITRD
938080dc 89
938080dc 90
28b119e9 91#define CONFIG_ETHPRIME "FEC0"
938080dc 92
fe51f787 93#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
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94#define CONFIG_SYS_TEXT_BASE 0x77800000
95
96#define CONFIG_EXTRA_ENV_SETTINGS \
97 "script=boot.scr\0" \
f28154b5 98 "image=zImage\0" \
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99 "fdt_addr=0x71000000\0" \
100 "boot_fdt=try\0" \
101 "ip_dyn=yes\0" \
938080dc 102 "mmcdev=0\0" \
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103 "mmcpart=1\0" \
104 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
e0df5353 105 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
938080dc 106 "loadbootscript=" \
54e0f96f 107 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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108 "bootscript=echo Running bootscript from mmc ...; " \
109 "source\0" \
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110 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
111 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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112 "mmcboot=echo Booting from mmc ...; " \
113 "run mmcargs; " \
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114 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
115 "if run loadfdt; then " \
f28154b5 116 "bootz ${loadaddr} - ${fdt_addr}; " \
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117 "else " \
118 "if test ${boot_fdt} = try; then " \
f28154b5 119 "bootz; " \
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120 "else " \
121 "echo WARN: Cannot load the DT; " \
122 "fi; " \
123 "fi; " \
124 "else " \
f28154b5 125 "bootz; " \
e0df5353 126 "fi;\0" \
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127 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
128 "root=/dev/nfs " \
129 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
130 "netboot=echo Booting from net ...; " \
131 "run netargs; " \
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132 "if test ${ip_dyn} = yes; then " \
133 "setenv get_cmd dhcp; " \
134 "else " \
135 "setenv get_cmd tftp; " \
136 "fi; " \
f28154b5 137 "${get_cmd} ${image}; " \
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138 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
139 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
f28154b5 140 "bootz ${loadaddr} - ${fdt_addr}; " \
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141 "else " \
142 "if test ${boot_fdt} = try; then " \
f28154b5 143 "bootz; " \
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144 "else " \
145 "echo ERROR: Cannot load the DT; " \
146 "exit; " \
147 "fi; " \
148 "fi; " \
149 "else " \
f28154b5 150 "bootz; " \
e0df5353 151 "fi;\0"
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152
153#define CONFIG_BOOTCOMMAND \
66968110 154 "mmc dev ${mmcdev}; if mmc rescan; then " \
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155 "if run loadbootscript; then " \
156 "run bootscript; " \
157 "else " \
f28154b5 158 "if run loadimage; then " \
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159 "run mmcboot; " \
160 "else run netboot; " \
161 "fi; " \
162 "fi; " \
163 "else run netboot; fi"
164
165#define CONFIG_ARP_TIMEOUT 200UL
166
167/* Miscellaneous configurable options */
168#define CONFIG_SYS_LONGHELP /* undef to save memory */
938080dc 169#define CONFIG_AUTO_COMPLETE
e0df5353 170#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
938080dc 171
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172#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
173#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
174
175#define CONFIG_SYS_MEMTEST_START 0x70000000
176#define CONFIG_SYS_MEMTEST_END 0x70010000
177
178#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
179
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180#define CONFIG_CMDLINE_EDITING
181
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182/* Physical Memory Map */
183#define CONFIG_NR_DRAM_BANKS 2
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184#define PHYS_SDRAM_1 CSD0_BASE_ADDR
185#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
186#define PHYS_SDRAM_2 CSD1_BASE_ADDR
187#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
188#define PHYS_SDRAM_SIZE (gd->ram_size)
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189
190#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
191#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
192#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
193
194#define CONFIG_SYS_INIT_SP_OFFSET \
195 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
196#define CONFIG_SYS_INIT_SP_ADDR \
197 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
198
199/* FLASH and environment organization */
200#define CONFIG_SYS_NO_FLASH
201
202#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
203#define CONFIG_ENV_SIZE (8 * 1024)
204#define CONFIG_ENV_IS_IN_MMC
205#define CONFIG_SYS_MMC_ENV_DEV 0
206
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207#define CONFIG_CMD_SATA
208#ifdef CONFIG_CMD_SATA
209 #define CONFIG_DWC_AHSATA
210 #define CONFIG_SYS_SATA_MAX_DEVICE 1
211 #define CONFIG_DWC_AHSATA_PORT_ID 0
212 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
213 #define CONFIG_LBA48
214 #define CONFIG_LIBATA
215#endif
216
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217/* Framebuffer and LCD */
218#define CONFIG_PREBOOT
219#define CONFIG_VIDEO
695af9ab 220#define CONFIG_VIDEO_IPUV3
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221#define CONFIG_CFB_CONSOLE
222#define CONFIG_VGA_AS_SINGLE_DEVICE
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223#define CONFIG_SYS_CONSOLE_IS_IN_ENV
224#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
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225#define CONFIG_VIDEO_BMP_RLE8
226#define CONFIG_SPLASH_SCREEN
227#define CONFIG_BMP_16BPP
228#define CONFIG_VIDEO_LOGO
c606608a 229#define CONFIG_IPUV3_CLK 200000000
f714b0a9 230
938080dc 231#endif /* __CONFIG_H */