[people/ms/u-boot.git] / include / configs / netstar.h

/*
 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
 *
 * Configuation settings for the TI OMAP NetStar board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <configs/omap1510.h>

#define CONFIG_ARM925T	1		/* This is an arm925t CPU */
#define CONFIG_OMAP	1		/* in a TI OMAP core */
#define CONFIG_OMAP1510 1		/* which is in a 5910 */

/* Input clock of PLL */
#define CONFIG_SYS_CLK_FREQ		150000000	/* 150MHz */
#define CONFIG_XTAL_FREQ		12000000	/*  12MHz */

#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

#define CONFIG_MISC_INIT_R		/* There is nothing to really init */
#define BOARD_LATE_INIT			/* but we flash the LEDs here */

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1

#define CONFIG_SILENT_CONSOLE		1	/* enable silent startup */
#define CONFIG_SYS_CONSOLE_INFO_QUIET

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x10000000
#define PHYS_SDRAM_1_SIZE		(64 * 1024 * 1024)
#define PHYS_FLASH_1			0x00000000

#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR			0x4000
#define CONFIG_ENV_SIZE			(8 * 1024)
#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
#define CONFIG_ENV_ADDR_REDUND		0x6000
#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
#define CONFIG_ENV_OVERWRITE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_GBL_DATA_SIZE	128
#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)

/*
 * The stack size is set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE		(1 * 1024 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		(CONFIG_XTAL_FREQ)
#define CONFIG_SYS_NS16550_COM1		OMAP1510_UART1_BASE

#define CONFIG_NET_MULTI
#define CONFIG_SMC91111
#define CONFIG_SMC91111_BASE		0x04000300

#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	19

#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_SYS_FLASH_LEGACY_512Kx16

#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x04000000 + (2 << 23)
#define NAND_ALLOW_ERASE_ALL		1

#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_DRIVER_OMAP1510_I2C

#define CONFIG_RTC_DS1307
#define CONFIG_SYS_I2C_RTC_ADDR		0x68


#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*#define CONFIG_SKIP_RELOCATE_UBOOT*/
/*#define CONFIG_SKIP_LOWLEVEL_INIT */

/*
 * Partitions (mtdparts command line support)
 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT		"nor0=physmap-flash.0,nand0=gen_nand.0"
#define MTDPARTS_DEFAULT	"mtdparts=" \
	"physmap-flash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
	"gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"

/*
 * Command line configuration
 */
#define CONFIG_CMD_BDI
#define CONFIG_CMD_BOOTD
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_IMI
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_RUN

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH

#define CONFIG_LOOPW

#define CONFIG_BOOTDELAY	3
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* allow to break in always */
#undef  CONFIG_BOOTARGS		/* the boot command will set bootargs*/
#define CONFIG_SYS_AUTOLOAD		"n"		/* No autoload */
#define CONFIG_BOOTCOMMAND	"run fboot"
#define CONFIG_PREBOOT		"run setup"
#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"autostart=yes\0"						\
	"ospart=0\0"							\
	"setup=setenv bootargs console=ttyS0,$baudrate $mtdparts\0"	\
	"setpart="							\
	"if test -n $swapos; then "					\
		"setenv swapos; saveenv; "				\
		"if test $ospart -eq 0; then "				\
			"setenv ospart 1; "				\
		"else "							\
			"setenv ospart 0; "				\
		"fi; "							\
	"fi\0"								\
	"nfsargs=setenv bootargs $bootargs "				\
		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
		"nfsroot=$rootpath root=/dev/nfs\0"			\
	"flashargs=run setpart;setenv bootargs $bootargs "		\
		"root=mtd:rootfs$ospart ro "				\
		"rootfstype=jffs2\0"					\
	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0"	\
	"fboot=run flashargs;nboot kernel$ospart\0"			\
	"nboot=bootp;run nfsargs;tftp\0"

#if 0	/* feel free to disable for development */
#define	CONFIG_AUTOBOOT_KEYED		/* Enable password protection	*/
#define CONFIG_AUTOBOOT_PROMPT		\
	"\nNetStar PBX - boot in %d secs...\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR	"."	/* 1st "password"	*/
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT		"# "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
	 sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_AUTO_COMPLETE

#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
#define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
	(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)

#define CONFIG_SYS_LOAD_ADDR		(PHYS_SDRAM_1 + 0x400000)

/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
 * This time is further subdivided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		OMAP1510_TIMER1_BASE
#define CONFIG_SYS_PTV			7
#define CONFIG_SYS_HZ			1000

#define OMAP5910_DPLL_DIV		1
#define OMAP5910_DPLL_MUL		\
	((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)

#define OMAP5910_ARM_PER_DIV	2	/* CKL/4 */
#define OMAP5910_LCD_DIV	2	/* CKL/4 */
#define OMAP5910_ARM_DIV	0	/* CKL/1 */
#define OMAP5910_DSP_DIV	0	/* CKL/1 */
#define OMAP5910_TC_DIV		1	/* CKL/2 */
#define OMAP5910_DSP_MMU_DIV	1	/* CKL/2 */
#define OMAP5910_ARM_TIM_SEL	1	/* CKL used for MPU timers */

#define OMAP5910_ARM_EN_CLK	0x03d6	/* 0000 0011 1101 0110b */
#define OMAP5910_ARM_CKCTL	((OMAP5910_ARM_PER_DIV)  |	\
				 (OMAP5910_LCD_DIV << 2) |	\
				 (OMAP5910_ARM_DIV << 4) |	\
				 (OMAP5910_DSP_DIV << 6) |	\
				 (OMAP5910_TC_DIV << 8) |	\
				 (OMAP5910_DSP_MMU_DIV << 10) |	\
				 (OMAP5910_ARM_TIM_SEL << 12))

#endif	/* __CONFIG_H */
Commit	Line	Data
ac7eb8a3 WD	1	/*
	2	* (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
	3	*
	4	* Configuation settings for the TI OMAP NetStar board.
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	#ifndef __CONFIG_H
	26	#define __CONFIG_H
	27
	28	#include <configs/omap1510.h>
	29
ac7eb8a3 WD	30	#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
	31	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	32	#define CONFIG_OMAP1510 1 /* which is in a 5910 */
	33
	34	/* Input clock of PLL */
779b5343 LM	35	#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */
779b5343 LM	36	#define CONFIG_XTAL_FREQ 12000000 /* 12MHz */
ac7eb8a3 WD	37
	38	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	39
	40	#define CONFIG_MISC_INIT_R /* There is nothing to really init */
	41	#define BOARD_LATE_INIT /* but we flash the LEDs here */
	42
	43	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	44	#define CONFIG_SETUP_MEMORY_TAGS 1
	45	#define CONFIG_INITRD_TAG 1
	46
ac7eb8a3	47	#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
6d0f6bcf	48	#define CONFIG_SYS_CONSOLE_INFO_QUIET
ac7eb8a3 WD	49
	50	/*
	51	* Physical Memory Map
	52	*/
779b5343 LM	53	#define CONFIG_NR_DRAM_BANKS 1
	54	#define PHYS_SDRAM_1 0x10000000
	55	#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
	56	#define PHYS_FLASH_1 0x00000000
ac7eb8a3	57
27057d41	58	#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
6d0f6bcf	59	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
ac7eb8a3 WD	60
	61	/*
	62	* Environment settings
	63	*/
5a1aceb0	64	#define CONFIG_ENV_IS_IN_FLASH
779b5343 LM	65	#define CONFIG_ENV_ADDR 0x4000
	66	#define CONFIG_ENV_SIZE (8 * 1024)
	67	#define CONFIG_ENV_SECT_SIZE (8 * 1024)
	68	#define CONFIG_ENV_ADDR_REDUND 0x6000
	69	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
ac7eb8a3 WD	70	#define CONFIG_ENV_OVERWRITE
	71
	72	/*
	73	* Size of malloc() pool
	74	*/
779b5343	75	#define CONFIG_SYS_GBL_DATA_SIZE 128
6d0f6bcf	76	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
ac7eb8a3 WD	77
	78	/*
	79	* The stack size is set up in start.S using the settings below
	80	*/
779b5343	81	#define CONFIG_STACKSIZE (1 * 1024 * 1024)
ac7eb8a3 WD	82
	83	/*
	84	* Hardware drivers
	85	*/
6d0f6bcf JCPV	86	#define CONFIG_SYS_NS16550
	87	#define CONFIG_SYS_NS16550_SERIAL
	88	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
779b5343 LM	89	#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ)
779b5343 LM	90	#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE
27057d41	91
7194ab80 BW	92	#define CONFIG_NET_MULTI
7194ab80 BW	93	#define CONFIG_SMC91111
27057d41 LM	94	#define CONFIG_SMC91111_BASE 0x04000300
27057d41 LM	95
71f7bd30 LM	96	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
	97	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	98	#define CONFIG_SYS_MAX_FLASH_SECT 19
	99
	100	#define CONFIG_SYS_FLASH_CFI
	101	#define CONFIG_FLASH_CFI_DRIVER
	102	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
	103	#define CONFIG_FLASH_CFI_LEGACY
	104	#define CONFIG_SYS_FLASH_LEGACY_512Kx16
	105
27057d41 LM	106	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	107	#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
	108	#define NAND_ALLOW_ERASE_ALL 1
	109
04531f3c LM	110	#define CONFIG_HARD_I2C
	111	#define CONFIG_SYS_I2C_SPEED 100000
	112	#define CONFIG_SYS_I2C_SLAVE 1
	113	#define CONFIG_DRIVER_OMAP1510_I2C
	114
	115	#define CONFIG_RTC_DS1307
	116	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
	117
ac7eb8a3	118
27057d41 LM	119	#define CONFIG_CONS_INDEX 1
27057d41 LM	120	#define CONFIG_BAUDRATE 115200
6d0f6bcf	121	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
ac7eb8a3 WD	122
	123	/#define CONFIG_SKIP_RELOCATE_UBOOT/
	124	/#define CONFIG_SKIP_LOWLEVEL_INIT /
	125
ac7eb8a3	126	/*
779b5343	127	* Partitions (mtdparts command line support)
ac7eb8a3	128	*/
68d7d651	129	#define CONFIG_CMD_MTDPARTS
779b5343	130	#define CONFIG_MTD_DEVICE
942556a9	131	#define CONFIG_FLASH_CFI_MTD
d8775d03	132	#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=gen_nand.0"
f4e7cbfc	133	#define MTDPARTS_DEFAULT "mtdparts=" \
d8775d03 LM	134	"physmap-flash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
d8775d03 LM	135	"gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
ac7eb8a3	136
929a2bfd	137	/*
779b5343	138	* Command line configuration
929a2bfd	139	*/
929a2bfd JL	140	#define CONFIG_CMD_BDI
929a2bfd JL	141	#define CONFIG_CMD_BOOTD
04531f3c	142	#define CONFIG_CMD_DATE
929a2bfd	143	#define CONFIG_CMD_DHCP
bdab39d3	144	#define CONFIG_CMD_SAVEENV
929a2bfd JL	145	#define CONFIG_CMD_FLASH
929a2bfd JL	146	#define CONFIG_CMD_IMI
929a2bfd JL	147	#define CONFIG_CMD_LOADB
	148	#define CONFIG_CMD_MEMORY
	149	#define CONFIG_CMD_NAND
	150	#define CONFIG_CMD_NET
	151	#define CONFIG_CMD_PING
	152	#define CONFIG_CMD_RUN
	153
d3b8c1a7 JL	154	/*
	155	* BOOTP options
	156	*/
	157	#define CONFIG_BOOTP_SUBNETMASK
	158	#define CONFIG_BOOTP_GATEWAY
	159	#define CONFIG_BOOTP_HOSTNAME
	160	#define CONFIG_BOOTP_BOOTPATH
	161
ac7eb8a3 WD	162	#define CONFIG_LOOPW
ac7eb8a3 WD	163
ac7eb8a3 WD	164	#define CONFIG_BOOTDELAY 3
	165	#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
	166	#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
6d0f6bcf	167	#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
f4e7cbfc	168	#define CONFIG_BOOTCOMMAND "run fboot"
ac7eb8a3	169	#define CONFIG_PREBOOT "run setup"
de9a1e0d LM	170	#define CONFIG_EXTRA_ENV_SETTINGS \
	171	"autostart=yes\0" \
	172	"ospart=0\0" \
	173	"setup=setenv bootargs console=ttyS0,$baudrate $mtdparts\0" \
	174	"setpart=" \
	175	"if test -n $swapos; then " \
	176	"setenv swapos; saveenv; " \
	177	"if test $ospart -eq 0; then " \
	178	"setenv ospart 1; " \
	179	"else " \
	180	"setenv ospart 0; " \
	181	"fi; " \
	182	"fi\0" \
	183	"nfsargs=setenv bootargs $bootargs " \
	184	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
	185	"nfsroot=$rootpath root=/dev/nfs\0" \
	186	"flashargs=run setpart;setenv bootargs $bootargs " \
	187	"root=mtd:rootfs$ospart ro " \
	188	"rootfstype=jffs2\0" \
	189	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
	190	"fboot=run flashargs;nboot kernel$ospart\0" \
f4e7cbfc	191	"nboot=bootp;run nfsargs;tftp\0"
ac7eb8a3 WD	192
	193	#if 0 /* feel free to disable for development */
	194	#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
f2302d44 SR	195	#define CONFIG_AUTOBOOT_PROMPT \
f2302d44 SR	196	"\nNetStar PBX - boot in %d secs...\n", bootdelay
f4e7cbfc	197	#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
ac7eb8a3 WD	198	#endif
	199
	200	/*
	201	* Miscellaneous configurable options
	202	*/
779b5343 LM	203	#define CONFIG_SYS_LONGHELP
	204	#define CONFIG_SYS_PROMPT "# "
	205	#define CONFIG_SYS_CBSIZE 256
	206	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	207	sizeof(CONFIG_SYS_PROMPT) + 16)
	208	#define CONFIG_SYS_MAXARGS 16
	209	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
6d0f6bcf JCPV	210
	211	#define CONFIG_SYS_HUSH_PARSER
	212	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
ac7eb8a3 WD	213	#define CONFIG_AUTO_COMPLETE
ac7eb8a3 WD	214
6d0f6bcf JCPV	215	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
6d0f6bcf JCPV	216	#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
779b5343	217	(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
ac7eb8a3	218
779b5343	219	#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000)
ac7eb8a3	220
3791a118	221	/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
ac7eb8a3 WD	222	* This time is further subdivided by a local divisor.
ac7eb8a3 WD	223	*/
6d0f6bcf	224	#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
3791a118 LM	225	#define CONFIG_SYS_PTV 7
3791a118 LM	226	#define CONFIG_SYS_HZ 1000
ac7eb8a3	227
779b5343 LM	228	#define OMAP5910_DPLL_DIV 1
	229	#define OMAP5910_DPLL_MUL \
	230	((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
ac7eb8a3 WD	231
	232	#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
	233	#define OMAP5910_LCD_DIV 2 /* CKL/4 */
	234	#define OMAP5910_ARM_DIV 0 /* CKL/1 */
	235	#define OMAP5910_DSP_DIV 0 /* CKL/1 */
	236	#define OMAP5910_TC_DIV 1 /* CKL/2 */
	237	#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
	238	#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
	239
779b5343	240	#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b */
ac7eb8a3 WD	241	#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) \| \
	242	(OMAP5910_LCD_DIV << 2) \| \
	243	(OMAP5910_ARM_DIV << 4) \| \
	244	(OMAP5910_DSP_DIV << 6) \| \
	245	(OMAP5910_TC_DIV << 8) \| \
	246	(OMAP5910_DSP_MMU_DIV << 10) \| \
	247	(OMAP5910_ARM_TIM_SEL << 12))
	248
	249	#endif /* __CONFIG_H */