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1/*
2 * (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
3 *
4 * Configuation settings for the TI OMAP NetStar board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28#include <configs/omap1510.h>
29
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30#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
31#define CONFIG_OMAP 1 /* in a TI OMAP core */
32#define CONFIG_OMAP1510 1 /* which is in a 5910 */
33
34/* Input clock of PLL */
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35#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */
36#define CONFIG_XTAL_FREQ 12000000 /* 12MHz */
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37
38#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
39
40#define CONFIG_MISC_INIT_R /* There is nothing to really init */
41#define BOARD_LATE_INIT /* but we flash the LEDs here */
42
43#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
44#define CONFIG_SETUP_MEMORY_TAGS 1
45#define CONFIG_INITRD_TAG 1
46
ac7eb8a3 47#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
6d0f6bcf 48#define CONFIG_SYS_CONSOLE_INFO_QUIET
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49
50/*
51 * Physical Memory Map
52 */
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53#define CONFIG_NR_DRAM_BANKS 1
54#define PHYS_SDRAM_1 0x10000000
55#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
56#define PHYS_FLASH_1 0x00000000
ac7eb8a3 57
27057d41 58#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
6d0f6bcf 59#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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60
61/*
62 * Environment settings
63 */
5a1aceb0 64#define CONFIG_ENV_IS_IN_FLASH
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65#define CONFIG_ENV_ADDR 0x4000
66#define CONFIG_ENV_SIZE (8 * 1024)
67#define CONFIG_ENV_SECT_SIZE (8 * 1024)
68#define CONFIG_ENV_ADDR_REDUND 0x6000
69#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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70#define CONFIG_ENV_OVERWRITE
71
72/*
73 * Size of malloc() pool
74 */
6d0f6bcf 75#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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76
77/*
78 * The stack size is set up in start.S using the settings below
79 */
779b5343 80#define CONFIG_STACKSIZE (1 * 1024 * 1024)
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81
82/*
83 * Hardware drivers
84 */
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85#define CONFIG_SYS_NS16550
86#define CONFIG_SYS_NS16550_SERIAL
87#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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88#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ)
89#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE
27057d41 90
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91#define CONFIG_NET_MULTI
92#define CONFIG_SMC91111
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93#define CONFIG_SMC91111_BASE 0x04000300
94
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95#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
96#define CONFIG_SYS_MAX_FLASH_BANKS 1
97#define CONFIG_SYS_MAX_FLASH_SECT 19
98
99#define CONFIG_SYS_FLASH_CFI
100#define CONFIG_FLASH_CFI_DRIVER
101#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
102#define CONFIG_FLASH_CFI_LEGACY
103#define CONFIG_SYS_FLASH_LEGACY_512Kx16
104
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105#define CONFIG_SYS_MAX_NAND_DEVICE 1
106#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
107#define NAND_ALLOW_ERASE_ALL 1
108
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109#define CONFIG_HARD_I2C
110#define CONFIG_SYS_I2C_SPEED 100000
111#define CONFIG_SYS_I2C_SLAVE 1
112#define CONFIG_DRIVER_OMAP1510_I2C
113
114#define CONFIG_RTC_DS1307
115#define CONFIG_SYS_I2C_RTC_ADDR 0x68
116
ac7eb8a3 117
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118#define CONFIG_CONS_INDEX 1
119#define CONFIG_BAUDRATE 115200
6d0f6bcf 120#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
ac7eb8a3 121
ac7eb8a3 122/*
779b5343 123 * Partitions (mtdparts command line support)
ac7eb8a3 124 */
68d7d651 125#define CONFIG_CMD_MTDPARTS
779b5343 126#define CONFIG_MTD_DEVICE
942556a9 127#define CONFIG_FLASH_CFI_MTD
d8775d03 128#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=gen_nand.0"
f4e7cbfc 129#define MTDPARTS_DEFAULT "mtdparts=" \
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130 "physmap-flash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);" \
131 "gen_nand.0:4M(kernel0),40M(rootfs0),4M(kernel1),40M(rootfs1),-(data)"
ac7eb8a3 132
929a2bfd 133/*
779b5343 134 * Command line configuration
929a2bfd 135 */
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136#define CONFIG_CMD_BDI
137#define CONFIG_CMD_BOOTD
04531f3c 138#define CONFIG_CMD_DATE
929a2bfd 139#define CONFIG_CMD_DHCP
bdab39d3 140#define CONFIG_CMD_SAVEENV
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141#define CONFIG_CMD_FLASH
142#define CONFIG_CMD_IMI
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143#define CONFIG_CMD_LOADB
144#define CONFIG_CMD_MEMORY
145#define CONFIG_CMD_NAND
146#define CONFIG_CMD_NET
147#define CONFIG_CMD_PING
148#define CONFIG_CMD_RUN
149
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150/*
151 * BOOTP options
152 */
153#define CONFIG_BOOTP_SUBNETMASK
154#define CONFIG_BOOTP_GATEWAY
155#define CONFIG_BOOTP_HOSTNAME
156#define CONFIG_BOOTP_BOOTPATH
157
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158#define CONFIG_LOOPW
159
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160#define CONFIG_BOOTDELAY 3
161#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
162#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
6d0f6bcf 163#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
f4e7cbfc 164#define CONFIG_BOOTCOMMAND "run fboot"
ac7eb8a3 165#define CONFIG_PREBOOT "run setup"
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166#define CONFIG_EXTRA_ENV_SETTINGS \
167 "autostart=yes\0" \
168 "ospart=0\0" \
169 "setup=setenv bootargs console=ttyS0,$baudrate $mtdparts\0" \
170 "setpart=" \
171 "if test -n $swapos; then " \
172 "setenv swapos; saveenv; " \
173 "if test $ospart -eq 0; then " \
174 "setenv ospart 1; " \
175 "else " \
176 "setenv ospart 0; " \
177 "fi; " \
178 "fi\0" \
179 "nfsargs=setenv bootargs $bootargs " \
180 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
181 "nfsroot=$rootpath root=/dev/nfs\0" \
182 "flashargs=run setpart;setenv bootargs $bootargs " \
183 "root=mtd:rootfs$ospart ro " \
184 "rootfstype=jffs2\0" \
185 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
186 "fboot=run flashargs;nboot kernel$ospart\0" \
f4e7cbfc 187 "nboot=bootp;run nfsargs;tftp\0"
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188
189#if 0 /* feel free to disable for development */
190#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
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191#define CONFIG_AUTOBOOT_PROMPT \
192 "\nNetStar PBX - boot in %d secs...\n", bootdelay
f4e7cbfc 193#define CONFIG_AUTOBOOT_DELAY_STR "." /* 1st "password" */
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194#endif
195
196/*
197 * Miscellaneous configurable options
198 */
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199#define CONFIG_SYS_LONGHELP
200#define CONFIG_SYS_PROMPT "# "
201#define CONFIG_SYS_CBSIZE 256
202#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
203 sizeof(CONFIG_SYS_PROMPT) + 16)
204#define CONFIG_SYS_MAXARGS 16
205#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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206
207#define CONFIG_SYS_HUSH_PARSER
208#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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209#define CONFIG_AUTO_COMPLETE
210
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211#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
212#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
779b5343 213 (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
ac7eb8a3 214
779b5343 215#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000)
ac7eb8a3 216
3791a118 217/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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218 * This time is further subdivided by a local divisor.
219 */
6d0f6bcf 220#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
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221#define CONFIG_SYS_PTV 7
222#define CONFIG_SYS_HZ 1000
ac7eb8a3 223
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224#define OMAP5910_DPLL_DIV 1
225#define OMAP5910_DPLL_MUL \
226 ((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
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227
228#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
229#define OMAP5910_LCD_DIV 2 /* CKL/4 */
230#define OMAP5910_ARM_DIV 0 /* CKL/1 */
231#define OMAP5910_DSP_DIV 0 /* CKL/1 */
232#define OMAP5910_TC_DIV 1 /* CKL/2 */
233#define OMAP5910_DSP_MMU_DIV 1 /* CKL/2 */
234#define OMAP5910_ARM_TIM_SEL 1 /* CKL used for MPU timers */
235
779b5343 236#define OMAP5910_ARM_EN_CLK 0x03d6 /* 0000 0011 1101 0110b */
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237#define OMAP5910_ARM_CKCTL ((OMAP5910_ARM_PER_DIV) | \
238 (OMAP5910_LCD_DIV << 2) | \
239 (OMAP5910_ARM_DIV << 4) | \
240 (OMAP5910_DSP_DIV << 6) | \
241 (OMAP5910_TC_DIV << 8) | \
242 (OMAP5910_DSP_MMU_DIV << 10) | \
243 (OMAP5910_ARM_TIM_SEL << 12))
244
245#endif /* __CONFIG_H */