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c474a8eb MK |
1 | /* |
2 | * Copyright (C) 2009 Samsung Electronics | |
3 | * Minkyu Kang <mk7.kang@samsung.com> | |
4 | * Kyungmin Park <kyungmin.park@samsung.com> | |
5 | * | |
6 | * Configuation settings for the SAMSUNG Universal (s5pc100) board. | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
c474a8eb MK |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | /* High Level Configuration Options */ | |
c474a8eb | 15 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
889a275d | 16 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
c474a8eb | 17 | #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ |
c474a8eb | 18 | |
a45ddf7a | 19 | #include <linux/sizes.h> |
c474a8eb MK |
20 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
21 | ||
22 | #define CONFIG_ARCH_CPU_INIT | |
c474a8eb | 23 | |
c474a8eb MK |
24 | /* input clock of PLL: has 24MHz input clock at S5PC110 */ |
25 | #define CONFIG_SYS_CLK_FREQ_C110 24000000 | |
26 | ||
27 | /* DRAM Base */ | |
28 | #define CONFIG_SYS_SDRAM_BASE 0x30000000 | |
29 | ||
35bea619 | 30 | /* Text Base */ |
35bea619 | 31 | |
c474a8eb MK |
32 | #define CONFIG_SETUP_MEMORY_TAGS |
33 | #define CONFIG_CMDLINE_TAG | |
2ac9a35b | 34 | #define CONFIG_REVISION_TAG |
c474a8eb MK |
35 | #define CONFIG_INITRD_TAG |
36 | #define CONFIG_CMDLINE_EDITING | |
37 | ||
2ecd7797 | 38 | /* Size of malloc() pool before and after relocation */ |
2ecd7797 | 39 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) |
a45ddf7a | 40 | |
c474a8eb MK |
41 | /* |
42 | * select serial console configuration | |
43 | */ | |
44 | #define CONFIG_SERIAL2 1 /* use SERIAL2 */ | |
c474a8eb | 45 | |
87f314e9 | 46 | /* MMC */ |
311757be | 47 | #define SDHCI_MAX_HOSTS 4 |
87f314e9 | 48 | |
96caf02f MK |
49 | /* PWM */ |
50 | #define CONFIG_PWM 1 | |
51 | ||
2d281b32 | 52 | /* USB Composite download gadget - g_dnl */ |
0fabb6af ŁM |
53 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M |
54 | #define DFU_DEFAULT_POLL_TIMEOUT 300 | |
55 | ||
2d281b32 | 56 | /* USB Samsung's IDs */ |
e6c0bc06 SP |
57 | |
58 | #define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 | |
0fabb6af | 59 | #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D |
124c5998 ŁM |
60 | #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 |
61 | #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 | |
c474a8eb MK |
62 | |
63 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ | |
c474a8eb | 64 | |
2d281b32 MZ |
65 | /* partitions definitions */ |
66 | #define PARTS_CSA "csa-mmc" | |
67 | #define PARTS_BOOTLOADER "u-boot" | |
68 | #define PARTS_BOOT "boot" | |
69 | #define PARTS_ROOT "platform" | |
70 | #define PARTS_DATA "data" | |
71 | #define PARTS_CSC "csc" | |
72 | #define PARTS_UMS "ums" | |
73 | ||
74 | #define CONFIG_DFU_ALT \ | |
75 | "u-boot raw 0x80 0x400;" \ | |
76 | "uImage ext4 0 2;" \ | |
77 | "exynos3-goni.dtb ext4 0 2;" \ | |
78 | ""PARTS_ROOT" part 0 5\0" | |
79 | ||
80 | #define PARTS_DEFAULT \ | |
81 | "uuid_disk=${uuid_gpt_disk};" \ | |
82 | "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ | |
83 | "name="PARTS_BOOTLOADER",size=60MiB," \ | |
84 | "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ | |
85 | "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ | |
86 | "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ | |
87 | "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ | |
88 | "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ | |
89 | "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ | |
c474a8eb | 90 | |
a45ddf7a | 91 | #define CONFIG_BOOTCOMMAND "run mmcboot" |
c474a8eb | 92 | |
232ed3ca | 93 | #define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8" |
c474a8eb | 94 | |
a45ddf7a | 95 | #define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext4" \ |
c474a8eb MK |
96 | " ${console} ${meminfo}" |
97 | ||
98 | #define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}" | |
99 | ||
c474a8eb MK |
100 | #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \ |
101 | " onenand write 0x32008000 0x0 0x100000\0" | |
102 | ||
2ac9a35b PW |
103 | #define CONFIG_MISC_COMMON |
104 | #define CONFIG_MISC_INIT_R | |
105 | ||
c474a8eb | 106 | #define CONFIG_ENV_OVERWRITE |
2ac9a35b PW |
107 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
108 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
c474a8eb MK |
109 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
110 | CONFIG_UPDATEB \ | |
111 | "updatek=" \ | |
112 | "onenand erase 0xc00000 0x600000;" \ | |
113 | "onenand write 0x31008000 0xc00000 0x600000\0" \ | |
114 | "updateu=" \ | |
115 | "onenand erase 0x01560000 0x1eaa0000;" \ | |
116 | "onenand write 0x32000000 0x1260000 0x8C0000\0" \ | |
117 | "bootk=" \ | |
a45ddf7a | 118 | "run loaduimage;" \ |
c474a8eb MK |
119 | "bootm 0x30007FC0\0" \ |
120 | "flashboot=" \ | |
121 | "set bootargs root=/dev/mtdblock${bootblock} " \ | |
a45ddf7a | 122 | "rootfstype=${rootfstype} ${opts} " \ |
c474a8eb MK |
123 | "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \ |
124 | "ubifsboot=" \ | |
125 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
a45ddf7a | 126 | "${opts} ${lcdinfo} " \ |
c474a8eb MK |
127 | CONFIG_COMMON_BOOT "; run bootk\0" \ |
128 | "tftpboot=" \ | |
129 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ | |
a45ddf7a MZ |
130 | "${opts} ${lcdinfo} " CONFIG_COMMON_BOOT \ |
131 | "; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0" \ | |
c474a8eb MK |
132 | "ramboot=" \ |
133 | "set bootargs " CONFIG_RAMDISK_BOOT \ | |
a45ddf7a | 134 | "initrd=0x33000000,8M ramdisk=8192\0" \ |
c474a8eb | 135 | "mmcboot=" \ |
a45ddf7a MZ |
136 | "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ |
137 | "rootfstype=${rootfstype} ${opts} ${lcdinfo} " \ | |
c474a8eb MK |
138 | CONFIG_COMMON_BOOT "; run bootk\0" \ |
139 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ | |
140 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ | |
141 | "verify=n\0" \ | |
a45ddf7a | 142 | "rootfstype=ext4\0" \ |
232ed3ca | 143 | "console=" CONFIG_DEFAULT_CONSOLE "\0"\ |
c474a8eb | 144 | "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ |
2d281b32 | 145 | "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \ |
a45ddf7a MZ |
146 | "mmcdev=0\0" \ |
147 | "mmcbootpart=2\0" \ | |
148 | "mmcrootpart=5\0" \ | |
2d281b32 | 149 | "partitions=" PARTS_DEFAULT \ |
c474a8eb MK |
150 | "bootblock=9\0" \ |
151 | "ubiblock=8\0" \ | |
152 | "ubi=enabled\0" \ | |
2d281b32 MZ |
153 | "opts=always_resume=1\0" \ |
154 | "dfu_alt_info=" CONFIG_DFU_ALT "\0" | |
c474a8eb | 155 | |
c474a8eb | 156 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
c474a8eb | 157 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
c474a8eb MK |
158 | /* memtest works on */ |
159 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
160 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) | |
161 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) | |
162 | ||
c474a8eb MK |
163 | /* Goni has 3 banks of DRAM, but swap the bank */ |
164 | #define CONFIG_NR_DRAM_BANKS 3 | |
165 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ | |
166 | #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ | |
167 | #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ | |
168 | #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ | |
169 | #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ | |
170 | #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ | |
171 | ||
172 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
173 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ | |
174 | ||
175 | /* FLASH and environment organization */ | |
34ecd694 | 176 | #define CONFIG_MMC_DEFAULT_DEV 0 |
34ecd694 ŁM |
177 | #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV |
178 | #define CONFIG_ENV_SIZE 4096 | |
179 | #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */ | |
180 | #define CONFIG_ENV_OVERWRITE | |
c474a8eb MK |
181 | |
182 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
183 | #define CONFIG_SAMSUNG_ONENAND 1 | |
184 | #define CONFIG_SYS_ONENAND_BASE 0xB0000000 | |
185 | ||
177feff3 MK |
186 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) |
187 | ||
e30824f4 | 188 | #define CONFIG_USB_GADGET_DWC2_OTG_PHY |
85776b02 | 189 | |
c474a8eb | 190 | #endif /* __CONFIG_H */ |