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[thirdparty/binutils-gdb.git] / include / elf / aarch64.h
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a06ea964
NC		 1/* AArch64 ELF support for BFD.
2
d87bef3a 3 Copyright (C) 2009-2023 Free Software Foundation, Inc.
a06ea964
NC		 4 Contributed by ARM Ltd.
5
6 This file is part of GNU Binutils.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the license, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING3. If not,
20 see <http://www.gnu.org/licenses/>. */
21
22#ifndef _ELF_AARCH64_H
23#define _ELF_AARCH64_H
24
25#include "elf/reloc-macros.h"
26
27/* Processor specific program header types. */
28#define PT_AARCH64_ARCHEXT (PT_LOPROC + 0)
29
d0ff5ca9
LM		 30/* MTE memory tag segment type. */
31#define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 0x2)
32
a06ea964
NC		 33/* Additional section types. */
34#define SHT_AARCH64_ATTRIBUTES 0x70000003 /* Section holds attributes. */
35
36/* AArch64-specific values for sh_flags. */
37#define SHF_ENTRYSECT 0x10000000 /* Section contains an
38 entry point. */
39#define SHF_COMDEF 0x80000000 /* Section may be multiply defined
40 in the input to a link step. */
37c18eed
SD		 41/* Processor specific dynamic array tags. */
42#define DT_AARCH64_BTI_PLT (DT_LOPROC + 1)
1dbade74 43#define DT_AARCH64_PAC_PLT (DT_LOPROC + 3)
2301ed1c
SN		 44#define DT_AARCH64_VARIANT_PCS (DT_LOPROC + 5)
45
46/* AArch64-specific values for st_other. */
47#define STO_AARCH64_VARIANT_PCS 0x80 /* Symbol may follow different call
48 convention from the base PCS. */
a06ea964
NC		 49
50/* Relocation types. */
51
52START_RELOC_NUMBERS (elf_aarch64_reloc_type)
53
54/* Null relocations. */
55RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
56
a6bb11b2
YZ		 57/* Basic data relocations. */
58
59/* .word: (S+A) */
60RELOC_NUMBER (R_AARCH64_P32_ABS32, 1)
61
62/* .half: (S+A) */
63RELOC_NUMBER (R_AARCH64_P32_ABS16, 2)
64
65/* .word: (S+A-P) */
66RELOC_NUMBER (R_AARCH64_P32_PREL32, 3)
67
68/* .half: (S+A-P) */
69RELOC_NUMBER (R_AARCH64_P32_PREL16, 4)
70
71/* Group relocations to create a 16, 32, 48 or 64 bit
72 unsigned data or abs address inline. */
73
74/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
75RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5)
76
77/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
78RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6)
79
80/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
81RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7)
82
83/* Group relocations to create high part of a 16, 32, 48 or 64 bit
84 signed data or abs address inline. Will change instruction
85 to MOVN or MOVZ depending on sign of calculated value. */
86
87/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
88RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8)
89
90/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
91 addresses: PG(x) is (x & ~0xfff). */
92
93/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
94RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9)
95
96/* ADR: (S+A-P) & 0x1fffff */
97RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10)
98
99/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
100RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11)
101
102/* ADD: (S+A) & 0xfff */
103RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12)
104
105/* LD/ST8: (S+A) & 0xfff */
106RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13)
107
108/* LD/ST16: (S+A) & 0xffe */
109RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14)
110
111/* LD/ST32: (S+A) & 0xffc */
112RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15)
113
114/* LD/ST64: (S+A) & 0xff8 */
115RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16)
116
117/* LD/ST128: (S+A) & 0xff0 */
118RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17)
119
120/* Relocations for control-flow instructions. */
121
122/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */
123RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18)
124
125/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */
126RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19)
127
128/* B: ((S+A-P) >> 2) & 0x3ffffff. */
129RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
130
131/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
132RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
133
e30d1fa1
SN		 134/* Group relocations to create a 16 or 32 bit PC-relative offset inline. */
135RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22)
136RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23)
137RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24)
a6bb11b2
YZ		 138
139RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
140RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
141RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
15eddee1 142RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28)
a6bb11b2 143
3c12b054 144RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80)
a6bb11b2
YZ		 145RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
146RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
53e8fd0f 147RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
2c0a466a 148RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
56a2e450 149RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
49df5539
JW		 150RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
151RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
152RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
153RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
70151fb5 154RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
13289c10 155RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
a6bb11b2
YZ		 156RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
157RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
158RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
159RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106)
160RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107)
161RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
162RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
163RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
164RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
84f1b9fb
RL		 165RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112)
166RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113)
167RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114)
168RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115)
169RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116)
170RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117)
171RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118)
172RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119)
a6bb11b2
YZ		 173
174RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
175RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
176RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124)
177RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125)
178RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126)
179RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127)
180
181/* Dynamic relocations */
182
183/* Copy symbol at runtime. */
184RELOC_NUMBER (R_AARCH64_P32_COPY, 180)
185
186/* Create GOT entry. */
187RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181)
188
189 /* Create PLT entry. */
190RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182)
191
192/* Adjust by program base. */
193RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183)
194RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184)
195RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185)
196RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186)
197RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187)
198RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188)
a06ea964
NC		 199
200RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
201
202/* Basic data relocations. */
203
204/* .xword: (S+A) */
205RELOC_NUMBER (R_AARCH64_ABS64, 257)
206
207/* .word: (S+A) */
208RELOC_NUMBER (R_AARCH64_ABS32, 258)
209
210/* .half: (S+A) */
211RELOC_NUMBER (R_AARCH64_ABS16, 259)
212
213/* .xword: (S+A-P) */
214RELOC_NUMBER (R_AARCH64_PREL64, 260)
215
216/* .word: (S+A-P) */
217RELOC_NUMBER (R_AARCH64_PREL32, 261)
218
219/* .half: (S+A-P) */
220RELOC_NUMBER (R_AARCH64_PREL16, 262)
221
222/* Group relocations to create a 16, 32, 48 or 64 bit
223 unsigned data or abs address inline. */
224
225/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
226RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0, 263)
227
228/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
229RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264)
230
231/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
232RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265)
233
234/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
235RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266)
236
237/* MOV[ZK]: ((S+A) >> 32) & 0xffff */
238RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267)
239
240/* MOV[ZK]: ((S+A) >> 32) & 0xffff */
241RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268)
242
243/* MOV[ZK]: ((S+A) >> 48) & 0xffff */
244RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269)
245
246/* Group relocations to create high part of a 16, 32, 48 or 64 bit
247 signed data or abs address inline. Will change instruction
248 to MOVN or MOVZ depending on sign of calculated value. */
249
250/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
251RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270)
252
253/* MOV[ZN]: ((S+A) >> 16) & 0xffff */
254RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271)
255
256/* MOV[ZN]: ((S+A) >> 32) & 0xffff */
257RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272)
258
259/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
260 addresses: PG(x) is (x & ~0xfff). */
261
262/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
263RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273)
264
265/* ADR: (S+A-P) & 0x1fffff */
266RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274)
267
268/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
269RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275)
270
271/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
272RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276)
273
274/* ADD: (S+A) & 0xfff */
275RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277)
276
277/* LD/ST8: (S+A) & 0xfff */
278RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278)
279
280/* Relocations for control-flow instructions. */
281
282/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */
283RELOC_NUMBER (R_AARCH64_TSTBR14, 279)
284
285/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */
286RELOC_NUMBER (R_AARCH64_CONDBR19, 280)
287
288/* 281 unused */
289
290/* B: ((S+A-P) >> 2) & 0x3ffffff. */
291RELOC_NUMBER (R_AARCH64_JUMP26, 282)
292
293/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
294RELOC_NUMBER (R_AARCH64_CALL26, 283)
295
296/* LD/ST16: (S+A) & 0xffe */
297RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284)
298
299/* LD/ST32: (S+A) & 0xffc */
300RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285)
301
302/* LD/ST64: (S+A) & 0xff8 */
303RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286)
304
23664eac
WN		 305/* Group relocations to create a 16, 32, 48, or 64 bit PC-relative
306 offset inline. */
307
308RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287)
309RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288)
310RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289)
311RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290)
312RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291)
313RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292)
314RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293)
315
a06ea964
NC		 316/* LD/ST128: (S+A) & 0xff0 */
317RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299)
318
23664eac
WN		 319/* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative
320 offset inline. */
321
322RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300)
323RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301)
324RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302)
325RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303)
326RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304)
327RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305)
328RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306)
329
330/* GOT-relative data relocations. */
331
332RELOC_NUMBER (R_AARCH64_GOTREL64, 307)
333RELOC_NUMBER (R_AARCH64_GOTREL32, 308)
334
335/* GOT-relative instruction relocations. */
336
f41aef5f 337RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
23664eac 338RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310)
a06ea964
NC		 339RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
340RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
23664eac 341RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313)
a06ea964 342
23664eac
WN		 343/* General Dynamic TLS relocations. */
344
345RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512)
a06ea964
NC		 346RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
347RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
23664eac
WN		 348RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515)
349RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516)
350
351/* Local Dynamic TLS relocations. */
352
353RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517)
354RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518)
355RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519)
356RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520)
357RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521)
358RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522)
359RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523)
360RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524)
361RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525)
362RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526)
363RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527)
364RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528)
365RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529)
366RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530)
367RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531)
368RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532)
369RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533)
370RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534)
371RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535)
372RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536)
373RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537)
374RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538)
375
376/* Initial Exec TLS relocations. */
377
a06ea964
NC		 378RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
379RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540)
380RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541)
381RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542)
382RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543)
23664eac
WN		 383
384/* Local Exec TLS relocations. */
385
a06ea964
NC		 386RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544)
387RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545)
388RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546)
389RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547)
390RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
391RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
392RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
393RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
23664eac
WN		 394RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552)
395RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553)
396RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554)
397RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555)
398RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556)
399RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557)
400RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558)
401RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559)
402
403/* TLS descriptor relocations. */
a06ea964 404
418009c2 405RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
a06ea964 406RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
418009c2 407RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
f955cccf
NC		 408RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12, 563)
409RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12, 564)
a06ea964
NC		 410RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
411RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
412RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
413RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
414RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
a06ea964 415
23664eac
WN		 416RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570)
417RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571)
418RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572)
419RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573)
420
a06ea964 421/* Dynamic relocations */
a06ea964
NC		 422
423/* Copy symbol at runtime. */
424RELOC_NUMBER (R_AARCH64_COPY, 1024)
425
426/* Create GOT entry. */
427RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025)
428
429 /* Create PLT entry. */
430RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
431
432/* Adjust by program base. */
433RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
da0781dc
YZ		 434RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028)
435RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029)
436RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030)
437/* Aliasing relocs are guarded by RELOC_MACROS_GEN_FUNC
438 so that readelf.c won't generate duplicated case
439 statements. */
440#ifndef RELOC_MACROS_GEN_FUNC
a6bb11b2
YZ		 441RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028)
442RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029)
443RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030)
da0781dc 444#endif
a06ea964 445RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
a6bb11b2 446RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032)
a06ea964
NC		 447
448END_RELOC_NUMBERS (R_AARCH64_end)
449
450#endif /* _ELF_AARCH64_H */
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