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Add MMIX support
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
3c3bdf30
NC		 12001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
2
3 * mmix.h: New file.
4
e4432525
CD		 52001-10-18 Chris Demetriou <cgd@broadcom.com>
6
7 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
8 of the expression, to make source code merging easier.
9
8ff529d8
CD		 102001-10-17 Chris Demetriou <cgd@broadcom.com>
11
12 * mips.h: Sort coprocessor instruction argument characters
13 in comment, add a few more words of description for "H".
14
2228315b
CD		 152001-10-17 Chris Demetriou <cgd@broadcom.com>
16
17 * mips.h (INSN_SB1): New cpu-specific instruction bit.
18 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
19 if cpu is CPU_SB1.
20
f5c120c5
MG		 212001-10-17 matthew green <mrg@redhat.com>
22
23 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
24
418c1742
MG		 252001-10-12 matthew green <mrg@redhat.com>
26
0716ce0d
MG		 27 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
28 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
29 instructions, respectively.
418c1742 30
6ff2f2ba
NC		 312001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
32
33 * v850.h: Remove spurious comment.
34
015cf428
NC		 352001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
36
37 * h8300.h: Fix compile time warning messages
38
847b8b31
RH		 392001-09-04 Richard Henderson <rth@redhat.com>
40
41 * alpha.h (struct alpha_operand): Pack elements into bitfields.
42
a98b9439
EC		 432001-08-31 Eric Christopher <echristo@redhat.com>
44
45 * mips.h: Remove CPU_MIPS32_4K.
46
a6959011
AM		 472001-08-27 Torbjorn Granlund <tege@swox.com>
48
49 * ppc.h (PPC_OPERAND_DS): Define.
50
d83c6548
AJ		 512001-08-25 Andreas Jaeger <aj@suse.de>
52
53 * d30v.h: Fix declaration of reg_name_cnt.
54
55 * d10v.h: Fix declaration of d10v_reg_name_cnt.
56
57 * arc.h: Add prototypes from opcodes/arc-opc.c.
58
99c14723
TS		 592001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
60
61 * mips.h (INSN_10000): Define.
62 (OPCODE_IS_MEMBER): Check for INSN_10000.
63
11b37b7b
AM		 642001-08-10 Alan Modra <amodra@one.net.au>
65
66 * ppc.h: Revert 2001-08-08.
67
0f1bac05
AM		 682001-08-08 Alan Modra <amodra@one.net.au>
69
70 1999-10-25 Torbjorn Granlund <tege@swox.com>
71 * ppc.h (struct powerpc_operand): New field `reloc'.
72
81f6038f
FCE		 732001-07-11 Frank Ch. Eigler <fche@redhat.com>
74
75 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
76 (cgen_cpu_desc): Ditto.
77
32cfffe3
BE		 782001-07-07 Ben Elliston <bje@redhat.com>
79
80 * m88k.h: Clean up and reformat. Remove unused code.
81
3e890047
GK		 822001-06-14 Geoffrey Keating <geoffk@redhat.com>
83
84 * cgen.h (cgen_keyword): Add nonalpha_chars field.
85
d1cf510e
NC		 862001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
87
88 * mips.h (CPU_R12000): Define.
89
e281c457
JH		 902001-05-23 John Healy <jhealy@redhat.com>
91
92 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 93
aa5f19f2
NC		 942001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
95
96 * mips.h (INSN_ISA_MASK): Define.
97
67d6227d
AM		 982001-05-12 Alan Modra <amodra@one.net.au>
99
100 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
101 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
102 and use InvMem as these insns must have register operands.
103
992aaec9
AM		 1042001-05-04 Alan Modra <amodra@one.net.au>
105
106 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
107 and pextrw to swap reg/rm assignments.
108
4ef7f0bf
HPN		 1092001-04-05 Hans-Peter Nilsson <hp@axis.com>
110
111 * cris.h (enum cris_insn_version_usage): Correct comment for
112 cris_ver_v3p.
113
0f17484f
AM		 1142001-03-24 Alan Modra <alan@linuxcare.com.au>
115
116 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
117 Add InvMem to first operand of "maskmovdqu".
118
7ccb5238
HPN		 1192001-03-22 Hans-Peter Nilsson <hp@axis.com>
120
121 * cris.h (ADD_PC_INCR_OPCODE): New macro.
122
361bfa20
KH		 1232001-03-21 Kazu Hirata <kazu@hxi.com>
124
125 * h8300.h: Fix formatting.
126
87890af0
AM		 1272001-03-22 Alan Modra <alan@linuxcare.com.au>
128
129 * i386.h (i386_optab): Add paddq, psubq.
130
2e98d2de
AM		 1312001-03-19 Alan Modra <alan@linuxcare.com.au>
132
133 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
134
80a523c2
NC		 1352001-02-28 Igor Shevlyakov <igor@windriver.com>
136
137 * m68k.h: new defines for Coldfire V4. Update mcf to know
138 about mcf5407.
139
e135f41b
NC		 1402001-02-18 lars brinkhoff <lars@nocrew.org>
141
142 * pdp11.h: New file.
143
1442001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 145
146 * i386.h (i386_optab): SSE integer converison instructions have
147 64bit versions on x86-64.
148
8eaec934
NC		 1492001-02-10 Nick Clifton <nickc@redhat.com>
150
151 * mips.h: Remove extraneous whitespace. Formating change to allow
152 for future contribution.
153
a85d7ed0
NC		 1542001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
155
156 * s390.h: New file.
157
0715dc88
PM		 1582001-02-02 Patrick Macdonald <patrickm@redhat.com>
159
160 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
161 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
162 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
163
296bc568
AM		 1642001-01-24 Karsten Keil <kkeil@suse.de>
165
166 * i386.h (i386_optab): Fix swapgs
167
1328dc98
AM		 1682001-01-14 Alan Modra <alan@linuxcare.com.au>
169
170 * hppa.h: Describe new '<' and '>' operand types, and tidy
171 existing comments.
172 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
173 Remove duplicate "ldw j(s,b),x". Sort some entries.
174
e135f41b 1752001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 176
177 * i386.h (i386_optab): Fix pusha and ret templates.
178
0d2bcfaf
NC		 1792001-01-11 Peter Targett <peter.targett@arccores.com>
180
181 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
182 definitions for masking cpu type.
183 (arc_ext_operand_value) New structure for storing extended
184 operands.
185 (ARC_OPERAND_*) Flags for operand values.
186
1872001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 188
189 * i386.h (pinsrw): Add.
190 (pshufw): Remove.
191 (cvttpd2dq): Fix operands.
192 (cvttps2dq): Likewise.
193 (movq2q): Rename to movdq2q.
194
079966a8
AM		 1952001-01-10 Richard Schaal <richard.schaal@intel.com>
196
197 * i386.h: Correct movnti instruction.
198
8c1f9e76
JJ		 1992001-01-09 Jeff Johnston <jjohnstn@redhat.com>
200
201 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
202 of operands (unsigned char or unsigned short).
203 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
204 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
205
0d2bcfaf 2062001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 207
208 * i386.h (i386_optab): Make [sml]fence template to use immext field.
209
0d2bcfaf 2102001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 211
212 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
213 introduced by Pentium4
214
0d2bcfaf 2152000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 216
217 * i386.h (i386_optab): Add "rex*" instructions;
218 add swapgs; disable jmp/call far direct instructions for
219 64bit mode; add syscall and sysret; disable registers for 0xc6
220 template. Add 'q' suffixes to extendable instructions, disable
079966a8 221 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 222 (i386_regtab): Add extended registers.
223 (*Suf): Add No_qSuf.
224 (q_Suf, wlq_Suf, bwlq_Suf): New.
225
0d2bcfaf 2262000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 227
228 * i386.h (i386_optab): Replace "Imm" with "EncImm".
229 (i386_regtab): Add flags field.
d83c6548 230
bf40d919
NC		 2312000-12-12 Nick Clifton <nickc@redhat.com>
232
233 * mips.h: Fix formatting.
234
4372b673
NC		 2352000-12-01 Chris Demetriou <cgd@sibyte.com>
236
237 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
238 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
239 OP_*_SYSCALL definitions.
240 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
241 19 bit wait codes.
242 (MIPS operand specifier comments): Remove 'm', add 'U' and
243 'J', and update the meaning of 'B' so that it's more general.
244
e7af610e
NC		 245 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
246 INSN_ISA5): Renumber, redefine to mean the ISA at which the
247 instruction was added.
248 (INSN_ISA32): New constant.
249 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
250 Renumber to avoid new and/or renumbered INSN_* constants.
251 (INSN_MIPS32): Delete.
252 (ISA_UNKNOWN): New constant to indicate unknown ISA.
253 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
254 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 255 constants available at that ISA level.
e7af610e
NC		 256 (CPU_UNKNOWN): New constant to indicate unknown CPU.
257 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
258 define it with a unique value.
259 (OPCODE_IS_MEMBER): Update for new ISA membership-related
260 constant meanings.
261
84ea6cf2 262 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 263 definitions.
84ea6cf2 264
c6c98b38
NC		 265 * mips.h (CPU_SB1): New constant.
266
19f7b010
JJ		 2672000-10-20 Jakub Jelinek <jakub@redhat.com>
268
269 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
270 Note that '3' is used for siam operand.
271
139368c9
JW		 2722000-09-22 Jim Wilson <wilson@cygnus.com>
273
274 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
275
156c2f8b 2762000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 277
156c2f8b
NC		 278 * mips.h: Use defines instead of hard-coded processor numbers.
279 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 280 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC		 281 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
282 CPU_4KC, CPU_4KM, CPU_4KP): Define..
283 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 284 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 285 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ		 286 Add 'P' to used characters.
287 Use 'H' for coprocessor select field.
156c2f8b 288 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ		 289 Document new arg characters and add to used characters.
290 (INSN_MIPS32): New define for MIPS32 extensions.
291 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 292
3c5ce02e
AM		 2932000-09-05 Alan Modra <alan@linuxcare.com.au>
294
295 * hppa.h: Mention cz completer.
296
50b81f19
JW		 2972000-08-16 Jim Wilson <wilson@cygnus.com>
298
299 * ia64.h (IA64_OPCODE_POSTINC): New.
300
fc29466d
L		 3012000-08-15 H.J. Lu <hjl@gnu.org>
302
303 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
304 IgnoreSize change.
305
4f1d9bd8
NC		 3062000-08-08 Jason Eckhardt <jle@cygnus.com>
307
308 * i860.h: Small formatting adjustments.
309
45ee1401
DC		 3102000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
311
312 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
313 Move related opcodes closer to each other.
314 Minor changes in comments, list undefined opcodes.
315
9d551405
DB		 3162000-07-26 Dave Brolley <brolley@redhat.com>
317
318 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
319
4f1d9bd8
NC		 3202000-07-22 Jason Eckhardt <jle@cygnus.com>
321
322 * i860.h (btne, bte, bla): Changed these opcodes
323 to use sbroff ('r') instead of split16 ('s').
324 (J, K, L, M): New operand types for 16-bit aligned fields.
325 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
326 use I, J, K, L, M instead of just I.
327 (T, U): New operand types for split 16-bit aligned fields.
328 (st.x): Changed these opcodes to use S, T, U instead of just S.
329 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
330 exist on the i860.
331 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
332 (pfeq.ss, pfeq.dd): New opcodes.
333 (st.s): Fixed incorrect mask bits.
334 (fmlow): Fixed incorrect mask bits.
335 (fzchkl, pfzchkl): Fixed incorrect mask bits.
336 (faddz, pfaddz): Fixed incorrect mask bits.
337 (form, pform): Fixed incorrect mask bits.
338 (pfld.l): Fixed incorrect mask bits.
339 (fst.q): Fixed incorrect mask bits.
340 (all floating point opcodes): Fixed incorrect mask bits for
341 handling of dual bit.
342
c8488617
HPN		 3432000-07-20 Hans-Peter Nilsson <hp@axis.com>
344
345 cris.h: New file.
346
65aa24b6
NC		 3472000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
348
349 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
350 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
351 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
352 (AVR_ISA_M83): Define for ATmega83, ATmega85.
353 (espm): Remove, because ESPM removed in databook update.
354 (eicall, eijmp): Move to the end of opcode table.
355
60bcf0fa
NC		 3562000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
357
358 * m68hc11.h: New file for support of Motorola 68hc11.
359
60a2978a
DC		 360Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
361
362 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
363
68ab2dd9
DC		 364Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
365
366 * avr.h: New file with AVR opcodes.
367
f0662e27
DL		 368Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
369
370 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
371
b722f2be
AM		 3722000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
373
374 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
375
f9e0cf0b
AM		 3762000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
377
378 * i386.h: Use sl_FP, not sl_Suf for fild.
379
f660ee8b
FCE		 3802000-05-16 Frank Ch. Eigler <fche@redhat.com>
381
382 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
383 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
384 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
385 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
386
558b0a60
AM		 3872000-05-13 Alan Modra <alan@linuxcare.com.au>,
388
389 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
390
e413e4e9
AM		 3912000-05-13 Alan Modra <alan@linuxcare.com.au>,
392 Alexander Sokolov <robocop@netlink.ru>
393
394 * i386.h (i386_optab): Add cpu_flags for all instructions.
395
3962000-05-13 Alan Modra <alan@linuxcare.com.au>
397
398 From Gavin Romig-Koch <gavin@cygnus.com>
399 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
400
5c84d377
TW		 4012000-05-04 Timothy Wall <twall@cygnus.com>
402
403 * tic54x.h: New.
404
966f959b
C		 4052000-05-03 J.T. Conklin <jtc@redback.com>
406
407 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
408 (PPC_OPERAND_VR): New operand flag for vector registers.
409
c5d05dbb
JL		 4102000-05-01 Kazu Hirata <kazu@hxi.com>
411
412 * h8300.h (EOP): Add missing initializer.
413
a7fba0e0
JL		 414Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
415
416 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
417 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
418 New operand types l,y,&,fe,fE,fx added to support above forms.
419 (pa_opcodes): Replaced usage of 'x' as source/target for
420 floating point double-word loads/stores with 'fx'.
421
800eeca4
JW		 422Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
423 David Mosberger <davidm@hpl.hp.com>
424 Timothy Wall <twall@cygnus.com>
425 Jim Wilson <wilson@cygnus.com>
426
427 * ia64.h: New file.
428
ba23e138
NC		 4292000-03-27 Nick Clifton <nickc@cygnus.com>
430
431 * d30v.h (SHORT_A1): Fix value.
432 (SHORT_AR): Renumber so that it is at the end of the list of short
433 instructions, not the end of the list of long instructions.
434
d0b47220
AM		 4352000-03-26 Alan Modra <alan@linuxcare.com>
436
437 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
438 problem isn't really specific to Unixware.
439 (OLDGCC_COMPAT): Define.
440 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
441 destination %st(0).
442 Fix lots of comments.
443
866afedc
NC		 4442000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
445
446 * d30v.h:
447 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
448 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
449 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
450 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
451 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
452 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
453 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
454
cc5ca5ce
AM		 4552000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
456
457 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
458 fistpd without suffix.
459
68e324a2
NC		 4602000-02-24 Nick Clifton <nickc@cygnus.com>
461
462 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
463 'signed_overflow_ok_p'.
464 Delete prototypes for cgen_set_flags() and cgen_get_flags().
465
60f036a2
AH		 4662000-02-24 Andrew Haley <aph@cygnus.com>
467
468 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
469 (CGEN_CPU_TABLE): flags: new field.
470 Add prototypes for new functions.
d83c6548 471
9b9b5cd4
AM		 4722000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
473
474 * i386.h: Add some more UNIXWARE_COMPAT comments.
475
5b93d8bb
AM		 4762000-02-23 Linas Vepstas <linas@linas.org>
477
478 * i370.h: New file.
479
4f1d9bd8
NC		 4802000-02-22 Chandra Chavva <cchavva@cygnus.com>
481
482 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
483 cannot be combined in parallel with ADD/SUBppp.
484
87f398dd
AH		 4852000-02-22 Andrew Haley <aph@cygnus.com>
486
487 * mips.h: (OPCODE_IS_MEMBER): Add comment.
488
367c01af
AH		 4891999-12-30 Andrew Haley <aph@cygnus.com>
490
9a1e79ca
AH		 491 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
492 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
493 insns.
367c01af 494
add0c677
AM		 4952000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
496
497 * i386.h: Qualify intel mode far call and jmp with x_Suf.
498
3138f287
AM		 4991999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
500
501 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
502 indirect jumps and calls. Add FF/3 call for intel mode.
503
ccecd07b
JL		 504Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
505
506 * mn10300.h: Add new operand types. Add new instruction formats.
507
b37e19e9
JL		 508Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
509
510 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
511 instruction.
512
5fce5ddf
GRK		 5131999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
514
515 * mips.h (INSN_ISA5): New.
516
2bd7f1f3
GRK		 5171999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
518
519 * mips.h (OPCODE_IS_MEMBER): New.
520
4df2b5c5
NC		 5211999-10-29 Nick Clifton <nickc@cygnus.com>
522
523 * d30v.h (SHORT_AR): Define.
524
446a06c9
MM		 5251999-10-18 Michael Meissner <meissner@cygnus.com>
526
527 * alpha.h (alpha_num_opcodes): Convert to unsigned.
528 (alpha_num_operands): Ditto.
529
eca04c6a
JL		 530Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
531
532 * hppa.h (pa_opcodes): Add load and store cache control to
533 instructions. Add ordered access load and store.
534
535 * hppa.h (pa_opcode): Add new entries for addb and addib.
536
537 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
538
539 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
540
c43185de
DN		 541Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
542
543 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
544
ec3533da
JL		 545Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
546
390f858d
JL		 547 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
548 and "be" using completer prefixes.
549
8c47ebd9
JL		 550 * hppa.h (pa_opcodes): Add initializers to silence compiler.
551
ec3533da
JL		 552 * hppa.h: Update comments about character usage.
553
18369bea
JL		 554Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
555
556 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
557 up the new fstw & bve instructions.
558
c36efdd2
JL		 559Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
560
d3ffb032
JL		 561 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
562 instructions.
563
c49ec3da
JL		 564 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
565
5d2e7ecc
JL		 566 * hppa.h (pa_opcodes): Add long offset double word load/store
567 instructions.
568
6397d1a2
JL		 569 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
570 stores.
571
142f0fe0
JL		 572 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
573
f5a68b45
JL		 574 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
575
8235801e
JL		 576 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
577
35184366
JL		 578 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
579
f0bfde5e
JL		 580 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
581
27bbbb58
JL		 582 * hppa.h (pa_opcodes): Add support for "b,l".
583
c36efdd2
JL		 584 * hppa.h (pa_opcodes): Add support for "b,gate".
585
f2727d04
JL		 586Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
587
9392fb11 588 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 589 in xmpyu.
9392fb11 590
e0c52e99
JL		 591 * hppa.h (pa_opcodes): Fix mask for probe and probei.
592
f2727d04
JL		 593 * hppa.h (pa_opcodes): Fix mask for depwi.
594
52d836e2
JL		 595Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
596
597 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
598 an explicit output argument.
599
90765e3a
JL		 600Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
601
602 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
603 Add a few PA2.0 loads and store variants.
604
8340b17f
ILT		 6051999-09-04 Steve Chamberlain <sac@pobox.com>
606
607 * pj.h: New file.
608
5f47d35b
AM		 6091999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
610
611 * i386.h (i386_regtab): Move %st to top of table, and split off
612 other fp reg entries.
613 (i386_float_regtab): To here.
614
1c143202
JL		 615Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
616
7d8fdb64
JL		 617 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
618 by 'f'.
619
90927b9c
JL		 620 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
621 Add supporting args.
622
1d16bf9c
JL		 623 * hppa.h: Document new completers and args.
624 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
625 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
626 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
627 pmenb and pmdis.
628
96226a68
JL		 629 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
630 hshr, hsub, mixh, mixw, permh.
631
5d4ba527
JL		 632 * hppa.h (pa_opcodes): Change completers in instructions to
633 use 'c' prefix.
634
e9fc28c6
JL		 635 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
636 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
637
1c143202
JL		 638 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
639 fnegabs to use 'I' instead of 'F'.
640
9e525108
AM		 6411999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
642
643 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
644 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
645 Alphabetically sort PIII insns.
646
e8da1bf1
DE		 647Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
648
649 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
650
7d627258
JL		 651Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
652
5696871a
JL		 653 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
654 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
655
7d627258
JL		 656 * hppa.h: Document 64 bit condition completers.
657
c5e52916
JL		 658Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
659
660 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
661
eecb386c
AM		 6621999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
663
664 * i386.h (i386_optab): Add DefaultSize modifier to all insns
665 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
666 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
667
88a380f3
JL		 668Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
669 Jeff Law <law@cygnus.com>
670
671 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
672
673 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 674
d83c6548 675 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL		 676 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
677
145cf1f0
AM		 6781999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
679
680 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
681
73826640
JL		 682Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
683
684 * hppa.h (struct pa_opcode): Add new field "flags".
685 (FLAGS_STRICT): Define.
686
b65db252
JL		 687Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
688 Jeff Law <law@cygnus.com>
689
f7fc668b
JL		 690 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
691
692 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 693
10084519
AM		 6941999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
695
696 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
697 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
698 flag to fcomi and friends.
699
cd8a80ba
JL		 700Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
701
702 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 703 integer logical instructions.
cd8a80ba 704
1fca749b
ILT		 7051999-05-28 Linus Nordberg <linus.nordberg@canit.se>
706
707 * m68k.h: Document new formats `E', `G', `H' and new places `N',
708 `n', `o'.
709
710 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
711 and new places `m', `M', `h'.
712
aa008907
JL		 713Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
714
715 * hppa.h (pa_opcodes): Add several processor specific system
716 instructions.
717
e26b85f0
JL		 718Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
719
d83c6548 720 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL		 721 "addb", and "addib" to be used by the disassembler.
722
c608c12e
AM		 7231999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
724
725 * i386.h (ReverseModrm): Remove all occurences.
726 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
727 movmskps, pextrw, pmovmskb, maskmovq.
728 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
729 ignore the data size prefix.
730
731 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
732 Mostly stolen from Doug Ledford <dledford@redhat.com>
733
45c18104
RH		 734Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
735
736 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
737
252b5132
RH		 7381999-04-14 Doug Evans <devans@casey.cygnus.com>
739
740 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
741 (CGEN_ATTR_TYPE): Update.
742 (CGEN_ATTR_MASK): Number booleans starting at 0.
743 (CGEN_ATTR_VALUE): Update.
744 (CGEN_INSN_ATTR): Update.
745
746Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
747
748 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
749 instructions.
750
751Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
752
753 * hppa.h (bb, bvb): Tweak opcode/mask.
754
755
7561999-03-22 Doug Evans <devans@casey.cygnus.com>
757
758 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
759 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
760 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
761 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
762 Delete member max_insn_size.
763 (enum cgen_cpu_open_arg): New enum.
764 (cpu_open): Update prototype.
765 (cpu_open_1): Declare.
766 (cgen_set_cpu): Delete.
767
7681999-03-11 Doug Evans <devans@casey.cygnus.com>
769
770 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
771 (CGEN_OPERAND_NIL): New macro.
772 (CGEN_OPERAND): New member `type'.
773 (@arch@_cgen_operand_table): Delete decl.
774 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
775 (CGEN_OPERAND_TABLE): New struct.
776 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
777 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
778 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
779 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
780 {get,set}_{int,vma}_operand.
781 (@arch@_cgen_cpu_open): New arg `isa'.
782 (cgen_set_cpu): Ditto.
783
784Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
785
786 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
787
7881999-02-25 Doug Evans <devans@casey.cygnus.com>
789
790 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
791 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
792 enum cgen_hw_type.
793 (CGEN_HW_TABLE): New struct.
794 (hw_table): Delete declaration.
795 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
796 to table entry to enum.
797 (CGEN_OPINST): Ditto.
798 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
799
800Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
801
802 * alpha.h (AXP_OPCODE_EV6): New.
803 (AXP_OPCODE_NOPAL): Include it.
804
8051999-02-09 Doug Evans <devans@casey.cygnus.com>
806
807 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
808 All uses updated. New members int_insn_p, max_insn_size,
809 parse_operand,insert_operand,extract_operand,print_operand,
810 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
811 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
812 extract_handlers,print_handlers.
813 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
814 (CGEN_ATTR_BOOL_OFFSET): New macro.
815 (CGEN_ATTR_MASK): Subtract it to compute bit number.
816 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
817 (cgen_opcode_handler): Renamed from cgen_base.
818 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
819 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
820 all uses updated.
821 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
822 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
823 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
824 (CGEN_OPCODE,CGEN_IBASE): New types.
825 (CGEN_INSN): Rewrite.
826 (CGEN_{ASM,DIS}_HASH*): Delete.
827 (init_opcode_table,init_ibld_table): Declare.
828 (CGEN_INSN_ATTR): New type.
829
830Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 831
252b5132
RH		 832 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
833 (x_FP, d_FP, dls_FP, sldx_FP): Define.
834 Change *Suf definitions to include x and d suffixes.
835 (movsx): Use w_Suf and b_Suf.
836 (movzx): Likewise.
837 (movs): Use bwld_Suf.
838 (fld): Change ordering. Use sld_FP.
839 (fild): Add Intel Syntax equivalent of fildq.
840 (fst): Use sld_FP.
841 (fist): Use sld_FP.
842 (fstp): Use sld_FP. Add x_FP version.
843 (fistp): LLongMem version for Intel Syntax.
844 (fcom, fcomp): Use sld_FP.
845 (fadd, fiadd, fsub): Use sld_FP.
846 (fsubr): Use sld_FP.
847 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
848
8491999-01-27 Doug Evans <devans@casey.cygnus.com>
850
851 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
852 CGEN_MODE_UINT.
853
e135f41b 8541999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 855
856 * hppa.h (bv): Fix mask.
857
8581999-01-05 Doug Evans <devans@casey.cygnus.com>
859
860 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
861 (CGEN_ATTR): Use it.
862 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
863 (CGEN_ATTR_TABLE): New member dfault.
864
8651998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
866
867 * mips.h (MIPS16_INSN_BRANCH): New.
868
869Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
870
871 The following is part of a change made by Edith Epstein
d83c6548
AJ		 872 <eepstein@sophia.cygnus.com> as part of a project to merge in
873 changes by HP; HP did not create ChangeLog entries.
252b5132
RH		 874
875 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 876 after.
252b5132
RH		 877
878Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
879
880 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 881 status word instructions.
252b5132
RH		 882
8831998-11-30 Doug Evans <devans@casey.cygnus.com>
884
885 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
886 (struct cgen_keyword_entry): Ditto.
887 (struct cgen_operand): Ditto.
888 (CGEN_IFLD): New typedef, with associated access macros.
889 (CGEN_IFMT): New typedef, with associated access macros.
890 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
891 (CGEN_IVALUE): New typedef.
892 (struct cgen_insn): Delete const on syntax,attrs members.
893 `format' now points to format data. Type of `value' is now
894 CGEN_IVALUE.
895 (struct cgen_opcode_table): New member ifld_table.
896
8971998-11-18 Doug Evans <devans@casey.cygnus.com>
898
899 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
900 (CGEN_OPERAND_INSTANCE): New member `attrs'.
901 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
902 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
903 (cgen_opcode_table): Update type of dis_hash fn.
904 (extract_operand): Update type of `insn_value' arg.
905
906Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
907
908 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
909
910Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
911
912 * mips.h (INSN_MULT): Added.
913
914Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
915
916 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
917
918Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
919
920 * cgen.h (CGEN_INSN_INT): New typedef.
921 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
922 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
923 (CGEN_INSN_BYTES_PTR): New typedef.
924 (CGEN_EXTRACT_INFO): New typedef.
925 (cgen_insert_fn,cgen_extract_fn): Update.
926 (cgen_opcode_table): New member `insn_endian'.
927 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
928 (insert_operand,extract_operand): Update.
929 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
930
931Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
932
933 * cgen.h (CGEN_ATTR_BOOLS): New macro.
934 (struct CGEN_HW_ENTRY): New member `attrs'.
935 (CGEN_HW_ATTR): New macro.
936 (struct CGEN_OPERAND_INSTANCE): New member `name'.
937 (CGEN_INSN_INVALID_P): New macro.
938
939Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
940
941 * hppa.h: Add "fid".
d83c6548 942
252b5132
RH		 943Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
944
945 From Robert Andrew Dale <rob@nb.net>
946 * i386.h (i386_optab): Add AMD 3DNow! instructions.
947 (AMD_3DNOW_OPCODE): Define.
948
949Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
950
951 * d30v.h (EITHER_BUT_PREFER_MU): Define.
952
953Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
954
955 * cgen.h (cgen_insn): #if 0 out element `cdx'.
956
957Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
958
959 Move all global state data into opcode table struct, and treat
960 opcode table as something that is "opened/closed".
961 * cgen.h (CGEN_OPCODE_DESC): New type.
962 (all fns): New first arg of opcode table descriptor.
963 (cgen_set_parse_operand_fn): Add prototype.
964 (cgen_current_machine,cgen_current_endian): Delete.
965 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
966 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
967 dis_hash_table,dis_hash_table_entries.
968 (opcode_open,opcode_close): Add prototypes.
969
970 * cgen.h (cgen_insn): New element `cdx'.
971
972Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
973
974 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
975
976Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
977
978 * mn10300.h: Add "no_match_operands" field for instructions.
979 (MN10300_MAX_OPERANDS): Define.
980
981Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
982
983 * cgen.h (cgen_macro_insn_count): Declare.
984
985Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
986
987 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
988 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
989 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
990 set_{int,vma}_operand.
991
992Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
993
994 * mn10300.h: Add "machine" field for instructions.
995 (MN103, AM30): Define machine types.
d83c6548 996
252b5132
RH		 997Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
998
999 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1000
10011998-06-18 Ulrich Drepper <drepper@cygnus.com>
1002
1003 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1004
1005Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1006
1007 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1008 and ud2b.
1009 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1010 those that happen to be implemented on pentiums.
1011
1012Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1013
1014 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1015 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1016 with Size16|IgnoreSize or Size32|IgnoreSize.
1017
1018Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1019
1020 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1021 (REPE): Rename to REPE_PREFIX_OPCODE.
1022 (i386_regtab_end): Remove.
1023 (i386_prefixtab, i386_prefixtab_end): Remove.
1024 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1025 of md_begin.
1026 (MAX_OPCODE_SIZE): Define.
1027 (i386_optab_end): Remove.
1028 (sl_Suf): Define.
1029 (sl_FP): Use sl_Suf.
1030
1031 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1032 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1033 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1034 data32, dword, and adword prefixes.
1035 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1036 regs.
1037
1038Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1039
1040 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1041
1042 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1043 register operands, because this is a common idiom. Flag them with
1044 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1045 fdivrp because gcc erroneously generates them. Also flag with a
1046 warning.
1047
1048 * i386.h: Add suffix modifiers to most insns, and tighter operand
1049 checks in some cases. Fix a number of UnixWare compatibility
1050 issues with float insns. Merge some floating point opcodes, using
1051 new FloatMF modifier.
1052 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1053 consistency.
1054
1055 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1056 IgnoreDataSize where appropriate.
1057
1058Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1059
1060 * i386.h: (one_byte_segment_defaults): Remove.
1061 (two_byte_segment_defaults): Remove.
1062 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1063
1064Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1065
1066 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1067 (cgen_hw_lookup_by_num): Declare.
1068
1069Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1070
1071 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1072 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1073
1074Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1075
1076 * cgen.h (cgen_asm_init_parse): Delete.
1077 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1078 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1079
1080Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1081
1082 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1083 (cgen_asm_finish_insn): Update prototype.
1084 (cgen_insn): New members num, data.
1085 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1086 dis_hash, dis_hash_table_size moved to ...
1087 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1088 All uses updated. New members asm_hash_p, dis_hash_p.
1089 (CGEN_MINSN_EXPANSION): New struct.
1090 (cgen_expand_macro_insn): Declare.
1091 (cgen_macro_insn_count): Declare.
1092 (get_insn_operands): Update prototype.
1093 (lookup_get_insn_operands): Declare.
1094
1095Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1096
1097 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1098 regKludge. Add operands types for string instructions.
1099
1100Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1101
1102 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1103 table.
1104
1105Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1106
1107 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1108 for `gettext'.
1109
1110Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1111
1112 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1113 Add IsString flag to string instructions.
1114 (IS_STRING): Don't define.
1115 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1116 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1117 (SS_PREFIX_OPCODE): Define.
1118
1119Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1120
1121 * i386.h: Revert March 24 patch; no more LinearAddress.
1122
1123Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1124
1125 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1126 instructions, and instead add FWait opcode modifier. Add short
1127 form of fldenv and fstenv.
1128 (FWAIT_OPCODE): Define.
1129
1130 * i386.h (i386_optab): Change second operand constraint of `mov
1131 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1132 allow legal instructions such as `movl %gs,%esi'
1133
1134Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1135
1136 * h8300.h: Various changes to fully bracket initializers.
1137
1138Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1139
1140 * i386.h: Set LinearAddress for lidt and lgdt.
1141
1142Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1143
1144 * cgen.h (CGEN_BOOL_ATTR): New macro.
1145
1146Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1147
1148 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1149
1150Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1151
1152 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1153 (cgen_insn): Record syntax and format entries here, rather than
1154 separately.
1155
1156Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1157
1158 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1159
1160Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1161
1162 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1163 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1164 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1165
1166Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1167
1168 * cgen.h (lookup_insn): New argument alias_p.
1169
1170Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1171
1172Fix rac to accept only a0:
1173 * d10v.h (OPERAND_ACC): Split into:
1174 (OPERAND_ACC0, OPERAND_ACC1) .
1175 (OPERAND_GPR): Define.
1176
1177Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1178
1179 * cgen.h (CGEN_FIELDS): Define here.
1180 (CGEN_HW_ENTRY): New member `type'.
1181 (hw_list): Delete decl.
1182 (enum cgen_mode): Declare.
1183 (CGEN_OPERAND): New member `hw'.
1184 (enum cgen_operand_instance_type): Declare.
1185 (CGEN_OPERAND_INSTANCE): New type.
1186 (CGEN_INSN): New member `operands'.
1187 (CGEN_OPCODE_DATA): Make hw_list const.
1188 (get_insn_operands,lookup_insn): Add prototypes for.
1189
1190Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1191
1192 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1193 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1194 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1195 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1196
1197Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1198
1199 * cgen.h: Correct typo in comment end marker.
1200
1201Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1202
1203 * tic30.h: New file.
1204
5a109b67 1205Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1206
1207 * cgen.h: Add prototypes for cgen_save_fixups(),
1208 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1209 of cgen_asm_finish_insn() to return a char *.
1210
1211Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1212
1213 * cgen.h: Formatting changes to improve readability.
1214
1215Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1216
1217 * cgen.h (*): Clean up pass over `struct foo' usage.
1218 (CGEN_ATTR): Make unsigned char.
1219 (CGEN_ATTR_TYPE): Update.
1220 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1221 (cgen_base): Move member `attrs' to cgen_insn.
1222 (CGEN_KEYWORD): New member `null_entry'.
1223 (CGEN_{SYNTAX,FORMAT}): New types.
1224 (cgen_insn): Format and syntax separated from each other.
1225
1226Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1227
1228 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1229 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1230 flags_{used,set} long.
1231 (d30v_operand): Make flags field long.
1232
1233Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1234
1235 * m68k.h: Fix comment describing operand types.
1236
1237Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1238
1239 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1240 everything else after down.
1241
1242Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1243
1244 * d10v.h (OPERAND_FLAG): Split into:
1245 (OPERAND_FFLAG, OPERAND_CFLAG) .
1246
1247Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1248
1249 * mips.h (struct mips_opcode): Changed comments to reflect new
1250 field usage.
1251
1252Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1253
1254 * mips.h: Added to comments a quick-ref list of all assigned
1255 operand type characters.
1256 (OP_{MASK,SH}_PERFREG): New macros.
1257
1258Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1259
1260 * sparc.h: Add '_' and '/' for v9a asr's.
1261 Patch from David Miller <davem@vger.rutgers.edu>
1262
1263Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1264
1265 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1266 area are not available in the base model (H8/300).
1267
1268Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1269
1270 * m68k.h: Remove documentation of ` operand specifier.
1271
1272Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1273
1274 * m68k.h: Document q and v operand specifiers.
1275
1276Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1277
1278 * v850.h (struct v850_opcode): Add processors field.
1279 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1280 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1281 (PROCESSOR_V850EA): New bit constants.
1282
1283Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1284
1285 Merge changes from Martin Hunt:
1286
1287 * d30v.h: Allow up to 64 control registers. Add
1288 SHORT_A5S format.
1289
1290 * d30v.h (LONG_Db): New form for delayed branches.
1291
1292 * d30v.h: (LONG_Db): New form for repeati.
1293
1294 * d30v.h (SHORT_D2B): New form.
1295
1296 * d30v.h (SHORT_A2): New form.
1297
1298 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1299 registers are used. Needed for VLIW optimization.
1300
1301Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1302
1303 * cgen.h: Move assembler interface section
1304 up so cgen_parse_operand_result is defined for cgen_parse_address.
1305 (cgen_parse_address): Update prototype.
1306
1307Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1308
1309 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1310
1311Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1312
1313 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1314 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1315 <paubert@iram.es>.
1316
1317 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1318 <paubert@iram.es>.
1319
1320 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1321 <paubert@iram.es>.
1322
1323 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1324 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1325
1326Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1327
1328 * v850.h (V850_NOT_R0): New flag.
1329
1330Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1331
1332 * v850.h (struct v850_opcode): Remove flags field.
1333
1334Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1335
1336 * v850.h (struct v850_opcode): Add flags field.
1337 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1338 fields.
1339 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1340 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1341
1342Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1343
1344 * arc.h: New file.
1345
1346Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1347
1348 * sparc.h (sparc_opcodes): Declare as const.
1349
1350Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1351
1352 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1353 uses single or double precision floating point resources.
1354 (INSN_NO_ISA, INSN_ISA1): Define.
1355 (cpu specific INSN macros): Tweak into bitmasks outside the range
1356 of INSN_ISA field.
1357
1358Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1359
1360 * i386.h: Fix pand opcode.
1361
1362Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1363
1364 * mips.h: Widen INSN_ISA and move it to a more convenient
1365 bit position. Add INSN_3900.
1366
1367Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1368
1369 * mips.h (struct mips_opcode): added new field membership.
1370
1371Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1372
1373 * i386.h (movd): only Reg32 is allowed.
1374
1375 * i386.h: add fcomp and ud2. From Wayne Scott
1376 <wscott@ichips.intel.com>.
1377
1378Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1379
1380 * i386.h: Add MMX instructions.
1381
1382Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1383
1384 * i386.h: Remove W modifier from conditional move instructions.
1385
1386Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1387
1388 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1389 with no arguments to match that generated by the UnixWare
1390 assembler.
1391
1392Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1393
1394 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1395 (cgen_parse_operand_fn): Declare.
1396 (cgen_init_parse_operand): Declare.
1397 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1398 new argument `want'.
1399 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1400 (enum cgen_parse_operand_type): New enum.
1401
1402Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1403
1404 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1405
1406Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1407
1408 * cgen.h: New file.
1409
1410Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1411
1412 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1413 fdivrp.
1414
1415Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1416
1417 * v850.h (extract): Make unsigned.
1418
1419Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1420
1421 * i386.h: Add iclr.
1422
1423Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1424
1425 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1426 take a direction bit.
1427
1428Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1429
1430 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1431
1432Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1433
1434 * sparc.h: Include <ansidecl.h>. Update function declarations to
1435 use prototypes, and to use const when appropriate.
1436
1437Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1438
1439 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1440
1441Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1442
1443 * d10v.h: Change pre_defined_registers to
1444 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1445
1446Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1447
1448 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1449 Change mips_opcodes from const array to a pointer,
1450 and change bfd_mips_num_opcodes from const int to int,
1451 so that we can increase the size of the mips opcodes table
1452 dynamically.
1453
1454Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1455
1456 * d30v.h (FLAG_X): Remove unused flag.
1457
1458Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1459
1460 * d30v.h: New file.
1461
1462Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1463
1464 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1465 (PDS_VALUE): Macro to access value field of predefined symbols.
1466 (tic80_next_predefined_symbol): Add prototype.
1467
1468Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1469
1470 * tic80.h (tic80_symbol_to_value): Change prototype to match
1471 change in function, added class parameter.
1472
1473Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1474
1475 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1476 endmask fields, which are somewhat weird in that 0 and 32 are
1477 treated exactly the same.
1478
1479Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1480
1481 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1482 rather than a constant that is 2**X. Reorder them to put bits for
1483 operands that have symbolic names in the upper bits, so they can
1484 be packed into an int where the lower bits contain the value that
1485 corresponds to that symbolic name.
1486 (predefined_symbo): Add struct.
1487 (tic80_predefined_symbols): Declare array of translations.
1488 (tic80_num_predefined_symbols): Declare size of that array.
1489 (tic80_value_to_symbol): Declare function.
1490 (tic80_symbol_to_value): Declare function.
1491
1492Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1493
1494 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1495
1496Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1497
1498 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1499 be the destination register.
1500
1501Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1502
1503 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1504 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1505 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1506 that the opcode can have two vector instructions in a single
1507 32 bit word and we have to encode/decode both.
1508
1509Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1510
1511 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1512 TIC80_OPERAND_RELATIVE for PC relative.
1513 (TIC80_OPERAND_BASEREL): New flag bit for register
1514 base relative.
1515
1516Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1519
1520Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1521
1522 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1523 ":s" modifier for scaling.
1524
1525Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1526
1527 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1528 (TIC80_OPERAND_M_LI): Ditto
1529
1530Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1531
1532 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1533 (TIC80_OPERAND_CC): New define for condition code operand.
1534 (TIC80_OPERAND_CR): New define for control register operand.
1535
1536Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1537
1538 * tic80.h (struct tic80_opcode): Name changed.
1539 (struct tic80_opcode): Remove format field.
1540 (struct tic80_operand): Add insertion and extraction functions.
1541 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1542 correct ones.
1543 (FMT_*): Ditto.
1544
1545Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1546
1547 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1548 type IV instruction offsets.
1549
1550Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1551
1552 * tic80.h: New file.
1553
1554Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1555
1556 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1557
1558Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1559
1560 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1561 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1562 * v850.h: Fix comment, v850_operand not powerpc_operand.
1563
1564Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1565
1566 * mn10200.h: Flesh out structures and definitions needed by
1567 the mn10200 assembler & disassembler.
1568
1569Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * mips.h: Add mips16 definitions.
1572
1573Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1574
1575 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1576
1577Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1578
1579 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1580 (MN10300_OPERAND_MEMADDR): Define.
1581
1582Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1583
1584 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1585
1586Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1587
1588 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1589
1590Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1591
1592 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1593
1594Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1595
1596 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1597
1598Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1599
1600 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ		 1601 negative to minimize problems with shared libraries. Organize
1602 instruction subsets by AMASK extensions and PALcode
1603 implementation.
252b5132
RH		 1604 (struct alpha_operand): Move flags slot for better packing.
1605
1606Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1607
1608 * v850.h (V850_OPERAND_RELAX): New operand flag.
1609
1610Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1611
1612 * mn10300.h (FMT_*): Move operand format definitions
1613 here.
1614
1615Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1616
1617 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1618
1619Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1620
1621 * mn10300.h (mn10300_opcode): Add "format" field.
1622 (MN10300_OPERAND_*): Define.
1623
1624Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1625
1626 * mn10x00.h: Delete.
1627 * mn10200.h, mn10300.h: New files.
1628
1629Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1630
1631 * mn10x00.h: New file.
1632
1633Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1634
1635 * v850.h: Add new flag to indicate this instruction uses a PC
1636 displacement.
1637
1638Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1639
1640 * h8300.h (stmac): Add missing instruction.
1641
1642Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1643
1644 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1645 field.
1646
1647Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1648
1649 * v850.h (V850_OPERAND_EP): Define.
1650
1651 * v850.h (v850_opcode): Add size field.
1652
1653Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1654
1655 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1656 to functions used to handle unusual operand encoding.
252b5132 1657 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1658 V850_OPERAND_SIGNED): Defined.
252b5132
RH		 1659
1660Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1661
1662 * v850.h (v850_operands): Add flags field.
1663 (OPERAND_REG, OPERAND_NUM): Defined.
1664
1665Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1666
1667 * v850.h: New file.
1668
1669Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1670
1671 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ		 1672 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1673 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1674 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1675 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1676 Defined.
252b5132
RH		 1677
1678Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1679
1680 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1681 a 3 bit space id instead of a 2 bit space id.
1682
1683Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1684
1685 * d10v.h: Add some additional defines to support the
d83c6548 1686 assembler in determining which operations can be done in parallel.
252b5132
RH		 1687
1688Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1689
1690 * h8300.h (SN): Define.
1691 (eepmov.b): Renamed from "eepmov"
1692 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1693 with them.
1694
1695Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1696
1697 * d10v.h (OPERAND_SHIFT): New operand flag.
1698
1699Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1700
1701 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1702 signed numbers.
252b5132
RH		 1703
1704Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1705
1706 * d10v.h (pd_reg): Define. Putting the definition here allows
1707 the assembler and disassembler to share the same struct.
1708
1709Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1710
1711 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1712 Williams <steve@icarus.com>.
1713
1714Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1715
1716 * d10v.h: New file.
1717
1718Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1719
1720 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1721
1722Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1723
d83c6548 1724 * m68k.h (mcf5200): New macro.
252b5132
RH		 1725 Document names of coldfire control registers.
1726
1727Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1728
1729 * h8300.h (SRC_IN_DST): Define.
1730
1731 * h8300.h (UNOP3): Mark the register operand in this insn
1732 as a source operand, not a destination operand.
1733 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1734 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1735 register operand with SRC_IN_DST.
1736
1737Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1738
1739 * alpha.h: New file.
1740
1741Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1742
1743 * rs6k.h: Remove obsolete file.
1744
1745Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1746
1747 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1748 fdivp, and fdivrp. Add ffreep.
1749
1750Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1751
1752 * h8300.h: Reorder various #defines for readability.
1753 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1754 (BITOP): Accept additional (unused) argument. All callers changed.
1755 (EBITOP): Likewise.
1756 (O_LAST): Bump.
1757 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1758
1759 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1760 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1761 (BITOP, EBITOP): Handle new H8/S addressing modes for
1762 bit insns.
1763 (UNOP3): Handle new shift/rotate insns on the H8/S.
1764 (insns using exr): New instructions.
1765 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1766
1767Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1768
1769 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1770 was incorrect.
1771
1772Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1773
1774 * h8300.h (START): Remove.
1775 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1776 and mov.l insns that can be relaxed.
1777
1778Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1779
1780 * i386.h: Remove Abs32 from lcall.
1781
1782Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1783
1784 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1785 (SLCPOP): New macro.
1786 Mark X,Y opcode letters as in use.
1787
1788Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1789
1790 * sparc.h (F_FLOAT, F_FBR): Define.
1791
1792Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1793
1794 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1795 from all insns.
1796 (ABS8SRC,ABS8DST): Add ABS8MEM.
1797 (add.l): Fix reg+reg variant.
1798 (eepmov.w): Renamed from eepmovw.
1799 (ldc,stc): Fix many cases.
1800
1801Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1802
1803 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1804
1805Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1806
1807 * sparc.h (O): Mark operand letter as in use.
1808
1809Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1810
1811 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1812 Mark operand letters uU as in use.
1813
1814Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1815
1816 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1817 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1818 (SPARC_OPCODE_SUPPORTED): New macro.
1819 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1820 (F_NOTV9): Delete.
1821
1822Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1823
1824 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1825 declaration consistent with return type in definition.
1826
1827Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1828
1829 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1830
1831Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1832
1833 * i386.h (i386_regtab): Add 80486 test registers.
1834
1835Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1836
1837 * i960.h (I_HX): Define.
1838 (i960_opcodes): Add HX instruction.
1839
1840Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1841
1842 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1843 and fclex.
1844
1845Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1846
1847 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1848 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1849 (bfd_* defines): Delete.
1850 (sparc_opcode_archs): Replaces architecture_pname.
1851 (sparc_opcode_lookup_arch): Declare.
1852 (NUMOPCODES): Delete.
1853
1854Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1855
1856 * sparc.h (enum sparc_architecture): Add v9a.
1857 (ARCHITECTURES_CONFLICT_P): Update.
1858
1859Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1860
1861 * i386.h: Added Pentium Pro instructions.
1862
1863Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1864
1865 * m68k.h: Document new 'W' operand place.
1866
1867Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1868
1869 * hppa.h: Add lci and syncdma instructions.
1870
1871Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1872
1873 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1874 instructions.
252b5132
RH		 1875
1876Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1877
1878 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1879 assembler's -mcom and -many switches.
1880
1881Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1882
1883 * i386.h: Fix cmpxchg8b extension opcode description.
1884
1885Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1886
1887 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1888 and register cr4.
1889
1890Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1891
1892 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1893
1894Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1895
1896 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1897
1898Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1899
1900 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1901
1902Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1903
1904 * m68kmri.h: Remove.
1905
1906 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1907 declarations. Remove F_ALIAS and flag field of struct
1908 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1909 int. Make name and args fields of struct m68k_opcode const.
1910
1911Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1912
1913 * sparc.h (F_NOTV9): Define.
1914
1915Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1916
1917 * mips.h (INSN_4010): Define.
1918
1919Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1920
1921 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1922
1923 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1924 * m68k.h: Fix argument descriptions of coprocessor
1925 instructions to allow only alterable operands where appropriate.
1926 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1927 (m68k_opcode_aliases): Add more aliases.
1928
1929Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1930
1931 * m68k.h: Added explcitly short-sized conditional branches, and a
1932 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1933 svr4-based configurations.
1934
1935Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1936
1937 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1938 * i386.h: added missing Data16/Data32 flags to a few instructions.
1939
1940Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1941
1942 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1943 (OP_MASK_BCC, OP_SH_BCC): Define.
1944 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1945 (OP_MASK_CCC, OP_SH_CCC): Define.
1946 (INSN_READ_FPR_R): Define.
1947 (INSN_RFE): Delete.
1948
1949Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1950
1951 * m68k.h (enum m68k_architecture): Deleted.
1952 (struct m68k_opcode_alias): New type.
1953 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1954 matching constraints, values and flags. As a side effect of this,
1955 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1956 as I know were never used, now may need re-examining.
1957 (numopcodes): Now const.
1958 (m68k_opcode_aliases, numaliases): New variables.
1959 (endop): Deleted.
1960 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1961 m68k_opcode_aliases; update declaration of m68k_opcodes.
1962
1963Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1964
1965 * hppa.h (delay_type): Delete unused enumeration.
1966 (pa_opcode): Replace unused delayed field with an architecture
1967 field.
1968 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1969
1970Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1971
1972 * mips.h (INSN_ISA4): Define.
1973
1974Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1975
1976 * mips.h (M_DLA_AB, M_DLI): Define.
1977
1978Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1979
1980 * hppa.h (fstwx): Fix single-bit error.
1981
1982Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1983
1984 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1985
1986Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1987
1988 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1989 debug registers. From Charles Hannum (mycroft@netbsd.org).
1990
1991Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1992
1993 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1994 i386 support:
1995 * i386.h (MOV_AX_DISP32): New macro.
1996 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1997 of several call/return instructions.
1998 (ADDR_PREFIX_OPCODE): New macro.
1999
2000Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2001
2002 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2003
4f1d9bd8
NC		 2004 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2005 char.
252b5132
RH		 2006 (struct vot, field `name'): ditto.
2007
2008Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2009
2010 * vax.h: Supply and properly group all values in end sentinel.
2011
2012Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2013
2014 * mips.h (INSN_ISA, INSN_4650): Define.
2015
2016Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2017
2018 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2019 systems with a separate instruction and data cache, such as the
2020 29040, these instructions take an optional argument.
2021
2022Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2023
2024 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2025 INSN_TRAP.
2026
2027Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2028
2029 * mips.h (INSN_STORE_MEMORY): Define.
2030
2031Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2032
2033 * sparc.h: Document new operand type 'x'.
2034
2035Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2036
2037 * i960.h (I_CX2): New instruction category. It includes
2038 instructions available on Cx and Jx processors.
2039 (I_JX): New instruction category, for JX-only instructions.
2040 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2041 Jx-only instructions, in I_JX category.
2042
2043Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2044
2045 * ns32k.h (endop): Made pointer const too.
2046
2047Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2048
2049 * ns32k.h: Drop Q operand type as there is no correct use
2050 for it. Add I and Z operand types which allow better checking.
2051
2052Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2053
2054 * h8300.h (xor.l) :fix bit pattern.
2055 (L_2): New size of operand.
2056 (trapa): Use it.
2057
2058Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2059
2060 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2061
2062Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2063
2064 * sparc.h: Include v9 definitions.
2065
2066Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2067
2068 * m68k.h (m68060): Defined.
2069 (m68040up, mfloat, mmmu): Include it.
2070 (struct m68k_opcode): Widen `arch' field.
2071 (m68k_opcodes): Updated for M68060. Removed comments that were
2072 instructions commented out by "JF" years ago.
2073
2074Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2075
2076 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2077 add a one-bit `flags' field.
2078 (F_ALIAS): New macro.
2079
2080Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2081
2082 * h8300.h (dec, inc): Get encoding right.
2083
2084Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2085
2086 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2087 a flag instead.
2088 (PPC_OPERAND_SIGNED): Define.
2089 (PPC_OPERAND_SIGNOPT): Define.
2090
2091Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2092
2093 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2094 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2095
2096Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2097
2098 * i386.h: Reverse last change. It'll be handled in gas instead.
2099
2100Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2101
2102 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2103 slower on the 486 and used the implicit shift count despite the
2104 explicit operand. The one-operand form is still available to get
2105 the shorter form with the implicit shift count.
2106
2107Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2108
2109 * hppa.h: Fix typo in fstws arg string.
2110
2111Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2112
2113 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2114
2115Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2116
2117 * ppc.h (PPC_OPCODE_601): Define.
2118
2119Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2120
2121 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2122 (so we can determine valid completers for both addb and addb[tf].)
2123
2124 * hppa.h (xmpyu): No floating point format specifier for the
2125 xmpyu instruction.
2126
2127Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2128
2129 * ppc.h (PPC_OPERAND_NEXT): Define.
2130 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2131 (struct powerpc_macro): Define.
2132 (powerpc_macros, powerpc_num_macros): Declare.
2133
2134Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2135
2136 * ppc.h: New file. Header file for PowerPC opcode table.
2137
2138Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2139
2140 * hppa.h: More minor template fixes for sfu and copr (to allow
2141 for easier disassembly).
2142
2143 * hppa.h: Fix templates for all the sfu and copr instructions.
2144
2145Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2146
2147 * i386.h (push): Permit Imm16 operand too.
2148
2149Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2150
2151 * h8300.h (andc): Exists in base arch.
2152
2153Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2154
2155 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2156 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2157
2158Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2159
2160 * hppa.h: Add FP quadword store instructions.
2161
2162Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2163
2164 * mips.h: (M_J_A): Added.
2165 (M_LA): Removed.
2166
2167Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2168
2169 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2170 <mellon@pepper.ncd.com>.
2171
2172Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2173
2174 * hppa.h: Immediate field in probei instructions is unsigned,
2175 not low-sign extended.
2176
2177Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2178
2179 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2180
2181Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2182
2183 * i386.h: Add "fxch" without operand.
2184
2185Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2186
2187 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2188
2189Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2190
2191 * hppa.h: Add gfw and gfr to the opcode table.
2192
2193Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2194
2195 * m88k.h: extended to handle m88110.
2196
2197Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2198
2199 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2200 addresses.
2201
2202Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2203
2204 * i960.h (i960_opcodes): Properly bracket initializers.
2205
2206Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2207
2208 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2209
2210Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2211
2212 * m68k.h (two): Protect second argument with parentheses.
2213
2214Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2215
2216 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2217 Deleted old in/out instructions in "#if 0" section.
2218
2219Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2220
2221 * i386.h (i386_optab): Properly bracket initializers.
2222
2223Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2224
2225 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2226 Jeff Law, law@cs.utah.edu).
2227
2228Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2229
2230 * i386.h (lcall): Accept Imm32 operand also.
2231
2232Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2233
2234 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2235 (M_DABS): Added.
2236
2237Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2238
2239 * mips.h (INSN_*): Changed values. Removed unused definitions.
2240 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2241 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2242 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2243 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2244 (M_*): Added new values for r6000 and r4000 macros.
2245 (ANY_DELAY): Removed.
2246
2247Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2248
2249 * mips.h: Added M_LI_S and M_LI_SS.
2250
2251Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2252
2253 * h8300.h: Get some rare mov.bs correct.
2254
2255Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2256
2257 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2258 been included.
2259
2260Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2261
2262 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2263 jump instructions, for use in disassemblers.
2264
2265Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2266
2267 * m88k.h: Make bitfields just unsigned, not unsigned long or
2268 unsigned short.
2269
2270Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2271
2272 * hppa.h: New argument type 'y'. Use in various float instructions.
2273
2274Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2275
2276 * hppa.h (break): First immediate field is unsigned.
2277
2278 * hppa.h: Add rfir instruction.
2279
2280Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2281
2282 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2283
2284Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2285
2286 * mips.h: Reworked the hazard information somewhat, and fixed some
2287 bugs in the instruction hazard descriptions.
2288
2289Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2290
2291 * m88k.h: Corrected a couple of opcodes.
2292
2293Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2294
2295 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2296 new version includes instruction hazard information, but is
2297 otherwise reasonably similar.
2298
2299Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2300
2301 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2302
2303Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2304
2305 Patches from Jeff Law, law@cs.utah.edu:
2306 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2307 Make the tables be the same for the following instructions:
2308 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2309 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2310 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2311 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2312 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2313 "fcmp", and "ftest".
2314
2315 * hppa.h: Make new and old tables the same for "break", "mtctl",
2316 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2317 Fix typo in last patch. Collapse several #ifdefs into a
2318 single #ifdef.
2319
2320 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2321 of the comments up-to-date.
2322
2323 * hppa.h: Update "free list" of letters and update
2324 comments describing each letter's function.
2325
4f1d9bd8
NC		 2326Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2327
2328 * h8300.h: Lots of little fixes for the h8/300h.
2329
2330Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2331
2332 Support for H8/300-H
2333 * h8300.h: Lots of new opcodes.
2334
252b5132
RH		 2335Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2336
2337 * h8300.h: checkpoint, includes H8/300-H opcodes.
2338
2339Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2340
2341 * Patches from Jeffrey Law <law@cs.utah.edu>.
2342 * hppa.h: Rework single precision FP
2343 instructions so that they correctly disassemble code
2344 PA1.1 code.
2345
2346Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2347
2348 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2349 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2350
2351Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2352
2353 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2354 gdb will define it for now.
2355
2356Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2357
2358 * sparc.h: Don't end enumerator list with comma.
2359
2360Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2361
2362 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2363 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2364 ("bc2t"): Correct typo.
2365 ("[ls]wc[023]"): Use T rather than t.
2366 ("c[0123]"): Define general coprocessor instructions.
2367
2368Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2369
2370 * m68k.h: Move split point for gcc compilation more towards
2371 middle.
2372
2373Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2374
2375 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2376 simply wrong, ics, rfi, & rfsvc were missing).
2377 Add "a" to opr_ext for "bb". Doc fix.
2378
2379Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2380
2381 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2382 * mips.h: Add casts, to suppress warnings about shifting too much.
2383 * m68k.h: Document the placement code '9'.
2384
2385Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2386
2387 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2388 allows callers to break up the large initialized struct full of
2389 opcodes into two half-sized ones. This permits GCC to compile
2390 this module, since it takes exponential space for initializers.
2391 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2392
2393Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2394
2395 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2396 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2397 initialized structs in it.
2398
2399Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2400
2401 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2402 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2403 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2404
2405Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2406
2407 * mips.h: document "i" and "j" operands correctly.
2408
2409Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2410
2411 * mips.h: Removed endianness dependency.
2412
2413Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2414
2415 * h8300.h: include info on number of cycles per instruction.
2416
2417Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2418
2419 * hppa.h: Move handy aliases to the front. Fix masks for extract
2420 and deposit instructions.
2421
2422Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2423
2424 * i386.h: accept shld and shrd both with and without the shift
2425 count argument, which is always %cl.
2426
2427Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2428
2429 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2430 (one_byte_segment_defaults, two_byte_segment_defaults,
2431 i386_prefixtab_end): Ditto.
2432
2433Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2434
2435 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2436 for operand 2; from John Carr, jfc@dsg.dec.com.
2437
2438Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2439
2440 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2441 always use 16-bit offsets. Makes calculated-size jump tables
2442 feasible.
2443
2444Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2445
2446 * i386.h: Fix one-operand forms of in* and out* patterns.
2447
2448Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2449
2450 * m68k.h: Added CPU32 support.
2451
2452Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2453
2454 * mips.h (break): Disassemble the argument. Patch from
2455 jonathan@cs.stanford.edu (Jonathan Stone).
2456
2457Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2458
2459 * m68k.h: merged Motorola and MIT syntax.
2460
2461Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2462
2463 * m68k.h (pmove): make the tests less strict, the 68k book is
2464 wrong.
2465
2466Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2467
2468 * m68k.h (m68ec030): Defined as alias for 68030.
2469 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2470 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2471 them. Tightened description of "fmovex" to distinguish it from
2472 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2473 up descriptions that claimed versions were available for chips not
2474 supporting them. Added "pmovefd".
2475
2476Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2477
2478 * m68k.h: fix where the . goes in divull
2479
2480Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2481
2482 * m68k.h: the cas2 instruction is supposed to be written with
2483 indirection on the last two operands, which can be either data or
2484 address registers. Added a new operand type 'r' which accepts
2485 either register type. Added new cases for cas2l and cas2w which
2486 use them. Corrected masks for cas2 which failed to recognize use
2487 of address register.
2488
2489Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2490
2491 * m68k.h: Merged in patches (mostly m68040-specific) from
2492 Colin Smith <colin@wrs.com>.
2493
2494 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2495 base). Also cleaned up duplicates, re-ordered instructions for
2496 the sake of dis-assembling (so aliases come after standard names).
2497 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2498
2499Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2500
2501 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2502 all missing .s
2503
2504Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2505
2506 * sparc.h: Moved tables to BFD library.
2507
2508 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2509
2510Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2511
2512 * h8300.h: Finish filling in all the holes in the opcode table,
2513 so that the Lucid C compiler can digest this as well...
2514
2515Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2516
2517 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2518 Fix opcodes on various sizes of fild/fist instructions
2519 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2520 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2521
2522Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2523
2524 * h8300.h: Fill in all the holes in the opcode table so that the
2525 losing HPUX C compiler can digest this...
2526
2527Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2528
2529 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2530 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2531
2532Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2533
2534 * sparc.h: Add new architecture variant sparclite; add its scan
2535 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2536
2537Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2538
2539 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2540 fy@lucid.com).
2541
2542Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2543
2544 * rs6k.h: New version from IBM (Metin).
2545
2546Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2547
2548 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2549 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2550
2551Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2552
2553 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2554
2555Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2556
2557 * m68k.h (one, two): Cast macro args to unsigned to suppress
2558 complaints from compiler and lint about integer overflow during
2559 shift.
2560
2561Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2562
2563 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2564
2565Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2566
2567 * mips.h: Make bitfield layout depend on the HOST compiler,
2568 not on the TARGET system.
2569
2570Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2571
2572 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2573 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2574 <TRANLE@INTELLICORP.COM>.
2575
2576Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2577
2578 * h8300.h: turned op_type enum into #define list
2579
2580Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2581
2582 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2583 similar instructions -- they've been renamed to "fitoq", etc.
2584 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2585 number of arguments.
2586 * h8300.h: Remove extra ; which produces compiler warning.
2587
2588Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2589
2590 * sparc.h: fix opcode for tsubcctv.
2591
2592Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2593
2594 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2595
2596Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2597
2598 * sparc.h (nop): Made the 'lose' field be even tighter,
2599 so only a standard 'nop' is disassembled as a nop.
2600
2601Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2602
2603 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2604 disassembled as a nop.
2605
4f1d9bd8
NC		 2606Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2607
2608 * m68k.h, sparc.h: ANSIfy enums.
2609
252b5132
RH		 2610Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2611
2612 * sparc.h: fix a typo.
2613
2614Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2615
2616 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2617 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2618 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2619
2620\f
2621Local Variables:
2622version-control: never
2623End:
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