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252b5132 1# This shell script emits a C file. -*- C -*-
6f2750fe 2# Copyright (C) 1991-2016 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
22# This file is sourced from elf32.em, and defines extra arm-elf
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697
PB
29#include "elf/arm.h"
30
1db37fe6 31static char * thumb_entry_symbol = NULL;
e489d0ae 32static int byteswap_code = 0;
9c504268 33static int target1_is_rel = 0${TARGET1_IS_REL};
1db37fe6 34static char * target2_type = "${TARGET2_TYPE}";
319850b4 35static int fix_v4bx = 0;
33bfe774 36static int use_blx = 0;
c6dd86c6 37static bfd_arm_vfp11_fix vfp11_denorm_fix = BFD_ARM_VFP11_FIX_DEFAULT;
a504d23a 38static bfd_arm_stm32l4xx_fix stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
48229727 39static int fix_cortex_a8 = -1;
bf21ed78 40static int no_enum_size_warning = 0;
a9dc9481 41static int no_wchar_size_warning = 0;
27e55c4d 42static int pic_veneer = 0;
85fdf906 43static int merge_exidx_entries = -1;
2de70689 44static int fix_arm1176 = 1;
54ddd295 45static int cmse_implib = 0;
7ca69e9e 46
252b5132 47static void
0c7a8e5a 48gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
49{
50#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 51 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 52#endif /* not TARGET_ */
66be1055 53 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 54 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 55 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
576438f0 56 link_info.relro = DEFAULT_LD_Z_RELRO;
252b5132
RH
57}
58
3940d2c3
NC
59static void
60gld${EMULATION_NAME}_set_symbols (void)
61{
62 /* PR 19106: The section resizing code in gldarmelf_after_allocation
63 is effectively the same as relaxation, so prevent early memory
64 region checks which produce bogus error messages.
65 Note - this test has nothing to do with symbols. It is just here
66 because this is the first emulation routine that is called after
67 the command line has been parsed. */
68 if (!bfd_link_relocatable (&link_info))
69 TARGET_ENABLE_RELAXATION;
70}
71
1220a729 72static void
0c7a8e5a 73arm_elf_before_allocation (void)
1220a729 74{
d504ffc8
DJ
75 bfd_elf32_arm_set_byteswap_code (&link_info, byteswap_code);
76
c6dd86c6
JB
77 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
78 due to architecture version. */
f13a99db 79 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 80
a504d23a
LA
81 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
82 unnecessary due to architecture version. */
83 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
84
48229727
JB
85 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
86 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
87
daa4adae
TP
88 /* Ensure the output sections of veneers needing a dedicated one is not
89 removed. */
90 bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
91
d504ffc8
DJ
92 /* We should be able to set the size of the interworking stub section. We
93 can't do it until later if we have dynamic sections, though. */
cbc704f3 94 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
95 {
96 /* Here we rummage through the found bfds to collect glue information. */
97 LANG_FOR_EACH_INPUT_STATEMENT (is)
98 {
c6dd86c6
JB
99 /* Initialise mapping tables for code/data. */
100 bfd_elf32_arm_init_maps (is->the_bfd);
101
d504ffc8 102 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 103 &link_info)
a504d23a
LA
104 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
105 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
106 &link_info))
252b5132
RH
107 /* xgettext:c-format */
108 einfo (_("Errors encountered processing file %s"), is->filename);
d504ffc8 109 }
3e6b1042
DJ
110
111 /* We have seen it all. Allocate it, and carry on. */
112 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 113 }
252b5132 114
063d4ee1
AM
115 /* Call the standard elf routine. */
116 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
117}
118
906e58ca
NC
119/* Fake input file for stubs. */
120static lang_input_statement_type *stub_file;
121
122/* Whether we need to call gldarm_layout_sections_again. */
123static int need_laying_out = 0;
124
125/* Maximum size of a group of input sections that can be handled by
126 one stub section. A value of +/-1 indicates the bfd back-end
127 should use a suitable default size. */
128static bfd_signed_vma group_size = 1;
129
130struct hook_stub_info
131{
132 lang_statement_list_type add;
133 asection *input_section;
134};
135
136/* Traverse the linker tree to find the spot where the stub goes. */
137
138static bfd_boolean
139hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
140{
141 lang_statement_union_type *l;
142 bfd_boolean ret;
143
144 for (; (l = *lp) != NULL; lp = &l->header.next)
145 {
146 switch (l->header.type)
147 {
148 case lang_constructors_statement_enum:
149 ret = hook_in_stub (info, &constructor_list.head);
150 if (ret)
151 return ret;
152 break;
153
154 case lang_output_section_statement_enum:
155 ret = hook_in_stub (info,
156 &l->output_section_statement.children.head);
157 if (ret)
158 return ret;
159 break;
160
161 case lang_wild_statement_enum:
162 ret = hook_in_stub (info, &l->wild_statement.children.head);
163 if (ret)
164 return ret;
165 break;
166
167 case lang_group_statement_enum:
168 ret = hook_in_stub (info, &l->group_statement.children.head);
169 if (ret)
170 return ret;
171 break;
172
173 case lang_input_section_enum:
174 if (l->input_section.section == info->input_section)
175 {
176 /* We've found our section. Insert the stub immediately
07d72278
DJ
177 after its associated input section. */
178 *(info->add.tail) = l->header.next;
179 l->header.next = info->add.head;
906e58ca
NC
180 return TRUE;
181 }
182 break;
183
184 case lang_data_statement_enum:
185 case lang_reloc_statement_enum:
186 case lang_object_symbols_statement_enum:
187 case lang_output_statement_enum:
188 case lang_target_statement_enum:
189 case lang_input_statement_enum:
190 case lang_assignment_statement_enum:
191 case lang_padding_statement_enum:
192 case lang_address_statement_enum:
193 case lang_fill_statement_enum:
194 break;
195
196 default:
197 FAIL ();
198 break;
199 }
200 }
201 return FALSE;
202}
203
204
205/* Call-back for elf32_arm_size_stubs. */
206
207/* Create a new stub section, and arrange for it to be linked
07d72278 208 immediately after INPUT_SECTION. */
906e58ca
NC
209
210static asection *
7a89b94e 211elf32_arm_add_stub_section (const char * stub_sec_name,
6bde4c52
TP
212 asection * output_section,
213 asection * after_input_section,
7a89b94e 214 unsigned int alignment_power)
906e58ca
NC
215{
216 asection *stub_sec;
217 flagword flags;
906e58ca
NC
218 lang_output_section_statement_type *os;
219 struct hook_stub_info info;
220
906e58ca
NC
221 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
222 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
9795b468
AM
223 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
224 stub_sec_name, flags);
225 if (stub_sec == NULL)
906e58ca
NC
226 goto err_ret;
227
7a89b94e 228 bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
906e58ca 229
24ef1aa7 230 os = lang_output_section_get (output_section);
906e58ca 231
6bde4c52 232 info.input_section = after_input_section;
906e58ca 233 lang_list_init (&info.add);
b9c361e0 234 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
235
236 if (info.add.head == NULL)
237 goto err_ret;
238
6bde4c52
TP
239 if (after_input_section == NULL)
240 {
241 lang_statement_union_type **lp = &os->children.head;
242 lang_statement_union_type *l, *lprev = NULL;
243
244 for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
245
246 if (lprev)
247 lprev->header.next = info.add.head;
248 else
249 os->children.head = info.add.head;
250
251 return stub_sec;
252 }
253 else
254 {
255 if (hook_in_stub (&info, &os->children.head))
256 return stub_sec;
257 }
906e58ca
NC
258
259 err_ret:
260 einfo ("%X%P: can not make stub section: %E\n");
261 return NULL;
262}
263
264/* Another call-back for elf_arm_size_stubs. */
265
6f798e5c 266static void
906e58ca
NC
267gldarm_layout_sections_again (void)
268{
269 /* If we have changed sizes of the stub sections, then we need
270 to recalculate all the section offsets. This may mean we need to
271 add even more stubs. */
272 gld${EMULATION_NAME}_map_segments (TRUE);
273 need_laying_out = -1;
274}
275
276static void
277build_section_lists (lang_statement_union_type *statement)
278{
279 if (statement->header.type == lang_input_section_enum)
280 {
281 asection *i = statement->input_section.section;
282
dbaa2011 283 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
284 && (i->flags & SEC_EXCLUDE) == 0
285 && i->output_section != NULL
286 && i->output_section->owner == link_info.output_bfd)
287 elf32_arm_next_input_section (& link_info, i);
288 }
289}
290
2468f9c9
PB
291static int
292compare_output_sec_vma (const void *a, const void *b)
293{
294 asection *asec = *(asection **) a, *bsec = *(asection **) b;
295 asection *aout = asec->output_section, *bout = bsec->output_section;
296 bfd_vma avma, bvma;
e2caaa1f 297
2468f9c9
PB
298 /* If there's no output section for some reason, compare equal. */
299 if (!aout || !bout)
300 return 0;
e2caaa1f 301
2468f9c9
PB
302 avma = aout->vma + asec->output_offset;
303 bvma = bout->vma + bsec->output_offset;
e2caaa1f 304
2468f9c9
PB
305 if (avma > bvma)
306 return 1;
307 else if (avma < bvma)
308 return -1;
e2caaa1f 309
2468f9c9
PB
310 return 0;
311}
312
906e58ca 313static void
eaeb0a9d 314gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 315{
75938853
AM
316 int ret;
317
491d01d3
YU
318 /* Build a sorted list of input text sections, then use that to process
319 the unwind table index. */
320 unsigned int list_size = 10;
321 asection **sec_list = (asection **)
322 xmalloc (list_size * sizeof (asection *));
323 unsigned int sec_count = 0;
324
325 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 326 {
491d01d3
YU
327 bfd *abfd = is->the_bfd;
328 asection *sec;
e2caaa1f 329
491d01d3
YU
330 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
331 continue;
e2caaa1f 332
491d01d3
YU
333 for (sec = abfd->sections; sec != NULL; sec = sec->next)
334 {
335 asection *out_sec = sec->output_section;
336
337 if (out_sec
338 && elf_section_data (sec)
339 && elf_section_type (sec) == SHT_PROGBITS
340 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
341 && (sec->flags & SEC_EXCLUDE) == 0
342 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
343 && out_sec != bfd_abs_section_ptr)
2468f9c9 344 {
491d01d3 345 if (sec_count == list_size)
2468f9c9 346 {
491d01d3
YU
347 list_size *= 2;
348 sec_list = (asection **)
349 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 350 }
491d01d3
YU
351
352 sec_list[sec_count++] = sec;
2468f9c9
PB
353 }
354 }
491d01d3 355 }
e2caaa1f 356
491d01d3 357 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 358
491d01d3
YU
359 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
360 merge_exidx_entries))
361 need_laying_out = 1;
e2caaa1f 362
491d01d3 363 free (sec_list);
6f798e5c 364
906e58ca
NC
365 /* bfd_elf32_discard_info just plays with debugging sections,
366 ie. doesn't affect any code, so we can delay resizing the
367 sections. It's likely we'll resize everything in the process of
368 adding stubs. */
75938853
AM
369 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
370 if (ret < 0)
371 {
372 einfo ("%X%P: .eh_frame/.stab edit: %E\n");
373 return;
374 }
375 else if (ret > 0)
906e58ca
NC
376 need_laying_out = 1;
377
378 /* If generating a relocatable output file, then we don't
379 have to examine the relocs. */
0e1862bb 380 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 381 {
75938853 382 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
383 if (ret != 0)
384 {
385 if (ret < 0)
386 {
1a51c1a4 387 einfo ("%X%P: could not compute sections lists for stub generation: %E\n");
906e58ca
NC
388 return;
389 }
390
391 lang_for_each_statement (build_section_lists);
392
393 /* Call into the BFD backend to do the real work. */
394 if (! elf32_arm_size_stubs (link_info.output_bfd,
395 stub_file->the_bfd,
396 & link_info,
397 group_size,
398 & elf32_arm_add_stub_section,
399 & gldarm_layout_sections_again))
400 {
1a51c1a4 401 einfo ("%X%P: cannot size stub section: %E\n");
906e58ca
NC
402 return;
403 }
404 }
405 }
406
407 if (need_laying_out != -1)
408 gld${EMULATION_NAME}_map_segments (need_laying_out);
eaeb0a9d
AM
409}
410
411static void
412gld${EMULATION_NAME}_finish (void)
413{
414 struct bfd_link_hash_entry * h;
415
416 {
417 LANG_FOR_EACH_INPUT_STATEMENT (is)
418 {
419 /* Figure out where VFP11 erratum veneers (and the labels returning
420 from same) have been placed. */
421 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
422
423 /* Figure out where STM32L4XX erratum veneers (and the labels returning
424 from them) have been placed. */
425 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
426 }
427 }
906e58ca 428
0e1862bb 429 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
430 {
431 /* Now build the linker stubs. */
432 if (stub_file->the_bfd->sections != NULL)
433 {
434 if (! elf32_arm_build_stubs (& link_info))
435 einfo ("%X%P: can not build stubs: %E\n");
436 }
437 }
438
439 finish_default ();
c56feb2b 440
1d022697
PB
441 if (thumb_entry_symbol)
442 {
443 h = bfd_link_hash_lookup (link_info.hash, thumb_entry_symbol,
444 FALSE, FALSE, TRUE);
445 }
446 else
447 {
448 struct elf_link_hash_entry * eh;
449
450 if (!entry_symbol.name)
451 return;
452
453 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
454 FALSE, FALSE, TRUE);
455 eh = (struct elf_link_hash_entry *)h;
39d911fc
TP
456 if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
457 != ST_BRANCH_TO_THUMB)
1d022697
PB
458 return;
459 }
0c7a8e5a 460
6f798e5c
NC
461
462 if (h != (struct bfd_link_hash_entry *) NULL
463 && (h->type == bfd_link_hash_defined
464 || h->type == bfd_link_hash_defweak)
465 && h->u.def.section->output_section != NULL)
466 {
467 static char buffer[32];
88f7bcd5 468 bfd_vma val;
0c7a8e5a 469
88f7bcd5
NC
470 /* Special procesing is required for a Thumb entry symbol. The
471 bottom bit of its address must be set. */
472 val = (h->u.def.value
f13a99db 473 + bfd_get_section_vma (link_info.output_bfd,
88f7bcd5
NC
474 h->u.def.section->output_section)
475 + h->u.def.section->output_offset);
0c7a8e5a 476
88f7bcd5 477 val |= 1;
6f798e5c 478
88f7bcd5 479 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 480 where the lang_finish() function will pick it up. */
88f7bcd5
NC
481 buffer[0] = '0';
482 buffer[1] = 'x';
0c7a8e5a 483
88f7bcd5 484 sprintf_vma (buffer + 2, val);
6f798e5c 485
1d022697
PB
486 if (thumb_entry_symbol != NULL && entry_symbol.name != NULL
487 && entry_from_cmdline)
88f7bcd5
NC
488 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
489 thumb_entry_symbol, entry_symbol.name);
490 entry_symbol.name = buffer;
6f798e5c 491 }
88f7bcd5 492 else
6241fe3d 493 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
88f7bcd5 494 thumb_entry_symbol);
6f798e5c
NC
495}
496
bf21ed78 497/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
498 After the output has been created, but before inputs are read. */
499static void
500arm_elf_create_output_section_statements (void)
501{
b8976b05
NC
502 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
503 {
504 /* The arm backend needs special fields in the output hash structure.
505 These will only be created if the output format is an arm format,
506 hence we do not support linking and changing output formats at the
507 same time. Use a link followed by objcopy to change output formats. */
508 einfo ("%F%X%P: error: Cannot change output format whilst linking ARM binaries.\n");
509 return;
510 }
511
f13a99db
AM
512 bfd_elf32_arm_set_target_relocs (link_info.output_bfd, &link_info,
513 target1_is_rel,
bf21ed78 514 target2_type, fix_v4bx, use_blx,
a504d23a
LA
515 vfp11_denorm_fix, stm32l4xx_fix,
516 no_enum_size_warning,
a9dc9481 517 no_wchar_size_warning,
e2caaa1f 518 pic_veneer, fix_cortex_a8,
54ddd295 519 fix_arm1176, cmse_implib);
906e58ca
NC
520
521 stub_file = lang_add_input_file ("linker stubs",
522 lang_input_file_is_fake_enum,
523 NULL);
524 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
525 if (stub_file->the_bfd == NULL
526 || ! bfd_set_arch_mach (stub_file->the_bfd,
527 bfd_get_arch (link_info.output_bfd),
528 bfd_get_mach (link_info.output_bfd)))
529 {
530 einfo ("%X%P: can not create BFD %E\n");
531 return;
532 }
e2caaa1f 533
906e58ca
NC
534 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
535 ldlang_add_file (stub_file);
3e6b1042
DJ
536
537 /* Also use the stub file for stubs placed in a single output section. */
538 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
539 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
540}
541
542/* Avoid processing the fake stub_file in vercheck, stat_needed and
543 check_needed routines. */
544
545static void (*real_func) (lang_input_statement_type *);
546
547static void arm_for_each_input_file_wrapper (lang_input_statement_type *l)
548{
549 if (l != stub_file)
550 (*real_func) (l);
3674e28a
PB
551}
552
906e58ca
NC
553static void
554arm_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
555{
556 real_func = func;
557 lang_for_each_input_file (&arm_for_each_input_file_wrapper);
558}
559
560#define lang_for_each_input_file arm_lang_for_each_input_file
561
252b5132
RH
562EOF
563
41392f03
AM
564# Define some shell vars to insert bits of code into the standard elf
565# parse_args and list_options functions.
566#
567PARSE_AND_LIST_PROLOGUE='
568#define OPTION_THUMB_ENTRY 301
e489d0ae 569#define OPTION_BE8 302
9c504268
PB
570#define OPTION_TARGET1_REL 303
571#define OPTION_TARGET1_ABS 304
3674e28a 572#define OPTION_TARGET2 305
33bfe774
JB
573#define OPTION_FIX_V4BX 306
574#define OPTION_USE_BLX 307
c6dd86c6 575#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 576#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 577#define OPTION_PIC_VENEER 310
845b51d6 578#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 579#define OPTION_STUBGROUP_SIZE 312
a9dc9481 580#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
581#define OPTION_FIX_CORTEX_A8 314
582#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 583#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
584#define OPTION_FIX_ARM1176 317
585#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 586#define OPTION_LONG_PLT 319
a504d23a 587#define OPTION_STM32L4XX_FIX 320
54ddd295 588#define OPTION_CMSE_IMPLIB 321
41392f03 589'
252b5132 590
ef5bdbd1 591PARSE_AND_LIST_SHORTOPTS=p
252b5132 592
41392f03
AM
593PARSE_AND_LIST_LONGOPTS='
594 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
595 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 596 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
597 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
598 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 599 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 600 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 601 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 602 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 603 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 604 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 605 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 606 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 607 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 608 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
609 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
610 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 611 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
612 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
613 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 614 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
54ddd295 615 { "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
41392f03 616'
252b5132 617
41392f03 618PARSE_AND_LIST_OPTIONS='
442996ee 619 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 620 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
621 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
622 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
623 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
624 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 625 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
626 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
627 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 628 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 629 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 630 " enum sizes\n"));
a272e28c 631 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 632 " wchar_t sizes\n"));
442996ee 633 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
634 fprintf (file, _(" --long-plt Generate long .plt entries\n"
635 " to handle large .plt/.got displacements\n"));
54ddd295
TP
636 fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
637 " library as per ARMv8-M Security Extensions\n"));
906e58ca 638 fprintf (file, _("\
a272e28c
NC
639 --stub-group-size=N Maximum size of a group of input sections that\n\
640 can be handled by one stub section. A negative\n\
641 value locates all stubs after their branches\n\
642 (with a group size of -N), while a positive\n\
643 value allows two groups of input sections, one\n\
644 before, and one after each stub section.\n\
645 Values of +/-1 indicate the linker should\n\
646 choose suitable defaults.\n"));
48229727 647 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 648 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 649 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 650'
252b5132 651
41392f03
AM
652PARSE_AND_LIST_ARGS_CASES='
653 case '\'p\'':
dea514f5 654 /* Only here for backwards compatibility. */
41392f03 655 break;
252b5132 656
41392f03
AM
657 case OPTION_THUMB_ENTRY:
658 thumb_entry_symbol = optarg;
659 break;
e489d0ae
PB
660
661 case OPTION_BE8:
662 byteswap_code = 1;
663 break;
9c504268
PB
664
665 case OPTION_TARGET1_REL:
666 target1_is_rel = 1;
667 break;
668
669 case OPTION_TARGET1_ABS:
670 target1_is_rel = 0;
671 break;
3674e28a
PB
672
673 case OPTION_TARGET2:
674 target2_type = optarg;
675 break;
319850b4
JB
676
677 case OPTION_FIX_V4BX:
678 fix_v4bx = 1;
679 break;
33bfe774 680
845b51d6
PB
681 case OPTION_FIX_V4BX_INTERWORKING:
682 fix_v4bx = 2;
683 break;
684
33bfe774
JB
685 case OPTION_USE_BLX:
686 use_blx = 1;
687 break;
92b93329 688
c6dd86c6
JB
689 case OPTION_VFP11_DENORM_FIX:
690 if (strcmp (optarg, "none") == 0)
691 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
692 else if (strcmp (optarg, "scalar") == 0)
693 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
694 else if (strcmp (optarg, "vector") == 0)
695 vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
696 else
697 einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
698 break;
bf21ed78 699
a504d23a
LA
700 case OPTION_STM32L4XX_FIX:
701 if (!optarg)
702 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
703 else if (strcmp (optarg, "none") == 0)
704 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
705 else if (strcmp (optarg, "default") == 0)
706 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
707 else if (strcmp (optarg, "all") == 0)
708 stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
709 else
710 einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
711 break;
712
bf21ed78
MS
713 case OPTION_NO_ENUM_SIZE_WARNING:
714 no_enum_size_warning = 1;
715 break;
27e55c4d 716
a9dc9481
JM
717 case OPTION_NO_WCHAR_SIZE_WARNING:
718 no_wchar_size_warning = 1;
719 break;
720
27e55c4d
PB
721 case OPTION_PIC_VENEER:
722 pic_veneer = 1;
723 break;
906e58ca
NC
724
725 case OPTION_STUBGROUP_SIZE:
726 {
727 const char *end;
728
729 group_size = bfd_scan_vma (optarg, &end, 0);
730 if (*end)
731 einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
732 }
733 break;
48229727
JB
734
735 case OPTION_FIX_CORTEX_A8:
736 fix_cortex_a8 = 1;
737 break;
738
739 case OPTION_NO_FIX_CORTEX_A8:
740 fix_cortex_a8 = 0;
741 break;
85fdf906
AH
742
743 case OPTION_NO_MERGE_EXIDX_ENTRIES:
744 merge_exidx_entries = 0;
2de70689 745 break;
85fdf906 746
2de70689
MGD
747 case OPTION_FIX_ARM1176:
748 fix_arm1176 = 1;
749 break;
750
751 case OPTION_NO_FIX_ARM1176:
752 fix_arm1176 = 0;
753 break;
1db37fe6
YG
754
755 case OPTION_LONG_PLT:
756 bfd_elf32_arm_use_long_plt ();
757 break;
54ddd295
TP
758
759 case OPTION_CMSE_IMPLIB:
760 cmse_implib = 1;
761 break;
41392f03 762'
252b5132 763
3e6b1042 764# We have our own before_allocation etc. functions, but they call
41392f03 765# the standard routines, so give them a different name.
41392f03 766LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 767LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 768LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 769
41392f03
AM
770# Replace the elf before_parse function with our own.
771LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 772LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 773
41392f03 774# Call the extra arm-elf function
906e58ca 775LDEMUL_FINISH=gld${EMULATION_NAME}_finish