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252b5132 1# This shell script emits a C file. -*- C -*-
2571583a 2# Copyright (C) 1991-2017 Free Software Foundation, Inc.
41392f03 3#
f96b4a7b 4# This file is part of the GNU Binutils.
41392f03
AM
5#
6# This program is free software; you can redistribute it and/or modify
7# it under the terms of the GNU General Public License as published by
f96b4a7b 8# the Free Software Foundation; either version 3 of the License, or
41392f03
AM
9# (at your option) any later version.
10#
11# This program is distributed in the hope that it will be useful,
12# but WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14# GNU General Public License for more details.
15#
16# You should have received a copy of the GNU General Public License
17# along with this program; if not, write to the Free Software
f96b4a7b
NC
18# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19# MA 02110-1301, USA.
41392f03
AM
20#
21
22# This file is sourced from elf32.em, and defines extra arm-elf
23# specific routines.
24#
a82644e2 25test -z "$TARGET2_TYPE" && TARGET2_TYPE="rel"
92b93329 26fragment <<EOF
7ca69e9e 27
906e58ca 28#include "ldctor.h"
1d022697
PB
29#include "elf/arm.h"
30
68c39892
TP
31static struct elf32_arm_params params =
32{
33 NULL, /* thumb_entry_symbol */
34 0, /* byteswap_code */
35 0${TARGET1_IS_REL}, /* target1_is_rel */
36 "${TARGET2_TYPE}", /* target2_type */
37 0, /* fix_v4bx */
38 0, /* use_blx */
39 BFD_ARM_VFP11_FIX_DEFAULT, /* vfp11_denorm_fix */
40 BFD_ARM_STM32L4XX_FIX_NONE, /* stm32l4xx_fix */
41 0, /* no_enum_size_warning */
42 0, /* no_wchar_size_warning */
43 0, /* pic_veneer */
44 -1, /* fix_cortex_a8 */
45 1, /* fix_arm1176 */
46 -1, /* merge_exidx_entries */
47 0, /* cmse_implib */
48 NULL /* in_implib_bfd */
49};
0955507f 50static char *in_implib_filename = NULL;
7ca69e9e 51
252b5132 52static void
0c7a8e5a 53gld${EMULATION_NAME}_before_parse (void)
252b5132
RH
54{
55#ifndef TARGET_ /* I.e., if not generic. */
5e2f1575 56 ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
252b5132 57#endif /* not TARGET_ */
66be1055 58 input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
b34976b6 59 config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
e2caaa1f 60 config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`;
576438f0 61 link_info.relro = DEFAULT_LD_Z_RELRO;
252b5132
RH
62}
63
3940d2c3
NC
64static void
65gld${EMULATION_NAME}_set_symbols (void)
66{
67 /* PR 19106: The section resizing code in gldarmelf_after_allocation
68 is effectively the same as relaxation, so prevent early memory
69 region checks which produce bogus error messages.
70 Note - this test has nothing to do with symbols. It is just here
71 because this is the first emulation routine that is called after
72 the command line has been parsed. */
73 if (!bfd_link_relocatable (&link_info))
74 TARGET_ENABLE_RELAXATION;
75}
76
1220a729 77static void
0c7a8e5a 78arm_elf_before_allocation (void)
1220a729 79{
68c39892 80 bfd_elf32_arm_set_byteswap_code (&link_info, params.byteswap_code);
d504ffc8 81
c6dd86c6
JB
82 /* Choose type of VFP11 erratum fix, or warn if specified fix is unnecessary
83 due to architecture version. */
f13a99db 84 bfd_elf32_arm_set_vfp11_fix (link_info.output_bfd, &link_info);
c6dd86c6 85
a504d23a
LA
86 /* Choose type of STM32L4XX erratum fix, or warn if specified fix is
87 unnecessary due to architecture version. */
88 bfd_elf32_arm_set_stm32l4xx_fix (link_info.output_bfd, &link_info);
89
48229727
JB
90 /* Auto-select Cortex-A8 erratum fix if it wasn't explicitly specified. */
91 bfd_elf32_arm_set_cortex_a8_fix (link_info.output_bfd, &link_info);
92
daa4adae
TP
93 /* Ensure the output sections of veneers needing a dedicated one is not
94 removed. */
95 bfd_elf32_arm_keep_private_stub_output_sections (&link_info);
96
d504ffc8
DJ
97 /* We should be able to set the size of the interworking stub section. We
98 can't do it until later if we have dynamic sections, though. */
cbc704f3 99 if (elf_hash_table (&link_info)->dynobj == NULL)
d504ffc8
DJ
100 {
101 /* Here we rummage through the found bfds to collect glue information. */
102 LANG_FOR_EACH_INPUT_STATEMENT (is)
103 {
6c19b93b
AM
104 /* Initialise mapping tables for code/data. */
105 bfd_elf32_arm_init_maps (is->the_bfd);
c6dd86c6 106
d504ffc8 107 if (!bfd_elf32_arm_process_before_allocation (is->the_bfd,
c6dd86c6 108 &link_info)
a504d23a
LA
109 || !bfd_elf32_arm_vfp11_erratum_scan (is->the_bfd, &link_info)
110 || !bfd_elf32_arm_stm32l4xx_erratum_scan (is->the_bfd,
111 &link_info))
252b5132
RH
112 /* xgettext:c-format */
113 einfo (_("Errors encountered processing file %s"), is->filename);
d504ffc8 114 }
3e6b1042
DJ
115
116 /* We have seen it all. Allocate it, and carry on. */
117 bfd_elf32_arm_allocate_interworking_sections (& link_info);
d504ffc8 118 }
252b5132 119
063d4ee1
AM
120 /* Call the standard elf routine. */
121 gld${EMULATION_NAME}_before_allocation ();
252b5132
RH
122}
123
906e58ca
NC
124/* Fake input file for stubs. */
125static lang_input_statement_type *stub_file;
126
127/* Whether we need to call gldarm_layout_sections_again. */
128static int need_laying_out = 0;
129
130/* Maximum size of a group of input sections that can be handled by
131 one stub section. A value of +/-1 indicates the bfd back-end
132 should use a suitable default size. */
133static bfd_signed_vma group_size = 1;
134
135struct hook_stub_info
136{
137 lang_statement_list_type add;
138 asection *input_section;
139};
140
141/* Traverse the linker tree to find the spot where the stub goes. */
142
143static bfd_boolean
144hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
145{
146 lang_statement_union_type *l;
147 bfd_boolean ret;
148
149 for (; (l = *lp) != NULL; lp = &l->header.next)
150 {
151 switch (l->header.type)
152 {
153 case lang_constructors_statement_enum:
154 ret = hook_in_stub (info, &constructor_list.head);
155 if (ret)
156 return ret;
157 break;
158
159 case lang_output_section_statement_enum:
160 ret = hook_in_stub (info,
161 &l->output_section_statement.children.head);
162 if (ret)
163 return ret;
164 break;
165
166 case lang_wild_statement_enum:
167 ret = hook_in_stub (info, &l->wild_statement.children.head);
168 if (ret)
169 return ret;
170 break;
171
172 case lang_group_statement_enum:
173 ret = hook_in_stub (info, &l->group_statement.children.head);
174 if (ret)
175 return ret;
176 break;
177
178 case lang_input_section_enum:
179 if (l->input_section.section == info->input_section)
180 {
181 /* We've found our section. Insert the stub immediately
07d72278
DJ
182 after its associated input section. */
183 *(info->add.tail) = l->header.next;
184 l->header.next = info->add.head;
906e58ca
NC
185 return TRUE;
186 }
187 break;
188
189 case lang_data_statement_enum:
190 case lang_reloc_statement_enum:
191 case lang_object_symbols_statement_enum:
192 case lang_output_statement_enum:
193 case lang_target_statement_enum:
194 case lang_input_statement_enum:
195 case lang_assignment_statement_enum:
196 case lang_padding_statement_enum:
197 case lang_address_statement_enum:
198 case lang_fill_statement_enum:
199 break;
200
201 default:
202 FAIL ();
203 break;
204 }
205 }
206 return FALSE;
207}
208
209
210/* Call-back for elf32_arm_size_stubs. */
211
212/* Create a new stub section, and arrange for it to be linked
07d72278 213 immediately after INPUT_SECTION. */
906e58ca
NC
214
215static asection *
7a89b94e 216elf32_arm_add_stub_section (const char * stub_sec_name,
6bde4c52
TP
217 asection * output_section,
218 asection * after_input_section,
7a89b94e 219 unsigned int alignment_power)
906e58ca
NC
220{
221 asection *stub_sec;
222 flagword flags;
906e58ca
NC
223 lang_output_section_statement_type *os;
224 struct hook_stub_info info;
225
906e58ca
NC
226 flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
227 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
9795b468
AM
228 stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
229 stub_sec_name, flags);
230 if (stub_sec == NULL)
906e58ca
NC
231 goto err_ret;
232
7a89b94e 233 bfd_set_section_alignment (stub_file->the_bfd, stub_sec, alignment_power);
906e58ca 234
24ef1aa7 235 os = lang_output_section_get (output_section);
906e58ca 236
6bde4c52 237 info.input_section = after_input_section;
906e58ca 238 lang_list_init (&info.add);
b9c361e0 239 lang_add_section (&info.add, stub_sec, NULL, os);
906e58ca
NC
240
241 if (info.add.head == NULL)
242 goto err_ret;
243
6bde4c52
TP
244 if (after_input_section == NULL)
245 {
246 lang_statement_union_type **lp = &os->children.head;
247 lang_statement_union_type *l, *lprev = NULL;
248
249 for (; (l = *lp) != NULL; lp = &l->header.next, lprev = l);
250
251 if (lprev)
252 lprev->header.next = info.add.head;
253 else
254 os->children.head = info.add.head;
255
256 return stub_sec;
257 }
258 else
259 {
260 if (hook_in_stub (&info, &os->children.head))
261 return stub_sec;
262 }
906e58ca
NC
263
264 err_ret:
d003af55 265 einfo (_("%X%P: can not make stub section: %E\n"));
906e58ca
NC
266 return NULL;
267}
268
269/* Another call-back for elf_arm_size_stubs. */
270
6f798e5c 271static void
906e58ca
NC
272gldarm_layout_sections_again (void)
273{
274 /* If we have changed sizes of the stub sections, then we need
275 to recalculate all the section offsets. This may mean we need to
276 add even more stubs. */
277 gld${EMULATION_NAME}_map_segments (TRUE);
278 need_laying_out = -1;
279}
280
281static void
282build_section_lists (lang_statement_union_type *statement)
283{
284 if (statement->header.type == lang_input_section_enum)
285 {
286 asection *i = statement->input_section.section;
287
dbaa2011 288 if (i->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
906e58ca
NC
289 && (i->flags & SEC_EXCLUDE) == 0
290 && i->output_section != NULL
291 && i->output_section->owner == link_info.output_bfd)
292 elf32_arm_next_input_section (& link_info, i);
293 }
294}
295
2468f9c9
PB
296static int
297compare_output_sec_vma (const void *a, const void *b)
298{
299 asection *asec = *(asection **) a, *bsec = *(asection **) b;
300 asection *aout = asec->output_section, *bout = bsec->output_section;
301 bfd_vma avma, bvma;
e2caaa1f 302
2468f9c9
PB
303 /* If there's no output section for some reason, compare equal. */
304 if (!aout || !bout)
305 return 0;
e2caaa1f 306
2468f9c9
PB
307 avma = aout->vma + asec->output_offset;
308 bvma = bout->vma + bsec->output_offset;
e2caaa1f 309
2468f9c9
PB
310 if (avma > bvma)
311 return 1;
312 else if (avma < bvma)
313 return -1;
e2caaa1f 314
2468f9c9
PB
315 return 0;
316}
317
906e58ca 318static void
eaeb0a9d 319gld${EMULATION_NAME}_after_allocation (void)
6f798e5c 320{
75938853
AM
321 int ret;
322
491d01d3
YU
323 /* Build a sorted list of input text sections, then use that to process
324 the unwind table index. */
325 unsigned int list_size = 10;
326 asection **sec_list = (asection **)
327 xmalloc (list_size * sizeof (asection *));
328 unsigned int sec_count = 0;
329
330 LANG_FOR_EACH_INPUT_STATEMENT (is)
2468f9c9 331 {
491d01d3
YU
332 bfd *abfd = is->the_bfd;
333 asection *sec;
e2caaa1f 334
491d01d3
YU
335 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
336 continue;
e2caaa1f 337
491d01d3
YU
338 for (sec = abfd->sections; sec != NULL; sec = sec->next)
339 {
340 asection *out_sec = sec->output_section;
341
342 if (out_sec
343 && elf_section_data (sec)
344 && elf_section_type (sec) == SHT_PROGBITS
345 && (elf_section_flags (sec) & SHF_EXECINSTR) != 0
346 && (sec->flags & SEC_EXCLUDE) == 0
347 && sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
348 && out_sec != bfd_abs_section_ptr)
2468f9c9 349 {
491d01d3 350 if (sec_count == list_size)
2468f9c9 351 {
491d01d3
YU
352 list_size *= 2;
353 sec_list = (asection **)
354 xrealloc (sec_list, list_size * sizeof (asection *));
2468f9c9 355 }
491d01d3
YU
356
357 sec_list[sec_count++] = sec;
2468f9c9
PB
358 }
359 }
491d01d3 360 }
e2caaa1f 361
491d01d3 362 qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
e2caaa1f 363
491d01d3 364 if (elf32_arm_fix_exidx_coverage (sec_list, sec_count, &link_info,
68c39892 365 params.merge_exidx_entries))
491d01d3 366 need_laying_out = 1;
e2caaa1f 367
491d01d3 368 free (sec_list);
6f798e5c 369
906e58ca
NC
370 /* bfd_elf32_discard_info just plays with debugging sections,
371 ie. doesn't affect any code, so we can delay resizing the
372 sections. It's likely we'll resize everything in the process of
373 adding stubs. */
75938853
AM
374 ret = bfd_elf_discard_info (link_info.output_bfd, & link_info);
375 if (ret < 0)
376 {
d003af55 377 einfo (_("%X%P: .eh_frame/.stab edit: %E\n"));
75938853
AM
378 return;
379 }
380 else if (ret > 0)
906e58ca
NC
381 need_laying_out = 1;
382
383 /* If generating a relocatable output file, then we don't
384 have to examine the relocs. */
0e1862bb 385 if (stub_file != NULL && !bfd_link_relocatable (&link_info))
906e58ca 386 {
75938853 387 ret = elf32_arm_setup_section_lists (link_info.output_bfd, &link_info);
906e58ca
NC
388 if (ret != 0)
389 {
390 if (ret < 0)
391 {
d003af55
AM
392 einfo (_("%X%P: could not compute sections lists "
393 "for stub generation: %E\n"));
906e58ca
NC
394 return;
395 }
396
397 lang_for_each_statement (build_section_lists);
398
399 /* Call into the BFD backend to do the real work. */
400 if (! elf32_arm_size_stubs (link_info.output_bfd,
401 stub_file->the_bfd,
402 & link_info,
403 group_size,
404 & elf32_arm_add_stub_section,
405 & gldarm_layout_sections_again))
406 {
d003af55 407 einfo (_("%X%P: cannot size stub section: %E\n"));
906e58ca
NC
408 return;
409 }
410 }
411 }
412
413 if (need_laying_out != -1)
414 gld${EMULATION_NAME}_map_segments (need_laying_out);
eaeb0a9d
AM
415}
416
417static void
418gld${EMULATION_NAME}_finish (void)
419{
420 struct bfd_link_hash_entry * h;
421
422 {
423 LANG_FOR_EACH_INPUT_STATEMENT (is)
424 {
6c19b93b
AM
425 /* Figure out where VFP11 erratum veneers (and the labels returning
426 from same) have been placed. */
427 bfd_elf32_arm_vfp11_fix_veneer_locations (is->the_bfd, &link_info);
a504d23a
LA
428
429 /* Figure out where STM32L4XX erratum veneers (and the labels returning
430 from them) have been placed. */
431 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (is->the_bfd, &link_info);
eaeb0a9d
AM
432 }
433 }
906e58ca 434
0e1862bb 435 if (!bfd_link_relocatable (&link_info))
906e58ca
NC
436 {
437 /* Now build the linker stubs. */
438 if (stub_file->the_bfd->sections != NULL)
439 {
440 if (! elf32_arm_build_stubs (& link_info))
d003af55 441 einfo (_("%X%P: can not build stubs: %E\n"));
906e58ca
NC
442 }
443 }
444
445 finish_default ();
c56feb2b 446
68c39892 447 if (params.thumb_entry_symbol)
1d022697 448 {
68c39892 449 h = bfd_link_hash_lookup (link_info.hash, params.thumb_entry_symbol,
1d022697
PB
450 FALSE, FALSE, TRUE);
451 }
452 else
453 {
454 struct elf_link_hash_entry * eh;
455
456 if (!entry_symbol.name)
457 return;
458
459 h = bfd_link_hash_lookup (link_info.hash, entry_symbol.name,
460 FALSE, FALSE, TRUE);
461 eh = (struct elf_link_hash_entry *)h;
39d911fc
TP
462 if (!h || ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
463 != ST_BRANCH_TO_THUMB)
1d022697
PB
464 return;
465 }
0c7a8e5a 466
6f798e5c
NC
467
468 if (h != (struct bfd_link_hash_entry *) NULL
469 && (h->type == bfd_link_hash_defined
470 || h->type == bfd_link_hash_defweak)
471 && h->u.def.section->output_section != NULL)
472 {
473 static char buffer[32];
88f7bcd5 474 bfd_vma val;
0c7a8e5a 475
88f7bcd5
NC
476 /* Special procesing is required for a Thumb entry symbol. The
477 bottom bit of its address must be set. */
478 val = (h->u.def.value
f13a99db 479 + bfd_get_section_vma (link_info.output_bfd,
88f7bcd5
NC
480 h->u.def.section->output_section)
481 + h->u.def.section->output_offset);
0c7a8e5a 482
88f7bcd5 483 val |= 1;
6f798e5c 484
88f7bcd5 485 /* Now convert this value into a string and store it in entry_symbol
0c7a8e5a 486 where the lang_finish() function will pick it up. */
88f7bcd5
NC
487 buffer[0] = '0';
488 buffer[1] = 'x';
0c7a8e5a 489
88f7bcd5 490 sprintf_vma (buffer + 2, val);
6f798e5c 491
68c39892 492 if (params.thumb_entry_symbol != NULL && entry_symbol.name != NULL
1d022697 493 && entry_from_cmdline)
88f7bcd5 494 einfo (_("%P: warning: '--thumb-entry %s' is overriding '-e %s'\n"),
68c39892 495 params.thumb_entry_symbol, entry_symbol.name);
88f7bcd5 496 entry_symbol.name = buffer;
6f798e5c 497 }
88f7bcd5 498 else
6241fe3d 499 einfo (_("%P: warning: cannot find thumb start symbol %s\n"),
68c39892 500 params.thumb_entry_symbol);
6f798e5c
NC
501}
502
bf21ed78 503/* This is a convenient point to tell BFD about target specific flags.
3674e28a
PB
504 After the output has been created, but before inputs are read. */
505static void
506arm_elf_create_output_section_statements (void)
507{
b8976b05
NC
508 if (strstr (bfd_get_target (link_info.output_bfd), "arm") == NULL)
509 {
510 /* The arm backend needs special fields in the output hash structure.
511 These will only be created if the output format is an arm format,
512 hence we do not support linking and changing output formats at the
513 same time. Use a link followed by objcopy to change output formats. */
d003af55
AM
514 einfo (_("%F%X%P: error: Cannot change output format "
515 "whilst linking ARM binaries.\n"));
b8976b05
NC
516 return;
517 }
518
0955507f
TP
519 if (in_implib_filename)
520 {
68c39892
TP
521 params.in_implib_bfd = bfd_openr (in_implib_filename,
522 bfd_get_target (link_info.output_bfd));
0955507f 523
68c39892 524 if (params.in_implib_bfd == NULL)
d003af55 525 einfo (_("%F%s: Can't open: %E\n"), in_implib_filename);
0955507f 526
68c39892 527 if (!bfd_check_format (params.in_implib_bfd, bfd_object))
d003af55 528 einfo (_("%F%s: Not a relocatable file: %E\n"), in_implib_filename);
0955507f 529 }
0955507f 530
68c39892 531 bfd_elf32_arm_set_target_params (link_info.output_bfd, &link_info, &params);
906e58ca
NC
532
533 stub_file = lang_add_input_file ("linker stubs",
6c19b93b
AM
534 lang_input_file_is_fake_enum,
535 NULL);
906e58ca
NC
536 stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
537 if (stub_file->the_bfd == NULL
538 || ! bfd_set_arch_mach (stub_file->the_bfd,
6c19b93b
AM
539 bfd_get_arch (link_info.output_bfd),
540 bfd_get_mach (link_info.output_bfd)))
906e58ca 541 {
d003af55 542 einfo (_("%X%P: can not create BFD %E\n"));
906e58ca
NC
543 return;
544 }
e2caaa1f 545
906e58ca
NC
546 stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
547 ldlang_add_file (stub_file);
3e6b1042
DJ
548
549 /* Also use the stub file for stubs placed in a single output section. */
550 bfd_elf32_arm_add_glue_sections_to_bfd (stub_file->the_bfd, &link_info);
551 bfd_elf32_arm_get_bfd_for_interworking (stub_file->the_bfd, &link_info);
906e58ca
NC
552}
553
554/* Avoid processing the fake stub_file in vercheck, stat_needed and
555 check_needed routines. */
556
557static void (*real_func) (lang_input_statement_type *);
558
559static void arm_for_each_input_file_wrapper (lang_input_statement_type *l)
560{
561 if (l != stub_file)
562 (*real_func) (l);
3674e28a
PB
563}
564
906e58ca
NC
565static void
566arm_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
567{
568 real_func = func;
569 lang_for_each_input_file (&arm_for_each_input_file_wrapper);
570}
571
572#define lang_for_each_input_file arm_lang_for_each_input_file
573
252b5132
RH
574EOF
575
41392f03
AM
576# Define some shell vars to insert bits of code into the standard elf
577# parse_args and list_options functions.
578#
579PARSE_AND_LIST_PROLOGUE='
580#define OPTION_THUMB_ENTRY 301
e489d0ae 581#define OPTION_BE8 302
9c504268
PB
582#define OPTION_TARGET1_REL 303
583#define OPTION_TARGET1_ABS 304
3674e28a 584#define OPTION_TARGET2 305
33bfe774
JB
585#define OPTION_FIX_V4BX 306
586#define OPTION_USE_BLX 307
c6dd86c6 587#define OPTION_VFP11_DENORM_FIX 308
bf21ed78 588#define OPTION_NO_ENUM_SIZE_WARNING 309
27e55c4d 589#define OPTION_PIC_VENEER 310
845b51d6 590#define OPTION_FIX_V4BX_INTERWORKING 311
8c45e5ec 591#define OPTION_STUBGROUP_SIZE 312
a9dc9481 592#define OPTION_NO_WCHAR_SIZE_WARNING 313
48229727
JB
593#define OPTION_FIX_CORTEX_A8 314
594#define OPTION_NO_FIX_CORTEX_A8 315
8c45e5ec 595#define OPTION_NO_MERGE_EXIDX_ENTRIES 316
2de70689
MGD
596#define OPTION_FIX_ARM1176 317
597#define OPTION_NO_FIX_ARM1176 318
8c45e5ec 598#define OPTION_LONG_PLT 319
a504d23a 599#define OPTION_STM32L4XX_FIX 320
54ddd295 600#define OPTION_CMSE_IMPLIB 321
0955507f 601#define OPTION_IN_IMPLIB 322
41392f03 602'
252b5132 603
ef5bdbd1 604PARSE_AND_LIST_SHORTOPTS=p
252b5132 605
41392f03
AM
606PARSE_AND_LIST_LONGOPTS='
607 { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
608 { "thumb-entry", required_argument, NULL, OPTION_THUMB_ENTRY},
e489d0ae 609 { "be8", no_argument, NULL, OPTION_BE8},
9c504268
PB
610 { "target1-rel", no_argument, NULL, OPTION_TARGET1_REL},
611 { "target1-abs", no_argument, NULL, OPTION_TARGET1_ABS},
3674e28a 612 { "target2", required_argument, NULL, OPTION_TARGET2},
319850b4 613 { "fix-v4bx", no_argument, NULL, OPTION_FIX_V4BX},
845b51d6 614 { "fix-v4bx-interworking", no_argument, NULL, OPTION_FIX_V4BX_INTERWORKING},
33bfe774 615 { "use-blx", no_argument, NULL, OPTION_USE_BLX},
c6dd86c6 616 { "vfp11-denorm-fix", required_argument, NULL, OPTION_VFP11_DENORM_FIX},
a504d23a 617 { "fix-stm32l4xx-629360", optional_argument, NULL, OPTION_STM32L4XX_FIX},
bf21ed78 618 { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
27e55c4d 619 { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
906e58ca 620 { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
a9dc9481 621 { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
48229727
JB
622 { "fix-cortex-a8", no_argument, NULL, OPTION_FIX_CORTEX_A8 },
623 { "no-fix-cortex-a8", no_argument, NULL, OPTION_NO_FIX_CORTEX_A8 },
85fdf906 624 { "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
2de70689
MGD
625 { "fix-arm1176", no_argument, NULL, OPTION_FIX_ARM1176 },
626 { "no-fix-arm1176", no_argument, NULL, OPTION_NO_FIX_ARM1176 },
1db37fe6 627 { "long-plt", no_argument, NULL, OPTION_LONG_PLT },
54ddd295 628 { "cmse-implib", no_argument, NULL, OPTION_CMSE_IMPLIB },
0955507f 629 { "in-implib", required_argument, NULL, OPTION_IN_IMPLIB },
41392f03 630'
252b5132 631
41392f03 632PARSE_AND_LIST_OPTIONS='
442996ee 633 fprintf (file, _(" --thumb-entry=<sym> Set the entry point to be Thumb symbol <sym>\n"));
4a977a31 634 fprintf (file, _(" --be8 Output BE8 format image\n"));
f8266dc4
NC
635 fprintf (file, _(" --target1-rel Interpret R_ARM_TARGET1 as R_ARM_REL32\n"));
636 fprintf (file, _(" --target1-abs Interpret R_ARM_TARGET1 as R_ARM_ABS32\n"));
442996ee
AM
637 fprintf (file, _(" --target2=<type> Specify definition of R_ARM_TARGET2\n"));
638 fprintf (file, _(" --fix-v4bx Rewrite BX rn as MOV pc, rn for ARMv4\n"));
845b51d6 639 fprintf (file, _(" --fix-v4bx-interworking Rewrite BX rn branch to ARMv4 interworking veneer\n"));
442996ee
AM
640 fprintf (file, _(" --use-blx Enable use of BLX instructions\n"));
641 fprintf (file, _(" --vfp11-denorm-fix Specify how to fix VFP11 denorm erratum\n"));
a504d23a 642 fprintf (file, _(" --fix-stm32l4xx-629360 Specify how to fix STM32L4XX 629360 erratum\n"));
893dcb0e 643 fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
442996ee 644 " enum sizes\n"));
a272e28c 645 fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible\n"
a9dc9481 646 " wchar_t sizes\n"));
442996ee 647 fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
1db37fe6
YG
648 fprintf (file, _(" --long-plt Generate long .plt entries\n"
649 " to handle large .plt/.got displacements\n"));
54ddd295
TP
650 fprintf (file, _(" --cmse-implib Make import library to be a secure gateway import\n"
651 " library as per ARMv8-M Security Extensions\n"));
0955507f
TP
652 fprintf (file, _(" --in-implib Import library whose symbols address must\n"
653 " remain stable\n"));
906e58ca 654 fprintf (file, _("\
a272e28c
NC
655 --stub-group-size=N Maximum size of a group of input sections that\n\
656 can be handled by one stub section. A negative\n\
657 value locates all stubs after their branches\n\
658 (with a group size of -N), while a positive\n\
659 value allows two groups of input sections, one\n\
660 before, and one after each stub section.\n\
661 Values of +/-1 indicate the linker should\n\
662 choose suitable defaults.\n"));
48229727 663 fprintf (file, _(" --[no-]fix-cortex-a8 Disable/enable Cortex-A8 Thumb-2 branch erratum fix\n"));
85fdf906 664 fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
2de70689 665 fprintf (file, _(" --[no-]fix-arm1176 Disable/enable ARM1176 BLX immediate erratum fix\n"));
41392f03 666'
252b5132 667
41392f03
AM
668PARSE_AND_LIST_ARGS_CASES='
669 case '\'p\'':
dea514f5 670 /* Only here for backwards compatibility. */
41392f03 671 break;
252b5132 672
41392f03 673 case OPTION_THUMB_ENTRY:
68c39892 674 params.thumb_entry_symbol = optarg;
41392f03 675 break;
e489d0ae
PB
676
677 case OPTION_BE8:
68c39892 678 params.byteswap_code = 1;
e489d0ae 679 break;
9c504268
PB
680
681 case OPTION_TARGET1_REL:
68c39892 682 params.target1_is_rel = 1;
9c504268
PB
683 break;
684
685 case OPTION_TARGET1_ABS:
68c39892 686 params.target1_is_rel = 0;
9c504268 687 break;
3674e28a
PB
688
689 case OPTION_TARGET2:
68c39892 690 params.target2_type = optarg;
3674e28a 691 break;
319850b4
JB
692
693 case OPTION_FIX_V4BX:
68c39892 694 params.fix_v4bx = 1;
319850b4 695 break;
33bfe774 696
845b51d6 697 case OPTION_FIX_V4BX_INTERWORKING:
68c39892 698 params.fix_v4bx = 2;
845b51d6
PB
699 break;
700
33bfe774 701 case OPTION_USE_BLX:
68c39892 702 params.use_blx = 1;
33bfe774 703 break;
92b93329 704
c6dd86c6
JB
705 case OPTION_VFP11_DENORM_FIX:
706 if (strcmp (optarg, "none") == 0)
6c19b93b 707 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_NONE;
c6dd86c6 708 else if (strcmp (optarg, "scalar") == 0)
6c19b93b 709 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_SCALAR;
c6dd86c6 710 else if (strcmp (optarg, "vector") == 0)
6c19b93b 711 params.vfp11_denorm_fix = BFD_ARM_VFP11_FIX_VECTOR;
c6dd86c6 712 else
6c19b93b 713 einfo (_("Unrecognized VFP11 fix type '\''%s'\''.\n"), optarg);
c6dd86c6 714 break;
bf21ed78 715
a504d23a
LA
716 case OPTION_STM32L4XX_FIX:
717 if (!optarg)
6c19b93b 718 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 719 else if (strcmp (optarg, "none") == 0)
6c19b93b 720 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
a504d23a 721 else if (strcmp (optarg, "default") == 0)
6c19b93b 722 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_DEFAULT;
a504d23a 723 else if (strcmp (optarg, "all") == 0)
6c19b93b 724 params.stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_ALL;
a504d23a 725 else
6c19b93b 726 einfo (_("Unrecognized STM32L4XX fix type '\''%s'\''.\n"), optarg);
a504d23a
LA
727 break;
728
bf21ed78 729 case OPTION_NO_ENUM_SIZE_WARNING:
68c39892 730 params.no_enum_size_warning = 1;
bf21ed78 731 break;
27e55c4d 732
a9dc9481 733 case OPTION_NO_WCHAR_SIZE_WARNING:
68c39892 734 params.no_wchar_size_warning = 1;
a9dc9481
JM
735 break;
736
27e55c4d 737 case OPTION_PIC_VENEER:
68c39892 738 params.pic_veneer = 1;
27e55c4d 739 break;
906e58ca
NC
740
741 case OPTION_STUBGROUP_SIZE:
742 {
743 const char *end;
744
6c19b93b
AM
745 group_size = bfd_scan_vma (optarg, &end, 0);
746 if (*end)
906e58ca
NC
747 einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
748 }
749 break;
48229727
JB
750
751 case OPTION_FIX_CORTEX_A8:
68c39892 752 params.fix_cortex_a8 = 1;
48229727
JB
753 break;
754
755 case OPTION_NO_FIX_CORTEX_A8:
68c39892 756 params.fix_cortex_a8 = 0;
48229727 757 break;
85fdf906
AH
758
759 case OPTION_NO_MERGE_EXIDX_ENTRIES:
68c39892 760 params.merge_exidx_entries = 0;
2de70689 761 break;
85fdf906 762
2de70689 763 case OPTION_FIX_ARM1176:
68c39892 764 params.fix_arm1176 = 1;
2de70689
MGD
765 break;
766
767 case OPTION_NO_FIX_ARM1176:
68c39892 768 params.fix_arm1176 = 0;
2de70689 769 break;
1db37fe6
YG
770
771 case OPTION_LONG_PLT:
772 bfd_elf32_arm_use_long_plt ();
773 break;
54ddd295
TP
774
775 case OPTION_CMSE_IMPLIB:
68c39892 776 params.cmse_implib = 1;
54ddd295 777 break;
0955507f
TP
778
779 case OPTION_IN_IMPLIB:
780 in_implib_filename = optarg;
781 break;
41392f03 782'
252b5132 783
3e6b1042 784# We have our own before_allocation etc. functions, but they call
41392f03 785# the standard routines, so give them a different name.
41392f03 786LDEMUL_BEFORE_ALLOCATION=arm_elf_before_allocation
eaeb0a9d 787LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
3674e28a 788LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=arm_elf_create_output_section_statements
252b5132 789
41392f03
AM
790# Replace the elf before_parse function with our own.
791LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
3940d2c3 792LDEMUL_SET_SYMBOLS=gld"${EMULATION_NAME}"_set_symbols
252b5132 793
41392f03 794# Call the extra arm-elf function
906e58ca 795LDEMUL_FINISH=gld${EMULATION_NAME}_finish