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Commit | Line | Data |
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b5220bc6 SG |
1 | /* |
2 | * Copyright (c) 2011 The Chromium OS Authors. | |
1a459660 | 3 | * SPDX-License-Identifier: GPL-2.0+ |
b5220bc6 SG |
4 | */ |
5 | ||
29a23f9d | 6 | #ifndef USE_HOSTCC |
2059ecf3 | 7 | #include <boot_fit.h> |
b5220bc6 | 8 | #include <common.h> |
fcc0a877 | 9 | #include <dm.h> |
5c33c9fd | 10 | #include <errno.h> |
b5220bc6 SG |
11 | #include <serial.h> |
12 | #include <libfdt.h> | |
6e06acb7 | 13 | #include <fdt_support.h> |
b5220bc6 | 14 | #include <fdtdec.h> |
b45122fd | 15 | #include <asm/sections.h> |
b7e0d73b | 16 | #include <dm/of_extra.h> |
5c33c9fd | 17 | #include <linux/ctype.h> |
b5220bc6 SG |
18 | |
19 | DECLARE_GLOBAL_DATA_PTR; | |
20 | ||
21 | /* | |
22 | * Here are the type we know about. One day we might allow drivers to | |
23 | * register. For now we just put them here. The COMPAT macro allows us to | |
24 | * turn this into a sparse list later, and keeps the ID with the name. | |
01a227df SG |
25 | * |
26 | * NOTE: This list is basically a TODO list for things that need to be | |
27 | * converted to driver model. So don't add new things here unless there is a | |
28 | * good reason why driver-model conversion is infeasible. Examples include | |
29 | * things which are used before driver model is available. | |
b5220bc6 SG |
30 | */ |
31 | #define COMPAT(id, name) name | |
32 | static const char * const compat_names[COMPAT_COUNT] = { | |
f88fe2de | 33 | COMPAT(UNKNOWN, "<none>"), |
0e35ad05 JZ |
34 | COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), |
35 | COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), | |
312693c3 | 36 | COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), |
00f37327 | 37 | COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"), |
39f63332 | 38 | COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"), |
7aaa5a60 | 39 | COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"), |
a73ca478 | 40 | COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"), |
f4e4e0b0 | 41 | COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"), |
c9aa831e | 42 | COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"), |
79c7a90f | 43 | COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"), |
7aaa5a60 | 44 | COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), |
cc9fe33a HR |
45 | COMPAT(SMSC_LAN9215, "smsc,lan9215"), |
46 | COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"), | |
c34253d1 | 47 | COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"), |
72dbff12 RS |
48 | COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"), |
49 | COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"), | |
6abd1620 | 50 | COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), |
108b85be | 51 | COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"), |
618766c0 | 52 | COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), |
de461c52 | 53 | COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), |
7d3ca0f8 | 54 | COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), |
3577fe8b | 55 | COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"), |
f37df0f8 | 56 | COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"), |
bb8215f4 | 57 | COMPAT(GENERIC_SPI_FLASH, "spi-flash"), |
7772bb78 | 58 | COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"), |
ecbd7e1e | 59 | COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"), |
45c480c9 | 60 | COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), |
77f9b1fb | 61 | COMPAT(INTEL_MICROCODE, "intel,microcode"), |
6173c45b | 62 | COMPAT(AMS_AS3722, "ams,as3722"), |
c89ada01 | 63 | COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), |
6ab00db2 | 64 | COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), |
129adf5b | 65 | COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), |
ef4b01b2 | 66 | COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), |
39ea0ee9 SG |
67 | COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), |
68 | COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), | |
69 | COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), | |
4ccae81c | 70 | COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), |
e11b5e8d LFT |
71 | COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), |
72 | COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), | |
73 | COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), | |
74 | COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), | |
75 | COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), | |
76 | COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), | |
77 | COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), | |
78 | COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), | |
b5220bc6 SG |
79 | }; |
80 | ||
a53f4a29 SG |
81 | const char *fdtdec_get_compatible(enum fdt_compat_id id) |
82 | { | |
83 | /* We allow reading of the 'unknown' ID for testing purposes */ | |
84 | assert(id >= 0 && id < COMPAT_COUNT); | |
85 | return compat_names[id]; | |
86 | } | |
87 | ||
02464e38 SW |
88 | fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, |
89 | const char *prop_name, int index, int na, int ns, | |
6e06acb7 | 90 | fdt_size_t *sizep, bool translate) |
b5220bc6 | 91 | { |
02464e38 SW |
92 | const fdt32_t *prop, *prop_end; |
93 | const fdt32_t *prop_addr, *prop_size, *prop_after_size; | |
236efe36 | 94 | int len; |
02464e38 | 95 | fdt_addr_t addr; |
b5220bc6 | 96 | |
1cb2323b | 97 | debug("%s: %s: ", __func__, prop_name); |
02464e38 SW |
98 | |
99 | if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) { | |
100 | debug("(na too large for fdt_addr_t type)\n"); | |
101 | return FDT_ADDR_T_NONE; | |
102 | } | |
103 | ||
104 | if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) { | |
105 | debug("(ns too large for fdt_size_t type)\n"); | |
106 | return FDT_ADDR_T_NONE; | |
107 | } | |
108 | ||
109 | prop = fdt_getprop(blob, node, prop_name, &len); | |
110 | if (!prop) { | |
111 | debug("(not found)\n"); | |
112 | return FDT_ADDR_T_NONE; | |
113 | } | |
114 | prop_end = prop + (len / sizeof(*prop)); | |
115 | ||
116 | prop_addr = prop + (index * (na + ns)); | |
117 | prop_size = prop_addr + na; | |
118 | prop_after_size = prop_size + ns; | |
119 | if (prop_after_size > prop_end) { | |
120 | debug("(not enough data: expected >= %d cells, got %d cells)\n", | |
121 | (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); | |
122 | return FDT_ADDR_T_NONE; | |
123 | } | |
124 | ||
5efa1bfb | 125 | #if CONFIG_IS_ENABLED(OF_TRANSLATE) |
6e06acb7 SW |
126 | if (translate) |
127 | addr = fdt_translate_address(blob, node, prop_addr); | |
128 | else | |
129 | #endif | |
130 | addr = fdtdec_get_number(prop_addr, na); | |
02464e38 SW |
131 | |
132 | if (sizep) { | |
133 | *sizep = fdtdec_get_number(prop_size, ns); | |
fd30d2c6 SG |
134 | debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, |
135 | (unsigned long long)*sizep); | |
02464e38 | 136 | } else { |
fd30d2c6 | 137 | debug("addr=%08llx\n", (unsigned long long)addr); |
02464e38 SW |
138 | } |
139 | ||
140 | return addr; | |
141 | } | |
142 | ||
143 | fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, | |
6e06acb7 SW |
144 | int node, const char *prop_name, int index, fdt_size_t *sizep, |
145 | bool translate) | |
02464e38 SW |
146 | { |
147 | int na, ns; | |
148 | ||
149 | debug("%s: ", __func__); | |
150 | ||
151 | na = fdt_address_cells(blob, parent); | |
152 | if (na < 1) { | |
153 | debug("(bad #address-cells)\n"); | |
154 | return FDT_ADDR_T_NONE; | |
155 | } | |
156 | ||
157 | ns = fdt_size_cells(blob, parent); | |
ff0a6358 | 158 | if (ns < 0) { |
02464e38 SW |
159 | debug("(bad #size-cells)\n"); |
160 | return FDT_ADDR_T_NONE; | |
161 | } | |
162 | ||
163 | debug("na=%d, ns=%d, ", na, ns); | |
164 | ||
165 | return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, | |
6e06acb7 | 166 | ns, sizep, translate); |
02464e38 SW |
167 | } |
168 | ||
169 | fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, | |
6e06acb7 SW |
170 | const char *prop_name, int index, fdt_size_t *sizep, |
171 | bool translate) | |
02464e38 SW |
172 | { |
173 | int parent; | |
174 | ||
175 | debug("%s: ", __func__); | |
176 | ||
177 | parent = fdt_parent_offset(blob, node); | |
178 | if (parent < 0) { | |
179 | debug("(no parent found)\n"); | |
180 | return FDT_ADDR_T_NONE; | |
5b344360 | 181 | } |
02464e38 SW |
182 | |
183 | return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name, | |
6e06acb7 | 184 | index, sizep, translate); |
02464e38 SW |
185 | } |
186 | ||
187 | fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, | |
188 | const char *prop_name, fdt_size_t *sizep) | |
189 | { | |
d93b9a07 SW |
190 | int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; |
191 | ||
02464e38 SW |
192 | return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, |
193 | sizeof(fdt_addr_t) / sizeof(fdt32_t), | |
6e06acb7 | 194 | ns, sizep, false); |
b5220bc6 SG |
195 | } |
196 | ||
4397a2a8 SG |
197 | fdt_addr_t fdtdec_get_addr(const void *blob, int node, |
198 | const char *prop_name) | |
199 | { | |
200 | return fdtdec_get_addr_size(blob, node, prop_name, NULL); | |
201 | } | |
202 | ||
fcc0a877 | 203 | #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) |
a62e84d7 BM |
204 | int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, |
205 | const char *prop_name, struct fdt_pci_addr *addr) | |
206 | { | |
207 | const u32 *cell; | |
208 | int len; | |
209 | int ret = -ENOENT; | |
210 | ||
211 | debug("%s: %s: ", __func__, prop_name); | |
212 | ||
213 | /* | |
214 | * If we follow the pci bus bindings strictly, we should check | |
215 | * the value of the node's parent node's #address-cells and | |
216 | * #size-cells. They need to be 3 and 2 accordingly. However, | |
217 | * for simplicity we skip the check here. | |
218 | */ | |
219 | cell = fdt_getprop(blob, node, prop_name, &len); | |
220 | if (!cell) | |
221 | goto fail; | |
222 | ||
223 | if ((len % FDT_PCI_REG_SIZE) == 0) { | |
224 | int num = len / FDT_PCI_REG_SIZE; | |
225 | int i; | |
226 | ||
227 | for (i = 0; i < num; i++) { | |
228 | debug("pci address #%d: %08lx %08lx %08lx\n", i, | |
4ea5243a SW |
229 | (ulong)fdt32_to_cpu(cell[0]), |
230 | (ulong)fdt32_to_cpu(cell[1]), | |
231 | (ulong)fdt32_to_cpu(cell[2])); | |
232 | if ((fdt32_to_cpu(*cell) & type) == type) { | |
233 | addr->phys_hi = fdt32_to_cpu(cell[0]); | |
234 | addr->phys_mid = fdt32_to_cpu(cell[1]); | |
235 | addr->phys_lo = fdt32_to_cpu(cell[1]); | |
a62e84d7 BM |
236 | break; |
237 | } else { | |
238 | cell += (FDT_PCI_ADDR_CELLS + | |
239 | FDT_PCI_SIZE_CELLS); | |
240 | } | |
241 | } | |
242 | ||
106cce96 SG |
243 | if (i == num) { |
244 | ret = -ENXIO; | |
a62e84d7 | 245 | goto fail; |
106cce96 | 246 | } |
a62e84d7 BM |
247 | |
248 | return 0; | |
249 | } else { | |
250 | ret = -EINVAL; | |
251 | } | |
252 | ||
253 | fail: | |
254 | debug("(not found)\n"); | |
255 | return ret; | |
256 | } | |
257 | ||
258 | int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) | |
259 | { | |
260 | const char *list, *end; | |
261 | int len; | |
262 | ||
263 | list = fdt_getprop(blob, node, "compatible", &len); | |
264 | if (!list) | |
265 | return -ENOENT; | |
266 | ||
267 | end = list + len; | |
268 | while (list < end) { | |
269 | char *s; | |
270 | ||
271 | len = strlen(list); | |
272 | if (len >= strlen("pciVVVV,DDDD")) { | |
273 | s = strstr(list, "pci"); | |
274 | ||
275 | /* | |
276 | * check if the string is something like pciVVVV,DDDD.RR | |
277 | * or just pciVVVV,DDDD | |
278 | */ | |
279 | if (s && s[7] == ',' && | |
280 | (s[12] == '.' || s[12] == 0)) { | |
281 | s += 3; | |
282 | *vendor = simple_strtol(s, NULL, 16); | |
283 | ||
284 | s += 5; | |
285 | *device = simple_strtol(s, NULL, 16); | |
286 | ||
287 | return 0; | |
288 | } | |
a62e84d7 | 289 | } |
bc6351eb | 290 | list += (len + 1); |
a62e84d7 BM |
291 | } |
292 | ||
293 | return -ENOENT; | |
294 | } | |
295 | ||
fcc0a877 SG |
296 | int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr, |
297 | u32 *bar) | |
a62e84d7 | 298 | { |
a62e84d7 | 299 | int barnum; |
a62e84d7 BM |
300 | |
301 | /* extract the bar number from fdt_pci_addr */ | |
302 | barnum = addr->phys_hi & 0xff; | |
303 | if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS)) | |
304 | return -EINVAL; | |
305 | ||
306 | barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; | |
fcc0a877 | 307 | *bar = dm_pci_read_bar32(dev, barnum); |
a62e84d7 BM |
308 | |
309 | return 0; | |
310 | } | |
311 | #endif | |
312 | ||
aadef0a1 CLC |
313 | uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, |
314 | uint64_t default_val) | |
315 | { | |
316 | const uint64_t *cell64; | |
317 | int length; | |
318 | ||
319 | cell64 = fdt_getprop(blob, node, prop_name, &length); | |
320 | if (!cell64 || length < sizeof(*cell64)) | |
321 | return default_val; | |
322 | ||
323 | return fdt64_to_cpu(*cell64); | |
324 | } | |
325 | ||
f88fe2de | 326 | int fdtdec_get_is_enabled(const void *blob, int node) |
b5220bc6 SG |
327 | { |
328 | const char *cell; | |
329 | ||
f88fe2de SG |
330 | /* |
331 | * It should say "okay", so only allow that. Some fdts use "ok" but | |
332 | * this is a bug. Please fix your device tree source file. See here | |
333 | * for discussion: | |
334 | * | |
335 | * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html | |
336 | */ | |
b5220bc6 SG |
337 | cell = fdt_getprop(blob, node, "status", NULL); |
338 | if (cell) | |
f88fe2de SG |
339 | return 0 == strcmp(cell, "okay"); |
340 | return 1; | |
b5220bc6 SG |
341 | } |
342 | ||
7cde397b | 343 | enum fdt_compat_id fdtdec_lookup(const void *blob, int node) |
b5220bc6 SG |
344 | { |
345 | enum fdt_compat_id id; | |
346 | ||
347 | /* Search our drivers */ | |
348 | for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++) | |
349 | if (0 == fdt_node_check_compatible(blob, node, | |
350 | compat_names[id])) | |
351 | return id; | |
352 | return COMPAT_UNKNOWN; | |
353 | } | |
354 | ||
355 | int fdtdec_next_compatible(const void *blob, int node, | |
356 | enum fdt_compat_id id) | |
357 | { | |
358 | return fdt_node_offset_by_compatible(blob, node, compat_names[id]); | |
359 | } | |
360 | ||
3ddecfc7 SG |
361 | int fdtdec_next_compatible_subnode(const void *blob, int node, |
362 | enum fdt_compat_id id, int *depthp) | |
363 | { | |
364 | do { | |
365 | node = fdt_next_node(blob, node, depthp); | |
366 | } while (*depthp > 1); | |
367 | ||
368 | /* If this is a direct subnode, and compatible, return it */ | |
369 | if (*depthp == 1 && 0 == fdt_node_check_compatible( | |
370 | blob, node, compat_names[id])) | |
371 | return node; | |
372 | ||
373 | return -FDT_ERR_NOTFOUND; | |
374 | } | |
375 | ||
b5220bc6 SG |
376 | int fdtdec_next_alias(const void *blob, const char *name, |
377 | enum fdt_compat_id id, int *upto) | |
378 | { | |
379 | #define MAX_STR_LEN 20 | |
380 | char str[MAX_STR_LEN + 20]; | |
381 | int node, err; | |
382 | ||
383 | /* snprintf() is not available */ | |
384 | assert(strlen(name) < MAX_STR_LEN); | |
385 | sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto); | |
00878476 | 386 | node = fdt_path_offset(blob, str); |
b5220bc6 SG |
387 | if (node < 0) |
388 | return node; | |
389 | err = fdt_node_check_compatible(blob, node, compat_names[id]); | |
390 | if (err < 0) | |
391 | return err; | |
f88fe2de SG |
392 | if (err) |
393 | return -FDT_ERR_NOTFOUND; | |
394 | (*upto)++; | |
395 | return node; | |
b5220bc6 SG |
396 | } |
397 | ||
a53f4a29 SG |
398 | int fdtdec_find_aliases_for_id(const void *blob, const char *name, |
399 | enum fdt_compat_id id, int *node_list, int maxcount) | |
c6782270 SG |
400 | { |
401 | memset(node_list, '\0', sizeof(*node_list) * maxcount); | |
402 | ||
403 | return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount); | |
404 | } | |
405 | ||
406 | /* TODO: Can we tighten this code up a little? */ | |
407 | int fdtdec_add_aliases_for_id(const void *blob, const char *name, | |
408 | enum fdt_compat_id id, int *node_list, int maxcount) | |
a53f4a29 SG |
409 | { |
410 | int name_len = strlen(name); | |
411 | int nodes[maxcount]; | |
412 | int num_found = 0; | |
413 | int offset, node; | |
414 | int alias_node; | |
415 | int count; | |
416 | int i, j; | |
417 | ||
418 | /* find the alias node if present */ | |
419 | alias_node = fdt_path_offset(blob, "/aliases"); | |
420 | ||
421 | /* | |
422 | * start with nothing, and we can assume that the root node can't | |
423 | * match | |
424 | */ | |
425 | memset(nodes, '\0', sizeof(nodes)); | |
426 | ||
427 | /* First find all the compatible nodes */ | |
428 | for (node = count = 0; node >= 0 && count < maxcount;) { | |
429 | node = fdtdec_next_compatible(blob, node, id); | |
430 | if (node >= 0) | |
431 | nodes[count++] = node; | |
432 | } | |
433 | if (node >= 0) | |
434 | debug("%s: warning: maxcount exceeded with alias '%s'\n", | |
435 | __func__, name); | |
436 | ||
437 | /* Now find all the aliases */ | |
a53f4a29 SG |
438 | for (offset = fdt_first_property_offset(blob, alias_node); |
439 | offset > 0; | |
440 | offset = fdt_next_property_offset(blob, offset)) { | |
441 | const struct fdt_property *prop; | |
442 | const char *path; | |
443 | int number; | |
444 | int found; | |
445 | ||
446 | node = 0; | |
447 | prop = fdt_get_property_by_offset(blob, offset, NULL); | |
448 | path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); | |
449 | if (prop->len && 0 == strncmp(path, name, name_len)) | |
450 | node = fdt_path_offset(blob, prop->data); | |
451 | if (node <= 0) | |
452 | continue; | |
453 | ||
454 | /* Get the alias number */ | |
455 | number = simple_strtoul(path + name_len, NULL, 10); | |
456 | if (number < 0 || number >= maxcount) { | |
457 | debug("%s: warning: alias '%s' is out of range\n", | |
458 | __func__, path); | |
459 | continue; | |
460 | } | |
461 | ||
462 | /* Make sure the node we found is actually in our list! */ | |
463 | found = -1; | |
464 | for (j = 0; j < count; j++) | |
465 | if (nodes[j] == node) { | |
466 | found = j; | |
467 | break; | |
468 | } | |
469 | ||
470 | if (found == -1) { | |
471 | debug("%s: warning: alias '%s' points to a node " | |
472 | "'%s' that is missing or is not compatible " | |
473 | " with '%s'\n", __func__, path, | |
474 | fdt_get_name(blob, node, NULL), | |
475 | compat_names[id]); | |
476 | continue; | |
477 | } | |
478 | ||
479 | /* | |
480 | * Add this node to our list in the right place, and mark | |
481 | * it as done. | |
482 | */ | |
483 | if (fdtdec_get_is_enabled(blob, node)) { | |
c6782270 SG |
484 | if (node_list[number]) { |
485 | debug("%s: warning: alias '%s' requires that " | |
486 | "a node be placed in the list in a " | |
487 | "position which is already filled by " | |
488 | "node '%s'\n", __func__, path, | |
489 | fdt_get_name(blob, node, NULL)); | |
490 | continue; | |
491 | } | |
a53f4a29 SG |
492 | node_list[number] = node; |
493 | if (number >= num_found) | |
494 | num_found = number + 1; | |
495 | } | |
c6782270 | 496 | nodes[found] = 0; |
a53f4a29 SG |
497 | } |
498 | ||
499 | /* Add any nodes not mentioned by an alias */ | |
500 | for (i = j = 0; i < maxcount; i++) { | |
501 | if (!node_list[i]) { | |
502 | for (; j < maxcount; j++) | |
503 | if (nodes[j] && | |
504 | fdtdec_get_is_enabled(blob, nodes[j])) | |
505 | break; | |
506 | ||
507 | /* Have we run out of nodes to add? */ | |
508 | if (j == maxcount) | |
509 | break; | |
510 | ||
511 | assert(!node_list[i]); | |
512 | node_list[i] = nodes[j++]; | |
513 | if (i >= num_found) | |
514 | num_found = i + 1; | |
515 | } | |
516 | } | |
517 | ||
518 | return num_found; | |
519 | } | |
520 | ||
5c33c9fd SG |
521 | int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, |
522 | int *seqp) | |
523 | { | |
524 | int base_len = strlen(base); | |
525 | const char *find_name; | |
526 | int find_namelen; | |
527 | int prop_offset; | |
528 | int aliases; | |
529 | ||
530 | find_name = fdt_get_name(blob, offset, &find_namelen); | |
531 | debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); | |
532 | ||
533 | aliases = fdt_path_offset(blob, "/aliases"); | |
534 | for (prop_offset = fdt_first_property_offset(blob, aliases); | |
535 | prop_offset > 0; | |
536 | prop_offset = fdt_next_property_offset(blob, prop_offset)) { | |
537 | const char *prop; | |
538 | const char *name; | |
539 | const char *slash; | |
c4af6732 | 540 | int len, val; |
5c33c9fd SG |
541 | |
542 | prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); | |
543 | debug(" - %s, %s\n", name, prop); | |
544 | if (len < find_namelen || *prop != '/' || prop[len - 1] || | |
545 | strncmp(name, base, base_len)) | |
546 | continue; | |
547 | ||
548 | slash = strrchr(prop, '/'); | |
549 | if (strcmp(slash + 1, find_name)) | |
550 | continue; | |
c4af6732 SG |
551 | val = trailing_strtol(name); |
552 | if (val != -1) { | |
553 | *seqp = val; | |
554 | debug("Found seq %d\n", *seqp); | |
555 | return 0; | |
5c33c9fd SG |
556 | } |
557 | } | |
558 | ||
559 | debug("Not found\n"); | |
560 | return -ENOENT; | |
561 | } | |
562 | ||
3bc37a50 | 563 | const char *fdtdec_get_chosen_prop(const void *blob, const char *name) |
aac07d49 | 564 | { |
aac07d49 | 565 | int chosen_node; |
aac07d49 SG |
566 | |
567 | if (!blob) | |
3bc37a50 | 568 | return NULL; |
aac07d49 | 569 | chosen_node = fdt_path_offset(blob, "/chosen"); |
3bc37a50 SG |
570 | return fdt_getprop(blob, chosen_node, name, NULL); |
571 | } | |
572 | ||
573 | int fdtdec_get_chosen_node(const void *blob, const char *name) | |
574 | { | |
575 | const char *prop; | |
576 | ||
577 | prop = fdtdec_get_chosen_prop(blob, name); | |
aac07d49 SG |
578 | if (!prop) |
579 | return -FDT_ERR_NOTFOUND; | |
580 | return fdt_path_offset(blob, prop); | |
581 | } | |
582 | ||
9a263e55 SG |
583 | int fdtdec_check_fdt(void) |
584 | { | |
585 | /* | |
586 | * We must have an FDT, but we cannot panic() yet since the console | |
587 | * is not ready. So for now, just assert(). Boards which need an early | |
588 | * FDT (prior to console ready) will need to make their own | |
589 | * arrangements and do their own checks. | |
590 | */ | |
591 | assert(!fdtdec_prepare_fdt()); | |
592 | return 0; | |
593 | } | |
594 | ||
b5220bc6 SG |
595 | /* |
596 | * This function is a little odd in that it accesses global data. At some | |
597 | * point if the architecture board.c files merge this will make more sense. | |
598 | * Even now, it is common code. | |
599 | */ | |
9a263e55 | 600 | int fdtdec_prepare_fdt(void) |
b5220bc6 | 601 | { |
c309c2da SG |
602 | if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) || |
603 | fdt_check_header(gd->fdt_blob)) { | |
66312374 SG |
604 | #ifdef CONFIG_SPL_BUILD |
605 | puts("Missing DTB\n"); | |
606 | #else | |
607 | puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n"); | |
cb5f97f7 SG |
608 | # ifdef DEBUG |
609 | if (gd->fdt_blob) { | |
610 | printf("fdt_blob=%p\n", gd->fdt_blob); | |
611 | print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4, | |
612 | 32, 0); | |
613 | } | |
614 | # endif | |
66312374 | 615 | #endif |
9a263e55 SG |
616 | return -1; |
617 | } | |
b5220bc6 SG |
618 | return 0; |
619 | } | |
d17da655 SG |
620 | |
621 | int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) | |
622 | { | |
623 | const u32 *phandle; | |
624 | int lookup; | |
625 | ||
1cb2323b | 626 | debug("%s: %s\n", __func__, prop_name); |
d17da655 SG |
627 | phandle = fdt_getprop(blob, node, prop_name, NULL); |
628 | if (!phandle) | |
629 | return -FDT_ERR_NOTFOUND; | |
630 | ||
631 | lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle)); | |
632 | return lookup; | |
633 | } | |
634 | ||
635 | /** | |
636 | * Look up a property in a node and check that it has a minimum length. | |
637 | * | |
638 | * @param blob FDT blob | |
639 | * @param node node to examine | |
640 | * @param prop_name name of property to find | |
641 | * @param min_len minimum property length in bytes | |
642 | * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not | |
643 | found, or -FDT_ERR_BADLAYOUT if not enough data | |
644 | * @return pointer to cell, which is only valid if err == 0 | |
645 | */ | |
646 | static const void *get_prop_check_min_len(const void *blob, int node, | |
647 | const char *prop_name, int min_len, int *err) | |
648 | { | |
649 | const void *cell; | |
650 | int len; | |
651 | ||
652 | debug("%s: %s\n", __func__, prop_name); | |
653 | cell = fdt_getprop(blob, node, prop_name, &len); | |
654 | if (!cell) | |
655 | *err = -FDT_ERR_NOTFOUND; | |
656 | else if (len < min_len) | |
657 | *err = -FDT_ERR_BADLAYOUT; | |
658 | else | |
659 | *err = 0; | |
660 | return cell; | |
661 | } | |
662 | ||
663 | int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, | |
664 | u32 *array, int count) | |
665 | { | |
666 | const u32 *cell; | |
667 | int i, err = 0; | |
668 | ||
669 | debug("%s: %s\n", __func__, prop_name); | |
670 | cell = get_prop_check_min_len(blob, node, prop_name, | |
671 | sizeof(u32) * count, &err); | |
672 | if (!err) { | |
673 | for (i = 0; i < count; i++) | |
674 | array[i] = fdt32_to_cpu(cell[i]); | |
675 | } | |
676 | return err; | |
677 | } | |
678 | ||
a9f04d49 SG |
679 | int fdtdec_get_int_array_count(const void *blob, int node, |
680 | const char *prop_name, u32 *array, int count) | |
681 | { | |
682 | const u32 *cell; | |
683 | int len, elems; | |
684 | int i; | |
685 | ||
686 | debug("%s: %s\n", __func__, prop_name); | |
687 | cell = fdt_getprop(blob, node, prop_name, &len); | |
688 | if (!cell) | |
689 | return -FDT_ERR_NOTFOUND; | |
690 | elems = len / sizeof(u32); | |
691 | if (count > elems) | |
692 | count = elems; | |
693 | for (i = 0; i < count; i++) | |
694 | array[i] = fdt32_to_cpu(cell[i]); | |
695 | ||
696 | return count; | |
697 | } | |
698 | ||
96875e7d SG |
699 | const u32 *fdtdec_locate_array(const void *blob, int node, |
700 | const char *prop_name, int count) | |
701 | { | |
702 | const u32 *cell; | |
703 | int err; | |
704 | ||
705 | cell = get_prop_check_min_len(blob, node, prop_name, | |
706 | sizeof(u32) * count, &err); | |
707 | return err ? NULL : cell; | |
708 | } | |
709 | ||
d17da655 SG |
710 | int fdtdec_get_bool(const void *blob, int node, const char *prop_name) |
711 | { | |
712 | const s32 *cell; | |
713 | int len; | |
714 | ||
715 | debug("%s: %s\n", __func__, prop_name); | |
716 | cell = fdt_getprop(blob, node, prop_name, &len); | |
717 | return cell != NULL; | |
718 | } | |
ed3ee5cd | 719 | |
57068a7a SG |
720 | int fdtdec_parse_phandle_with_args(const void *blob, int src_node, |
721 | const char *list_name, | |
722 | const char *cells_name, | |
723 | int cell_count, int index, | |
724 | struct fdtdec_phandle_args *out_args) | |
725 | { | |
726 | const __be32 *list, *list_end; | |
727 | int rc = 0, size, cur_index = 0; | |
728 | uint32_t count = 0; | |
729 | int node = -1; | |
730 | int phandle; | |
731 | ||
732 | /* Retrieve the phandle list property */ | |
733 | list = fdt_getprop(blob, src_node, list_name, &size); | |
734 | if (!list) | |
735 | return -ENOENT; | |
736 | list_end = list + size / sizeof(*list); | |
737 | ||
738 | /* Loop over the phandles until all the requested entry is found */ | |
739 | while (list < list_end) { | |
740 | rc = -EINVAL; | |
741 | count = 0; | |
742 | ||
743 | /* | |
744 | * If phandle is 0, then it is an empty entry with no | |
745 | * arguments. Skip forward to the next entry. | |
746 | */ | |
747 | phandle = be32_to_cpup(list++); | |
748 | if (phandle) { | |
749 | /* | |
750 | * Find the provider node and parse the #*-cells | |
751 | * property to determine the argument length. | |
752 | * | |
753 | * This is not needed if the cell count is hard-coded | |
754 | * (i.e. cells_name not set, but cell_count is set), | |
755 | * except when we're going to return the found node | |
756 | * below. | |
757 | */ | |
758 | if (cells_name || cur_index == index) { | |
759 | node = fdt_node_offset_by_phandle(blob, | |
760 | phandle); | |
761 | if (!node) { | |
762 | debug("%s: could not find phandle\n", | |
763 | fdt_get_name(blob, src_node, | |
764 | NULL)); | |
765 | goto err; | |
766 | } | |
767 | } | |
768 | ||
769 | if (cells_name) { | |
770 | count = fdtdec_get_int(blob, node, cells_name, | |
771 | -1); | |
772 | if (count == -1) { | |
773 | debug("%s: could not get %s for %s\n", | |
774 | fdt_get_name(blob, src_node, | |
775 | NULL), | |
776 | cells_name, | |
777 | fdt_get_name(blob, node, | |
778 | NULL)); | |
779 | goto err; | |
780 | } | |
781 | } else { | |
782 | count = cell_count; | |
783 | } | |
784 | ||
785 | /* | |
786 | * Make sure that the arguments actually fit in the | |
787 | * remaining property data length | |
788 | */ | |
789 | if (list + count > list_end) { | |
790 | debug("%s: arguments longer than property\n", | |
791 | fdt_get_name(blob, src_node, NULL)); | |
792 | goto err; | |
793 | } | |
794 | } | |
795 | ||
796 | /* | |
797 | * All of the error cases above bail out of the loop, so at | |
798 | * this point, the parsing is successful. If the requested | |
799 | * index matches, then fill the out_args structure and return, | |
800 | * or return -ENOENT for an empty entry. | |
801 | */ | |
802 | rc = -ENOENT; | |
803 | if (cur_index == index) { | |
804 | if (!phandle) | |
805 | goto err; | |
806 | ||
807 | if (out_args) { | |
808 | int i; | |
809 | ||
810 | if (count > MAX_PHANDLE_ARGS) { | |
811 | debug("%s: too many arguments %d\n", | |
812 | fdt_get_name(blob, src_node, | |
813 | NULL), count); | |
814 | count = MAX_PHANDLE_ARGS; | |
815 | } | |
816 | out_args->node = node; | |
817 | out_args->args_count = count; | |
818 | for (i = 0; i < count; i++) { | |
819 | out_args->args[i] = | |
820 | be32_to_cpup(list++); | |
821 | } | |
822 | } | |
823 | ||
824 | /* Found it! return success */ | |
825 | return 0; | |
826 | } | |
827 | ||
828 | node = -1; | |
829 | list += count; | |
830 | cur_index++; | |
831 | } | |
832 | ||
833 | /* | |
834 | * Result will be one of: | |
835 | * -ENOENT : index is for empty phandle | |
836 | * -EINVAL : parsing error on data | |
837 | * [1..n] : Number of phandle (count mode; when index = -1) | |
838 | */ | |
839 | rc = index < 0 ? cur_index : -ENOENT; | |
840 | err: | |
841 | return rc; | |
842 | } | |
843 | ||
1889a7e2 PF |
844 | int fdtdec_get_child_count(const void *blob, int node) |
845 | { | |
846 | int subnode; | |
847 | int num = 0; | |
848 | ||
df87e6b1 | 849 | fdt_for_each_subnode(subnode, blob, node) |
1889a7e2 PF |
850 | num++; |
851 | ||
852 | return num; | |
853 | } | |
854 | ||
bed4d892 AS |
855 | int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, |
856 | u8 *array, int count) | |
857 | { | |
858 | const u8 *cell; | |
859 | int err; | |
860 | ||
861 | cell = get_prop_check_min_len(blob, node, prop_name, count, &err); | |
862 | if (!err) | |
863 | memcpy(array, cell, count); | |
864 | return err; | |
865 | } | |
866 | ||
867 | const u8 *fdtdec_locate_byte_array(const void *blob, int node, | |
868 | const char *prop_name, int count) | |
869 | { | |
870 | const u8 *cell; | |
871 | int err; | |
872 | ||
873 | cell = get_prop_check_min_len(blob, node, prop_name, count, &err); | |
874 | if (err) | |
875 | return NULL; | |
876 | return cell; | |
877 | } | |
09258f1e | 878 | |
09258f1e AK |
879 | int fdtdec_get_config_int(const void *blob, const char *prop_name, |
880 | int default_val) | |
881 | { | |
882 | int config_node; | |
883 | ||
884 | debug("%s: %s\n", __func__, prop_name); | |
885 | config_node = fdt_path_offset(blob, "/config"); | |
886 | if (config_node < 0) | |
887 | return default_val; | |
888 | return fdtdec_get_int(blob, config_node, prop_name, default_val); | |
889 | } | |
332ab0d5 | 890 | |
79289c0b GB |
891 | int fdtdec_get_config_bool(const void *blob, const char *prop_name) |
892 | { | |
893 | int config_node; | |
894 | const void *prop; | |
895 | ||
896 | debug("%s: %s\n", __func__, prop_name); | |
897 | config_node = fdt_path_offset(blob, "/config"); | |
898 | if (config_node < 0) | |
899 | return 0; | |
900 | prop = fdt_get_property(blob, config_node, prop_name, NULL); | |
901 | ||
902 | return prop != NULL; | |
903 | } | |
904 | ||
332ab0d5 SG |
905 | char *fdtdec_get_config_string(const void *blob, const char *prop_name) |
906 | { | |
907 | const char *nodep; | |
908 | int nodeoffset; | |
909 | int len; | |
910 | ||
911 | debug("%s: %s\n", __func__, prop_name); | |
912 | nodeoffset = fdt_path_offset(blob, "/config"); | |
913 | if (nodeoffset < 0) | |
914 | return NULL; | |
915 | ||
916 | nodep = fdt_getprop(blob, nodeoffset, prop_name, &len); | |
917 | if (!nodep) | |
918 | return NULL; | |
919 | ||
920 | return (char *)nodep; | |
921 | } | |
f20c4619 | 922 | |
76489832 SG |
923 | int fdtdec_decode_region(const void *blob, int node, const char *prop_name, |
924 | fdt_addr_t *basep, fdt_size_t *sizep) | |
f20c4619 SG |
925 | { |
926 | const fdt_addr_t *cell; | |
927 | int len; | |
928 | ||
76489832 SG |
929 | debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL), |
930 | prop_name); | |
f20c4619 | 931 | cell = fdt_getprop(blob, node, prop_name, &len); |
76489832 SG |
932 | if (!cell || (len < sizeof(fdt_addr_t) * 2)) { |
933 | debug("cell=%p, len=%d\n", cell, len); | |
f20c4619 | 934 | return -1; |
76489832 SG |
935 | } |
936 | ||
937 | *basep = fdt_addr_to_cpu(*cell); | |
938 | *sizep = fdt_size_to_cpu(cell[1]); | |
939 | debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep, | |
940 | (ulong)*sizep); | |
f20c4619 | 941 | |
f20c4619 SG |
942 | return 0; |
943 | } | |
006e73b9 | 944 | |
5f7bfdd6 | 945 | u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) |
56f42242 TR |
946 | { |
947 | u64 number = 0; | |
948 | ||
949 | while (cells--) | |
950 | number = (number << 32) | fdt32_to_cpu(*ptr++); | |
951 | ||
952 | return number; | |
953 | } | |
954 | ||
955 | int fdt_get_resource(const void *fdt, int node, const char *property, | |
956 | unsigned int index, struct fdt_resource *res) | |
957 | { | |
958 | const fdt32_t *ptr, *end; | |
959 | int na, ns, len, parent; | |
960 | unsigned int i = 0; | |
961 | ||
962 | parent = fdt_parent_offset(fdt, node); | |
963 | if (parent < 0) | |
964 | return parent; | |
965 | ||
966 | na = fdt_address_cells(fdt, parent); | |
967 | ns = fdt_size_cells(fdt, parent); | |
968 | ||
969 | ptr = fdt_getprop(fdt, node, property, &len); | |
970 | if (!ptr) | |
971 | return len; | |
972 | ||
973 | end = ptr + len / sizeof(*ptr); | |
974 | ||
975 | while (ptr + na + ns <= end) { | |
976 | if (i == index) { | |
977 | res->start = res->end = fdtdec_get_number(ptr, na); | |
978 | res->end += fdtdec_get_number(&ptr[na], ns) - 1; | |
979 | return 0; | |
980 | } | |
981 | ||
982 | ptr += na + ns; | |
983 | i++; | |
984 | } | |
985 | ||
986 | return -FDT_ERR_NOTFOUND; | |
987 | } | |
988 | ||
989 | int fdt_get_named_resource(const void *fdt, int node, const char *property, | |
990 | const char *prop_names, const char *name, | |
991 | struct fdt_resource *res) | |
992 | { | |
993 | int index; | |
994 | ||
b02e4044 | 995 | index = fdt_stringlist_search(fdt, node, prop_names, name); |
56f42242 TR |
996 | if (index < 0) |
997 | return index; | |
998 | ||
999 | return fdt_get_resource(fdt, node, property, index, res); | |
1000 | } | |
9f85eee7 | 1001 | |
26403871 SG |
1002 | int fdtdec_decode_memory_region(const void *blob, int config_node, |
1003 | const char *mem_type, const char *suffix, | |
1004 | fdt_addr_t *basep, fdt_size_t *sizep) | |
1005 | { | |
1006 | char prop_name[50]; | |
1007 | const char *mem; | |
1008 | fdt_size_t size, offset_size; | |
1009 | fdt_addr_t base, offset; | |
1010 | int node; | |
1011 | ||
1012 | if (config_node == -1) { | |
1013 | config_node = fdt_path_offset(blob, "/config"); | |
1014 | if (config_node < 0) { | |
1015 | debug("%s: Cannot find /config node\n", __func__); | |
1016 | return -ENOENT; | |
1017 | } | |
1018 | } | |
1019 | if (!suffix) | |
1020 | suffix = ""; | |
1021 | ||
1022 | snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type, | |
1023 | suffix); | |
1024 | mem = fdt_getprop(blob, config_node, prop_name, NULL); | |
1025 | if (!mem) { | |
1026 | debug("%s: No memory type for '%s', using /memory\n", __func__, | |
1027 | prop_name); | |
1028 | mem = "/memory"; | |
1029 | } | |
1030 | ||
1031 | node = fdt_path_offset(blob, mem); | |
1032 | if (node < 0) { | |
1033 | debug("%s: Failed to find node '%s': %s\n", __func__, mem, | |
1034 | fdt_strerror(node)); | |
1035 | return -ENOENT; | |
1036 | } | |
1037 | ||
1038 | /* | |
1039 | * Not strictly correct - the memory may have multiple banks. We just | |
1040 | * use the first | |
1041 | */ | |
1042 | if (fdtdec_decode_region(blob, node, "reg", &base, &size)) { | |
1043 | debug("%s: Failed to decode memory region %s\n", __func__, | |
1044 | mem); | |
1045 | return -EINVAL; | |
1046 | } | |
1047 | ||
1048 | snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type, | |
1049 | suffix); | |
1050 | if (fdtdec_decode_region(blob, config_node, prop_name, &offset, | |
1051 | &offset_size)) { | |
1052 | debug("%s: Failed to decode memory region '%s'\n", __func__, | |
1053 | prop_name); | |
1054 | return -EINVAL; | |
1055 | } | |
1056 | ||
1057 | *basep = base + offset; | |
1058 | *sizep = offset_size; | |
1059 | ||
1060 | return 0; | |
1061 | } | |
b45122fd | 1062 | |
12e67114 SG |
1063 | static int decode_timing_property(const void *blob, int node, const char *name, |
1064 | struct timing_entry *result) | |
1065 | { | |
1066 | int length, ret = 0; | |
1067 | const u32 *prop; | |
1068 | ||
1069 | prop = fdt_getprop(blob, node, name, &length); | |
1070 | if (!prop) { | |
1071 | debug("%s: could not find property %s\n", | |
1072 | fdt_get_name(blob, node, NULL), name); | |
1073 | return length; | |
1074 | } | |
1075 | ||
1076 | if (length == sizeof(u32)) { | |
1077 | result->typ = fdtdec_get_int(blob, node, name, 0); | |
1078 | result->min = result->typ; | |
1079 | result->max = result->typ; | |
1080 | } else { | |
1081 | ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); | |
1082 | } | |
1083 | ||
1084 | return ret; | |
1085 | } | |
1086 | ||
1087 | int fdtdec_decode_display_timing(const void *blob, int parent, int index, | |
1088 | struct display_timing *dt) | |
1089 | { | |
1090 | int i, node, timings_node; | |
1091 | u32 val = 0; | |
1092 | int ret = 0; | |
1093 | ||
1094 | timings_node = fdt_subnode_offset(blob, parent, "display-timings"); | |
1095 | if (timings_node < 0) | |
1096 | return timings_node; | |
1097 | ||
1098 | for (i = 0, node = fdt_first_subnode(blob, timings_node); | |
1099 | node > 0 && i != index; | |
1100 | node = fdt_next_subnode(blob, node)) | |
1101 | i++; | |
1102 | ||
1103 | if (node < 0) | |
1104 | return node; | |
1105 | ||
1106 | memset(dt, 0, sizeof(*dt)); | |
1107 | ||
1108 | ret |= decode_timing_property(blob, node, "hback-porch", | |
1109 | &dt->hback_porch); | |
1110 | ret |= decode_timing_property(blob, node, "hfront-porch", | |
1111 | &dt->hfront_porch); | |
1112 | ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); | |
1113 | ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); | |
1114 | ret |= decode_timing_property(blob, node, "vback-porch", | |
1115 | &dt->vback_porch); | |
1116 | ret |= decode_timing_property(blob, node, "vfront-porch", | |
1117 | &dt->vfront_porch); | |
1118 | ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); | |
1119 | ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); | |
1120 | ret |= decode_timing_property(blob, node, "clock-frequency", | |
1121 | &dt->pixelclock); | |
1122 | ||
1123 | dt->flags = 0; | |
1124 | val = fdtdec_get_int(blob, node, "vsync-active", -1); | |
1125 | if (val != -1) { | |
1126 | dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : | |
1127 | DISPLAY_FLAGS_VSYNC_LOW; | |
1128 | } | |
1129 | val = fdtdec_get_int(blob, node, "hsync-active", -1); | |
1130 | if (val != -1) { | |
1131 | dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : | |
1132 | DISPLAY_FLAGS_HSYNC_LOW; | |
1133 | } | |
1134 | val = fdtdec_get_int(blob, node, "de-active", -1); | |
1135 | if (val != -1) { | |
1136 | dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : | |
1137 | DISPLAY_FLAGS_DE_LOW; | |
1138 | } | |
1139 | val = fdtdec_get_int(blob, node, "pixelclk-active", -1); | |
1140 | if (val != -1) { | |
1141 | dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : | |
1142 | DISPLAY_FLAGS_PIXDATA_NEGEDGE; | |
1143 | } | |
1144 | ||
1145 | if (fdtdec_get_bool(blob, node, "interlaced")) | |
1146 | dt->flags |= DISPLAY_FLAGS_INTERLACED; | |
1147 | if (fdtdec_get_bool(blob, node, "doublescan")) | |
1148 | dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; | |
1149 | if (fdtdec_get_bool(blob, node, "doubleclk")) | |
1150 | dt->flags |= DISPLAY_FLAGS_DOUBLECLK; | |
1151 | ||
04b9dd10 | 1152 | return ret; |
12e67114 SG |
1153 | } |
1154 | ||
623f6019 NR |
1155 | int fdtdec_setup_memory_size(void) |
1156 | { | |
1157 | int ret, mem; | |
1158 | struct fdt_resource res; | |
1159 | ||
1160 | mem = fdt_path_offset(gd->fdt_blob, "/memory"); | |
1161 | if (mem < 0) { | |
1162 | debug("%s: Missing /memory node\n", __func__); | |
1163 | return -EINVAL; | |
1164 | } | |
1165 | ||
1166 | ret = fdt_get_resource(gd->fdt_blob, mem, "reg", 0, &res); | |
1167 | if (ret != 0) { | |
1168 | debug("%s: Unable to decode first memory bank\n", __func__); | |
1169 | return -EINVAL; | |
1170 | } | |
1171 | ||
1172 | gd->ram_size = (phys_size_t)(res.end - res.start + 1); | |
c69380f8 SG |
1173 | debug("%s: Initial DRAM size %llx\n", __func__, |
1174 | (unsigned long long)gd->ram_size); | |
623f6019 NR |
1175 | |
1176 | return 0; | |
1177 | } | |
1178 | ||
1179 | #if defined(CONFIG_NR_DRAM_BANKS) | |
1180 | int fdtdec_setup_memory_banksize(void) | |
1181 | { | |
1182 | int bank, ret, mem; | |
1183 | struct fdt_resource res; | |
1184 | ||
1185 | mem = fdt_path_offset(gd->fdt_blob, "/memory"); | |
1186 | if (mem < 0) { | |
1187 | debug("%s: Missing /memory node\n", __func__); | |
1188 | return -EINVAL; | |
1189 | } | |
1190 | ||
1191 | for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { | |
1192 | ret = fdt_get_resource(gd->fdt_blob, mem, "reg", bank, &res); | |
1193 | if (ret == -FDT_ERR_NOTFOUND) | |
1194 | break; | |
1195 | if (ret != 0) | |
1196 | return -EINVAL; | |
1197 | ||
1198 | gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; | |
1199 | gd->bd->bi_dram[bank].size = | |
1200 | (phys_size_t)(res.end - res.start + 1); | |
1201 | ||
1202 | debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", | |
1203 | __func__, bank, | |
1204 | (unsigned long long)gd->bd->bi_dram[bank].start, | |
1205 | (unsigned long long)gd->bd->bi_dram[bank].size); | |
1206 | } | |
1207 | ||
1208 | return 0; | |
1209 | } | |
1210 | #endif | |
1211 | ||
0879361f | 1212 | int fdtdec_setup(void) |
b45122fd | 1213 | { |
0f925822 | 1214 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
b45122fd SG |
1215 | # ifdef CONFIG_OF_EMBED |
1216 | /* Get a pointer to the FDT */ | |
1217 | gd->fdt_blob = __dtb_dt_begin; | |
1218 | # elif defined CONFIG_OF_SEPARATE | |
1219 | # ifdef CONFIG_SPL_BUILD | |
10172962 SG |
1220 | /* FDT is at end of BSS unless it is in a different memory region */ |
1221 | if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) | |
1222 | gd->fdt_blob = (ulong *)&_image_binary_end; | |
1223 | else | |
1224 | gd->fdt_blob = (ulong *)&__bss_end; | |
2059ecf3 CJF |
1225 | |
1226 | # elif defined CONFIG_FIT_EMBED | |
1227 | gd->fdt_blob = locate_dtb_in_fit(&_end); | |
1228 | ||
1229 | if (gd->fdt_blob == NULL || gd->fdt_blob <= ((void *)&_end)) { | |
1230 | puts("Failed to find proper dtb in embedded FIT Image\n"); | |
1231 | return -1; | |
1232 | } | |
1233 | ||
b45122fd SG |
1234 | # else |
1235 | /* FDT is at end of image */ | |
1236 | gd->fdt_blob = (ulong *)&_end; | |
3bd926cc | 1237 | # endif |
82f766d1 AD |
1238 | # elif defined(CONFIG_OF_BOARD) |
1239 | /* Allow the board to override the fdt address. */ | |
1240 | gd->fdt_blob = board_fdt_blob_setup(); | |
b45122fd SG |
1241 | # elif defined(CONFIG_OF_HOSTFILE) |
1242 | if (sandbox_read_fdt_from_file()) { | |
1243 | puts("Failed to read control FDT\n"); | |
1244 | return -1; | |
1245 | } | |
1246 | # endif | |
1247 | # ifndef CONFIG_SPL_BUILD | |
1248 | /* Allow the early environment to override the fdt address */ | |
1249 | gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, | |
1250 | (uintptr_t)gd->fdt_blob); | |
1251 | # endif | |
29a23f9d | 1252 | #endif |
0879361f | 1253 | return fdtdec_prepare_fdt(); |
b45122fd SG |
1254 | } |
1255 | ||
1256 | #endif /* !USE_HOSTCC */ |