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Released as version 2.1.
[thirdparty/pciutils.git] / lspci.c
CommitLineData
98e39e09 1/*
d4798a32 2 * $Id: lspci.c,v 1.30 1999/10/09 13:26:02 mj Exp $
98e39e09
MM		 3 *
4 * Linux PCI Utilities -- List All PCI Devices
5 *
6ece6bc6 6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
98e39e09
MM		 7 *
8 * Can be freely distributed and used under the terms of the GNU GPL.
9 */
10
11#include <stdio.h>
12#include <string.h>
13#include <stdlib.h>
727ce158 14#include <stdarg.h>
98e39e09 15#include <unistd.h>
98e39e09
MM		 16
17#include "pciutils.h"
18
19/* Options */
20
21static int verbose; /* Show detailed information */
22static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23static int show_hex; /* Show contents of config space as hexadecimal numbers */
e4842ff3 24static struct pci_filter filter; /* Device filter */
6d0dc0fd 25static int show_tree; /* Show bus tree */
0a33d0ec 26static int machine_readable; /* Generate machine-readable output */
1812a795 27static int map_mode; /* Bus mapping mode enabled */
98e39e09 28
1812a795 29static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
98e39e09
MM		 30
31static char help_msg[] = "\
32Usage: lspci [<switches>]\n\
33\n\
e4842ff3
MM		 34-v\t\tBe verbose\n\
35-n\t\tShow numeric ID's\n\
36-b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
3b89d8e4 37-x\t\tShow hex-dump of config space\n\
e4842ff3
MM		 38-s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39-d [<vendor>]:[<device>]\tShow only selected devices\n\
40-t\t\tShow bus tree\n\
41-m\t\tProduce machine-readable output\n\
1812a795
MM		 42-i <file>\tUse specified ID database instead of %s\n\
43-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
727ce158
MM		 44GENERIC_HELP
45;
98e39e09 46
727ce158
MM		 47/* Communication with libpci */
48
49static struct pci_access *pacc;
50
51/* Format strings used for IRQ numbers and memory addresses */
f17b962b 52
2f48f637 53#ifdef ARCH_SPARC64
f17b962b
MM		 54#define IRQ_FORMAT "%08x"
55#else
56#define IRQ_FORMAT "%d"
57#endif
58
f3395cc5 59#ifdef HAVE_64BIT_ADDRESS
e95c8373 60#ifdef HAVE_LONG_ADDRESS
f3395cc5 61#define ADDR_FORMAT "%016Lx"
727ce158 62#else
e95c8373
MM		 63#define ADDR_FORMAT "%016lx"
64#endif
65#else
f3395cc5 66#define ADDR_FORMAT "%08lx"
727ce158
MM		 67#endif
68
dec16943
MM		 69#ifdef ARCH_SPARC64
70#define IO_FORMAT "%016Lx"
71#elif defined(HAVE_64BIT_ADDRESS)
72#define IO_FORMAT "%04Lx"
73#else
74#define IO_FORMAT "%04lx"
75#endif
76
98e39e09
MM		 77/* Our view of the PCI bus */
78
79struct device {
80 struct device *next;
727ce158 81 struct pci_dev *dev;
b5137411 82 unsigned int config_cnt;
98e39e09
MM		 83 byte config[256];
84};
85
727ce158 86static struct device *first_dev;
98e39e09 87
1812a795
MM		 88static struct device *
89scan_device(struct pci_dev *p)
90{
91 int how_much = (show_hex > 2) ? 256 : 64;
92 struct device *d;
93
94 if (!pci_filter_match(&filter, p))
95 return NULL;
96 d = xmalloc(sizeof(struct device));
97 bzero(d, sizeof(*d));
98 d->dev = p;
99 if (!pci_read_block(p, 0, d->config, how_much))
100 die("Unable to read %d bytes of configuration space.", how_much);
101 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
102 {
103 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
104 if (!pci_read_block(p, 0, d->config+64, 64))
105 die("Unable to read cardbus bridge extension data.");
106 how_much = 128;
107 }
108 d->config_cnt = how_much;
109 pci_setup_cache(p, d->config, d->config_cnt);
e95c8373 110 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
1812a795
MM		 111 return d;
112}
113
98e39e09 114static void
727ce158 115scan_devices(void)
98e39e09
MM		 116{
117 struct device *d;
727ce158 118 struct pci_dev *p;
98e39e09 119
727ce158
MM		 120 pci_scan_bus(pacc);
121 for(p=pacc->devices; p; p=p->next)
1812a795
MM		 122 if (d = scan_device(p))
123 {
124 d->next = first_dev;
125 first_dev = d;
126 }
98e39e09
MM		 127}
128
b5137411
MM		 129static int
130check_root(void)
131{
132 static int is_root = -1;
133
134 if (is_root < 0)
135 is_root = !geteuid();
136 return is_root;
137}
138
139static int
140config_fetch(struct device *d, unsigned int pos, unsigned int len)
141{
142 if (pos + len < d->config_cnt)
143 return 1;
144 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
145 return 0;
146 return pci_read_block(d->dev, pos, d->config + pos, len);
147}
148
98e39e09
MM		 149/* Config space accesses */
150
151static inline byte
152get_conf_byte(struct device *d, unsigned int pos)
153{
154 return d->config[pos];
155}
156
157static word
158get_conf_word(struct device *d, unsigned int pos)
159{
160 return d->config[pos] | (d->config[pos+1] << 8);
161}
162
163static u32
164get_conf_long(struct device *d, unsigned int pos)
165{
166 return d->config[pos] |
167 (d->config[pos+1] << 8) |
168 (d->config[pos+2] << 16) |
169 (d->config[pos+3] << 24);
170}
171
172/* Sorting */
173
174static int
175compare_them(const void *A, const void *B)
176{
727ce158
MM		 177 const struct pci_dev *a = (*(const struct device **)A)->dev;
178 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09
MM		 179
180 if (a->bus < b->bus)
181 return -1;
182 if (a->bus > b->bus)
183 return 1;
727ce158
MM		 184 if (a->dev < b->dev)
185 return -1;
186 if (a->dev > b->dev)
187 return 1;
188 if (a->func < b->func)
98e39e09 189 return -1;
727ce158 190 if (a->func > b->func)
98e39e09
MM		 191 return 1;
192 return 0;
193}
194
195static void
196sort_them(void)
197{
727ce158 198 struct device **index, **h, **last_dev;
98e39e09
MM		 199 int cnt;
200 struct device *d;
201
202 cnt = 0;
203 for(d=first_dev; d; d=d->next)
204 cnt++;
205 h = index = alloca(sizeof(struct device *) * cnt);
206 for(d=first_dev; d; d=d->next)
207 *h++ = d;
208 qsort(index, cnt, sizeof(struct device *), compare_them);
209 last_dev = &first_dev;
210 h = index;
211 while (cnt--)
212 {
213 *last_dev = *h;
214 last_dev = &(*h)->next;
215 h++;
216 }
217 *last_dev = NULL;
218}
219
6d0dc0fd 220/* Normal output */
98e39e09 221
1c31d620
MM		 222#define FLAG(x,y) ((x & y) ? '+' : '-')
223
98e39e09
MM		 224static void
225show_terse(struct device *d)
226{
227 int c;
727ce158
MM		 228 struct pci_dev *p = d->dev;
229 byte classbuf[128], devbuf[128];
98e39e09
MM		 230
231 printf("%02x:%02x.%x %s: %s",
727ce158
MM		 232 p->bus,
233 p->dev,
234 p->func,
235 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
236 PCI_LOOKUP_CLASS,
d4798a32 237 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158
MM		 238 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
239 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 240 p->vendor_id, p->device_id, 0, 0));
98e39e09
MM		 241 if (c = get_conf_byte(d, PCI_REVISION_ID))
242 printf(" (rev %02x)", c);
243 if (verbose && (c = get_conf_byte(d, PCI_CLASS_PROG)))
d4798a32
MM		 244 {
245 char *x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
246 PCI_LOOKUP_PROGIF,
247 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
248 printf(" (prog-if %02x", c);
249 if (x)
250 printf(" [%s]", x);
251 putchar(')');
252 }
98e39e09
MM		 253 putchar('\n');
254}
255
e95c8373
MM		 256static void
257show_size(pciaddr_t x)
258{
c36c0862
MM		 259 if (!x)
260 return;
e95c8373
MM		 261 printf(" [size=");
262 if (x < 1024)
263 printf("%d", (int) x);
264 else if (x < 1048576)
265 printf("%dK", (int)(x / 1024));
266 else if (x < 0x80000000)
267 printf("%dM", (int)(x / 1048576));
268 else
269 printf(ADDR_FORMAT, x);
270 putchar(']');
271}
272
98e39e09
MM		 273static void
274show_bases(struct device *d, int cnt)
275{
727ce158 276 struct pci_dev *p = d->dev;
98e39e09
MM		 277 word cmd = get_conf_word(d, PCI_COMMAND);
278 int i;
279
96e4f295 280 for(i=0; i<cnt; i++)
98e39e09 281 {
f3395cc5 282 pciaddr_t pos = p->base_addr[i];
e95c8373 283 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
f3395cc5 284 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
727ce158
MM		 285 if (flg == 0xffffffff)
286 flg = 0;
e95c8373 287 if (!pos && !flg && !len)
98e39e09 288 continue;
072c77e5
MM		 289 if (verbose > 1)
290 printf("\tRegion %d: ", i);
291 else
292 putchar('\t');
727ce158
MM		 293 if (pos && !flg) /* Reported by the OS, but not by the device */
294 {
295 printf("[virtual] ");
296 flg = pos;
297 }
98e39e09 298 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
f17b962b 299 {
dec16943 300 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
072c77e5
MM		 301 printf("I/O ports at ");
302 if (a)
dec16943 303 printf(IO_FORMAT, a);
727ce158
MM		 304 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
305 printf("<ignored>");
072c77e5
MM		 306 else
307 printf("<unassigned>");
308 if (!(cmd & PCI_COMMAND_IO))
309 printf(" [disabled]");
f17b962b 310 }
072c77e5 311 else
98e39e09
MM		 312 {
313 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
f3395cc5 314 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
727ce158
MM		 315 int done = 0;
316 u32 z = 0;
317
98e39e09
MM		 318 printf("Memory at ");
319 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
320 {
727ce158
MM		 321 if (i >= cnt - 1)
322 {
e95c8373 323 printf("<invalid-64bit-slot>");
727ce158
MM		 324 done = 1;
325 }
326 else
98e39e09
MM		 327 {
328 i++;
072c77e5
MM		 329 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
330 if (buscentric_view)
727ce158
MM		 331 {
332 if (a || z)
b801b390 333 printf("%08x" ADDR_FORMAT, z, a);
727ce158
MM		 334 else
335 printf("<unassigned>");
336 done = 1;
337 }
98e39e09 338 }
727ce158
MM		 339 }
340 if (!done)
341 {
342 if (a)
f3395cc5 343 printf(ADDR_FORMAT, a);
98e39e09 344 else
727ce158 345 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
98e39e09 346 }
072c77e5 347 printf(" (%s, %sprefetchable)",
98e39e09
MM		 348 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
349 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
072c77e5 350 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
f17b962b 351 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
072c77e5
MM		 352 if (!(cmd & PCI_COMMAND_MEMORY))
353 printf(" [disabled]");
98e39e09 354 }
c36c0862 355 show_size(len);
072c77e5 356 putchar('\n');
98e39e09
MM		 357 }
358}
359
1c31d620
MM		 360static void
361show_pm(struct device *d, int where, int cap)
362{
363 int t;
364
365 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
366 if (verbose < 2)
367 return;
368 printf("\t\tFlags: PMEClk%c AuxPwr%c DSI%c D1%c D2%c PME%c\n",
369 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
370 FLAG(cap, PCI_PM_CAP_AUX_POWER),
371 FLAG(cap, PCI_PM_CAP_DSI),
372 FLAG(cap, PCI_PM_CAP_D1),
373 FLAG(cap, PCI_PM_CAP_D2),
374 FLAG(cap, PCI_PM_CAP_PME));
375 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
376 t = get_conf_word(d, where + PCI_PM_CTRL);
377 printf("\t\tStatus: D%d PME-Enable%c DSel=%x DScale=%x PME%c\n",
378 t & PCI_PM_CTRL_STATE_MASK,
379 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
380 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
381 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
382 FLAG(t, PCI_PM_CTRL_PME_STATUS));
383}
384
385static void
386show_agp(struct device *d, int where, int cap)
387{
388 u32 t;
389
390 t = cap & 0xff;
391 printf("AGP version %x.%x\n", cap/16, cap%16);
392 if (verbose < 2)
393 return;
394 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
395 t = get_conf_long(d, where + PCI_AGP_STATUS);
396 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s%s%s\n",
397 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
398 FLAG(t, PCI_AGP_STATUS_SBA),
399 FLAG(t, PCI_AGP_STATUS_64BIT),
400 FLAG(t, PCI_AGP_STATUS_FW),
401 (t & PCI_AGP_STATUS_RATE4) ? "4" : "",
402 (t & PCI_AGP_STATUS_RATE2) ? "2" : "",
403 (t & PCI_AGP_STATUS_RATE1) ? "1" : "");
84b10481 404 t = get_conf_long(d, where + PCI_AGP_COMMAND);
1c31d620
MM		 405 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s%s%s\n",
406 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
407 FLAG(t, PCI_AGP_COMMAND_SBA),
408 FLAG(t, PCI_AGP_COMMAND_AGP),
409 FLAG(t, PCI_AGP_COMMAND_64BIT),
410 FLAG(t, PCI_AGP_COMMAND_FW),
411 (t & PCI_AGP_COMMAND_RATE4) ? "4" : "",
412 (t & PCI_AGP_COMMAND_RATE2) ? "2" : "",
413 (t & PCI_AGP_COMMAND_RATE1) ? "1" : "");
414}
415
98e39e09 416static void
e95c8373 417show_rom(struct device *d)
98e39e09 418{
e95c8373
MM		 419 struct pci_dev *p = d->dev;
420 pciaddr_t rom = p->rom_base_addr;
421 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
98e39e09 422
e95c8373
MM		 423 if (!rom && !len)
424 return;
425 printf("\tExpansion ROM at ");
426 if (rom & PCI_ROM_ADDRESS_MASK)
427 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
428 else
429 printf("<unassigned>");
430 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
431 printf(" [disabled]");
432 show_size(len);
433 putchar('\n');
434}
435
436static void
437show_msi(struct device *d, int where, int cap)
438{
439 int is64;
440 u32 t;
441 u16 w;
442
443 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
444 FLAG(cap, PCI_MSI_FLAGS_64BIT),
445 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
446 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
447 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
448 if (verbose < 2)
449 return;
450 is64 = cap & PCI_MSI_FLAGS_64BIT;
451 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
452 printf("\t\tAddress: ");
453 if (is64)
454 {
455 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
456 w = get_conf_word(d, where + PCI_MSI_DATA_64);
457 printf("%08x", t);
458 }
459 else
460 w = get_conf_word(d, where + PCI_MSI_DATA_32);
461 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
462 printf("%08x Data: %04x\n", t, w);
463}
464
465static void
466show_slotid(int cap)
467{
468 int esr = cap & 0xff;
469 int chs = cap >> 8;
470
471 printf("Slot ID: %d slots, First%c, chassis %02x\n",
472 esr & PCI_SID_ESR_NSLOTS,
473 FLAG(esr, PCI_SID_ESR_FIC),
474 chs);
475}
476
477static void
478show_caps(struct device *d)
479{
b5137411
MM		 480 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
481 {
e95c8373 482 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
b5137411
MM		 483 while (where)
484 {
1c31d620 485 int id, next, cap;
b5137411
MM		 486 printf("\tCapabilities: ");
487 if (!config_fetch(d, where, 4))
488 {
489 puts("<available only to root>");
490 break;
491 }
1c31d620 492 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
e95c8373 493 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
1c31d620
MM		 494 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
495 printf("[%02x] ", where);
b5137411
MM		 496 if (id == 0xff)
497 {
1c31d620 498 printf("<chain broken>\n");
b5137411
MM		 499 break;
500 }
501 switch (id)
502 {
1c31d620
MM		 503 case PCI_CAP_ID_PM:
504 show_pm(d, where, cap);
505 break;
506 case PCI_CAP_ID_AGP:
507 show_agp(d, where, cap);
b5137411 508 break;
e95c8373
MM		 509 case PCI_CAP_ID_VPD:
510 printf("Vital Product Data\n");
511 break;
512 case PCI_CAP_ID_SLOTID:
513 show_slotid(cap);
514 break;
515 case PCI_CAP_ID_MSI:
516 show_msi(d, where, cap);
517 break;
b5137411 518 default:
e95c8373 519 printf("#%02x [%04x]\n", id, cap);
b5137411 520 }
b5137411
MM		 521 where = next;
522 }
523 }
98e39e09
MM		 524}
525
e95c8373
MM		 526static void
527show_htype0(struct device *d)
528{
529 show_bases(d, 6);
530 show_rom(d);
531 show_caps(d);
532}
533
98e39e09
MM		 534static void
535show_htype1(struct device *d)
536{
537 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
538 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
539 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
540 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
541 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
542 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
543 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
544 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
545 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
98e39e09 546 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
e306e911 547 int verb = verbose > 2;
98e39e09
MM		 548
549 show_bases(d, 2);
550 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
551 get_conf_byte(d, PCI_PRIMARY_BUS),
552 get_conf_byte(d, PCI_SECONDARY_BUS),
553 get_conf_byte(d, PCI_SUBORDINATE_BUS),
554 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
555
556 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
557 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
558 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
559 else
560 {
561 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
562 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
563 if (io_type == PCI_IO_RANGE_TYPE_32)
564 {
565 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
566 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
567 }
e306e911 568 if (io_base <= io_limit || verb)
98e39e09
MM		 569 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
570 }
571
572 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
573 mem_type)
574 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
e306e911 575 else
98e39e09
MM		 576 {
577 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
578 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
e306e911
MM		 579 if (mem_base <= mem_limit || verb)
580 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
98e39e09
MM		 581 }
582
583 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
584 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
585 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
e306e911 586 else
98e39e09
MM		 587 {
588 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
589 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
e306e911
MM		 590 if (pref_base <= pref_limit || verb)
591 {
592 if (pref_type == PCI_PREF_RANGE_TYPE_32)
593 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
594 else
595 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
596 get_conf_long(d, PCI_PREF_BASE_UPPER32),
597 pref_base,
598 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
599 pref_limit);
600 }
98e39e09
MM		 601 }
602
603 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
604 printf("\tSecondary status: SERR\n");
605
e95c8373 606 show_rom(d);
98e39e09
MM		 607
608 if (verbose > 1)
609 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
1c31d620
MM		 610 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
611 FLAG(brc, PCI_BRIDGE_CTL_SERR),
612 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
613 FLAG(brc, PCI_BRIDGE_CTL_VGA),
614 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
615 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
616 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
e95c8373
MM		 617
618 show_caps(d);
98e39e09
MM		 619}
620
2f48f637
MM		 621static void
622show_htype2(struct device *d)
623{
96e4f295
MM		 624 int i;
625 word cmd = get_conf_word(d, PCI_COMMAND);
626 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
627 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
e306e911 628 int verb = verbose > 2;
96e4f295
MM		 629
630 show_bases(d, 1);
631 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
632 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
633 get_conf_byte(d, PCI_CB_CARD_BUS),
634 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
635 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
636 for(i=0; i<2; i++)
637 {
638 int p = 8*i;
639 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
640 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
e306e911 641 if (limit > base || verb)
96e4f295
MM		 642 printf("Memory window %d: %08x-%08x%s%s\n", i, base, limit,
643 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
644 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
645 }
646 for(i=0; i<2; i++)
647 {
648 int p = 8*i;
649 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
650 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
651 if (!(base & PCI_IO_RANGE_TYPE_32))
652 {
653 base &= 0xffff;
654 limit &= 0xffff;
655 }
656 base &= PCI_CB_IO_RANGE_MASK;
96e4f295 657 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
e306e911
MM		 658 if (base <= limit || verb)
659 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
660 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
96e4f295
MM		 661 }
662
663 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
664 printf("\tSecondary status: SERR\n");
665 if (verbose > 1)
666 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
1c31d620
MM		 667 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
668 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
669 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
670 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
671 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
672 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
673 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
674 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
96e4f295
MM		 675 if (exca)
676 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM		 677}
678
98e39e09
MM		 679static void
680show_verbose(struct device *d)
681{
727ce158 682 struct pci_dev *p = d->dev;
98e39e09
MM		 683 word status = get_conf_word(d, PCI_STATUS);
684 word cmd = get_conf_word(d, PCI_COMMAND);
685 word class = get_conf_word(d, PCI_CLASS_DEVICE);
686 byte bist = get_conf_byte(d, PCI_BIST);
687 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
688 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
689 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
690 byte max_lat, min_gnt;
691 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 692 unsigned int irq = p->irq;
98e39e09 693 word subsys_v, subsys_d;
727ce158 694 char ssnamebuf[256];
98e39e09
MM		 695
696 show_terse(d);
697
98e39e09
MM		 698 switch (htype)
699 {
2f48f637
MM		 700 case PCI_HEADER_TYPE_NORMAL:
701 if (class == PCI_CLASS_BRIDGE_PCI)
702 {
703 badhdr:
704 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
705 return;
706 }
98e39e09
MM		 707 max_lat = get_conf_byte(d, PCI_MAX_LAT);
708 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
709 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
710 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
711 break;
2f48f637
MM		 712 case PCI_HEADER_TYPE_BRIDGE:
713 if (class != PCI_CLASS_BRIDGE_PCI)
714 goto badhdr;
727ce158 715 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM		 716 subsys_v = subsys_d = 0;
717 break;
718 case PCI_HEADER_TYPE_CARDBUS:
719 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
720 goto badhdr;
96e4f295
MM		 721 min_gnt = max_lat = 0;
722 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
723 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
98e39e09
MM		 724 break;
725 default:
726 printf("\t!!! Unknown header type %02x\n", htype);
727 return;
728 }
729
e306e911 730 if (subsys_v && subsys_v != 0xffff)
727ce158
MM		 731 printf("\tSubsystem: %s\n",
732 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
733 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 734 p->vendor_id, p->device_id, subsys_v, subsys_d));
ce503b7f 735
98e39e09
MM		 736 if (verbose > 1)
737 {
98e39e09 738 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
1c31d620
MM		 739 FLAG(cmd, PCI_COMMAND_IO),
740 FLAG(cmd, PCI_COMMAND_MEMORY),
741 FLAG(cmd, PCI_COMMAND_MASTER),
742 FLAG(cmd, PCI_COMMAND_SPECIAL),
743 FLAG(cmd, PCI_COMMAND_INVALIDATE),
744 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
745 FLAG(cmd, PCI_COMMAND_PARITY),
746 FLAG(cmd, PCI_COMMAND_WAIT),
747 FLAG(cmd, PCI_COMMAND_SERR),
748 FLAG(cmd, PCI_COMMAND_FAST_BACK));
b5137411 749 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
1c31d620
MM		 750 FLAG(status, PCI_STATUS_CAP_LIST),
751 FLAG(status, PCI_STATUS_66MHZ),
752 FLAG(status, PCI_STATUS_UDF),
753 FLAG(status, PCI_STATUS_FAST_BACK),
754 FLAG(status, PCI_STATUS_PARITY),
98e39e09
MM		 755 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
756 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
757 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
1c31d620
MM		 758 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
759 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
760 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
761 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
762 FLAG(status, PCI_STATUS_DETECTED_PARITY));
98e39e09
MM		 763 if (cmd & PCI_COMMAND_MASTER)
764 {
765 printf("\tLatency: ");
766 if (min_gnt)
767 printf("%d min, ", min_gnt);
768 if (max_lat)
769 printf("%d max, ", max_lat);
770 printf("%d set", latency);
771 if (cache_line)
772 printf(", cache line size %02x", cache_line);
773 putchar('\n');
774 }
727ce158
MM		 775 if (int_pin || irq)
776 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
777 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM		 778 }
779 else
780 {
781 printf("\tFlags: ");
782 if (cmd & PCI_COMMAND_MASTER)
783 printf("bus master, ");
784 if (cmd & PCI_COMMAND_VGA_PALETTE)
785 printf("VGA palette snoop, ");
786 if (cmd & PCI_COMMAND_WAIT)
787 printf("stepping, ");
788 if (cmd & PCI_COMMAND_FAST_BACK)
789 printf("fast Back2Back, ");
790 if (status & PCI_STATUS_66MHZ)
791 printf("66Mhz, ");
792 if (status & PCI_STATUS_UDF)
793 printf("user-definable features, ");
794 printf("%s devsel",
795 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
796 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
797 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
798 if (cmd & PCI_COMMAND_MASTER)
799 printf(", latency %d", latency);
727ce158
MM		 800 if (irq)
801 printf(", IRQ " IRQ_FORMAT, irq);
98e39e09
MM		 802 putchar('\n');
803 }
804
805 if (bist & PCI_BIST_CAPABLE)
806 {
807 if (bist & PCI_BIST_START)
808 printf("\tBIST is running\n");
809 else
810 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
811 }
812
813 switch (htype)
814 {
2f48f637 815 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM		 816 show_htype0(d);
817 break;
2f48f637 818 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM		 819 show_htype1(d);
820 break;
2f48f637
MM		 821 case PCI_HEADER_TYPE_CARDBUS:
822 show_htype2(d);
823 break;
98e39e09
MM		 824 }
825}
826
827static void
828show_hex_dump(struct device *d)
829{
b5137411 830 unsigned int i;
98e39e09 831
727ce158 832 for(i=0; i<d->config_cnt; i++)
98e39e09
MM		 833 {
834 if (! (i & 15))
835 printf("%02x:", i);
836 printf(" %02x", get_conf_byte(d, i));
837 if ((i & 15) == 15)
838 putchar('\n');
839 }
840}
841
0a33d0ec
MM		 842static void
843show_machine(struct device *d)
844{
727ce158 845 struct pci_dev *p = d->dev;
0a33d0ec 846 int c;
ce503b7f 847 word sv_id=0, sd_id=0;
727ce158 848 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f
MM		 849
850 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
851 {
852 case PCI_HEADER_TYPE_NORMAL:
853 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
854 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
855 break;
856 case PCI_HEADER_TYPE_CARDBUS:
857 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
858 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
859 break;
860 }
0a33d0ec
MM		 861
862 if (verbose)
863 {
727ce158
MM		 864 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
865 printf("Class:\t%s\n",
d4798a32 866 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
727ce158 867 printf("Vendor:\t%s\n",
d4798a32 868 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
727ce158 869 printf("Device:\t%s\n",
d4798a32 870 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
ce503b7f
MM		 871 if (sv_id && sv_id != 0xffff)
872 {
727ce158 873 printf("SVendor:\t%s\n",
d4798a32 874 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
727ce158 875 printf("SDevice:\t%s\n",
d4798a32 876 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f 877 }
0a33d0ec
MM		 878 if (c = get_conf_byte(d, PCI_REVISION_ID))
879 printf("Rev:\t%02x\n", c);
880 if (c = get_conf_byte(d, PCI_CLASS_PROG))
881 printf("ProgIf:\t%02x\n", c);
882 }
883 else
884 {
727ce158 885 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
0a33d0ec 886 printf("\"%s\" \"%s\" \"%s\"",
727ce158 887 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
d4798a32 888 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
727ce158 889 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
d4798a32 890 p->vendor_id, p->device_id, 0, 0),
727ce158 891 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
d4798a32 892 p->vendor_id, p->device_id, 0, 0));
0a33d0ec
MM		 893 if (c = get_conf_byte(d, PCI_REVISION_ID))
894 printf(" -r%02x", c);
895 if (c = get_conf_byte(d, PCI_CLASS_PROG))
896 printf(" -p%02x", c);
ce503b7f 897 if (sv_id && sv_id != 0xffff)
727ce158 898 printf(" \"%s\" \"%s\"",
d4798a32
MM		 899 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
900 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
ce503b7f
MM		 901 else
902 printf(" \"\" \"\"");
0a33d0ec
MM		 903 putchar('\n');
904 }
905}
906
1812a795
MM		 907static void
908show_device(struct device *d)
909{
910 if (machine_readable)
911 show_machine(d);
912 else if (verbose)
913 show_verbose(d);
914 else
915 show_terse(d);
916 if (show_hex)
917 show_hex_dump(d);
918 if (verbose || show_hex)
919 putchar('\n');
920}
921
98e39e09
MM		 922static void
923show(void)
924{
925 struct device *d;
926
927 for(d=first_dev; d; d=d->next)
1812a795 928 show_device(d);
98e39e09
MM		 929}
930
6d0dc0fd
MM		 931/* Tree output */
932
933struct bridge {
934 struct bridge *chain; /* Single-linked list of bridges */
935 struct bridge *next, *child; /* Tree of bridges */
936 struct bus *first_bus; /* List of busses connected to this bridge */
937 unsigned int primary, secondary, subordinate; /* Bus numbers */
938 struct device *br_dev;
939};
940
941struct bus {
942 unsigned int number;
943 struct bus *sibling;
944 struct device *first_dev, **last_dev;
945};
946
947static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
948
949static struct bus *
950find_bus(struct bridge *b, unsigned int n)
951{
952 struct bus *bus;
953
954 for(bus=b->first_bus; bus; bus=bus->sibling)
955 if (bus->number == n)
956 break;
957 return bus;
958}
959
960static struct bus *
961new_bus(struct bridge *b, unsigned int n)
962{
963 struct bus *bus = xmalloc(sizeof(struct bus));
964
965 bus = xmalloc(sizeof(struct bus));
966 bus->number = n;
967 bus->sibling = b->first_bus;
968 bus->first_dev = NULL;
969 bus->last_dev = &bus->first_dev;
970 b->first_bus = bus;
971 return bus;
972}
973
974static void
975insert_dev(struct device *d, struct bridge *b)
976{
727ce158 977 struct pci_dev *p = d->dev;
6d0dc0fd
MM		 978 struct bus *bus;
979
727ce158 980 if (! (bus = find_bus(b, p->bus)))
6d0dc0fd
MM		 981 {
982 struct bridge *c;
983 for(c=b->child; c; c=c->next)
727ce158 984 if (c->secondary <= p->bus && p->bus <= c->subordinate)
6d0dc0fd 985 return insert_dev(d, c);
727ce158 986 bus = new_bus(b, p->bus);
6d0dc0fd
MM		 987 }
988 /* Simple insertion at the end _does_ guarantee the correct order as the
989 * original device list was sorted by (bus, devfn) lexicographically
990 * and all devices on the new list have the same bus number.
991 */
992 *bus->last_dev = d;
993 bus->last_dev = &d->next;
994 d->next = NULL;
995}
996
997static void
998grow_tree(void)
999{
1000 struct device *d, *d2;
008407bd 1001 struct bridge **last_br, *b;
6d0dc0fd
MM		 1002
1003 /* Build list of bridges */
1004
008407bd 1005 last_br = &host_bridge.chain;
6d0dc0fd
MM		 1006 for(d=first_dev; d; d=d->next)
1007 {
1008 word class = get_conf_word(d, PCI_CLASS_DEVICE);
96e4f295
MM		 1009 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1010 if (class == PCI_CLASS_BRIDGE_PCI &&
1011 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
6d0dc0fd
MM		 1012 {
1013 b = xmalloc(sizeof(struct bridge));
96e4f295
MM		 1014 if (ht == PCI_HEADER_TYPE_BRIDGE)
1015 {
1016 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1017 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1018 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1019 }
1020 else
1021 {
1022 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1023 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1024 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1025 }
008407bd
MM		 1026 *last_br = b;
1027 last_br = &b->chain;
6d0dc0fd
MM		 1028 b->next = b->child = NULL;
1029 b->first_bus = NULL;
1030 b->br_dev = d;
1031 }
1032 }
008407bd 1033 *last_br = NULL;
6d0dc0fd
MM		 1034
1035 /* Create a bridge tree */
1036
008407bd 1037 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 1038 {
1039 struct bridge *c, *best;
1040 best = NULL;
008407bd 1041 for(c=&host_bridge; c; c=c->chain)
6d0dc0fd
MM		 1042 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1043 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1044 best = c;
1045 if (best)
1046 {
1047 b->next = best->child;
1048 best->child = b;
1049 }
1050 }
1051
1052 /* Insert secondary bus for each bridge */
1053
008407bd 1054 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM		 1055 if (!find_bus(b, b->secondary))
1056 new_bus(b, b->secondary);
1057
1058 /* Create bus structs and link devices */
1059
1060 for(d=first_dev; d;)
1061 {
1062 d2 = d->next;
1063 insert_dev(d, &host_bridge);
1064 d = d2;
1065 }
1066}
1067
1068static void
1069print_it(byte *line, byte *p)
1070{
1071 *p++ = '\n';
1072 *p = 0;
1073 fputs(line, stdout);
1074 for(p=line; *p; p++)
008407bd 1075 if (*p == '+' || *p == '|')
6d0dc0fd
MM		 1076 *p = '|';
1077 else
1078 *p = ' ';
1079}
1080
1081static void show_tree_bridge(struct bridge *, byte *, byte *);
1082
1083static void
1084show_tree_dev(struct device *d, byte *line, byte *p)
1085{
727ce158 1086 struct pci_dev *q = d->dev;
6d0dc0fd 1087 struct bridge *b;
727ce158 1088 char namebuf[256];
6d0dc0fd 1089
727ce158 1090 p += sprintf(p, "%02x.%x", q->dev, q->func);
6d0dc0fd
MM		 1091 for(b=&host_bridge; b; b=b->chain)
1092 if (b->br_dev == d)
1093 {
008407bd
MM		 1094 if (b->secondary == b->subordinate)
1095 p += sprintf(p, "-[%02x]-", b->secondary);
1096 else
1097 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
6d0dc0fd
MM		 1098 show_tree_bridge(b, line, p);
1099 return;
1100 }
18928b91 1101 if (verbose)
727ce158
MM		 1102 p += sprintf(p, " %s",
1103 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1104 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
d4798a32 1105 q->vendor_id, q->device_id, 0, 0));
6d0dc0fd
MM		 1106 print_it(line, p);
1107}
1108
1109static void
1110show_tree_bus(struct bus *b, byte *line, byte *p)
1111{
1112 if (!b->first_dev)
1113 print_it(line, p);
1114 else if (!b->first_dev->next)
1115 {
1116 *p++ = '-';
1117 *p++ = '-';
1118 show_tree_dev(b->first_dev, line, p);
1119 }
1120 else
1121 {
1122 struct device *d = b->first_dev;
1123 while (d->next)
1124 {
1125 p[0] = '+';
1126 p[1] = '-';
1127 show_tree_dev(d, line, p+2);
1128 d = d->next;
1129 }
1130 p[0] = '\\';
1131 p[1] = '-';
1132 show_tree_dev(d, line, p+2);
1133 }
1134}
1135
1136static void
1137show_tree_bridge(struct bridge *b, byte *line, byte *p)
1138{
1139 *p++ = '-';
1140 if (!b->first_bus->sibling)
1141 {
1142 if (b == &host_bridge)
1143 p += sprintf(p, "[%02x]-", b->first_bus->number);
1144 show_tree_bus(b->first_bus, line, p);
1145 }
1146 else
1147 {
1148 struct bus *u = b->first_bus;
1149 byte *k;
1150
1151 while (u->sibling)
1152 {
1153 k = p + sprintf(p, "+-[%02x]-", u->number);
1154 show_tree_bus(u, line, k);
1155 u = u->sibling;
1156 }
1157 k = p + sprintf(p, "\\-[%02x]-", u->number);
1158 show_tree_bus(u, line, k);
1159 }
1160}
1161
1162static void
1163show_forest(void)
1164{
1165 char line[256];
1166
1167 grow_tree();
1168 show_tree_bridge(&host_bridge, line, line);
1169}
1170
1812a795
MM		 1171/* Bus mapping mode */
1172
1173struct bus_bridge {
1174 struct bus_bridge *next;
1c31d620 1175 byte this, dev, func, first, last, bug;
1812a795
MM		 1176};
1177
1178struct bus_info {
1179 byte exists;
1c31d620
MM		 1180 byte guestbook;
1181 struct bus_bridge *bridges, *via;
1812a795
MM		 1182};
1183
1184static struct bus_info *bus_info;
1185
1186static void
1187map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1188{
1189 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1190 struct pci_dev *p = d->dev;
1812a795
MM		 1191
1192 b->next = bi->bridges;
1193 bi->bridges = b;
1c31d620
MM		 1194 b->this = get_conf_byte(d, np);
1195 b->dev = p->dev;
1196 b->func = p->func;
1812a795
MM		 1197 b->first = get_conf_byte(d, ns);
1198 b->last = get_conf_byte(d, nl);
1199 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1c31d620
MM		 1200 p->bus, p->dev, p->func, b->this, b->first, b->last);
1201 if (b->this != p->bus)
1812a795
MM		 1202 printf("!!! Bridge points to invalid primary bus.\n");
1203 if (b->first > b->last)
1204 {
1205 printf("!!! Bridge points to invalid bus range.\n");
1206 b->last = b->first;
1207 }
1208}
1209
1210static void
1211do_map_bus(int bus)
1212{
1213 int dev, func;
1214 int verbose = pacc->debugging;
1215 struct bus_info *bi = bus_info + bus;
1216 struct device *d;
1217
1218 if (verbose)
1219 printf("Mapping bus %02x\n", bus);
1220 for(dev = 0; dev < 32; dev++)
1221 if (filter.slot < 0 || filter.slot == dev)
1222 {
f3395cc5
MM		 1223 int func_limit = 1;
1224 for(func = 0; func < func_limit; func++)
1812a795
MM		 1225 if (filter.func < 0 || filter.func == func)
1226 {
1227 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1228 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1229 if (vendor && vendor != 0xffff)
1230 {
f3395cc5
MM		 1231 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1232 func_limit = 8;
1812a795
MM		 1233 if (verbose)
1234 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1235 bi->exists = 1;
1236 if (d = scan_device(p))
1237 {
1238 show_device(d);
1239 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1240 {
1241 case PCI_HEADER_TYPE_BRIDGE:
1242 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1243 break;
1244 case PCI_HEADER_TYPE_CARDBUS:
1245 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1246 break;
1247 }
1248 free(d);
1249 }
1250 else if (verbose)
1251 printf("But it was filtered out.\n");
1252 }
1253 pci_free_dev(p);
1254 }
1255 }
1256}
1257
1c31d620
MM		 1258static void
1259do_map_bridges(int bus, int min, int max)
1260{
1261 struct bus_info *bi = bus_info + bus;
1262 struct bus_bridge *b;
1263
1264 bi->guestbook = 1;
1265 for(b=bi->bridges; b; b=b->next)
1266 {
1267 if (bus_info[b->first].guestbook)
1268 b->bug = 1;
1269 else if (b->first < min || b->last > max)
1270 b->bug = 2;
1271 else
1272 {
1273 bus_info[b->first].via = b;
1274 do_map_bridges(b->first, b->first, b->last);
1275 }
1276 }
1277}
1278
1279static void
1280map_bridges(void)
1281{
1282 int i;
1283
1284 printf("\nSummary of buses:\n\n");
1285 for(i=0; i<256; i++)
1286 if (bus_info[i].exists && !bus_info[i].guestbook)
1287 do_map_bridges(i, 0, 255);
1288 for(i=0; i<256; i++)
1289 {
1290 struct bus_info *bi = bus_info + i;
1291 struct bus_bridge *b = bi->via;
1292
1293 if (bi->exists)
1294 {
1295 printf("%02x: ", i);
1296 if (b)
1297 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1298 else if (!i)
1299 printf("Primary host bus\n");
1300 else
1301 printf("Secondary host bus (?)\n");
1302 }
1303 for(b=bi->bridges; b; b=b->next)
1304 {
1305 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1306 switch (b->bug)
1307 {
1308 case 1:
1309 printf(" <overlap bug>");
1310 break;
1311 case 2:
1312 printf(" <crossing bug>");
1313 break;
1314 }
1315 putchar('\n');
1316 }
1317 }
1318}
1319
1812a795
MM		 1320static void
1321map_the_bus(void)
1322{
1323 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1324 pacc->method == PCI_ACCESS_DUMP)
1325 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1326 else if (!check_root())
1327 die("Only root can map the bus.");
1328 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1329 bzero(bus_info, sizeof(struct bus_info) * 256);
1330 if (filter.bus >= 0)
1331 do_map_bus(filter.bus);
1332 else
1333 {
1334 int bus;
1335 for(bus=0; bus<256; bus++)
1336 do_map_bus(bus);
1337 }
1c31d620 1338 map_bridges();
1812a795
MM		 1339}
1340
98e39e09
MM		 1341/* Main */
1342
1343int
1344main(int argc, char **argv)
1345{
1346 int i;
e4842ff3 1347 char *msg;
98e39e09 1348
496d4021
MM		 1349 if (argc == 2 && !strcmp(argv[1], "--version"))
1350 {
1351 puts("lspci version " PCIUTILS_VERSION);
1352 return 0;
1353 }
727ce158
MM		 1354
1355 pacc = pci_alloc();
1356 pacc->error = die;
1357 pci_filter_init(pacc, &filter);
1358
98e39e09
MM		 1359 while ((i = getopt(argc, argv, options)) != -1)
1360 switch (i)
1361 {
1362 case 'n':
727ce158 1363 pacc->numeric_ids = 1;
98e39e09
MM		 1364 break;
1365 case 'v':
1366 verbose++;
1367 break;
1368 case 'b':
727ce158 1369 pacc->buscentric = 1;
98e39e09
MM		 1370 buscentric_view = 1;
1371 break;
e4842ff3 1372 case 's':
727ce158
MM		 1373 if (msg = pci_filter_parse_slot(&filter, optarg))
1374 die("-f: %s", msg);
98e39e09 1375 break;
e4842ff3 1376 case 'd':
727ce158
MM		 1377 if (msg = pci_filter_parse_id(&filter, optarg))
1378 die("-d: %s", msg);
98e39e09
MM		 1379 break;
1380 case 'x':
1381 show_hex++;
1382 break;
6d0dc0fd
MM		 1383 case 't':
1384 show_tree++;
1385 break;
18928b91 1386 case 'i':
727ce158 1387 pacc->id_file_name = optarg;
18928b91 1388 break;
0a33d0ec
MM		 1389 case 'm':
1390 machine_readable++;
1391 break;
1812a795
MM		 1392 case 'M':
1393 map_mode++;
1394 break;
98e39e09 1395 default:
727ce158
MM		 1396 if (parse_generic_option(i, pacc, optarg))
1397 break;
98e39e09 1398 bad:
727ce158 1399 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM		 1400 return 1;
1401 }
1402 if (optind < argc)
1403 goto bad;
1404
727ce158 1405 pci_init(pacc);
1812a795
MM		 1406 if (map_mode)
1407 map_the_bus();
6d0dc0fd 1408 else
1812a795
MM		 1409 {
1410 scan_devices();
1411 sort_them();
1412 if (show_tree)
1413 show_forest();
1414 else
1415 show();
1416 }
727ce158 1417 pci_cleanup(pacc);
98e39e09
MM		 1418
1419 return 0;
1420}
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