[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h: Add rtsc, sleep with no arguments.

2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	instruction bits out.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.

2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	encode1, rflt, crc16, and crc32 instructions.
	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	(arc_flag_classes): Add C_NPS_R.
	(insert_nps_bitop_size_2b): New function.
	(extract_nps_bitop_size_2b): Likewise.
	(insert_nps_bitop_uimm8): Likewise.
	(extract_nps_bitop_uimm8): Likewise.
	(arc_operands): Add new operand entries.

2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h: Add a new subclass field.  Add double assist
	accumulator register values.
	* arc-tbl.h: Use DPA subclass to mark the double assist
	instructions.  Use DPX/SPX subclas to mark the FPX instructions.
	* arc-opc.c (RSP): Define instead of SP.
	(arc_aux_regs): Add the subclass field.

2016-04-05  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).

2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	NPS_R_SRC1.

2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	issues.  No functional changes.

2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	(RTT): Remove duplicate.
	(LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
	(PCT_CONFIG*): Remove.
	(D1L, D1H, D2H, D2L): Define.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.

2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (invld07): Remove.
	* arc-ext-tbl.h: New file.
	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	* arc-opc.c (arc_opcodes): Add ext-tbl include.

2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>

	Fix -Wstack-usage warnings.
	* aarch64-dis.c (print_operands): Substitute size.
	* aarch64-opc.c (print_register_offset_address): Substitute tblen.

2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	to get a proper diagnostic when an invalid ASR register is used.

2016-03-22  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-dis.c (print_insn_arc): Handle nps400.

2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>

	* arc-opc.c (BASE): Delete.

2016-03-18  Nick Clifton  <nickc@redhat.com>

	PR target/19721
	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	of MOV insn that aliases an ORR insn.

2016-03-16  Jiong Wang  <jiong.wang@arm.com>

	* arm-dis.c (neon_opcodes): Support new FP16 instructions.

2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

2016-03-02  Alan Modra  <amodra@gmail.com>

	* or1k-desc.h: Regenerate.
	* fr30-ibld.c: Regenerate.
	* rl78-decode.c: Regenerate.

2016-03-01  Nick Clifton  <nickc@redhat.com>

	PR target/19747
	* rl78-dis.c (print_insn_rl78_common): Fix typo.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	(print_insn_coprocessor): Support fp16 instructions.

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	vminnm, vrint(mpna).

2016-02-24  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.

2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Parenthesize expression to prevent
	truncated addresses.
	(OP_J): Likewise.

2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
	variable.

2016-02-04  Nick Clifton  <nickc@redhat.com>

	PR target/19561
	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	* epiphany-ibld.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>

	* epiphany-dis.c: Regenerated from latest cpu files.

2016-02-01  Michael McConville  <mmcco@mykolab.com>

	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	test bit.

2016-01-25  Renlin Li  <renlin.li@arm.com>

	* arm-dis.c (mapping_symbol_for_insn): New function.
	(find_ifthen_state): Call mapping_symbol_for_insn().

2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	of MSR UAO immediate operand.

2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>

	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	instruction support.

2016-01-17  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2016-01-14  Nick Clifton  <nickc@redhat.com>

	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	instructions that can support stack pointer operations.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c: Fix display of stack pointer in MOVW based
	instructions.

2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
	erxtatus_el1 and erxaddr_el1.

2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>

	* arm-dis.c (arm_opcodes): Add "esb".
	(thumb_opcodes): Likewise.

2016-01-11  Peter Bergner <bergner@vnet.ibm.com>

	* ppc-opc.c <xscmpnedp>: Delete.
	<xvcmpnedp>: Likewise.
	<xvcmpnedp.>: Likewise.
	<xvcmpnesp>: Likewise.
	<xvcmpnesp.>: Likewise.

2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>

	PR gas/13050
	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	addition to ISA_A.

2016-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2015
\f
Copyright (C) 2016 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
1c2e355e CZ	1	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	2
	3	* arc-tbl.h: Add rtsc, sleep with no arguments.
	4
b99747ae CZ	5	2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
	6
	7	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	8	Initialize.
	9	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	10	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	11	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	12	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	13	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	14	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	15	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	16	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	17	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	18	(arc_opcode arc_opcodes): Null terminate the array.
	19	(arc_num_opcodes): Remove.
	20	* arc-ext.h (INSERT_XOP): Define.
	21	(extInstruction_t): Likewise.
	22	(arcExtMap_instName): Delete.
	23	(arcExtMap_insn): New function.
	24	(arcExtMap_genOpcode): Likewise.
	25	* arc-ext.c (ExtInstruction): Remove.
	26	(create_map): Zero initialize instruction fields.
	27	(arcExtMap_instName): Remove.
	28	(arcExtMap_insn): New function.
	29	(dump_ARC_extmap): More info while debuging.
	30	(arcExtMap_genOpcode): New function.
	31	* arc-dis.c (find_format): New function.
	32	(print_insn_arc): Use find_format.
	33	(arc_get_disassembler): Enable dump_ARC_extmap only when
	34	debugging.
	35
92708cec MR	36	2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
	37
	38	* mips-dis.c (print_mips16_insn_arg): Mask unused extended
	39	instruction bits out.
	40
a42a4f84 AB	41	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	42
	43	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	44	* arc-opc.c (arc_flag_operands): Add new flags.
	45	(arc_flag_classes): Add new classes.
	46
1328504b AB	47	2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
	48
	49	* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
	50
820f03ff AB	51	2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
	52
	53	* arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
	54	encode1, rflt, crc16, and crc32 instructions.
	55	* arc-opc.c (arc_flag_operands): Add F_NPS_R.
	56	(arc_flag_classes): Add C_NPS_R.
	57	(insert_nps_bitop_size_2b): New function.
	58	(extract_nps_bitop_size_2b): Likewise.
	59	(insert_nps_bitop_uimm8): Likewise.
	60	(extract_nps_bitop_uimm8): Likewise.
	61	(arc_operands): Add new operand entries.
	62
8ddf6b2a CZ	63	2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
8ddf6b2a CZ	64
b99747ae CZ	65	* arc-regs.h: Add a new subclass field. Add double assist
	66	accumulator register values.
	67	* arc-tbl.h: Use DPA subclass to mark the double assist
	68	instructions. Use DPX/SPX subclas to mark the FPX instructions.
	69	* arc-opc.c (RSP): Define instead of SP.
	70	(arc_aux_regs): Add the subclass field.
8ddf6b2a	71
589a7d88 JW	72	2016-04-05 Jiong Wang <jiong.wang@arm.com>
	73
	74	* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
	75
0a191de9	76	2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7 AB	77
	78	* arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
	79	NPS_R_SRC1.
	80
0a106562 AB	81	2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
	82
	83	* arc-nps400-tbl.h: Add a header comment, and fix some whitespace
	84	issues. No functional changes.
	85
bd05ac5f CZ	86	2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
bd05ac5f CZ	87
b99747ae CZ	88	* arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
	89	(AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
	90	(RTT): Remove duplicate.
	91	(LCDINSTR, LCDDATA, LCDSTAT, CC_, PCT_COUNT, PCT_SNAP*)
	92	(PCT_CONFIG*): Remove.
	93	(D1L, D1H, D2H, D2L): Define.
bd05ac5f	94
9885948f CZ	95	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
9885948f CZ	96
b99747ae	97	* arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f	98
f2dd8838 CZ	99	2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
f2dd8838 CZ	100
b99747ae CZ	101	* arc-tbl.h (invld07): Remove.
	102	* arc-ext-tbl.h: New file.
	103	* arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
	104	* arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838	105
0d2f91fe JK	106	2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
	107
	108	Fix -Wstack-usage warnings.
	109	* aarch64-dis.c (print_operands): Substitute size.
	110	* aarch64-opc.c (print_register_offset_address): Substitute tblen.
	111
a6b71f42 JM	112	2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
	113
	114	* sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
	115	to get a proper diagnostic when an invalid ASR register is used.
	116
9780e045 NC	117	2016-03-22 Nick Clifton <nickc@redhat.com>
	118
	119	* configure: Regenerate.
	120
e23e8ebe AB	121	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	122
	123	* arc-nps400-tbl.h: New file.
	124	* arc-opc.c: Add top level comment.
	125	(insert_nps_3bit_dst): New function.
	126	(extract_nps_3bit_dst): New function.
	127	(insert_nps_3bit_src2): New function.
	128	(extract_nps_3bit_src2): New function.
	129	(insert_nps_bitop_size): New function.
	130	(extract_nps_bitop_size): New function.
	131	(arc_flag_operands): Add nps400 entries.
	132	(arc_flag_classes): Add nps400 entries.
	133	(arc_operands): Add nps400 entries.
	134	(arc_opcodes): Add nps400 include.
	135
1ae8ab47 AB	136	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	137
	138	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	139	the new class enum values.
	140
8699fc3e AB	141	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	142
	143	* arc-dis.c (print_insn_arc): Handle nps400.
	144
24740d83 AB	145	2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
	146
	147	* arc-opc.c (BASE): Delete.
	148
8678914f NC	149	2016-03-18 Nick Clifton <nickc@redhat.com>
	150
	151	PR target/19721
	152	* aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
	153	of MOV insn that aliases an ORR insn.
	154
cc933301 JW	155	2016-03-16 Jiong Wang <jiong.wang@arm.com>
	156
	157	* arm-dis.c (neon_opcodes): Support new FP16 instructions.
	158
f86f5863 TS	159	2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
	160
	161	* mcore-opc.h: Add const qualifiers.
	162	* microblaze-opc.h (struct op_code_struct): Likewise.
	163	* sh-opc.h: Likewise.
	164	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	165	(tic4x_print_op): Likewise.
	166
62de1c63 AM	167	2016-03-02 Alan Modra <amodra@gmail.com>
62de1c63 AM	168
d11698cd	169	* or1k-desc.h: Regenerate.
62de1c63	170	* fr30-ibld.c: Regenerate.
c697cf0b	171	* rl78-decode.c: Regenerate.
62de1c63	172
020efce5 NC	173	2016-03-01 Nick Clifton <nickc@redhat.com>
	174
	175	PR target/19747
	176	* rl78-dis.c (print_insn_rl78_common): Fix typo.
	177
b0c11777 RL	178	2016-02-24 Renlin Li <renlin.li@arm.com>
	179
	180	* arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
	181	(print_insn_coprocessor): Support fp16 instructions.
	182
3e309328 RL	183	2016-02-24 Renlin Li <renlin.li@arm.com>
	184
	185	* arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
	186	vminnm, vrint(mpna).
	187
8afc7bea RL	188	2016-02-24 Renlin Li <renlin.li@arm.com>
	189
	190	* arm-dis.c (print_insn_coprocessor): Check co-processor number for
	191	cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
	192
4fd7268a L	193	2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
	194
	195	* i386-dis.c (print_insn): Parenthesize expression to prevent
	196	truncated addresses.
	197	(OP_J): Likewise.
	198
4670103e CZ	199	2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
	200	Janek van Oirschot <jvanoirs@synopsys.com>
	201
b99747ae CZ	202	* arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
b99747ae CZ	203	variable.
4670103e	204
c1d9289f NC	205	2016-02-04 Nick Clifton <nickc@redhat.com>
	206
	207	PR target/19561
	208	* msp430-dis.c (print_insn_msp430): Add a special case for
	209	decoding an RRC instruction with the ZC bit set in the extension
	210	word.
	211
a143b004 AB	212	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	213
	214	* cgen-ibld.in (insert_normal): Rework calculation of shift.
	215	* epiphany-ibld.c: Regenerate.
	216	* fr30-ibld.c: Regenerate.
	217	* frv-ibld.c: Regenerate.
	218	* ip2k-ibld.c: Regenerate.
	219	* iq2000-ibld.c: Regenerate.
	220	* lm32-ibld.c: Regenerate.
	221	* m32c-ibld.c: Regenerate.
	222	* m32r-ibld.c: Regenerate.
	223	* mep-ibld.c: Regenerate.
	224	* mt-ibld.c: Regenerate.
	225	* or1k-ibld.c: Regenerate.
	226	* xc16x-ibld.c: Regenerate.
	227	* xstormy16-ibld.c: Regenerate.
	228
b89807c6 AB	229	2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
	230
	231	* epiphany-dis.c: Regenerated from latest cpu files.
	232
d8c823c8 MM	233	2016-02-01 Michael McConville <mmcco@mykolab.com>
	234
	235	* cgen-dis.c (count_decodable_bits): Use unsigned value for mask
	236	test bit.
	237
5bc5ae88 RL	238	2016-01-25 Renlin Li <renlin.li@arm.com>
	239
	240	* arm-dis.c (mapping_symbol_for_insn): New function.
	241	(find_ifthen_state): Call mapping_symbol_for_insn().
	242
0bff6e2d MW	243	2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
	244
	245	* aarch64-opc.c (operand_general_constraint_met_p): Check validity
	246	of MSR UAO immediate operand.
	247
100b4f2e MR	248	2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
	249
	250	* mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
	251	instruction support.
	252
5c14705f AM	253	2016-01-17 Alan Modra <amodra@gmail.com>
	254
	255	* configure: Regenerate.
	256
4d82fe66 NC	257	2016-01-14 Nick Clifton <nickc@redhat.com>
	258
	259	* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
	260	instructions that can support stack pointer operations.
	261	* rl78-decode.c: Regenerate.
	262	* rl78-dis.c: Fix display of stack pointer in MOVW based
	263	instructions.
	264
651657fa MW	265	2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
	266
	267	* aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
	268	testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
	269	erxtatus_el1 and erxaddr_el1.
	270
105bde57 MW	271	2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
	272
	273	* arm-dis.c (arm_opcodes): Add "esb".
	274	(thumb_opcodes): Likewise.
	275
afa8d405 PB	276	2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
	277
	278	* ppc-opc.c <xscmpnedp>: Delete.
	279	<xvcmpnedp>: Likewise.
	280	<xvcmpnedp.>: Likewise.
	281	<xvcmpnesp>: Likewise.
	282	<xvcmpnesp.>: Likewise.
	283
83c3256e AS	284	2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
	285
	286	PR gas/13050
	287	* m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
	288	addition to ISA_A.
	289
6f2750fe AM	290	2016-01-01 Alan Modra <amodra@gmail.com>
	291
	292	Update year range in copyright notice of all files.
	293
3499769a AM	294	For older changes see ChangeLog-2015
	295	\f
	296	Copyright (C) 2016 Free Software Foundation, Inc.
	297
	298	Copying and distribution of this file, with or without modification,
	299	are permitted in any medium without royalty provided the copyright
	300	notice and this notice are preserved.
	301
	302	Local Variables:
	303	mode: change-log
	304	left-margin: 8
	305	fill-column: 74
	306	version-control: never
	307	End: