]>
Commit | Line | Data |
---|---|---|
0b0ac059 AO |
1 | 2004-07-29 Alexandre Oliva <aoliva@redhat.com> |
2 | ||
3 | Introduce SH2a support. | |
4 | * sh-opc.h (arch_sh2a_base): Renumber. | |
5 | (arch_sh2a_nofpu_base): Remove. | |
6 | (arch_sh_base_mask): Adjust. | |
7 | (arch_opann_mask): New. | |
8 | (arch_sh2a, arch_sh2a_nofpu): Adjust. | |
9 | (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise. | |
10 | (sh_table): Adjust whitespace. | |
11 | 2004-02-24 Corinna Vinschen <vinschen@redhat.com> | |
12 | * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in | |
13 | instruction list throughout. | |
14 | (arch_sh2a_up): Redefine to include fpu instruction set. Use instead | |
15 | of arch_sh2a in instruction list throughout. | |
16 | (arch_sh2e_up): Accomodate above changes. | |
17 | (arch_sh2_up): Ditto. | |
18 | 2004-02-20 Corinna Vinschen <vinschen@redhat.com> | |
19 | * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up. | |
20 | 2004-02-18 Corinna Vinschen <vinschen@redhat.com> | |
21 | * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling. | |
22 | * sh-opc.h (arch_sh2a_nofpu): New. | |
23 | (arch_sh2a_up): New, defines sh2a and sh2a_nofpu. | |
24 | (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU | |
25 | instruction. | |
26 | 2004-01-20 DJ Delorie <dj@redhat.com> | |
27 | * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs. | |
28 | 2003-12-29 DJ Delorie <dj@redhat.com> | |
29 | * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up, | |
30 | sh_opcode_info, sh_table): Add sh2a support. | |
31 | (arch_op32): New, to tag 32-bit opcodes. | |
32 | * sh-dis.c (print_insn_sh): Support sh2a opcodes. | |
33 | 2003-12-02 Michael Snyder <msnyder@redhat.com> | |
34 | * sh-opc.h (arch_sh2a): Add. | |
35 | * sh-dis.c (arch_sh2a): Handle. | |
36 | * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a. | |
37 | ||
670ec21d NC |
38 | 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com> |
39 | ||
40 | * crx-opc.c: Add popx,pushx insns. Indent code, fix comments. | |
41 | ||
ed049af3 NC |
42 | 2004-07-22 Nick Clifton <nickc@redhat.com> |
43 | ||
44 | PR/280 | |
45 | * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the | |
46 | insns - this is done by objdump itself. | |
47 | * h8500-dis.c (print_insn_h8500): Likewise. | |
48 | ||
20f0a1fc NC |
49 | 2004-07-21 Jan Beulich <jbeulich@novell.com> |
50 | ||
51 | * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode | |
52 | regardless of address size prefix in effect. | |
53 | (ptr_reg): Size or address registers does not depend on rex64, but | |
54 | on the presence of an address size override. | |
55 | (OP_MMX): Use rex.x only for xmm registers. | |
56 | (OP_EM): Use rex.z only for xmm registers. | |
57 | ||
6f14957b MR |
58 | 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org> |
59 | ||
60 | * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2 | |
61 | move/branch operations to the bottom so that VR5400 multimedia | |
62 | instructions take precedence in disassembly. | |
63 | ||
1586d91e MR |
64 | 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org> |
65 | ||
66 | * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32 | |
67 | ISA-specific "break" encoding. | |
68 | ||
982de27a NC |
69 | 2004-07-13 Elvis Chiang <elvisfb@gmail.com> |
70 | ||
71 | * arm-opc.h: Fix typo in comment. | |
72 | ||
4300ab10 AS |
73 | 2004-07-11 Andreas Schwab <schwab@suse.de> |
74 | ||
75 | * m68k-dis.c (m68k_valid_ea): Fix typos in last change. | |
76 | ||
8577e690 AS |
77 | 2004-07-09 Andreas Schwab <schwab@suse.de> |
78 | ||
79 | * m68k-dis.c (m68k_valid_ea): Check validity of all codes. | |
80 | ||
1fe1f39c NC |
81 | 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com> |
82 | ||
83 | * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c. | |
84 | (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo. | |
85 | (crx-dis.lo): New target. | |
86 | (crx-opc.lo): Likewise. | |
87 | * Makefile.in: Regenerate. | |
88 | * configure.in: Handle bfd_crx_arch. | |
89 | * configure: Regenerate. | |
90 | * crx-dis.c: New file. | |
91 | * crx-opc.c: New file. | |
92 | * disassemble.c (ARCH_crx): Define. | |
93 | (disassembler): Handle ARCH_crx. | |
94 | ||
7a33b495 JW |
95 | 2004-06-29 James E Wilson <wilson@specifixinc.com> |
96 | ||
97 | * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds. | |
98 | * ia64-asmtab.c: Regnerate. | |
99 | ||
98e69875 AM |
100 | 2004-06-28 Alan Modra <amodra@bigpond.net.au> |
101 | ||
102 | * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf. | |
103 | (extract_fxm): Don't test dialect. | |
104 | (XFXFXM_MASK): Include the power4 bit. | |
105 | (XFXM): Add p4 param. | |
106 | (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr. | |
107 | ||
a53b85e2 AO |
108 | 2004-06-27 Alexandre Oliva <aoliva@redhat.com> |
109 | ||
110 | 2003-07-21 Richard Sandiford <rsandifo@redhat.com> | |
111 | * disassemble.c (disassembler): Handle bfd_mach_h8300sxn. | |
112 | ||
d0618d1c AM |
113 | 2004-06-26 Alan Modra <amodra@bigpond.net.au> |
114 | ||
115 | * ppc-opc.c (BH, XLBH_MASK): Define. | |
116 | (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl. | |
117 | ||
1d9f512f AM |
118 | 2004-06-24 Alan Modra <amodra@bigpond.net.au> |
119 | ||
120 | * i386-dis.c (x_mode): Comment. | |
121 | (two_source_ops): File scope. | |
122 | (float_mem): Correct fisttpll and fistpll. | |
123 | (float_mem_mode): New table. | |
124 | (dofloat): Use it. | |
125 | (OP_E): Correct intel mode PTR output. | |
126 | (ptr_reg): Use open_char and close_char. | |
127 | (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for | |
128 | operands. Set two_source_ops. | |
129 | ||
52886d70 AM |
130 | 2004-06-15 Alan Modra <amodra@bigpond.net.au> |
131 | ||
132 | * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size | |
133 | instead of _raw_size. | |
134 | ||
bad9ceea JJ |
135 | 2004-06-08 Jakub Jelinek <jakub@redhat.com> |
136 | ||
137 | * ia64-gen.c (in_iclass): Handle more postinc st | |
138 | and ld variants. | |
139 | * ia64-asmtab.c: Rebuilt. | |
140 | ||
0451f5df MS |
141 | 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com> |
142 | ||
143 | * s390-opc.txt: Correct architecture mask for some opcodes. | |
144 | lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available | |
145 | in the esa mode as well. | |
146 | ||
f6f9408f JR |
147 | 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> |
148 | ||
149 | * sh-dis.c (target_arch): Make unsigned. | |
150 | (print_insn_sh): Replace (most of) switch with a call to | |
151 | sh_get_arch_from_bfd_mach(). Also use new architecture flags system. | |
152 | * sh-opc.h: Redefine architecture flags values. | |
153 | Add sh3-nommu architecture. | |
154 | Reorganise <arch>_up macros so they make more visual sense. | |
155 | (SH_MERGE_ARCH_SET): Define new macro. | |
156 | (SH_VALID_BASE_ARCH_SET): Likewise. | |
157 | (SH_VALID_MMU_ARCH_SET): Likewise. | |
158 | (SH_VALID_CO_ARCH_SET): Likewise. | |
159 | (SH_VALID_ARCH_SET): Likewise. | |
160 | (SH_MERGE_ARCH_SET_VALID): Likewise. | |
161 | (SH_ARCH_SET_HAS_FPU): Likewise. | |
162 | (SH_ARCH_SET_HAS_DSP): Likewise. | |
163 | (SH_ARCH_UNKNOWN_ARCH): Likewise. | |
164 | (sh_get_arch_from_bfd_mach): Add prototype. | |
165 | (sh_get_arch_up_from_bfd_mach): Likewise. | |
166 | (sh_get_bfd_mach_from_arch_set): Likewise. | |
167 | (sh_merge_bfd_arc): Likewise. | |
168 | ||
be8c092b NC |
169 | 2004-05-24 Peter Barada <peter@the-baradas.com> |
170 | ||
171 | * m68k-dis.c(print_insn_m68k): Strip body of diassembly out | |
172 | into new match_insn_m68k function. Loop over canidate | |
173 | matches and select first that completely matches. | |
174 | * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit. | |
175 | * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea | |
176 | to verify addressing for MAC/EMAC. | |
177 | * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC | |
178 | reigster halves since 'fpu' and 'spl' look misleading. | |
179 | * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases. | |
180 | * m68k-opc.c: Rearragne mac/emac cases to use longest for | |
181 | first, tighten up match masks. | |
182 | * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce | |
183 | 'size' from special case code in print_insn_m68k to | |
184 | determine decode size of insns. | |
185 | ||
a30e9cc4 AM |
186 | 2004-05-19 Alan Modra <amodra@bigpond.net.au> |
187 | ||
188 | * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as | |
189 | well as when -mpower4. | |
190 | ||
9598fbe5 NC |
191 | 2004-05-13 Nick Clifton <nickc@redhat.com> |
192 | ||
193 | * po/fr.po: Updated French translation. | |
194 | ||
6b6e92f4 NC |
195 | 2004-05-05 Peter Barada <peter@the-baradas.com> |
196 | ||
197 | * m68k-dis.c(print_insn_m68k): Add new chips, use core | |
198 | variants in arch_mask. Only set m68881/68851 for 68k chips. | |
199 | * m68k-op.c: Switch from ColdFire chips to core variants. | |
200 | ||
a404d431 AM |
201 | 2004-05-05 Alan Modra <amodra@bigpond.net.au> |
202 | ||
a30e9cc4 | 203 | PR 147. |
a404d431 AM |
204 | * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC. |
205 | ||
f3806e43 BE |
206 | 2004-04-29 Ben Elliston <bje@au.ibm.com> |
207 | ||
520ceea4 BE |
208 | * ppc-opc.c (XCMPL): Renmame to XOPL. Update users. |
209 | (powerpc_opcodes): Add "dbczl" instruction for PPC970. | |
f3806e43 | 210 | |
1f1799d5 KK |
211 | 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp> |
212 | ||
213 | * sh-dis.c (print_insn_sh): Print the value in constant pool | |
214 | as a symbol if it looks like a symbol. | |
215 | ||
fd99574b NC |
216 | 2004-04-22 Peter Barada <peter@the-baradas.com> |
217 | ||
218 | * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on | |
219 | appropriate ColdFire architectures. | |
220 | (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC | |
221 | mask addressing. | |
222 | Add EMAC instructions, fix MAC instructions. Remove | |
223 | macmw/macml/msacmw/msacml instructions since mask addressing now | |
224 | supported. | |
225 | ||
b4781d44 JJ |
226 | 2004-04-20 Jakub Jelinek <jakub@redhat.com> |
227 | ||
228 | * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define. | |
229 | (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to | |
230 | suffix. Use fmov*x macros, create all 3 fpsize variants in one | |
231 | macro. Adjust all users. | |
232 | ||
91809fda NC |
233 | 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com> |
234 | ||
235 | * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs" | |
236 | separately. | |
237 | ||
f4453dfa NC |
238 | 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> |
239 | ||
240 | * m32r-asm.c: Regenerate. | |
241 | ||
9b0de91a SS |
242 | 2004-03-29 Stan Shebs <shebs@apple.com> |
243 | ||
244 | * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer | |
245 | used. | |
246 | ||
e20c0b3d AM |
247 | 2004-03-19 Alan Modra <amodra@bigpond.net.au> |
248 | ||
249 | * aclocal.m4: Regenerate. | |
250 | * config.in: Regenerate. | |
251 | * configure: Regenerate. | |
252 | * po/POTFILES.in: Regenerate. | |
253 | * po/opcodes.pot: Regenerate. | |
254 | ||
fdd12ef3 AM |
255 | 2004-03-16 Alan Modra <amodra@bigpond.net.au> |
256 | ||
257 | * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle | |
258 | PPC_OPERANDS_GPR_0. | |
259 | * ppc-opc.c (RA0): Define. | |
260 | (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. | |
261 | (RAOPT): Rename from RAO. Update all uses. | |
a9c3619e | 262 | (powerpc_opcodes): Use RA0 as appropriate. |
fdd12ef3 | 263 | |
2dc111b3 | 264 | 2004-03-15 Aldy Hernandez <aldyh@redhat.com> |
fdd12ef3 AM |
265 | |
266 | * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg. | |
2dc111b3 | 267 | |
7bfeee7b AM |
268 | 2004-03-15 Alan Modra <amodra@bigpond.net.au> |
269 | ||
270 | * sparc-dis.c (print_insn_sparc): Update getword prototype. | |
271 | ||
7ffdda93 ML |
272 | 2004-03-12 Michal Ludvig <mludvig@suse.cz> |
273 | ||
274 | * i386-dis.c (GRPPLOCK): Delete. | |
7bfeee7b | 275 | (grps): Delete GRPPLOCK entry. |
7ffdda93 | 276 | |
cc0ec051 AM |
277 | 2004-03-12 Alan Modra <amodra@bigpond.net.au> |
278 | ||
279 | * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions. | |
280 | (M, Mp): Use OP_M. | |
281 | (None, PADLOCK_SPECIAL, PADLOCK_0): Delete. | |
282 | (GRPPADLCK): Define. | |
283 | (dis386): Use NOP_Fixup on "nop". | |
284 | (dis386_twobyte): Use GRPPADLCK on opcode 0xa7. | |
285 | (twobyte_has_modrm): Set for 0xa7. | |
286 | (padlock_table): Delete. Move to.. | |
287 | (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence | |
288 | and clflush. | |
289 | (print_insn): Revert PADLOCK_SPECIAL code. | |
290 | (OP_E): Delete sfence, lfence, mfence checks. | |
291 | ||
4fd61dcb JJ |
292 | 2004-03-12 Jakub Jelinek <jakub@redhat.com> |
293 | ||
294 | * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg. | |
295 | (INVLPG_Fixup): New function. | |
296 | (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag. | |
297 | ||
0f10071e ML |
298 | 2004-03-12 Michal Ludvig <mludvig@suse.cz> |
299 | ||
300 | * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines. | |
301 | (dis386_twobyte): Opcode 0xa7 is PADLOCK_0. | |
302 | (padlock_table): New struct with PadLock instructions. | |
303 | (print_insn): Handle PADLOCK_SPECIAL. | |
304 | ||
c02908d2 AM |
305 | 2004-03-12 Alan Modra <amodra@bigpond.net.au> |
306 | ||
307 | * i386-dis.c (grps): Use clflush by default for 0x0fae/7. | |
308 | (OP_E): Twiddle clflush to sfence here. | |
309 | ||
d5bb7600 NC |
310 | 2004-03-08 Nick Clifton <nickc@redhat.com> |
311 | ||
312 | * po/de.po: Updated German translation. | |
313 | ||
ae51a426 JR |
314 | 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com> |
315 | ||
316 | * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in | |
317 | nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. | |
318 | * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions | |
319 | accordingly. | |
320 | ||
676a64f4 RS |
321 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
322 | ||
323 | * frv-asm.c: Regenerate. | |
324 | * frv-desc.c: Regenerate. | |
325 | * frv-desc.h: Regenerate. | |
326 | * frv-dis.c: Regenerate. | |
327 | * frv-ibld.c: Regenerate. | |
328 | * frv-opc.c: Regenerate. | |
329 | * frv-opc.h: Regenerate. | |
330 | ||
c7a48b9a RS |
331 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
332 | ||
333 | * frv-desc.c, frv-opc.c: Regenerate. | |
334 | ||
8ae0baa2 RS |
335 | 2004-03-01 Richard Sandiford <rsandifo@redhat.com> |
336 | ||
337 | * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. | |
338 | ||
ce11586c JR |
339 | 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> |
340 | ||
341 | * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4. | |
342 | Also correct mistake in the comment. | |
343 | ||
6a5709a5 JR |
344 | 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> |
345 | ||
346 | * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to | |
347 | ensure that double registers have even numbers. | |
348 | Add REG_N_B01 for nn01 (binary 01) nibble to ensure | |
349 | that reserved instruction 0xfffd does not decode the same | |
350 | as 0xfdfd (ftrv). | |
351 | * sh-opc.h: Add REG_N_D nibble type and use it whereever | |
352 | REG_N refers to a double register. | |
353 | Add REG_N_B01 nibble type and use it instead of REG_NM | |
354 | in ftrv. | |
355 | Adjust the bit patterns in a few comments. | |
356 | ||
e5d2b64f | 357 | 2004-02-25 Aldy Hernandez <aldyh@redhat.com> |
7bfeee7b AM |
358 | |
359 | * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst. | |
e5d2b64f | 360 | |
1f04b05f AH |
361 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> |
362 | ||
363 | * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat. | |
364 | ||
2f3b8700 AH |
365 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> |
366 | ||
367 | * ppc-opc.c (powerpc_opcodes): Add m*ivor35. | |
368 | ||
f0b26da6 | 369 | 2004-02-20 Aldy Hernandez <aldyh@redhat.com> |
7bfeee7b AM |
370 | |
371 | * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34, | |
372 | mtivor32, mtivor33, mtivor34. | |
f0b26da6 | 373 | |
23d59c56 | 374 | 2004-02-19 Aldy Hernandez <aldyh@redhat.com> |
7bfeee7b AM |
375 | |
376 | * ppc-opc.c (powerpc_opcodes): Add mfmcar. | |
23d59c56 | 377 | |
34920d91 NC |
378 | 2004-02-10 Petko Manolov <petkan@nucleusys.com> |
379 | ||
380 | * arm-opc.h Maverick accumulator register opcode fixes. | |
381 | ||
44d86481 BE |
382 | 2004-02-13 Ben Elliston <bje@wasabisystems.com> |
383 | ||
384 | * m32r-dis.c: Regenerate. | |
385 | ||
17707c23 MS |
386 | 2004-01-27 Michael Snyder <msnyder@redhat.com> |
387 | ||
388 | * sh-opc.h (sh_table): "fsrra", not "fssra". | |
389 | ||
fe3a9bc4 NC |
390 | 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au> |
391 | ||
392 | * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten | |
393 | contraints. | |
394 | ||
ff24f124 JJ |
395 | 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au> |
396 | ||
397 | * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args. | |
398 | ||
a02a862a AM |
399 | 2004-01-19 Alan Modra <amodra@bigpond.net.au> |
400 | ||
401 | * i386-dis.c (OP_E): Print scale factor on intel mode sib when not | |
402 | 1. Don't print scale factor on AT&T mode when index missing. | |
403 | ||
d164ea7f AO |
404 | 2004-01-16 Alexandre Oliva <aoliva@redhat.com> |
405 | ||
406 | * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended | |
407 | when loaded into XR registers. | |
408 | ||
cb10e79a RS |
409 | 2004-01-14 Richard Sandiford <rsandifo@redhat.com> |
410 | ||
411 | * frv-desc.h: Regenerate. | |
412 | * frv-desc.c: Regenerate. | |
413 | * frv-opc.c: Regenerate. | |
414 | ||
f532f3fa MS |
415 | 2004-01-13 Michael Snyder <msnyder@redhat.com> |
416 | ||
417 | * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn. | |
418 | ||
e45d0630 PB |
419 | 2004-01-09 Paul Brook <paul@codesourcery.com> |
420 | ||
421 | * arm-opc.h (arm_opcodes): Move generic mcrr after known | |
422 | specific opcodes. | |
423 | ||
3ba7a1aa DJ |
424 | 2004-01-07 Daniel Jacobowitz <drow@mvista.com> |
425 | ||
426 | * Makefile.am (libopcodes_la_DEPENDENCIES) | |
427 | (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory | |
428 | comment about the problem. | |
429 | * Makefile.in: Regenerate. | |
430 | ||
ba2d3f07 AO |
431 | 2004-01-06 Alexandre Oliva <aoliva@redhat.com> |
432 | ||
433 | 2003-12-19 Alexandre Oliva <aoliva@redhat.com> | |
434 | * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some | |
435 | cut&paste errors in shifting/truncating numerical operands. | |
436 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> | |
437 | * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo. | |
438 | (parse_uslo16): Likewise. | |
439 | (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. | |
440 | (parse_d12): Parse gotoff12 and gotofffuncdesc12. | |
441 | (parse_s12): Likewise. | |
442 | 2003-08-04 Alexandre Oliva <aoliva@redhat.com> | |
443 | * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo. | |
444 | (parse_uslo16): Likewise. | |
445 | (parse_uhi16): Parse gothi and gotfuncdeschi. | |
446 | (parse_d12): Parse got12 and gotfuncdesc12. | |
447 | (parse_s12): Likewise. | |
448 | ||
3ab48931 NC |
449 | 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl> |
450 | ||
451 | * msp430-dis.c (msp430_doubleoperand): Check for an 'add' | |
452 | instruction which looks similar to an 'rla' instruction. | |
a0bd404e | 453 | |
c9e214e5 | 454 | For older changes see ChangeLog-0203 |
252b5132 RH |
455 | \f |
456 | Local Variables: | |
2f6d2f85 NC |
457 | mode: change-log |
458 | left-margin: 8 | |
459 | fill-column: 74 | |
252b5132 RH |
460 | version-control: never |
461 | End: |