[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (thumb_opcodes): Document %n control code.  Add entry for
	CLRM.
	(print_insn_thumb32): Add logic to print %n CLRM register list.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %P
	and %Q patterns.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
	(print_insn_thumb32): Edit the switch case for %Z.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instruction bfl.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
	Arm register with r13 and r15 unpredictable.
	(thumb32_opcodes): New instructions for bfx and bflx.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instructions for bf.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.

2019-04-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.

2019-04-12  John Darrington <john@darrington.wattle.id.au>

	s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
	"optr". ("operator" is a reserved word in c++).

2019-04-11  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (aarch64_print_operand): Add case for
	AARCH64_OPND_Rt_SP.
	(verify_constraints): Likewise.
	* aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
	(struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
	to accept Rt|SP as first operand.
	(AARCH64_OPERANDS): Add new Rt_SP.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

2019-04-11  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.
	* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.

2019-04-09  Robert Suchanek  <robert.suchanek@mips.com>

	* mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.

2019-04-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Consolidate AVX512 BF16 entries.
	* i386-init.h: Regenerated.

2019-04-07  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (print_insn_powerpc): Use a tiny state machine
	op_separator to control printing of spaces, comma and parens
	rather than need_comma, need_paren and spaces vars.

2019-04-07  Alan Modra  <amodra@gmail.com>

	PR 24421
	* arm-dis.c (print_insn_coprocessor): Correct bracket placement.
	(print_insn_neon, print_insn_arm): Likewise.

2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>

	* i386-dis-evex.h (evex_table): Updated to support BF16
	instructions.
	* i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
	and EVEX_W_0F3872_P_3.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
	(cpu_flags): Add bitfield for CpuAVX512_BF16.
	* i386-opc.h (enum): Add CpuAVX512_BF16.
	(i386_cpu_flags): Add bitfield for cpuavx512_bf16.
	* i386-opc.tbl: Add AVX512 BF16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

2019-04-05  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
	(powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
	to favour printing of "-" branch hint when using the "y" bit.
	Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.

2019-04-05  Alan Modra  <amodra@gmail.com>

	* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
	opcode until first operand is output.

2019-04-04  Peter Bergner  <bergner@linux.ibm.com>

	PR gas/24349
	* ppc-opc.c (valid_bo_pre_v2): Add comments.
	(valid_bo_post_v2): Add support for 'at' branch hints.
	(insert_bo): Only error on branch on ctr.
	(get_bo_hint_mask): New function.
	(insert_boe): Add new 'branch_taken' formal argument.  Add support
	for inserting 'at' branch hints.
	(extract_boe): Add new 'branch_taken' formal argument.  Add support
	for extracting 'at' branch hints.
	(insert_bom, extract_bom, insert_bop, extract_bop): New functions.
	(BOE): Delete operand.
	(BOM, BOP): New operands.
	(RM): Update value.
	(XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
	(powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
	bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
	(powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
	bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
	<bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
	bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
	bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
	bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
	bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
	bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
	bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
	bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
	beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
	bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
	buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
	bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
	bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
	bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
	bttarl+>: New extended mnemonics.

2019-03-28  Alan Modra  <amodra@gmail.com>

	PR 24390
	* ppc-opc.c (BTF): Define.
	(powerpc_opcodes): Use for mtfsb*.
	* ppc-dis.c (print_insn_powerpc): Print fields with both
	PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
	(mapping_symbol_for_insn): Implement new algorithm.
	(print_insn): Remove duplicate code.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (print_insn_aarch64):
	Implement override.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
	order.

2019-03-25  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (last_stop_offset): New.
	(print_insn_aarch64): Use stop_offset.

2019-03-19  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/24359
	* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
	CPU_ANY_AVX2_FLAGS.
	* i386-init.h: Regenerated.

2019-03-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/24348
	* i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
	vmovdqu16, vmovdqu32 and vmovdqu64.
	* i386-tbl.h: Regenerated.

2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-opc.txt: Rename selhhhr to selfhr.  Remove optional operand
	from vstrszb, vstrszh, and vstrszf.

2019-03-12  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-opc.txt: Add instruction descriptions.

2019-02-08  Jim Wilson  <jimw@sifive.com>

	* riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
	<bne>: Likewise.

2019-02-07  Tamar Christina  <tamar.christina@arm.com>

	* arm-dis.c (arm_opcodes): Redefine hlt to armv1.

2019-02-07  Tamar Christina  <tamar.christina@arm.com>

	PR binutils/23212
	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
	* aarch64-opc.c (verify_elem_sd): New.
	(fields): Add FLD_sz entr.
	* aarch64-tbl.h (_SIMD_INSN): New.
	(aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
	fmulx scalar and vector by element isns.

2019-02-07  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2019-01-31  Andreas Krebbel  <krebbel@linux.ibm.com>

	* s390-mkopc.c (main): Accept arch13 as cpu string.
	* s390-opc.c: Add new instruction formats and instruction opcode
	masks.
	* s390-opc.txt: Add new arch13 instructions.

2019-01-25  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-tbl.h (QL_LDST_AT): Update macro.
	(aarch64_opcode): Change encoding for stg, stzg
	st2g and st2zg.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

2019-01-25  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.
	* aarch64-tbl.h (aarch64_opcode): Add new stzgm.

2019-01-25  Sudakshina Das  <sudi.das@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
	* aarch64-asm.h (ins_addr_simple_2): Likeiwse.
	* aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
	* aarch64-dis.h (ext_addr_simple_2): Likewise.
	* aarch64-opc.c (operand_general_constraint_met_p): Remove
	case for ldstgv_indexed.
	(aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
	* aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
	(AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
	* aarch64-asm-2.c: Regenerated.
	* aarch64-dis-2.c: Regenerated.
	* aarch64-opc-2.c: Regenerated.

2019-01-23  Nick Clifton  <nickc@redhat.com>

	* po/pt_BR.po: Updated Brazilian Portuguese translation.

2019-01-21  Nick Clifton  <nickc@redhat.com>

	* po/de.po: Updated German translation.
	* po/uk.po: Updated Ukranian translation.

2019-01-20  Chenghua Xu  <paul.hua.gm@gmail.com>
	* mips-dis.c (mips_arch_choices): Fix typo in
	gs464, gs464e and gs264e descriptors.

2019-01-19  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/opcodes.pot: Regenerate.

2018-06-24  Nick Clifton  <nickc@redhat.com>

	2.32 branch created.

2019-01-09  John Darrington <john@darrington.wattle.id.au>

	* s12z-dis.c (print_insn_s12z):  Do not dereference an operand
	if it is null.
	-dis.c (opr_emit_disassembly): Do not omit an index if it is
	zero.

2019-01-09  Andrew Paprocki  <andrew@ishiboo.com>

	* configure: Regenerate.

2019-01-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.

2019-01-03  John Darrington <john@darrington.wattle.id.au>

	* s12z-opc.c: New file.
	* s12z-opc.h: New file.
	* s12z-dis.c: Removed all code not directly related to display
	of instructions.  Used the interface provided by the new files
	instead.
	* Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
	* Makefile.in: Regenerate.
	* configure.ac (bfd_s12z_arch): Correct the dependencies.
	* configure: Regenerate.

2019-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2018
\f
Copyright (C) 2019 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
4b5a202f AV	1	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	2
	3	* arm-dis.c (thumb_opcodes): Document %n control code. Add entry for
	4	CLRM.
	5	(print_insn_thumb32): Add logic to print %n CLRM register list.
	6
60f993ce AV	7	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	8
	9	* arm-dis.c (print_insn_thumb32): Updated to accept new %P
	10	and %Q patterns.
	11
f6b2b12d AV	12	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	13
	14	* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
	15	(print_insn_thumb32): Edit the switch case for %Z.
	16
1889da70 AV	17	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	18
	19	* arm-dis.c (print_insn_thumb32): Updated to accept new %Z pattern.
	20
65d1bc05 AV	21	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	22
	23	* arm-dis.c (thumb32_opcodes): New instruction bfl.
	24
1caf72a5 AV	25	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	26
	27	* arm-dis.c (print_insn_thumb32): Updated to accept new %Y pattern.
	28
f1c7f421 AV	29	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	30
	31	* arm-dis.c (print_insn_thumb32): Add '%<bitfield>S' to print an
	32	Arm register with r13 and r15 unpredictable.
	33	(thumb32_opcodes): New instructions for bfx and bflx.
	34
4389b29a AV	35	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	36
	37	* arm-dis.c (thumb32_opcodes): New instructions for bf.
	38
e5d6e09e AV	39	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	40
	41	* arm-dis.c (print_insn_thumb32): Updated to accept new %W pattern.
	42
e12437dc AV	43	2019-04-15 Sudakshina Das <sudi.das@arm.com>
	44
	45	* arm-dis.c (print_insn_thumb32): Updated to accept new %G pattern.
	46
031254f2 AV	47	2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
	48
	49	* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
	50
e5a557ac JD	51	2019-04-12 John Darrington <john@darrington.wattle.id.au>
	52
	53	s12z-dis.c, s12z-opc.c, s12z-opc.h: Replace "operator" with
	54	"optr". ("operator" is a reserved word in c++).
	55
bd7ceb8d SD	56	2019-04-11 Sudakshina Das <sudi.das@arm.com>
	57
	58	* aarch64-opc.c (aarch64_print_operand): Add case for
	59	AARCH64_OPND_Rt_SP.
	60	(verify_constraints): Likewise.
	61	* aarch64-tbl.h (QL_LDST_AT): Update to add SP qualifier.
	62	(struct aarch64_opcode): Update stg, stzg, st2g, stz2g instructions
	63	to accept Rt\|SP as first operand.
	64	(AARCH64_OPERANDS): Add new Rt_SP.
	65	* aarch64-asm-2.c: Regenerated.
	66	* aarch64-dis-2.c: Regenerated.
	67	* aarch64-opc-2.c: Regenerated.
	68
e54010f1 SD	69	2019-04-11 Sudakshina Das <sudi.das@arm.com>
	70
	71	* aarch64-asm-2.c: Regenerated.
	72	* aarch64-dis-2.c: Likewise.
	73	* aarch64-opc-2.c: Likewise.
	74	* aarch64-tbl.h (aarch64_opcode): Add new ldgm and stgm.
	75
7e96e219 RS	76	2019-04-09 Robert Suchanek <robert.suchanek@mips.com>
	77
	78	* mips-opc.c (mips_builtin_opcodes): Add RDHWR rt rd sel.
	79
6f2791d5 L	80	2019-04-08 H.J. Lu <hongjiu.lu@intel.com>
	81
	82	* i386-opc.tbl: Consolidate AVX512 BF16 entries.
	83	* i386-init.h: Regenerated.
	84
e392bad3 AM	85	2019-04-07 Alan Modra <amodra@gmail.com>
	86
	87	* ppc-dis.c (print_insn_powerpc): Use a tiny state machine
	88	op_separator to control printing of spaces, comma and parens
	89	rather than need_comma, need_paren and spaces vars.
	90
dffaa15c AM	91	2019-04-07 Alan Modra <amodra@gmail.com>
	92
	93	PR 24421
	94	* arm-dis.c (print_insn_coprocessor): Correct bracket placement.
	95	(print_insn_neon, print_insn_arm): Likewise.
	96
d6aab7a1 XG	97	2019-04-05 Xuepeng Guo <xuepeng.guo@intel.com>
	98
	99	* i386-dis-evex.h (evex_table): Updated to support BF16
	100	instructions.
	101	* i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
	102	and EVEX_W_0F3872_P_3.
	103	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
	104	(cpu_flags): Add bitfield for CpuAVX512_BF16.
	105	* i386-opc.h (enum): Add CpuAVX512_BF16.
	106	(i386_cpu_flags): Add bitfield for cpuavx512_bf16.
	107	* i386-opc.tbl: Add AVX512 BF16 instructions.
	108	* i386-init.h: Regenerated.
	109	* i386-tbl.h: Likewise.
	110
66e85460 AM	111	2019-04-05 Alan Modra <amodra@gmail.com>
	112
	113	* ppc-opc.c (XLBH_MASK): Subtract off BH field from BB_MASK.
	114	(powerpc_opcodes): Reorder bcctr and bclr extended mnemonics
	115	to favour printing of "-" branch hint when using the "y" bit.
	116	Allow BH field on bc{ctr,lr,tar}{,l}{-,+}.
	117
c2b1c275 AM	118	2019-04-05 Alan Modra <amodra@gmail.com>
	119
	120	* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
	121	opcode until first operand is output.
	122
aae9718e PB	123	2019-04-04 Peter Bergner <bergner@linux.ibm.com>
	124
	125	PR gas/24349
	126	* ppc-opc.c (valid_bo_pre_v2): Add comments.
	127	(valid_bo_post_v2): Add support for 'at' branch hints.
	128	(insert_bo): Only error on branch on ctr.
	129	(get_bo_hint_mask): New function.
	130	(insert_boe): Add new 'branch_taken' formal argument. Add support
	131	for inserting 'at' branch hints.
	132	(extract_boe): Add new 'branch_taken' formal argument. Add support
	133	for extracting 'at' branch hints.
	134	(insert_bom, extract_bom, insert_bop, extract_bop): New functions.
	135	(BOE): Delete operand.
	136	(BOM, BOP): New operands.
	137	(RM): Update value.
	138	(XLYLK, XLYLK_MASK, XLYBB_MASK): Delete.
	139	(powerpc_opcodes) <bc-, bcl-, bca-, bcla-, bclr-, bclrl-, bcctr-,
	140	bcctrl-, bctar-, bctarl->: Replace BOE with BOM.
	141	(powerpc_opcodes) <bc+, bcl+, bca+, bcla+, bclr+, bclrl+, bcctr+,
	142	bcctrl+, bctar+, bctarl+>: Replace BOE with BOP.
	143	<bdnztar, bdnztarl, bdztar, bdztarl, btar, btarl, bdnztar-, bdnztarl-,
	144	bdnztar+, bdnztarl+, bdztar-, bdztarl-, bdztar+, bdztarl+, bgetar,
	145	bnltar, bgetarl, bnltarl, bletar, bngtar, bletarl, bngtarl, bnetar,
	146	bnetarl, bnstar, bnutar, bnstarl, bnutarl, bgetar-, bnltar-, bgetarl-,
	147	bnltarl-, bletar-, bngtar-, bletarl-, bngtarl-, bnetar-, bnetarl-,
	148	bnstar-, bnutar-, bnstarl-, bnutarl-, bgetar+, bnltar+, bgetarl+,
	149	bnltarl+, bletar+, bngtar+, bletarl+, bngtarl+, bnetar+, bnetarl+,
	150	bnstar+, bnutar+, bnstarl+, bnutarl+, blttar, blttarl, bgttar, bgttarl,
	151	beqtar, beqtarl, bsotar, buntar, bsotarl, buntarl, blttar-, blttarl-,
	152	bgttar-, bgttarl-, beqtar-, beqtarl-, bsotar-, buntar-, bsotarl-,
	153	buntarl-, blttar+, blttarl+, bgttar+, bgttarl+, beqtar+, beqtarl+,
	154	bsotar+, buntar+, bsotarl+, buntarl+, bdnzftar, bdnzftarl, bdzftar,
	155	bdzftarl, bftar, bftarl, bftar-, bftarl-, bftar+, bftarl+, bdnzttar,
	156	bdnzttarl, bdzttar, bdzttarl, bttar, bttarl, bttar-, bttarl-, bttar+,
	157	bttarl+>: New extended mnemonics.
	158
96a86c01 AM	159	2019-03-28 Alan Modra <amodra@gmail.com>
	160
	161	PR 24390
	162	* ppc-opc.c (BTF): Define.
	163	(powerpc_opcodes): Use for mtfsb*.
	164	* ppc-dis.c (print_insn_powerpc): Print fields with both
	165	PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
	166
796d6298 TC	167	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	168
	169	* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
	170	(mapping_symbol_for_insn): Implement new algorithm.
	171	(print_insn): Remove duplicate code.
	172
60df3720 TC	173	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	174
	175	* aarch64-dis.c (print_insn_aarch64):
	176	Implement override.
	177
51457761 TC	178	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	179
	180	* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
	181	order.
	182
53b2f36b TC	183	2019-03-25 Tamar Christina <tamar.christina@arm.com>
	184
	185	* aarch64-dis.c (last_stop_offset): New.
	186	(print_insn_aarch64): Use stop_offset.
	187
89199bb5 L	188	2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
	189
	190	PR gas/24359
	191	* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
	192	CPU_ANY_AVX2_FLAGS.
	193	* i386-init.h: Regenerated.
	194
97ed31ae L	195	2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
	196
	197	PR gas/24348
	198	* i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
	199	vmovdqu16, vmovdqu32 and vmovdqu64.
	200	* i386-tbl.h: Regenerated.
	201
0919bfe9 AK	202	2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
	203
	204	* s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
	205	from vstrszb, vstrszh, and vstrszf.
	206
	207	2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
	208
	209	* s390-opc.txt: Add instruction descriptions.
	210
21820ebe JW	211	2019-02-08 Jim Wilson <jimw@sifive.com>
	212
	213	* riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
	214	<bne>: Likewise.
	215
f7dd2fb2 TC	216	2019-02-07 Tamar Christina <tamar.christina@arm.com>
	217
	218	* arm-dis.c (arm_opcodes): Redefine hlt to armv1.
	219
6456d318 TC	220	2019-02-07 Tamar Christina <tamar.christina@arm.com>
	221
	222	PR binutils/23212
	223	* aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
	224	* aarch64-opc.c (verify_elem_sd): New.
	225	(fields): Add FLD_sz entr.
	226	* aarch64-tbl.h (_SIMD_INSN): New.
	227	(aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
	228	fmulx scalar and vector by element isns.
	229
4a83b610 NC	230	2019-02-07 Nick Clifton <nickc@redhat.com>
	231
	232	* po/sv.po: Updated Swedish translation.
	233
fc60b8c8 AK	234	2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
	235
	236	* s390-mkopc.c (main): Accept arch13 as cpu string.
	237	* s390-opc.c: Add new instruction formats and instruction opcode
	238	masks.
	239	* s390-opc.txt: Add new arch13 instructions.
	240
e10620d3 TC	241	2019-01-25 Sudakshina Das <sudi.das@arm.com>
	242
	243	* aarch64-tbl.h (QL_LDST_AT): Update macro.
	244	(aarch64_opcode): Change encoding for stg, stzg
	245	st2g and st2zg.
	246	* aarch64-asm-2.c: Regenerated.
	247	* aarch64-dis-2.c: Regenerated.
	248	* aarch64-opc-2.c: Regenerated.
	249
20a4ca55 SD	250	2019-01-25 Sudakshina Das <sudi.das@arm.com>
	251
	252	* aarch64-asm-2.c: Regenerated.
	253	* aarch64-dis-2.c: Likewise.
	254	* aarch64-opc-2.c: Likewise.
	255	* aarch64-tbl.h (aarch64_opcode): Add new stzgm.
	256
550fd7bf SD	257	2019-01-25 Sudakshina Das <sudi.das@arm.com>
	258	Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
	259
	260	* aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
	261	* aarch64-asm.h (ins_addr_simple_2): Likeiwse.
	262	* aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
	263	* aarch64-dis.h (ext_addr_simple_2): Likewise.
	264	* aarch64-opc.c (operand_general_constraint_met_p): Remove
	265	case for ldstgv_indexed.
	266	(aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
	267	* aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
	268	(AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
	269	* aarch64-asm-2.c: Regenerated.
	270	* aarch64-dis-2.c: Regenerated.
	271	* aarch64-opc-2.c: Regenerated.
	272
d9938630 NC	273	2019-01-23 Nick Clifton <nickc@redhat.com>
	274
	275	* po/pt_BR.po: Updated Brazilian Portuguese translation.
	276
375cd423 NC	277	2019-01-21 Nick Clifton <nickc@redhat.com>
	278
	279	* po/de.po: Updated German translation.
	280	* po/uk.po: Updated Ukranian translation.
	281
57299f48 CX	282	2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
	283	* mips-dis.c (mips_arch_choices): Fix typo in
	284	gs464, gs464e and gs264e descriptors.
	285
f48dfe41 NC	286	2019-01-19 Nick Clifton <nickc@redhat.com>
	287
	288	* configure: Regenerate.
	289	* po/opcodes.pot: Regenerate.
	290
f974f26c NC	291	2018-06-24 Nick Clifton <nickc@redhat.com>
	292
	293	2.32 branch created.
	294
39f286cd JD	295	2019-01-09 John Darrington <john@darrington.wattle.id.au>
39f286cd JD	296
448b8ca8 JD	297	* s12z-dis.c (print_insn_s12z): Do not dereference an operand
	298	if it is null.
	299	-dis.c (opr_emit_disassembly): Do not omit an index if it is
39f286cd JD	300	zero.
39f286cd JD	301
3107326d AP	302	2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
	303
	304	* configure: Regenerate.
	305
7e9ca91e AM	306	2019-01-07 Alan Modra <amodra@gmail.com>
	307
	308	* configure: Regenerate.
	309	* po/POTFILES.in: Regenerate.
	310
ef1ad42b JD	311	2019-01-03 John Darrington <john@darrington.wattle.id.au>
	312
	313	* s12z-opc.c: New file.
	314	* s12z-opc.h: New file.
	315	* s12z-dis.c: Removed all code not directly related to display
	316	of instructions. Used the interface provided by the new files
	317	instead.
	318	* Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
7e9ca91e	319	* Makefile.in: Regenerate.
ef1ad42b	320	* configure.ac (bfd_s12z_arch): Correct the dependencies.
7e9ca91e	321	* configure: Regenerate.
ef1ad42b	322
82704155 AM	323	2019-01-01 Alan Modra <amodra@gmail.com>
	324
	325	Update year range in copyright notice of all files.
	326
d5c04e1b	327	For older changes see ChangeLog-2018
3499769a	328	\f
d5c04e1b	329	Copyright (C) 2019 Free Software Foundation, Inc.
3499769a AM	330
	331	Copying and distribution of this file, with or without modification,
	332	are permitted in any medium without royalty provided the copyright
	333	notice and this notice are preserved.
	334
	335	Local Variables:
	336	mode: change-log
	337	left-margin: 8
	338	fill-column: 74
	339	version-control: never
	340	End: