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Correctly assemble mov rX=imm.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
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7a33b495
JW
12004-06-29 James E Wilson <wilson@specifixinc.com>
2
3 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
4 * ia64-asmtab.c: Regnerate.
5
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62004-06-28 Alan Modra <amodra@bigpond.net.au>
7
8 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
9 (extract_fxm): Don't test dialect.
10 (XFXFXM_MASK): Include the power4 bit.
11 (XFXM): Add p4 param.
12 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
13
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142004-06-27 Alexandre Oliva <aoliva@redhat.com>
15
16 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
17 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
18
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192004-06-26 Alan Modra <amodra@bigpond.net.au>
20
21 * ppc-opc.c (BH, XLBH_MASK): Define.
22 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
23
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242004-06-24 Alan Modra <amodra@bigpond.net.au>
25
26 * i386-dis.c (x_mode): Comment.
27 (two_source_ops): File scope.
28 (float_mem): Correct fisttpll and fistpll.
29 (float_mem_mode): New table.
30 (dofloat): Use it.
31 (OP_E): Correct intel mode PTR output.
32 (ptr_reg): Use open_char and close_char.
33 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
34 operands. Set two_source_ops.
35
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362004-06-15 Alan Modra <amodra@bigpond.net.au>
37
38 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
39 instead of _raw_size.
40
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412004-06-08 Jakub Jelinek <jakub@redhat.com>
42
43 * ia64-gen.c (in_iclass): Handle more postinc st
44 and ld variants.
45 * ia64-asmtab.c: Rebuilt.
46
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472004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
48
49 * s390-opc.txt: Correct architecture mask for some opcodes.
50 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
51 in the esa mode as well.
52
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532004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
54
55 * sh-dis.c (target_arch): Make unsigned.
56 (print_insn_sh): Replace (most of) switch with a call to
57 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
58 * sh-opc.h: Redefine architecture flags values.
59 Add sh3-nommu architecture.
60 Reorganise <arch>_up macros so they make more visual sense.
61 (SH_MERGE_ARCH_SET): Define new macro.
62 (SH_VALID_BASE_ARCH_SET): Likewise.
63 (SH_VALID_MMU_ARCH_SET): Likewise.
64 (SH_VALID_CO_ARCH_SET): Likewise.
65 (SH_VALID_ARCH_SET): Likewise.
66 (SH_MERGE_ARCH_SET_VALID): Likewise.
67 (SH_ARCH_SET_HAS_FPU): Likewise.
68 (SH_ARCH_SET_HAS_DSP): Likewise.
69 (SH_ARCH_UNKNOWN_ARCH): Likewise.
70 (sh_get_arch_from_bfd_mach): Add prototype.
71 (sh_get_arch_up_from_bfd_mach): Likewise.
72 (sh_get_bfd_mach_from_arch_set): Likewise.
73 (sh_merge_bfd_arc): Likewise.
74
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752004-05-24 Peter Barada <peter@the-baradas.com>
76
77 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
78 into new match_insn_m68k function. Loop over canidate
79 matches and select first that completely matches.
80 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
81 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
82 to verify addressing for MAC/EMAC.
83 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
84 reigster halves since 'fpu' and 'spl' look misleading.
85 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
86 * m68k-opc.c: Rearragne mac/emac cases to use longest for
87 first, tighten up match masks.
88 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
89 'size' from special case code in print_insn_m68k to
90 determine decode size of insns.
91
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922004-05-19 Alan Modra <amodra@bigpond.net.au>
93
94 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
95 well as when -mpower4.
96
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972004-05-13 Nick Clifton <nickc@redhat.com>
98
99 * po/fr.po: Updated French translation.
100
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1012004-05-05 Peter Barada <peter@the-baradas.com>
102
103 * m68k-dis.c(print_insn_m68k): Add new chips, use core
104 variants in arch_mask. Only set m68881/68851 for 68k chips.
105 * m68k-op.c: Switch from ColdFire chips to core variants.
106
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1072004-05-05 Alan Modra <amodra@bigpond.net.au>
108
a30e9cc4 109 PR 147.
a404d431
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110 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
111
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1122004-04-29 Ben Elliston <bje@au.ibm.com>
113
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114 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
115 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
f3806e43 116
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1172004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
118
119 * sh-dis.c (print_insn_sh): Print the value in constant pool
120 as a symbol if it looks like a symbol.
121
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1222004-04-22 Peter Barada <peter@the-baradas.com>
123
124 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
125 appropriate ColdFire architectures.
126 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
127 mask addressing.
128 Add EMAC instructions, fix MAC instructions. Remove
129 macmw/macml/msacmw/msacml instructions since mask addressing now
130 supported.
131
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1322004-04-20 Jakub Jelinek <jakub@redhat.com>
133
134 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
135 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
136 suffix. Use fmov*x macros, create all 3 fpsize variants in one
137 macro. Adjust all users.
138
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1392004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
140
141 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
142 separately.
143
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1442004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
145
146 * m32r-asm.c: Regenerate.
147
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1482004-03-29 Stan Shebs <shebs@apple.com>
149
150 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
151 used.
152
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1532004-03-19 Alan Modra <amodra@bigpond.net.au>
154
155 * aclocal.m4: Regenerate.
156 * config.in: Regenerate.
157 * configure: Regenerate.
158 * po/POTFILES.in: Regenerate.
159 * po/opcodes.pot: Regenerate.
160
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1612004-03-16 Alan Modra <amodra@bigpond.net.au>
162
163 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
164 PPC_OPERANDS_GPR_0.
165 * ppc-opc.c (RA0): Define.
166 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
167 (RAOPT): Rename from RAO. Update all uses.
a9c3619e 168 (powerpc_opcodes): Use RA0 as appropriate.
fdd12ef3 169
2dc111b3 1702004-03-15 Aldy Hernandez <aldyh@redhat.com>
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171
172 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2dc111b3 173
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1742004-03-15 Alan Modra <amodra@bigpond.net.au>
175
176 * sparc-dis.c (print_insn_sparc): Update getword prototype.
177
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1782004-03-12 Michal Ludvig <mludvig@suse.cz>
179
180 * i386-dis.c (GRPPLOCK): Delete.
7bfeee7b 181 (grps): Delete GRPPLOCK entry.
7ffdda93 182
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1832004-03-12 Alan Modra <amodra@bigpond.net.au>
184
185 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
186 (M, Mp): Use OP_M.
187 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
188 (GRPPADLCK): Define.
189 (dis386): Use NOP_Fixup on "nop".
190 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
191 (twobyte_has_modrm): Set for 0xa7.
192 (padlock_table): Delete. Move to..
193 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
194 and clflush.
195 (print_insn): Revert PADLOCK_SPECIAL code.
196 (OP_E): Delete sfence, lfence, mfence checks.
197
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JJ
1982004-03-12 Jakub Jelinek <jakub@redhat.com>
199
200 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
201 (INVLPG_Fixup): New function.
202 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
203
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ML
2042004-03-12 Michal Ludvig <mludvig@suse.cz>
205
206 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
207 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
208 (padlock_table): New struct with PadLock instructions.
209 (print_insn): Handle PADLOCK_SPECIAL.
210
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2112004-03-12 Alan Modra <amodra@bigpond.net.au>
212
213 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
214 (OP_E): Twiddle clflush to sfence here.
215
d5bb7600
NC
2162004-03-08 Nick Clifton <nickc@redhat.com>
217
218 * po/de.po: Updated German translation.
219
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JR
2202003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
221
222 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
223 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
224 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
225 accordingly.
226
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RS
2272004-03-01 Richard Sandiford <rsandifo@redhat.com>
228
229 * frv-asm.c: Regenerate.
230 * frv-desc.c: Regenerate.
231 * frv-desc.h: Regenerate.
232 * frv-dis.c: Regenerate.
233 * frv-ibld.c: Regenerate.
234 * frv-opc.c: Regenerate.
235 * frv-opc.h: Regenerate.
236
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2372004-03-01 Richard Sandiford <rsandifo@redhat.com>
238
239 * frv-desc.c, frv-opc.c: Regenerate.
240
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RS
2412004-03-01 Richard Sandiford <rsandifo@redhat.com>
242
243 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
244
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JR
2452004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
246
247 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
248 Also correct mistake in the comment.
249
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JR
2502004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
251
252 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
253 ensure that double registers have even numbers.
254 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
255 that reserved instruction 0xfffd does not decode the same
256 as 0xfdfd (ftrv).
257 * sh-opc.h: Add REG_N_D nibble type and use it whereever
258 REG_N refers to a double register.
259 Add REG_N_B01 nibble type and use it instead of REG_NM
260 in ftrv.
261 Adjust the bit patterns in a few comments.
262
e5d2b64f 2632004-02-25 Aldy Hernandez <aldyh@redhat.com>
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264
265 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
e5d2b64f 266
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AH
2672004-02-20 Aldy Hernandez <aldyh@redhat.com>
268
269 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
270
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AH
2712004-02-20 Aldy Hernandez <aldyh@redhat.com>
272
273 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
274
f0b26da6 2752004-02-20 Aldy Hernandez <aldyh@redhat.com>
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276
277 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
278 mtivor32, mtivor33, mtivor34.
f0b26da6 279
23d59c56 2802004-02-19 Aldy Hernandez <aldyh@redhat.com>
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281
282 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
23d59c56 283
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NC
2842004-02-10 Petko Manolov <petkan@nucleusys.com>
285
286 * arm-opc.h Maverick accumulator register opcode fixes.
287
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BE
2882004-02-13 Ben Elliston <bje@wasabisystems.com>
289
290 * m32r-dis.c: Regenerate.
291
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MS
2922004-01-27 Michael Snyder <msnyder@redhat.com>
293
294 * sh-opc.h (sh_table): "fsrra", not "fssra".
295
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NC
2962004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
297
298 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
299 contraints.
300
ff24f124
JJ
3012004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
302
303 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
304
a02a862a
AM
3052004-01-19 Alan Modra <amodra@bigpond.net.au>
306
307 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
308 1. Don't print scale factor on AT&T mode when index missing.
309
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AO
3102004-01-16 Alexandre Oliva <aoliva@redhat.com>
311
312 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
313 when loaded into XR registers.
314
cb10e79a
RS
3152004-01-14 Richard Sandiford <rsandifo@redhat.com>
316
317 * frv-desc.h: Regenerate.
318 * frv-desc.c: Regenerate.
319 * frv-opc.c: Regenerate.
320
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3212004-01-13 Michael Snyder <msnyder@redhat.com>
322
323 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
324
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PB
3252004-01-09 Paul Brook <paul@codesourcery.com>
326
327 * arm-opc.h (arm_opcodes): Move generic mcrr after known
328 specific opcodes.
329
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DJ
3302004-01-07 Daniel Jacobowitz <drow@mvista.com>
331
332 * Makefile.am (libopcodes_la_DEPENDENCIES)
333 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
334 comment about the problem.
335 * Makefile.in: Regenerate.
336
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AO
3372004-01-06 Alexandre Oliva <aoliva@redhat.com>
338
339 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
340 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
341 cut&paste errors in shifting/truncating numerical operands.
342 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
343 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
344 (parse_uslo16): Likewise.
345 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
346 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
347 (parse_s12): Likewise.
348 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
349 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
350 (parse_uslo16): Likewise.
351 (parse_uhi16): Parse gothi and gotfuncdeschi.
352 (parse_d12): Parse got12 and gotfuncdesc12.
353 (parse_s12): Likewise.
354
3ab48931
NC
3552004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
356
357 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
358 instruction which looks similar to an 'rla' instruction.
a0bd404e 359
c9e214e5 360For older changes see ChangeLog-0203
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361\f
362Local Variables:
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363mode: change-log
364left-margin: 8
365fill-column: 74
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366version-control: never
367End: