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Implement missing powerpc extended mnemonics
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
8b2742a1
AM		 12020-08-10 Alan Modra <amodra@gmail.com>
2
3 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
4 Enable icbt for power5, miso for power8.
5
5fbec329
AM		 62020-08-10 Alan Modra <amodra@gmail.com>
7
8 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
9 mtvsrd, and similarly for mfvsrd.
10
563a3225
CG		 112020-08-04 Christian Groessler <chris@groessler.org>
12 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
13
14 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
15 opcodes (special "out" to absolute address).
16 * z8k-opc.h: Regenerate.
17
41eb8e88
L		 182020-07-30 H.J. Lu <hongjiu.lu@intel.com>
19
20 PR gas/26305
21 * i386-opc.h (Prefix_Disp8): New.
22 (Prefix_Disp16): Likewise.
23 (Prefix_Disp32): Likewise.
24 (Prefix_Load): Likewise.
25 (Prefix_Store): Likewise.
26 (Prefix_VEX): Likewise.
27 (Prefix_VEX3): Likewise.
28 (Prefix_EVEX): Likewise.
29 (Prefix_REX): Likewise.
30 (Prefix_NoOptimize): Likewise.
31 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
32 * i386-tbl.h: Regenerated.
33
98116973
AA		 342020-07-29 Andreas Arnez <arnez@linux.ibm.com>
35
36 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
37 default case with abort() instead of printing an error message and
38 continuing, to avoid a maybe-uninitialized warning.
39
2dddfa20
NC		 402020-07-24 Nick Clifton <nickc@redhat.com>
41
42 * po/de.po: Updated German translation.
43
bf4ba07c
JB		 442020-07-21 Jan Beulich <jbeulich@suse.com>
45
46 * i386-dis.c (OP_E_memory): Revert previous change.
47
04c662e2
L		 482020-07-15 H.J. Lu <hongjiu.lu@intel.com>
49
50 PR gas/26237
51 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
52 without base nor index registers.
53
f0e8d0ba
JB		 542020-07-15 Jan Beulich <jbeulich@suse.com>
55
56 * i386-dis.c (putop): Move 'V' and 'W' handling.
57
c3f5525f
JB		 582020-07-15 Jan Beulich <jbeulich@suse.com>
59
60 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
61 construct for push/pop of register.
62 (putop): Honor cond when handling 'P'. Drop handling of plain
63 'V'.
64
36938cab
JB		 652020-07-15 Jan Beulich <jbeulich@suse.com>
66
67 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
68 description. Drop '&' description. Use P for push of immediate,
69 pushf/popf, enter, and leave. Use %LP for lret/retf.
70 (dis386_twobyte): Use P for push/pop of fs/gs.
71 (reg_table): Use P for push/pop. Use @ for near call/jmp.
72 (x86_64_table): Use P for far call/jmp.
73 (putop): Drop handling of 'U' and '&'. Move and adjust handling
74 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
75 labels.
76 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
77 and dqw_mode (unconditional).
78
8e58ef80
L		 792020-07-14 H.J. Lu <hongjiu.lu@intel.com>
80
81 PR gas/26237
82 * i386-dis.c (OP_E_memory): Without base nor index registers,
83 32-bit displacement to 64 bits.
84
570b0ed6
CZ		 852020-07-14 Claudiu Zissulescu <claziss@gmail.com>
86
87 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
88 faulty double register pair is detected.
89
bfbd9438
JB		 902020-07-14 Jan Beulich <jbeulich@suse.com>
91
92 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
93
78467458
JB		 942020-07-14 Jan Beulich <jbeulich@suse.com>
95
96 * i386-dis.c (OP_R, Rm): Delete.
97 (MOD_0F24, MOD_0F26): Rename to ...
98 (X86_64_0F24, X86_64_0F26): ... respectively.
99 (dis386): Update 'L' and 'Z' comments.
100 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
101 table references.
102 (mod_table): Move opcode 0F24 and 0F26 entries ...
103 (x86_64_table): ... here.
104 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
105 'Z' case block.
106
464d2b65
JB		 1072020-07-14 Jan Beulich <jbeulich@suse.com>
108
109 * i386-dis.c (Rd, Rdq, MaskR): Delete.
110 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
111 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
112 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
113 MOD_EVEX_0F387C): New enumerators.
114 (reg_table): Use Edq for rdssp.
115 (prefix_table): Use Edq for incssp.
116 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
117 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
118 ktest*, and kshift*. Use Edq / MaskE for kmov*.
119 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
120 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
121 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
122 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
123 0F3828_P_1 and 0F3838_P_1.
124 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
125 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
126
035e7389
JB		 1272020-07-14 Jan Beulich <jbeulich@suse.com>
128
129 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
130 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
131 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
132 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
133 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
134 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
135 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
136 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
137 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
138 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
139 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
140 (reg_table, prefix_table, three_byte_table, vex_table,
141 vex_len_table, mod_table, rm_table): Replace / remove respective
142 entries.
143 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
144 of PREFIX_DATA in used_prefixes.
145
bb5b3501
JB		 1462020-07-14 Jan Beulich <jbeulich@suse.com>
147
148 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
149 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
150 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
151 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
152 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
153 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
154 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
155 VEX_W_0F3A33_L_0): Delete.
156 (dis386): Adjust "BW" description.
157 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
158 0F3A31, 0F3A32, and 0F3A33.
159 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
160 entries.
161 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
162 entries.
163
7531c613
JB		 1642020-07-14 Jan Beulich <jbeulich@suse.com>
165
166 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
167 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
168 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
169 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
170 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
171 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
172 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
173 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
174 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
175 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
176 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
177 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
178 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
179 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
180 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
181 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
182 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
183 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
184 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
185 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
186 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
187 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
188 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
189 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
190 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
191 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
192 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
193 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
194 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
195 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
196 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
197 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
198 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
199 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
200 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
201 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
202 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
203 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
204 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
205 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
206 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
207 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
208 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
209 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
210 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
211 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
212 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
213 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
214 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
215 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
216 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
217 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
218 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
219 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
220 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
221 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
222 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
223 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
224 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
225 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
226 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
227 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
228 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
229 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
230 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
231 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
232 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
233 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
234 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
235 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
236 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
237 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
238 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
239 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
240 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
241 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
242 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
243 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
244 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
245 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
246 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
247 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
248 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
249 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
250 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
251 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
252 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
253 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
254 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
255 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
256 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
257 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
258 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
259 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
260 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
261 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
262 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
263 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
264 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
265 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
266 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
267 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
268 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
269 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
270 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
271 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
272 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
273 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
274 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
275 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
276 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
277 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
278 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
279 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
280 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
281 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
282 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
283 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
284 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
285 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
286 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
287 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
288 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
289 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
290 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
291 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
292 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
293 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
294 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
295 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
296 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
297 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
298 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
299 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
300 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
301 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
302 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
303 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
304 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
305 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
306 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
307 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
308 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
309 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
310 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
311 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
312 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
313 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
314 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
315 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
316 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
317 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
318 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
319 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
320 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
321 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
322 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
323 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
324 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
325 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
326 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
327 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
328 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
329 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
330 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
331 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
332 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
333 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
334 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
335 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
336 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
337 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
338 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
339 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
340 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
341 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
342 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
343 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
344 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
345 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
346 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
347 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
348 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
349 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
350 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
351 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
352 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
353 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
354 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
355 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
356 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
357 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
358 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
359 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
360 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
361 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
362 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
363 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
364 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
365 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
366 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
367 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
368 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
369 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
370 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
371 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
372 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
373 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
374 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
375 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
376 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
377 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
378 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
379 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
380 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
381 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
382 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
383 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
384 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
385 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
386 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
387 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
388 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
389 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
390 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
391 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
392 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
393 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
394 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
395 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
396 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
397 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
398 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
399 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
400 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
401 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
402 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
403 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
404 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
405 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
406 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
407 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
408 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
409 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
410 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
411 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
412 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
413 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
414 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
415 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
416 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
417 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
418 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
419 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
420 EVEX_W_0F3A72_P_2): Rename to ...
421 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
422 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
423 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
424 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
425 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
426 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
427 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
428 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
429 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
430 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
431 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
432 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
433 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
434 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
435 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
436 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
437 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
438 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
439 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
440 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
441 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
442 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
443 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
444 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
445 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
446 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
447 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
448 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
449 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
450 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
451 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
452 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
453 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
454 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
455 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
456 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
457 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
458 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
459 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
460 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
461 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
462 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
463 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
464 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
465 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
466 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
467 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
468 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
469 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
470 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
471 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
472 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
473 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
474 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
475 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
476 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
477 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
478 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
479 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
480 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
481 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
482 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
483 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
484 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
485 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
486 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
487 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
488 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
489 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
490 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
491 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
492 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
493 respectively.
494 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
495 vex_w_table, mod_table): Replace / remove respective entries.
496 (print_insn): Move up dp->prefix_requirement handling. Handle
497 PREFIX_DATA.
498 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
499 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
500 Replace / remove respective entries.
501
17d3c7ec
JB		 5022020-07-14 Jan Beulich <jbeulich@suse.com>
503
504 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
505 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
506 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
507 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
508 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
509 the latter two.
510 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
511 0F2C, 0F2D, 0F2E, and 0F2F.
512 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
513 0F2F table entries.
514
41f5efc6
JB		 5152020-07-14 Jan Beulich <jbeulich@suse.com>
516
517 * i386-dis.c (OP_VexR, VexScalarR): New.
518 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
519 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
520 need_vex_reg): Delete.
521 (prefix_table): Replace VexScalar by VexScalarR and
522 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
523 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
524 (vex_len_table): Replace EXqVexScalarS by EXqS.
525 (get_valid_dis386): Don't set need_vex_reg.
526 (print_insn): Don't initialize need_vex_reg.
527 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
528 q_scalar_swap_mode cases.
529 (OP_EX): Don't check for d_scalar_swap_mode and
530 q_scalar_swap_mode.
531 (OP_VEX): Done check need_vex_reg.
532 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
533 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
534 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
535
89e65d17
JB		 5362020-07-14 Jan Beulich <jbeulich@suse.com>
537
538 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
539 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
540 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
541 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
542 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
543 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
544 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
545 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
546 (vex_table): Replace Vex128 by Vex.
547 (vex_len_table): Likewise. Adjust referenced enum names.
548 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
549 referenced enum names.
550 (OP_VEX): Drop vex128_mode and vex256_mode cases.
551 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
552
492a76aa
JB		 5532020-07-14 Jan Beulich <jbeulich@suse.com>
554
555 * i386-dis.c (dis386): "LW" description now applies to "DQ".
556 (putop): Handle "DQ". Don't handle "LW" anymore.
557 (prefix_table, mod_table): Replace %LW by %DQ.
558 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
559
059edf8b
JB		 5602020-07-14 Jan Beulich <jbeulich@suse.com>
561
562 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
563 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
564 d_scalar_swap_mode case handling. Move shift adjsutment into
565 the case its applicable to.
566
4726e9a4
JB		 5672020-07-14 Jan Beulich <jbeulich@suse.com>
568
569 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
570 (EXbScalar, EXwScalar): Fold to ...
571 (EXbwUnit): ... this.
572 (b_scalar_mode, w_scalar_mode): Fold to ...
573 (bw_unit_mode): ... this.
574 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
575 w_scalar_mode handling by bw_unit_mode one.
576 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
577 ...
578 * i386-dis-evex-prefix.h: ... here.
579
b24d668c
JB		 5802020-07-14 Jan Beulich <jbeulich@suse.com>
581
582 * i386-dis.c (PCMPESTR_Fixup): Delete.
583 (dis386): Adjust "LQ" description.
584 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
585 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
586 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
587 vpcmpestrm, and vpcmpestri.
588 (putop): Honor "cond" when handling LQ.
589 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
590 vcvtsi2ss and vcvtusi2ss.
591 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
592 vcvtsi2sd and vcvtusi2sd.
593
c4de7606
JB		 5942020-07-14 Jan Beulich <jbeulich@suse.com>
595
596 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
597 (simd_cmp_op): Add const.
598 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
599 (CMP_Fixup): Handle VEX case.
600 (prefix_table): Replace VCMP by CMP.
601 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
602
9ab00b61
JB		 6032020-07-14 Jan Beulich <jbeulich@suse.com>
604
605 * i386-dis.c (MOVBE_Fixup): Delete.
606 (Mv): Define.
607 (prefix_table): Use Mv for movbe entries.
608
2875b28a
JB		 6092020-07-14 Jan Beulich <jbeulich@suse.com>
610
611 * i386-dis.c (CRC32_Fixup): Delete.
612 (prefix_table): Use Eb/Ev for crc32 entries.
613
e184e611
JB		 6142020-07-14 Jan Beulich <jbeulich@suse.com>
615
616 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
617 Conditionalize invocations of "USED_REX (0)".
618
e8b5d5f9
JB		 6192020-07-14 Jan Beulich <jbeulich@suse.com>
620
621 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
622 CH, DH, BH, AX, DX): Delete.
623 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
624 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
625 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
626
260cd341
LC		 6272020-07-10 Lili Cui <lili.cui@intel.com>
628
629 * i386-dis.c (TMM): New.
630 (EXtmm): Likewise.
631 (VexTmm): Likewise.
632 (MVexSIBMEM): Likewise.
633 (tmm_mode): Likewise.
634 (vex_sibmem_mode): Likewise.
635 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
636 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
637 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
638 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
639 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
640 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
641 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
642 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
643 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
644 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
645 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
646 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
647 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
648 (PREFIX_VEX_0F3849_X86_64): Likewise.
649 (PREFIX_VEX_0F384B_X86_64): Likewise.
650 (PREFIX_VEX_0F385C_X86_64): Likewise.
651 (PREFIX_VEX_0F385E_X86_64): Likewise.
652 (X86_64_VEX_0F3849): Likewise.
653 (X86_64_VEX_0F384B): Likewise.
654 (X86_64_VEX_0F385C): Likewise.
655 (X86_64_VEX_0F385E): Likewise.
656 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
657 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
658 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
659 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
660 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
661 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
662 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
663 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
664 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
665 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
666 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
667 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
668 (VEX_W_0F3849_X86_64_P_0): Likewise.
669 (VEX_W_0F3849_X86_64_P_2): Likewise.
670 (VEX_W_0F3849_X86_64_P_3): Likewise.
671 (VEX_W_0F384B_X86_64_P_1): Likewise.
672 (VEX_W_0F384B_X86_64_P_2): Likewise.
673 (VEX_W_0F384B_X86_64_P_3): Likewise.
674 (VEX_W_0F385C_X86_64_P_1): Likewise.
675 (VEX_W_0F385E_X86_64_P_0): Likewise.
676 (VEX_W_0F385E_X86_64_P_1): Likewise.
677 (VEX_W_0F385E_X86_64_P_2): Likewise.
678 (VEX_W_0F385E_X86_64_P_3): Likewise.
679 (names_tmm): Likewise.
680 (att_names_tmm): Likewise.
681 (intel_operand_size): Handle void_mode.
682 (OP_XMM): Handle tmm_mode.
683 (OP_EX): Likewise.
684 (OP_VEX): Likewise.
685 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
686 CpuAMX_BF16 and CpuAMX_TILE.
687 (operand_type_shorthands): Add RegTMM.
688 (operand_type_init): Likewise.
689 (operand_types): Add Tmmword.
690 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
691 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
692 * i386-opc.h (CpuAMX_INT8): New.
693 (CpuAMX_BF16): Likewise.
694 (CpuAMX_TILE): Likewise.
695 (SIBMEM): Likewise.
696 (Tmmword): Likewise.
697 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
698 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
699 (i386_operand_type): Add tmmword.
700 * i386-opc.tbl: Add AMX instructions.
701 * i386-reg.tbl: Add AMX registers.
702 * i386-init.h: Regenerated.
703 * i386-tbl.h: Likewise.
704
467bbef0
JB		 7052020-07-08 Jan Beulich <jbeulich@suse.com>
706
707 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
708 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
709 Rename to ...
710 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
711 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
712 respectively.
713 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
714 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
715 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
716 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
717 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
718 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
719 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
720 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
721 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
722 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
723 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
724 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
725 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
726 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
727 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
728 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
729 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
730 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
731 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
732 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
733 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
734 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
735 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
736 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
737 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
738 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
739 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
740 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
741 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
742 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
743 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
744 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
745 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
746 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
747 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
748 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
749 (reg_table): Re-order XOP entries. Adjust their operands.
750 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
751 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
752 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
753 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
754 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
755 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
756 entries by references ...
757 (vex_len_table): ... to resepctive new entries here. For several
758 new and existing entries reference ...
759 (vex_w_table): ... new entries here.
760 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
761
6384fd9e
JB		 7622020-07-08 Jan Beulich <jbeulich@suse.com>
763
764 * i386-dis.c (XMVexScalarI4): Define.
765 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
766 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
767 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
768 (vex_len_table): Move scalar FMA4 entries ...
769 (prefix_table): ... here.
770 (OP_REG_VexI4): Handle scalar_mode.
771 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
772 * i386-tbl.h: Re-generate.
773
e6123d0c
JB		 7742020-07-08 Jan Beulich <jbeulich@suse.com>
775
776 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
777 Vex_2src_2): Delete.
778 (OP_VexW, VexW): New.
779 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
780 for shifts and rotates by register.
781
93abb146
JB		 7822020-07-08 Jan Beulich <jbeulich@suse.com>
783
784 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
785 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
786 OP_EX_VexReg): Delete.
787 (OP_VexI4, VexI4): New.
788 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
789 (prefix_table): ... here.
790 (print_insn): Drop setting of vex_w_done.
791
b13b1bc0
JB		 7922020-07-08 Jan Beulich <jbeulich@suse.com>
793
794 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
795 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
796 (xop_table): Replace operands of 4-operand insns.
797 (OP_REG_VexI4): Move VEX.W based operand swaping here.
798
f337259f
CZ		 7992020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
800
801 * arc-opc.c (insert_rbd): New function.
802 (RBD): Define.
803 (RBDdup): Likewise.
804 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
805 instructions.
806
931452b6
JB		 8072020-07-07 Jan Beulich <jbeulich@suse.com>
808
809 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
810 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
811 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
812 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
813 Delete.
814 (putop): Handle "BW".
815 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
816 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
817 and 0F3A3F ...
818 * i386-dis-evex-prefix.h: ... here.
819
b5b098c2
JB		 8202020-07-06 Jan Beulich <jbeulich@suse.com>
821
822 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
823 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
824 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
825 VEX_W_0FXOP_09_83): New enumerators.
826 (xop_table): Reference the above.
827 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
828 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
829 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
830 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
831
21a3faeb
JB		 8322020-07-06 Jan Beulich <jbeulich@suse.com>
833
834 * i386-dis.c (EVEX_W_0F3838_P_1,
835 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
836 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
837 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
838 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
839 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
840 (putop): Centralize management of last[]. Delete SAVE_LAST.
841 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
842 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
843 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
844 * i386-dis-evex-prefix.h: here.
845
bc152a17
JB		 8462020-07-06 Jan Beulich <jbeulich@suse.com>
847
848 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
849 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
850 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
851 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
852 enumerators.
853 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
854 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
855 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
856 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
857 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
858 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
859 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
860 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
861 these, respectively.
862 * i386-dis-evex-len.h: Adjust comments.
863 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
864 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
865 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
866 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
867 MOD_EVEX_0F385B_P_2_W_1 table entries.
868 * i386-dis-evex-w.h: Reference mod_table[] for
869 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
870 EVEX_W_0F385B_P_2.
871
c82a99a0
JB		 8722020-07-06 Jan Beulich <jbeulich@suse.com>
873
874 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
875 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
876 EXymm.
877 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
878 Likewise. Mark 256-bit entries invalid.
879
fedfb81e
JB		 8802020-07-06 Jan Beulich <jbeulich@suse.com>
881
882 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
883 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
884 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
885 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
886 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
887 PREFIX_EVEX_0F382B): Delete.
888 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
889 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
890 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
891 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
892 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
893 to ...
894 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
895 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
896 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
897 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
898 respectively.
899 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
900 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
901 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
902 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
903 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
904 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
905 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
906 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
907 PREFIX_EVEX_0F382B): Remove table entries.
908 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
909 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
910 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
911
3a57774c
JB		 9122020-07-06 Jan Beulich <jbeulich@suse.com>
913
914 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
915 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
916 enumerators.
917 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
918 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
919 EVEX_LEN_0F3A01_P_2_W_1 table entries.
920 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
921 entries.
922
e74d9fa9
JB		 9232020-07-06 Jan Beulich <jbeulich@suse.com>
924
925 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
926 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
927 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
928 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
929 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
930 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
931 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
932 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
933 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
934 entries.
935
6431c801
JB		 9362020-07-06 Jan Beulich <jbeulich@suse.com>
937
938 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
939 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
940 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
941 respectively.
942 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
943 entries.
944 * i386-dis-evex.h (evex_table): Reference VEX table entry for
945 opcode 0F3A1D.
946 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
947 entry.
948 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
949
6df22cf6
JB		 9502020-07-06 Jan Beulich <jbeulich@suse.com>
951
952 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
953 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
954 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
955 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
956 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
957 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
958 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
959 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
960 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
961 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
962 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
963 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
964 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
965 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
966 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
967 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
968 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
969 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
970 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
971 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
972 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
973 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
974 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
975 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
976 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
977 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
978 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
979 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
980 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
981 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
982 (prefix_table): Add EXxEVexR to FMA table entries.
983 (OP_Rounding): Move abort() invocation.
984 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
985 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
986 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
987 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
988 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
989 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
990 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
991 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
992 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
993 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
994 0F3ACE, 0F3ACF.
995 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
996 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
997 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
998 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
999 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1000 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1001 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1002 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1003 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1004 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1005 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1006 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1007 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1008 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1009 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1010 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1011 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1012 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1013 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1014 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1015 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1016 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1017 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1018 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1019 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1020 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1021 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1022 Delete table entries.
1023 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1024 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1025 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1026 Likewise.
1027
39e0f456
JB		 10282020-07-06 Jan Beulich <jbeulich@suse.com>
1029
1030 * i386-dis.c (EXqScalarS): Delete.
1031 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1032 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1033
5b872f7d
JB		 10342020-07-06 Jan Beulich <jbeulich@suse.com>
1035
1036 * i386-dis.c (safe-ctype.h): Include.
1037 (EXdScalar, EXqScalar): Delete.
1038 (d_scalar_mode, q_scalar_mode): Delete.
1039 (prefix_table, vex_len_table): Use EXxmm_md in place of
1040 EXdScalar and EXxmm_mq in place of EXqScalar.
1041 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1042 d_scalar_mode and q_scalar_mode.
1043 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1044 (vmovsd): Use EXxmm_mq.
1045
ddc73fa9
NC		 10462020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1047
1048 PR 26204
1049 * arc-dis.c: Fix spelling mistake.
1050 * po/opcodes.pot: Regenerate.
1051
17550be7
NC		 10522020-07-06 Nick Clifton <nickc@redhat.com>
1053
1054 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1055 * po/uk.po: Updated Ukranian translation.
1056
b19d852d
NC		 10572020-07-04 Nick Clifton <nickc@redhat.com>
1058
1059 * configure: Regenerate.
1060 * po/opcodes.pot: Regenerate.
1061
b115b9fd
NC		 10622020-07-04 Nick Clifton <nickc@redhat.com>
1063
1064 Binutils 2.35 branch created.
1065
c2ecccb3
L		 10662020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1067
1068 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1069 * i386-opc.h (VexSwapSources): New.
1070 (i386_opcode_modifier): Add vexswapsources.
1071 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1072 with two source operands swapped.
1073 * i386-tbl.h: Regenerated.
1074
08ccfccf
NC		 10752020-06-30 Nelson Chu <nelson.chu@sifive.com>
1076
1077 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1078 unprivileged CSR can also be initialized.
1079
279edac5
AM		 10802020-06-29 Alan Modra <amodra@gmail.com>
1081
1082 * arm-dis.c: Use C style comments.
1083 * cr16-opc.c: Likewise.
1084 * ft32-dis.c: Likewise.
1085 * moxie-opc.c: Likewise.
1086 * tic54x-dis.c: Likewise.
1087 * s12z-opc.c: Remove useless comment.
1088 * xgate-dis.c: Likewise.
1089
e978ad62
L		 10902020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1091
1092 * i386-opc.tbl: Add a blank line.
1093
63112cd6
L		 10942020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1095
1096 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1097 (VecSIB128): Renamed to ...
1098 (VECSIB128): This.
1099 (VecSIB256): Renamed to ...
1100 (VECSIB256): This.
1101 (VecSIB512): Renamed to ...
1102 (VECSIB512): This.
1103 (VecSIB): Renamed to ...
1104 (SIB): This.
1105 (i386_opcode_modifier): Replace vecsib with sib.
79b32e73 1106 * i386-opc.tbl (VecSIB128): New.
63112cd6
L		 1107 (VecSIB256): Likewise.
1108 (VecSIB512): Likewise.
79b32e73 1109 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
63112cd6
L		 1110 and VecSIB512, respectively.
1111
d1c36125
JB		 11122020-06-26 Jan Beulich <jbeulich@suse.com>
1113
1114 * i386-dis.c: Adjust description of I macro.
1115 (x86_64_table): Drop use of I.
1116 (float_mem): Replace use of I.
1117 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1118
2a1bb84c
JB		 11192020-06-26 Jan Beulich <jbeulich@suse.com>
1120
1121 * i386-dis.c: (print_insn): Avoid straight assignment to
1122 priv.orig_sizeflag when processing -M sub-options.
1123
8f570d62
JB		 11242020-06-25 Jan Beulich <jbeulich@suse.com>
1125
1126 * i386-dis.c: Adjust description of J macro.
1127 (dis386, x86_64_table, mod_table): Replace J.
1128 (putop): Remove handling of J.
1129
464dc4af
JB		 11302020-06-25 Jan Beulich <jbeulich@suse.com>
1131
1132 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1133
589958d6
JB		 11342020-06-25 Jan Beulich <jbeulich@suse.com>
1135
1136 * i386-dis.c: Adjust description of "LQ" macro.
1137 (dis386_twobyte): Use LQ for sysret.
1138 (putop): Adjust handling of LQ.
1139
39ff0b81
NC		 11402020-06-22 Nelson Chu <nelson.chu@sifive.com>
1141
1142 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1143 * riscv-dis.c: Include elfxx-riscv.h.
1144
d27c357a
JB		 11452020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1146
1147 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1148
6fde587f
CL		 11492020-06-17 Lili Cui <lili.cui@intel.com>
1150
1151 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1152
efe30057
L		 11532020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1154
1155 PR gas/26115
1156 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1157 * i386-opc.tbl: Likewise.
1158 * i386-tbl.h: Regenerated.
1159
d8af286f
NC		 11602020-06-12 Nelson Chu <nelson.chu@sifive.com>
1161
1162 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1163
14962256
AC		 11642020-06-11 Alex Coplan <alex.coplan@arm.com>
1165
1166 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1167 (SR_CORE): Likewise.
1168 (SR_FEAT): Likewise.
1169 (SR_RNG): Likewise.
1170 (SR_V8_1): Likewise.
1171 (SR_V8_2): Likewise.
1172 (SR_V8_3): Likewise.
1173 (SR_V8_4): Likewise.
1174 (SR_PAN): Likewise.
1175 (SR_RAS): Likewise.
1176 (SR_SSBS): Likewise.
1177 (SR_SVE): Likewise.
1178 (SR_ID_PFR2): Likewise.
1179 (SR_PROFILE): Likewise.
1180 (SR_MEMTAG): Likewise.
1181 (SR_SCXTNUM): Likewise.
1182 (aarch64_sys_regs): Refactor to store feature information in the table.
1183 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1184 that now describe their own features.
1185 (aarch64_pstatefield_supported_p): Likewise.
1186
f9630fa6
L		 11872020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1188
1189 * i386-dis.c (prefix_table): Fix a typo in comments.
1190
73239888
JB		 11912020-06-09 Jan Beulich <jbeulich@suse.com>
1192
1193 * i386-dis.c (rex_ignored): Delete.
1194 (ckprefix): Drop rex_ignored initialization.
1195 (get_valid_dis386): Drop setting of rex_ignored.
1196 (print_insn): Drop checking of rex_ignored. Don't record data
1197 size prefix as used with VEX-and-alike encodings.
1198
18897deb
JB		 11992020-06-09 Jan Beulich <jbeulich@suse.com>
1200
1201 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1202 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1203 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1204 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1205 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1206 VEX_0F12, and VEX_0F16.
1207 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1208 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1209 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1210 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1211 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1212 MOD_VEX_0F16_PREFIX_2 entries.
1213
97e6786a
JB		 12142020-06-09 Jan Beulich <jbeulich@suse.com>
1215
1216 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1217 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1218 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1219 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1220 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1221 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1222 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1223 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1224 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1225 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1226 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1227 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1228 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1229 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1230 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1231 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1232 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1233 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1234 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1235 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1236 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1237 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1238 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1239 EVEX_W_0FC6_P_2): Delete.
1240 (print_insn): Add EVEX.W vs embedded prefix consistency check
1241 to prefix validation.
1242 * i386-dis-evex.h (evex_table): Don't further descend for
1243 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1244 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1245 and 0F2B.
1246 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1247 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1248 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1249 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1250 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1251 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1252 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1253 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1254 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1255 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1256 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1257 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1258 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1259 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1260 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1261 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1262 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1263 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1264 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1265 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1266 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1267 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1268 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1269 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1270 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1271 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1272 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1273
bf926894
JB		 12742020-06-09 Jan Beulich <jbeulich@suse.com>
1275
1276 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1277 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1278 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1279 vmovmskpX.
1280 (print_insn): Drop pointless check against bad_opcode. Split
1281 prefix validation into legacy and VEX-and-alike parts.
1282 (putop): Re-work 'X' macro handling.
1283
a5aaedb9
JB		 12842020-06-09 Jan Beulich <jbeulich@suse.com>
1285
1286 * i386-dis.c (MOD_0F51): Rename to ...
1287 (MOD_0F50): ... this.
1288
26417f19
AC		 12892020-06-08 Alex Coplan <alex.coplan@arm.com>
1290
1291 * arm-dis.c (arm_opcodes): Add dfb.
1292 (thumb32_opcodes): Add dfb.
1293
8a6fb3f9
JB		 12942020-06-08 Jan Beulich <jbeulich@suse.com>
1295
1296 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1297
1424c35d
AM		 12982020-06-06 Alan Modra <amodra@gmail.com>
1299
1300 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1301
d3d1cc7b
AM		 13022020-06-05 Alan Modra <amodra@gmail.com>
1303
1304 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1305 size is large enough.
1306
d8740be1
JM		 13072020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1308
1309 * disassemble.c (disassemble_init_for_target): Set endian_code for
1310 bpf targets.
1311 * bpf-desc.c: Regenerate.
1312 * bpf-opc.c: Likewise.
1313 * bpf-dis.c: Likewise.
1314
e9bffec9
JM		 13152020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1316
1317 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1318 (cgen_put_insn_value): Likewise.
1319 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1320 * cgen-dis.in (print_insn): Likewise.
1321 * cgen-ibld.in (insert_1): Likewise.
1322 (insert_1): Likewise.
1323 (insert_insn_normal): Likewise.
1324 (extract_1): Likewise.
1325 * bpf-dis.c: Regenerate.
1326 * bpf-ibld.c: Likewise.
1327 * bpf-ibld.c: Likewise.
1328 * cgen-dis.in: Likewise.
1329 * cgen-ibld.in: Likewise.
1330 * cgen-opc.c: Likewise.
1331 * epiphany-dis.c: Likewise.
1332 * epiphany-ibld.c: Likewise.
1333 * fr30-dis.c: Likewise.
1334 * fr30-ibld.c: Likewise.
1335 * frv-dis.c: Likewise.
1336 * frv-ibld.c: Likewise.
1337 * ip2k-dis.c: Likewise.
1338 * ip2k-ibld.c: Likewise.
1339 * iq2000-dis.c: Likewise.
1340 * iq2000-ibld.c: Likewise.
1341 * lm32-dis.c: Likewise.
1342 * lm32-ibld.c: Likewise.
1343 * m32c-dis.c: Likewise.
1344 * m32c-ibld.c: Likewise.
1345 * m32r-dis.c: Likewise.
1346 * m32r-ibld.c: Likewise.
1347 * mep-dis.c: Likewise.
1348 * mep-ibld.c: Likewise.
1349 * mt-dis.c: Likewise.
1350 * mt-ibld.c: Likewise.
1351 * or1k-dis.c: Likewise.
1352 * or1k-ibld.c: Likewise.
1353 * xc16x-dis.c: Likewise.
1354 * xc16x-ibld.c: Likewise.
1355 * xstormy16-dis.c: Likewise.
1356 * xstormy16-ibld.c: Likewise.
1357
b3db6d07
JM		 13582020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1359
1360 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1361 (print_insn_): Handle instruction endian.
1362 * bpf-dis.c: Regenerate.
1363 * bpf-desc.c: Regenerate.
1364 * epiphany-dis.c: Likewise.
1365 * epiphany-desc.c: Likewise.
1366 * fr30-dis.c: Likewise.
1367 * fr30-desc.c: Likewise.
1368 * frv-dis.c: Likewise.
1369 * frv-desc.c: Likewise.
1370 * ip2k-dis.c: Likewise.
1371 * ip2k-desc.c: Likewise.
1372 * iq2000-dis.c: Likewise.
1373 * iq2000-desc.c: Likewise.
1374 * lm32-dis.c: Likewise.
1375 * lm32-desc.c: Likewise.
1376 * m32c-dis.c: Likewise.
1377 * m32c-desc.c: Likewise.
1378 * m32r-dis.c: Likewise.
1379 * m32r-desc.c: Likewise.
1380 * mep-dis.c: Likewise.
1381 * mep-desc.c: Likewise.
1382 * mt-dis.c: Likewise.
1383 * mt-desc.c: Likewise.
1384 * or1k-dis.c: Likewise.
1385 * or1k-desc.c: Likewise.
1386 * xc16x-dis.c: Likewise.
1387 * xc16x-desc.c: Likewise.
1388 * xstormy16-dis.c: Likewise.
1389 * xstormy16-desc.c: Likewise.
1390
4ee4189f
NC		 13912020-06-03 Nick Clifton <nickc@redhat.com>
1392
1393 * po/sr.po: Updated Serbian translation.
1394
44730156
NC		 13952020-06-03 Nelson Chu <nelson.chu@sifive.com>
1396
1397 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1398 (riscv_get_priv_spec_class): Likewise.
1399
3c3d0376
AM		 14002020-06-01 Alan Modra <amodra@gmail.com>
1401
1402 * bpf-desc.c: Regenerate.
1403
78c1c354
JM		 14042020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1405 David Faust <david.faust@oracle.com>
1406
1407 * bpf-desc.c: Regenerate.
1408 * bpf-opc.h: Likewise.
1409 * bpf-opc.c: Likewise.
1410 * bpf-dis.c: Likewise.
1411
efcf5fb5
AM		 14122020-05-28 Alan Modra <amodra@gmail.com>
1413
1414 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1415 values.
1416
ab382d64
AM		 14172020-05-28 Alan Modra <amodra@gmail.com>
1418
1419 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1420 immediates.
1421 (print_insn_ns32k): Revert last change.
1422
151f5de4
NC		 14232020-05-28 Nick Clifton <nickc@redhat.com>
1424
1425 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1426 static.
1427
25e1eca8
SL		 14282020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1429
1430 Fix extraction of signed constants in nios2 disassembler (again).
1431
1432 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1433 extractions of signed fields.
1434
57b17940
SSF		 14352020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1436
1437 * s390-opc.txt: Relocate vector load/store instructions with
1438 additional alignment parameter and change architecture level
1439 constraint from z14 to z13.
1440
d96bf37b
AM		 14412020-05-21 Alan Modra <amodra@gmail.com>
1442
1443 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1444 * sparc-dis.c: Likewise.
1445 * tic4x-dis.c: Likewise.
1446 * xtensa-dis.c: Likewise.
1447 * bpf-desc.c: Regenerate.
1448 * epiphany-desc.c: Regenerate.
1449 * fr30-desc.c: Regenerate.
1450 * frv-desc.c: Regenerate.
1451 * ip2k-desc.c: Regenerate.
1452 * iq2000-desc.c: Regenerate.
1453 * lm32-desc.c: Regenerate.
1454 * m32c-desc.c: Regenerate.
1455 * m32r-desc.c: Regenerate.
1456 * mep-asm.c: Regenerate.
1457 * mep-desc.c: Regenerate.
1458 * mt-desc.c: Regenerate.
1459 * or1k-desc.c: Regenerate.
1460 * xc16x-desc.c: Regenerate.
1461 * xstormy16-desc.c: Regenerate.
1462
8f595e9b
NC		 14632020-05-20 Nelson Chu <nelson.chu@sifive.com>
1464
1465 * riscv-opc.c (riscv_ext_version_table): The table used to store
1466 all information about the supported spec and the corresponding ISA
1467 versions. Currently, only Zicsr is supported to verify the
1468 correctness of Z sub extension settings. Others will be supported
1469 in the future patches.
1470 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1471 classes and the corresponding strings.
1472 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1473 spec class by giving a ISA spec string.
1474 * riscv-opc.c (struct priv_spec_t): New structure.
1475 (struct priv_spec_t priv_specs): List for all supported privilege spec
1476 classes and the corresponding strings.
1477 (riscv_get_priv_spec_class): New function. Get the corresponding
1478 privilege spec class by giving a spec string.
1479 (riscv_get_priv_spec_name): New function. Get the corresponding
1480 privilege spec string by giving a CSR version class.
1481 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1482 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1483 according to the chosen version. Build a hash table riscv_csr_hash to
1484 store the valid CSR for the chosen pirv verison. Dump the direct
1485 CSR address rather than it's name if it is invalid.
1486 (parse_riscv_dis_option_without_args): New function. Parse the options
1487 without arguments.
1488 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1489 parse the options without arguments first, and then handle the options
1490 with arguments. Add the new option -Mpriv-spec, which has argument.
1491 * riscv-dis.c (print_riscv_disassembler_options): Add description
1492 about the new OBJDUMP option.
1493
3d205eb4
PB		 14942020-05-19 Peter Bergner <bergner@linux.ibm.com>
1495
1496 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1497 WC values on POWER10 sync, dcbf and wait instructions.
1498 (insert_pl, extract_pl): New functions.
1499 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1500 (LS3): New , 3-bit L for sync.
1501 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1502 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1503 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1504 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1505 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1506 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1507 <wait>: Enable PL operand on POWER10.
1508 <dcbf>: Enable L3OPT operand on POWER10.
1509 <sync>: Enable SC2 operand on POWER10.
1510
a501eb44
SH		 15112020-05-19 Stafford Horne <shorne@gmail.com>
1512
1513 PR 25184
1514 * or1k-asm.c: Regenerate.
1515 * or1k-desc.c: Regenerate.
1516 * or1k-desc.h: Regenerate.
1517 * or1k-dis.c: Regenerate.
1518 * or1k-ibld.c: Regenerate.
1519 * or1k-opc.c: Regenerate.
1520 * or1k-opc.h: Regenerate.
1521 * or1k-opinst.c: Regenerate.
1522
3b646889
AM		 15232020-05-11 Alan Modra <amodra@gmail.com>
1524
1525 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1526 xsmaxcqp, xsmincqp.
1527
9cc4ce88
AM		 15282020-05-11 Alan Modra <amodra@gmail.com>
1529
1530 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1531 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1532
5d57bc3f
AM		 15332020-05-11 Alan Modra <amodra@gmail.com>
1534
1535 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1536
66ef5847
AM		 15372020-05-11 Alan Modra <amodra@gmail.com>
1538
1539 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1540 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1541
4f3e9537
PB		 15422020-05-11 Peter Bergner <bergner@linux.ibm.com>
1543
1544 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1545 mnemonics.
1546
ec40e91c
AM		 15472020-05-11 Alan Modra <amodra@gmail.com>
1548
1549 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1550 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1551 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1552 (prefix_opcodes): Add xxeval.
1553
d7e97a76
AM		 15542020-05-11 Alan Modra <amodra@gmail.com>
1555
1556 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1557 xxgenpcvwm, xxgenpcvdm.
1558
fdefed7c
AM		 15592020-05-11 Alan Modra <amodra@gmail.com>
1560
1561 * ppc-opc.c (MP, VXVAM_MASK): Define.
1562 (VXVAPS_MASK): Use VXVA_MASK.
1563 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1564 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1565 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1566 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1567
aa3c112f
AM		 15682020-05-11 Alan Modra <amodra@gmail.com>
1569 Peter Bergner <bergner@linux.ibm.com>
1570
1571 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1572 New functions.
1573 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1574 YMSK2, XA6a, XA6ap, XB6a entries.
1575 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1576 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1577 (PPCVSX4): Define.
1578 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1579 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1580 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1581 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1582 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1583 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1584 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1585 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1586 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1587 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1588 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1589 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1590 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1591 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1592
6edbfd3b
AM		 15932020-05-11 Alan Modra <amodra@gmail.com>
1594
1595 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1596 (insert_xts, extract_xts): New functions.
1597 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1598 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1599 (VXRC_MASK, VXSH_MASK): Define.
1600 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1601 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1602 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1603 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1604 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1605 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1606 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1607
c7d7aea2
AM		 16082020-05-11 Alan Modra <amodra@gmail.com>
1609
1610 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1611 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1612 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1613 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1614 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1615
94ba9882
AM		 16162020-05-11 Alan Modra <amodra@gmail.com>
1617
1618 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1619 (XTP, DQXP, DQXP_MASK): Define.
1620 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1621 (prefix_opcodes): Add plxvp and pstxvp.
1622
f4791f1a
AM		 16232020-05-11 Alan Modra <amodra@gmail.com>
1624
1625 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1626 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1627 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1628
3ff0a5ba
PB		 16292020-05-11 Peter Bergner <bergner@linux.ibm.com>
1630
1631 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1632
afef4fe9
PB		 16332020-05-11 Peter Bergner <bergner@linux.ibm.com>
1634
1635 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1636 (L1OPT): Define.
1637 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1638
1224c05d
PB		 16392020-05-11 Peter Bergner <bergner@linux.ibm.com>
1640
1641 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1642
6bbb0c05
AM		 16432020-05-11 Alan Modra <amodra@gmail.com>
1644
1645 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1646
7c1f4227
AM		 16472020-05-11 Alan Modra <amodra@gmail.com>
1648
1649 * ppc-dis.c (ppc_opts): Add "power10" entry.
1650 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1651 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1652
73199c2b
NC		 16532020-05-11 Nick Clifton <nickc@redhat.com>
1654
1655 * po/fr.po: Updated French translation.
1656
09c1e68a
AC		 16572020-04-30 Alex Coplan <alex.coplan@arm.com>
1658
1659 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1660 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1661 (operand_general_constraint_met_p): validate
1662 AARCH64_OPND_UNDEFINED.
1663 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1664 for FLD_imm16_2.
1665 * aarch64-asm-2.c: Regenerated.
1666 * aarch64-dis-2.c: Regenerated.
1667 * aarch64-opc-2.c: Regenerated.
1668
9654d51a
NC		 16692020-04-29 Nick Clifton <nickc@redhat.com>
1670
1671 PR 22699
1672 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1673 and SETRC insns.
1674
c2e71e57
NC		 16752020-04-29 Nick Clifton <nickc@redhat.com>
1676
1677 * po/sv.po: Updated Swedish translation.
1678
5c936ef5
NC		 16792020-04-29 Nick Clifton <nickc@redhat.com>
1680
1681 PR 22699
1682 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1683 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1684 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1685 IMM0_8U case.
1686
bb2a1453
AS		 16872020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1688
1689 PR 25848
1690 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1691 cmpi only on m68020up and cpu32.
1692
c2e5c986
SD		 16932020-04-20 Sudakshina Das <sudi.das@arm.com>
1694
1695 * aarch64-asm.c (aarch64_ins_none): New.
1696 * aarch64-asm.h (ins_none): New declaration.
1697 * aarch64-dis.c (aarch64_ext_none): New.
1698 * aarch64-dis.h (ext_none): New declaration.
1699 * aarch64-opc.c (aarch64_print_operand): Update case for
1700 AARCH64_OPND_BARRIER_PSB.
1701 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1702 (AARCH64_OPERANDS): Update inserter/extracter for
1703 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1704 * aarch64-asm-2.c: Regenerated.
1705 * aarch64-dis-2.c: Regenerated.
1706 * aarch64-opc-2.c: Regenerated.
1707
8a6e1d1d
SD		 17082020-04-20 Sudakshina Das <sudi.das@arm.com>
1709
1710 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1711 (aarch64_feature_ras, RAS): Likewise.
1712 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1713 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1714 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1715 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1716 * aarch64-asm-2.c: Regenerated.
1717 * aarch64-dis-2.c: Regenerated.
1718 * aarch64-opc-2.c: Regenerated.
1719
e409955d
FS		 17202020-04-17 Fredrik Strupe <fredrik@strupe.net>
1721
1722 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1723 (print_insn_neon): Support disassembly of conditional
1724 instructions.
1725
c54a9b56
DF		 17262020-02-16 David Faust <david.faust@oracle.com>
1727
1728 * bpf-desc.c: Regenerate.
1729 * bpf-desc.h: Likewise.
1730 * bpf-opc.c: Regenerate.
1731 * bpf-opc.h: Likewise.
1732
bb651e8b
CL		 17332020-04-07 Lili Cui <lili.cui@intel.com>
1734
1735 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1736 (prefix_table): New instructions (see prefixes above).
1737 (rm_table): Likewise
1738 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1739 CPU_ANY_TSXLDTRK_FLAGS.
1740 (cpu_flags): Add CpuTSXLDTRK.
1741 * i386-opc.h (enum): Add CpuTSXLDTRK.
1742 (i386_cpu_flags): Add cputsxldtrk.
1743 * i386-opc.tbl: Add XSUSPLDTRK insns.
1744 * i386-init.h: Regenerate.
1745 * i386-tbl.h: Likewise.
1746
4b27d27c
L		 17472020-04-02 Lili Cui <lili.cui@intel.com>
1748
1749 * i386-dis.c (prefix_table): New instructions serialize.
1750 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1751 CPU_ANY_SERIALIZE_FLAGS.
1752 (cpu_flags): Add CpuSERIALIZE.
1753 * i386-opc.h (enum): Add CpuSERIALIZE.
1754 (i386_cpu_flags): Add cpuserialize.
1755 * i386-opc.tbl: Add SERIALIZE insns.
1756 * i386-init.h: Regenerate.
1757 * i386-tbl.h: Likewise.
1758
832a5807
AM		 17592020-03-26 Alan Modra <amodra@gmail.com>
1760
1761 * disassemble.h (opcodes_assert): Declare.
1762 (OPCODES_ASSERT): Define.
1763 * disassemble.c: Don't include assert.h. Include opintl.h.
1764 (opcodes_assert): New function.
1765 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1766 (bfd_h8_disassemble): Reduce size of data array. Correctly
1767 calculate maxlen. Omit insn decoding when insn length exceeds
1768 maxlen. Exit from nibble loop when looking for E, before
1769 accessing next data byte. Move processing of E outside loop.
1770 Replace tests of maxlen in loop with assertions.
1771
4c4addbe
AM		 17722020-03-26 Alan Modra <amodra@gmail.com>
1773
1774 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1775
a18cd0ca
AM		 17762020-03-25 Alan Modra <amodra@gmail.com>
1777
1778 * z80-dis.c (suffix): Init mybuf.
1779
57cb32b3
AM		 17802020-03-22 Alan Modra <amodra@gmail.com>
1781
1782 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1783 successflly read from section.
1784
beea5cc1
AM		 17852020-03-22 Alan Modra <amodra@gmail.com>
1786
1787 * arc-dis.c (find_format): Use ISO C string concatenation rather
1788 than line continuation within a string. Don't access needs_limm
1789 before testing opcode != NULL.
1790
03704c77
AM		 17912020-03-22 Alan Modra <amodra@gmail.com>
1792
1793 * ns32k-dis.c (print_insn_arg): Update comment.
1794 (print_insn_ns32k): Reduce size of index_offset array, and
1795 initialize, passing -1 to print_insn_arg for args that are not
1796 an index. Don't exit arg loop early. Abort on bad arg number.
1797
d1023b5d
AM		 17982020-03-22 Alan Modra <amodra@gmail.com>
1799
1800 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1801 * s12z-opc.c: Formatting.
1802 (operands_f): Return an int.
1803 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1804 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1805 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1806 (exg_sex_discrim): Likewise.
1807 (create_immediate_operand, create_bitfield_operand),
1808 (create_register_operand_with_size, create_register_all_operand),
1809 (create_register_all16_operand, create_simple_memory_operand),
1810 (create_memory_operand, create_memory_auto_operand): Don't
1811 segfault on malloc failure.
1812 (z_ext24_decode): Return an int status, negative on fail, zero
1813 on success.
1814 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1815 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1816 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1817 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1818 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1819 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1820 (loop_primitive_decode, shift_decode, psh_pul_decode),
1821 (bit_field_decode): Similarly.
1822 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1823 to return value, update callers.
1824 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1825 Don't segfault on NULL operand.
1826 (decode_operation): Return OP_INVALID on first fail.
1827 (decode_s12z): Check all reads, returning -1 on fail.
1828
340f3ac8
AM		 18292020-03-20 Alan Modra <amodra@gmail.com>
1830
1831 * metag-dis.c (print_insn_metag): Don't ignore status from
1832 read_memory_func.
1833
fe90ae8a
AM		 18342020-03-20 Alan Modra <amodra@gmail.com>
1835
1836 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1837 Initialize parts of buffer not written when handling a possible
1838 2-byte insn at end of section. Don't attempt decoding of such
1839 an insn by the 4-byte machinery.
1840
833d919c
AM		 18412020-03-20 Alan Modra <amodra@gmail.com>
1842
1843 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1844 partially filled buffer. Prevent lookup of 4-byte insns when
1845 only VLE 2-byte insns are possible due to section size. Print
1846 ".word" rather than ".long" for 2-byte leftovers.
1847
327ef784
NC		 18482020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1849
1850 PR 25641
1851 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1852
1673df32
JB		 18532020-03-13 Jan Beulich <jbeulich@suse.com>
1854
1855 * i386-dis.c (X86_64_0D): Rename to ...
1856 (X86_64_0E): ... this.
1857
384f3689
L		 18582020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1859
1860 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1861 * Makefile.in: Regenerated.
1862
865e2027
JB		 18632020-03-09 Jan Beulich <jbeulich@suse.com>
1864
1865 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1866 3-operand pseudos.
1867 * i386-tbl.h: Re-generate.
1868
2f13234b
JB		 18692020-03-09 Jan Beulich <jbeulich@suse.com>
1870
1871 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1872 vprot*, vpsha*, and vpshl*.
1873 * i386-tbl.h: Re-generate.
1874
3fabc179
JB		 18752020-03-09 Jan Beulich <jbeulich@suse.com>
1876
1877 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1878 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1879 * i386-tbl.h: Re-generate.
1880
3677e4c1
JB		 18812020-03-09 Jan Beulich <jbeulich@suse.com>
1882
1883 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1884 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1885 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1886 * i386-tbl.h: Re-generate.
1887
4c4898e8
JB		 18882020-03-09 Jan Beulich <jbeulich@suse.com>
1889
1890 * i386-gen.c (struct template_arg, struct template_instance,
1891 struct template_param, struct template, templates,
1892 parse_template, expand_templates): New.
1893 (process_i386_opcodes): Various local variables moved to
1894 expand_templates. Call parse_template and expand_templates.
1895 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1896 * i386-tbl.h: Re-generate.
1897
bc49bfd8
JB		 18982020-03-06 Jan Beulich <jbeulich@suse.com>
1899
1900 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1901 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1902 register and memory source templates. Replace VexW= by VexW*
1903 where applicable.
1904 * i386-tbl.h: Re-generate.
1905
4873e243
JB		 19062020-03-06 Jan Beulich <jbeulich@suse.com>
1907
1908 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1909 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1910 * i386-tbl.h: Re-generate.
1911
672a349b
JB		 19122020-03-06 Jan Beulich <jbeulich@suse.com>
1913
1914 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1915 * i386-tbl.h: Re-generate.
1916
4ed21b58
JB		 19172020-03-06 Jan Beulich <jbeulich@suse.com>
1918
1919 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1920 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1921 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1922 VexW0 on SSE2AVX variants.
1923 (vmovq): Drop NoRex64 from XMM/XMM variants.
1924 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1925 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1926 applicable use VexW0.
1927 * i386-tbl.h: Re-generate.
1928
643bb870
JB		 19292020-03-06 Jan Beulich <jbeulich@suse.com>
1930
1931 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1932 * i386-opc.h (Rex64): Delete.
1933 (struct i386_opcode_modifier): Remove rex64 field.
1934 * i386-opc.tbl (crc32): Drop Rex64.
1935 Replace Rex64 with Size64 everywhere else.
1936 * i386-tbl.h: Re-generate.
1937
a23b33b3
JB		 19382020-03-06 Jan Beulich <jbeulich@suse.com>
1939
1940 * i386-dis.c (OP_E_memory): Exclude recording of used address
1941 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1942 addressed memory operands for MPX insns.
1943
a0497384
JB		 19442020-03-06 Jan Beulich <jbeulich@suse.com>
1945
1946 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1947 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1948 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1949 (ptwrite): Split into non-64-bit and 64-bit forms.
1950 * i386-tbl.h: Re-generate.
1951
b630c145
JB		 19522020-03-06 Jan Beulich <jbeulich@suse.com>
1953
1954 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1955 template.
1956 * i386-tbl.h: Re-generate.
1957
a847e322
JB		 19582020-03-04 Jan Beulich <jbeulich@suse.com>
1959
1960 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1961 (prefix_table): Move vmmcall here. Add vmgexit.
1962 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1963 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1964 (cpu_flags): Add CpuSEV_ES entry.
1965 * i386-opc.h (CpuSEV_ES): New.
1966 (union i386_cpu_flags): Add cpusev_es field.
1967 * i386-opc.tbl (vmgexit): New.
1968 * i386-init.h, i386-tbl.h: Re-generate.
1969
3cd7f3e3
L		 19702020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1971
1972 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1973 with MnemonicSize.
1974 * i386-opc.h (IGNORESIZE): New.
1975 (DEFAULTSIZE): Likewise.
1976 (IgnoreSize): Removed.
1977 (DefaultSize): Likewise.
1978 (MnemonicSize): New.
1979 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1980 mnemonicsize.
1981 * i386-opc.tbl (IgnoreSize): New.
1982 (DefaultSize): Likewise.
1983 * i386-tbl.h: Regenerated.
1984
b8ba1385
SB		 19852020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1986
1987 PR 25627
1988 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
1989 instructions.
1990
10d97a0f
L		 19912020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1992
1993 PR gas/25622
1994 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
1995 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
1996 * i386-tbl.h: Regenerated.
1997
dc1e8a47
AM		 19982020-02-26 Alan Modra <amodra@gmail.com>
1999
2000 * aarch64-asm.c: Indent labels correctly.
2001 * aarch64-dis.c: Likewise.
2002 * aarch64-gen.c: Likewise.
2003 * aarch64-opc.c: Likewise.
2004 * alpha-dis.c: Likewise.
2005 * i386-dis.c: Likewise.
2006 * nds32-asm.c: Likewise.
2007 * nfp-dis.c: Likewise.
2008 * visium-dis.c: Likewise.
2009
265b4673
CZ		 20102020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2011
2012 * arc-regs.h (int_vector_base): Make it available for all ARC
2013 CPUs.
2014
bd0cf5a6
NC		 20152020-02-20 Nelson Chu <nelson.chu@sifive.com>
2016
2017 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2018 changed.
2019
fa164239
JW		 20202020-02-19 Nelson Chu <nelson.chu@sifive.com>
2021
2022 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2023 c.mv/c.li if rs1 is zero.
2024
272a84b1
L		 20252020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2026
2027 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2028 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2029 CPU_POPCNT_FLAGS.
2030 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2031 * i386-opc.h (CpuABM): Removed.
2032 (CpuPOPCNT): New.
2033 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2034 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2035 popcnt. Remove CpuABM from lzcnt.
2036 * i386-init.h: Regenerated.
2037 * i386-tbl.h: Likewise.
2038
1f730c46
JB		 20392020-02-17 Jan Beulich <jbeulich@suse.com>
2040
2041 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2042 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2043 VexW1 instead of open-coding them.
2044 * i386-tbl.h: Re-generate.
2045
c8f8eebc
JB		 20462020-02-17 Jan Beulich <jbeulich@suse.com>
2047
2048 * i386-opc.tbl (AddrPrefixOpReg): Define.
2049 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2050 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2051 templates. Drop NoRex64.
2052 * i386-tbl.h: Re-generate.
2053
b9915cbc
JB		 20542020-02-17 Jan Beulich <jbeulich@suse.com>
2055
2056 PR gas/6518
2057 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2058 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2059 into Intel syntax instance (with Unpsecified) and AT&T one
2060 (without).
2061 (vcvtneps2bf16): Likewise, along with folding the two so far
2062 separate ones.
2063 * i386-tbl.h: Re-generate.
2064
ce504911
L		 20652020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2066
2067 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2068 CPU_ANY_SSE4A_FLAGS.
2069
dabec65d
AM		 20702020-02-17 Alan Modra <amodra@gmail.com>
2071
2072 * i386-gen.c (cpu_flag_init): Correct last change.
2073
af5c13b0
L		 20742020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2075
2076 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2077 CPU_ANY_SSE4_FLAGS.
2078
6867aac0
L		 20792020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2080
2081 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2082 (movzx): Likewise.
2083
65fca059
JB		 20842020-02-14 Jan Beulich <jbeulich@suse.com>
2085
2086 PR gas/25438
2087 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2088 destination for Cpu64-only variant.
2089 (movzx): Fold patterns.
2090 * i386-tbl.h: Re-generate.
2091
7deea9aa
JB		 20922020-02-13 Jan Beulich <jbeulich@suse.com>
2093
2094 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2095 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2096 CPU_ANY_SSE4_FLAGS entry.
2097 * i386-init.h: Re-generate.
2098
6c0946d0
JB		 20992020-02-12 Jan Beulich <jbeulich@suse.com>
2100
2101 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2102 with Unspecified, making the present one AT&T syntax only.
2103 * i386-tbl.h: Re-generate.
2104
ddb56fe6
JB		 21052020-02-12 Jan Beulich <jbeulich@suse.com>
2106
2107 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2108 * i386-tbl.h: Re-generate.
2109
5990e377
JB		 21102020-02-12 Jan Beulich <jbeulich@suse.com>
2111
2112 PR gas/24546
2113 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2114 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2115 Amd64 and Intel64 templates.
2116 (call, jmp): Likewise for far indirect variants. Dro
2117 Unspecified.
2118 * i386-tbl.h: Re-generate.
2119
50128d0c
JB		 21202020-02-11 Jan Beulich <jbeulich@suse.com>
2121
2122 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2123 * i386-opc.h (ShortForm): Delete.
2124 (struct i386_opcode_modifier): Remove shortform field.
2125 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2126 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2127 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2128 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2129 Drop ShortForm.
2130 * i386-tbl.h: Re-generate.
2131
1e05b5c4
JB		 21322020-02-11 Jan Beulich <jbeulich@suse.com>
2133
2134 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2135 fucompi): Drop ShortForm from operand-less templates.
2136 * i386-tbl.h: Re-generate.
2137
2f5dd314
AM		 21382020-02-11 Alan Modra <amodra@gmail.com>
2139
2140 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2141 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2142 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2143 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2144 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2145
5aae9ae9
MM		 21462020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2147
2148 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2149 (cde_opcodes): Add VCX* instructions.
2150
4934a27c
MM		 21512020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2152 Matthew Malcomson <matthew.malcomson@arm.com>
2153
2154 * arm-dis.c (struct cdeopcode32): New.
2155 (CDE_OPCODE): New macro.
2156 (cde_opcodes): New disassembly table.
2157 (regnames): New option to table.
2158 (cde_coprocs): New global variable.
2159 (print_insn_cde): New
2160 (print_insn_thumb32): Use print_insn_cde.
2161 (parse_arm_disassembler_options): Parse coprocN args.
2162
4b5aaf5f
L		 21632020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2164
2165 PR gas/25516
2166 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2167 with ISA64.
2168 * i386-opc.h (AMD64): Removed.
2169 (Intel64): Likewose.
2170 (AMD64): New.
2171 (INTEL64): Likewise.
2172 (INTEL64ONLY): Likewise.
2173 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2174 * i386-opc.tbl (Amd64): New.
2175 (Intel64): Likewise.
2176 (Intel64Only): Likewise.
2177 Replace AMD64 with Amd64. Update sysenter/sysenter with
2178 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2179 * i386-tbl.h: Regenerated.
2180
9fc0b501
SB		 21812020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2182
2183 PR 25469
2184 * z80-dis.c: Add support for GBZ80 opcodes.
2185
c5d7be0c
AM		 21862020-02-04 Alan Modra <amodra@gmail.com>
2187
2188 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2189
44e4546f
AM		 21902020-02-03 Alan Modra <amodra@gmail.com>
2191
2192 * m32c-ibld.c: Regenerate.
2193
b2b1453a
AM		 21942020-02-01 Alan Modra <amodra@gmail.com>
2195
2196 * frv-ibld.c: Regenerate.
2197
4102be5c
JB		 21982020-01-31 Jan Beulich <jbeulich@suse.com>
2199
2200 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2201 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2202 (OP_E_memory): Replace xmm_mdq_mode case label by
2203 vex_scalar_w_dq_mode one.
2204 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2205
825bd36c
JB		 22062020-01-31 Jan Beulich <jbeulich@suse.com>
2207
2208 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2209 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2210 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2211 (intel_operand_size): Drop vex_w_dq_mode case label.
2212
c3036ed0
RS		 22132020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2214
2215 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2216 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2217
0c115f84
AM		 22182020-01-30 Alan Modra <amodra@gmail.com>
2219
2220 * m32c-ibld.c: Regenerate.
2221
bd434cc4
JM		 22222020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2223
2224 * bpf-opc.c: Regenerate.
2225
aeab2b26
JB		 22262020-01-30 Jan Beulich <jbeulich@suse.com>
2227
2228 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2229 (dis386): Use them to replace C2/C3 table entries.
2230 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2231 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2232 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2233 * i386-tbl.h: Re-generate.
2234
62b3f548
JB		 22352020-01-30 Jan Beulich <jbeulich@suse.com>
2236
2237 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2238 forms.
2239 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2240 DefaultSize.
2241 * i386-tbl.h: Re-generate.
2242
1bd8ae10
AM		 22432020-01-30 Alan Modra <amodra@gmail.com>
2244
2245 * tic4x-dis.c (tic4x_dp): Make unsigned.
2246
bc31405e
L		 22472020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2248 Jan Beulich <jbeulich@suse.com>
2249
2250 PR binutils/25445
2251 * i386-dis.c (MOVSXD_Fixup): New function.
2252 (movsxd_mode): New enum.
2253 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2254 (intel_operand_size): Handle movsxd_mode.
2255 (OP_E_register): Likewise.
2256 (OP_G): Likewise.
2257 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2258 register on movsxd. Add movsxd with 16-bit destination register
2259 for AMD64 and Intel64 ISAs.
2260 * i386-tbl.h: Regenerated.
2261
7568c93b
TC		 22622020-01-27 Tamar Christina <tamar.christina@arm.com>
2263
2264 PR 25403
2265 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2266 * aarch64-asm-2.c: Regenerate
2267 * aarch64-dis-2.c: Likewise.
2268 * aarch64-opc-2.c: Likewise.
2269
c006a730
JB		 22702020-01-21 Jan Beulich <jbeulich@suse.com>
2271
2272 * i386-opc.tbl (sysret): Drop DefaultSize.
2273 * i386-tbl.h: Re-generate.
2274
c906a69a
JB		 22752020-01-21 Jan Beulich <jbeulich@suse.com>
2276
2277 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2278 Dword.
2279 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2280 * i386-tbl.h: Re-generate.
2281
26916852
NC		 22822020-01-20 Nick Clifton <nickc@redhat.com>
2283
2284 * po/de.po: Updated German translation.
2285 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2286 * po/uk.po: Updated Ukranian translation.
2287
4d6cbb64
AM		 22882020-01-20 Alan Modra <amodra@gmail.com>
2289
2290 * hppa-dis.c (fput_const): Remove useless cast.
2291
2bddb71a
AM		 22922020-01-20 Alan Modra <amodra@gmail.com>
2293
2294 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2295
1b1bb2c6
NC		 22962020-01-18 Nick Clifton <nickc@redhat.com>
2297
2298 * configure: Regenerate.
2299 * po/opcodes.pot: Regenerate.
2300
ae774686
NC		 23012020-01-18 Nick Clifton <nickc@redhat.com>
2302
2303 Binutils 2.34 branch created.
2304
07f1f3aa
CB		 23052020-01-17 Christian Biesinger <cbiesinger@google.com>
2306
2307 * opintl.h: Fix spelling error (seperate).
2308
42e04b36
L		 23092020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2310
2311 * i386-opc.tbl: Add {vex} pseudo prefix.
2312 * i386-tbl.h: Regenerated.
2313
2da2eaf4
AV		 23142020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2315
2316 PR 25376
2317 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2318 (neon_opcodes): Likewise.
2319 (select_arm_features): Make sure we enable MVE bits when selecting
2320 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2321 any architecture.
2322
d0849eed
JB		 23232020-01-16 Jan Beulich <jbeulich@suse.com>
2324
2325 * i386-opc.tbl: Drop stale comment from XOP section.
2326
9cf70a44
JB		 23272020-01-16 Jan Beulich <jbeulich@suse.com>
2328
2329 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2330 (extractps): Add VexWIG to SSE2AVX forms.
2331 * i386-tbl.h: Re-generate.
2332
4814632e
JB		 23332020-01-16 Jan Beulich <jbeulich@suse.com>
2334
2335 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2336 Size64 from and use VexW1 on SSE2AVX forms.
2337 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2338 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2339 * i386-tbl.h: Re-generate.
2340
aad09917
AM		 23412020-01-15 Alan Modra <amodra@gmail.com>
2342
2343 * tic4x-dis.c (tic4x_version): Make unsigned long.
2344 (optab, optab_special, registernames): New file scope vars.
2345 (tic4x_print_register): Set up registernames rather than
2346 malloc'd registertable.
2347 (tic4x_disassemble): Delete optable and optable_special. Use
2348 optab and optab_special instead. Throw away old optab,
2349 optab_special and registernames when info->mach changes.
2350
7a6bf3be
SB		 23512020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2352
2353 PR 25377
2354 * z80-dis.c (suffix): Use .db instruction to generate double
2355 prefix.
2356
ca1eaac0
AM		 23572020-01-14 Alan Modra <amodra@gmail.com>
2358
2359 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2360 values to unsigned before shifting.
2361
1d67fe3b
TT		 23622020-01-13 Thomas Troeger <tstroege@gmx.de>
2363
2364 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2365 flow instructions.
2366 (print_insn_thumb16, print_insn_thumb32): Likewise.
2367 (print_insn): Initialize the insn info.
2368 * i386-dis.c (print_insn): Initialize the insn info fields, and
2369 detect jumps.
2370
5e4f7e05
CZ		 23712012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2372
2373 * arc-opc.c (C_NE): Make it required.
2374
b9fe6b8a
CZ		 23752012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2376
2377 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2378 reserved register name.
2379
90dee485
AM		 23802020-01-13 Alan Modra <amodra@gmail.com>
2381
2382 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2383 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2384
febda64f
AM		 23852020-01-13 Alan Modra <amodra@gmail.com>
2386
2387 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2388 result of wasm_read_leb128 in a uint64_t and check that bits
2389 are not lost when copying to other locals. Use uint32_t for
2390 most locals. Use PRId64 when printing int64_t.
2391
df08b588
AM		 23922020-01-13 Alan Modra <amodra@gmail.com>
2393
2394 * score-dis.c: Formatting.
2395 * score7-dis.c: Formatting.
2396
b2c759ce
AM		 23972020-01-13 Alan Modra <amodra@gmail.com>
2398
2399 * score-dis.c (print_insn_score48): Use unsigned variables for
2400 unsigned values. Don't left shift negative values.
2401 (print_insn_score32): Likewise.
2402 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2403
5496abe1
AM		 24042020-01-13 Alan Modra <amodra@gmail.com>
2405
2406 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2407
202e762b
AM		 24082020-01-13 Alan Modra <amodra@gmail.com>
2409
2410 * fr30-ibld.c: Regenerate.
2411
7ef412cf
AM		 24122020-01-13 Alan Modra <amodra@gmail.com>
2413
2414 * xgate-dis.c (print_insn): Don't left shift signed value.
2415 (ripBits): Formatting, use 1u.
2416
7f578b95
AM		 24172020-01-10 Alan Modra <amodra@gmail.com>
2418
2419 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2420 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2421
441af85b
AM		 24222020-01-10 Alan Modra <amodra@gmail.com>
2423
2424 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2425 and XRREG value earlier to avoid a shift with negative exponent.
2426 * m10200-dis.c (disassemble): Similarly.
2427
bce58db4
NC		 24282020-01-09 Nick Clifton <nickc@redhat.com>
2429
2430 PR 25224
2431 * z80-dis.c (ld_ii_ii): Use correct cast.
2432
40c75bc8
SB		 24332020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2434
2435 PR 25224
2436 * z80-dis.c (ld_ii_ii): Use character constant when checking
2437 opcode byte value.
2438
d835a58b
JB		 24392020-01-09 Jan Beulich <jbeulich@suse.com>
2440
2441 * i386-dis.c (SEP_Fixup): New.
2442 (SEP): Define.
2443 (dis386_twobyte): Use it for sysenter/sysexit.
2444 (enum x86_64_isa): Change amd64 enumerator to value 1.
2445 (OP_J): Compare isa64 against intel64 instead of amd64.
2446 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2447 forms.
2448 * i386-tbl.h: Re-generate.
2449
030a2e78
AM		 24502020-01-08 Alan Modra <amodra@gmail.com>
2451
2452 * z8k-dis.c: Include libiberty.h
2453 (instr_data_s): Make max_fetched unsigned.
2454 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2455 Don't exceed byte_info bounds.
2456 (output_instr): Make num_bytes unsigned.
2457 (unpack_instr): Likewise for nibl_count and loop.
2458 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2459 idx unsigned.
2460 * z8k-opc.h: Regenerate.
2461
bb82aefe
SV		 24622020-01-07 Shahab Vahedi <shahab@synopsys.com>
2463
2464 * arc-tbl.h (llock): Use 'LLOCK' as class.
2465 (llockd): Likewise.
2466 (scond): Use 'SCOND' as class.
2467 (scondd): Likewise.
2468 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2469 (scondd): Likewise.
2470
cc6aa1a6
AM		 24712020-01-06 Alan Modra <amodra@gmail.com>
2472
2473 * m32c-ibld.c: Regenerate.
2474
660e62b1
AM		 24752020-01-06 Alan Modra <amodra@gmail.com>
2476
2477 PR 25344
2478 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2479 Peek at next byte to prevent recursion on repeated prefix bytes.
2480 Ensure uninitialised "mybuf" is not accessed.
2481 (print_insn_z80): Don't zero n_fetch and n_used here,..
2482 (print_insn_z80_buf): ..do it here instead.
2483
c9ae58fe
AM		 24842020-01-04 Alan Modra <amodra@gmail.com>
2485
2486 * m32r-ibld.c: Regenerate.
2487
5f57d4ec
AM		 24882020-01-04 Alan Modra <amodra@gmail.com>
2489
2490 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2491
2c5c1196
AM		 24922020-01-04 Alan Modra <amodra@gmail.com>
2493
2494 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2495
2e98c6c5
AM		 24962020-01-04 Alan Modra <amodra@gmail.com>
2497
2498 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2499
567dfba2
JB		 25002020-01-03 Jan Beulich <jbeulich@suse.com>
2501
5437a02a
JB		 2502 * aarch64-tbl.h (aarch64_opcode_table): Use
2503 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2504
25052020-01-03 Jan Beulich <jbeulich@suse.com>
2506
2507 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2
JB		 2508 forms of SUDOT and USDOT.
2509
8c45011a
JB		 25102020-01-03 Jan Beulich <jbeulich@suse.com>
2511
5437a02a 2512 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a
JB		 2513 uzip{1,2}.
2514 * opcodes/aarch64-dis-2.c: Re-generate.
2515
f4950f76
JB		 25162020-01-03 Jan Beulich <jbeulich@suse.com>
2517
5437a02a 2518 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76
JB		 2519 FMMLA encoding.
2520 * opcodes/aarch64-dis-2.c: Re-generate.
2521
6655dba2
SB		 25222020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2523
2524 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2525
b14ce8bf
AM		 25262020-01-01 Alan Modra <amodra@gmail.com>
2527
2528 Update year range in copyright notice of all files.
2529
0b114740 2530For older changes see ChangeLog-2019
3499769a 2531\f
0b114740 2532Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 2533
2534Copying and distribution of this file, with or without modification,
2535are permitted in any medium without royalty provided the copyright
2536notice and this notice are preserved.
2537
2538Local Variables:
2539mode: change-log
2540left-margin: 8
2541fill-column: 74
2542version-control: never
2543End:
A mirror of the official binutils-gdb repository