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Replace Vex2Sources and Vex3Sources with VexSources.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
8cd7925b
L		 12009-12-15 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-gen.c (opcode_modifiers): Remove Vex3Sources and
4 Vex2Sources. Add VexSources.
5
6 * i386-opc.h ()Vex2Sources: Removed.
7 (Vex3Sources): Likewise.
8 (VEX2SOURCES): New.
9 (VEX3SOURCES): Likewise.
10 (VexSources): Likewise.
11 (i386_opcode_modifier): Remove vex2sources and vex3sources.
12 Add vexsources.
13
14 * i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
15 Vex3Sourceswith VexSources=2.
16 * i386-tbl.h: Regenerated.
17
1ef99a7b
L		 182009-12-15 H.J. Lu <hongjiu.lu@intel.com>
19
20 * i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
21 VexW.
22
23 * i386-opc.h (VexW0): Removed.
24 (VexW1): Likewise.
25 (VEXW0): New.
26 (VEXW1): Likewise.
27 (VexW): Likewise.
28 (i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
29
30 * i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
31 Vex=2.
8cd7925b 32 * i386-tbl.h: Regenerated.
1ef99a7b 33
bcf2684f
L		 342009-12-15 H.J. Lu <hongjiu.lu@intel.com>
35
36 * i386-dis.c (VEX_W_3818_P_2_M_0): New.
37 (vex_w_table): Add VEX_W_3818_P_2_M_0.
38 (mod_table): Use VEX_W_3818_P_2_M_0.
39
a179a9fd
L		 402009-12-15 H.J. Lu <hongjiu.lu@intel.com>
41
42 * i386-dis.c (vex_w_table): Reformat.
43
53aa04a0
L		 442009-12-15 H.J. Lu <hongjiu.lu@intel.com>
45
46 * i386-dis.c (VEX_W_382X_P_2_M_0): New.
47 (vex_w_table): Add VEX_W_382X_P_2_M_0.
48 (mod_table): Use VEX_W_382X_P_2_M_0.
49
efdb52b7
L		 502009-12-15 H.J. Lu <hongjiu.lu@intel.com>
51
52 * i386-dis.c (vex_w_table): Reformat.
53
9e30b8e0
L		 542009-12-15 H.J. Lu <hongjiu.lu@intel.com>
55
56 * i386-dis.c (USE_VEX_W_TABLE): New.
57 (VEX_W_TABLE): Likewise.
58 (VEX_W_XXX): Likewise.
59 (vex_w_table): Likewise.
60 (prefix_table): Use VEX_W_XXX.
61 (vex_table): Likewise.
62 (vex_len_table): Likewise.
63 (mod_table): Likewise.
64 (get_valid_dis386): Handle USE_VEX_W_TABLE.
65
66 * i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
67 isn't used.
68 * i386-tbl.h: Regenerated.
69
e3c58833
L		 702009-12-15 H.J. Lu <hongjiu.lu@intel.com>
71
72 * i386-opc.h (VEX128): New.
73 (VEX256): Likewise.
74
4c807e72
L		 752009-12-14 H.J. Lu <hongjiu.lu@intel.com>
76
77 * i386-dis.c (vex_len_table): Reformat.
78
976f1fde
L		 792009-12-14 H.J. Lu <hongjiu.lu@intel.com>
80
81 * i386-dis.c (MOD_VEX_51): Renamed to ...
82 (MOD_VEX_50): This.
83 (vex_table): Updated.
84 (mod_table): Likewise.
85
ab8e2090
NC		 862009-12-14 Nick Clifton <nickc@redhat.com>
87
88 PR binutils/10924
89 * arm-dis.c (arm_opcodes): Specify %R in cases where using r15
90 results in unpredictable behaviour.
91 (print_insn_arm): Handle %R.
92
759a05ce
L		 932009-12-11 H.J. Lu <hongjiu.lu@intel.com>
94
95 * i386-dis.c (get_valid_dis386): Set vex.w to 0 for VEX C5
96 prefix.
97 (print_insn): Don't set vex.w here.
98
5639ff87
L		 992009-12-11 H.J. Lu <hongjiu.lu@intel.com>
100
101 * i386-dis.c (print_insn): Set vex.w to 0.
102
02e647f9
SP		 1032009-12-11 Quentin Neill <quentin.neill@amd.com>
104
105 * i386-dis.c (get_vex_imm8): Extend logic to apply in all cases,
106 to avoid fetching ahead for the immediate bytes when OP_E_memory
107 has already been called. Fix indentation.
108
91d6fa6a
NC		 1092009-12-11 Nick Clifton <nickc@redhat.com>
110
111 * Makefile.in: Regenerate.
112 * configure: Regenerate.
113 * arm-dis.c: Fix shadowed variable warnings.
114 * cgen-opc.c: Likewise.
115 * cr16-dis.c: Likewise.
116 * crx-dis.c: Likewise.
117 * d30v-dis.c: Likewise.
118 * fr30-dis.c: Likewise.
119 * frv-opc.c: Likewise.
120 * h8500-dis.c: Likewise.
121 * i386-dis.c: Likewise.
122 * i960-dis.c: Likewise.
123 * ia64-gen.c: Likewise.
124 * ia64-opc.c: Likewise.
125 * m32c-asm.c: Likewise.
126 * m32c-dis.c: Likewise.
127 * m68k-dis.c: Likewise.
128 * maxq-dis.c: Likewise.
129 * mcore-dis.c: Likewise.
130 * mep-asm.c: Likewise.
131 * microblaze-dis.c: Likewise.
132 * mmix-dis.c: Likewise.
133 * ns32k-dis.c: Likewise.
134 * or32-opc.c: Likewise.
135 * s390-dis.c: Likewise.
136 * sh64-dis.c: Likewise.
137 * spu-dis.c: Likewise.
138 * tic30-dis.c: Likewise.
139
07a28fab
NC		 1402009-12-09 Nick Clifton <nickc@redhat.com>
141
142 PR 10924
143 * arm-dis.c (print_insn_arm): Mark insns that use the PC in
144 post-indexed addressing as unpredictable.
145
eacc9c89
L		 1462009-12-03 H.J. Lu <hongjiu.lu@intel.com>
147
148 * i386-dis.c (FXSAVE_Fixup): New.
149 (FXSAVE): Likewise.
150 (mod_table): Use FXSAVE on fxsave and fxrstor.
151
152 * i386-opc.tbl: Add fxsave64 and fxrstor64.
153 * i386-tbl.h: Regenerated.
154
03ee1b7f
NC		 1552009-12-02 Nick Clifton <nickc@redhat.com>
156 Richard Earnshaw <rearnsha@arm.com>
157
158 PR gas/11013
159 * arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
160 and QDSUB.
161
ee9fd255
NC		 1622009-11-30 Massimo Ruo Roch <massimo.ruoroch@polito.it>
163
164 PR gas/11030
165 * m68k-opc.c (m68k_opcodes): Allow the STLDSR instruction on the
166 Coldfire ISA A+.
167
ccc5981b
SP		 1682009-11-17 Quentin Neill <quentin.neill@amd.com>
169 Sebastian Pop <sebastian.pop@amd.com>
170
171 * i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
172 decoding the second source operand from the immediate byte.
173 (OP_EX_VexW): Pass an extra integer to identify the second
174 and third source arguments.
175
18d0c96e
L		 1762009-11-19 H.J. Lu <hongjiu.lu@intel.com>
177
178 * i386-opc.tbl: Add IsLockable to cmpxch16b.
179 * i386-tbl.h: Regenerated.
180
945ee430
NC		 1812009-11-19 Nick Clifton <nickc@redhat.com>
182
183 PR binutils/10924
184 * arm-dis.c (print_insn_arm): Do not print an offset of zero when
185 decoding Immediaate Offset addressing.
186
41effecb
SP		 1872009-11-18 Sebastian Pop <sebastian.pop@amd.com>
188
189 PR binutils/10973
190 * i386-dis.c (get_vex_imm8): Do not increment codep.
191 Avoid incrementing bytes_before_imm when OP_E_memory
192 has already forwarded the codep pointer.
193 (OP_EX_VexW): Increment codep to skip mod/rm byte.
194
f0ae4a24
SP		 1952009-11-18 Sebastian Pop <sebastian.pop@amd.com>
196
197 * i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
198 (VEX_LEN_XOP_08_A1): Removed.
199 (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
200 VEX_LEN_XOP_08_A1.
201 (vex_len_table): Same.
202 * i386-gen.c (CPU_CVT16_FLAGS): Removed.
203 (cpu_flags): Remove field for CpuCVT16.
204 * i386-opc.h (CpuCVT16): Removed.
205 (i386_cpu_flags): Remove bitfield cpucvt16.
206 (i386-opc.tbl): Remove CVT16 instructions.
207 * i386-init.h: Regenerated.
208 * i386-tbl.h: Regenerated.
209
5dd85c99
SP		 2102009-11-17 Sebastian Pop <sebastian.pop@amd.com>
211 Quentin Neill <quentin.neill@amd.com>
212
213 * i386-dis.c (OP_Vex_2src_1): New.
214 (OP_Vex_2src_2): New.
215 (Vex_2src_1): New.
216 (Vex_2src_2): New.
217 (XOP_08): Added.
218 (VEX_LEN_XOP_08_A0): Added.
219 (VEX_LEN_XOP_08_A1): Added.
220 (VEX_LEN_XOP_09_80): Added.
221 (VEX_LEN_XOP_09_81): Added.
222 (xop_table): Added an entry for XOP_08. Handle xop instructions.
223 (vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
224 VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
225 (get_valid_dis386): Handle XOP_08.
226 (OP_Vex_2src): New.
227 * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
228 (cpu_flags): Add CpuXOP and CpuCVT16.
229 (opcode_modifiers): Add XOP08, Vex2Sources.
230 * i386-opc.h (CpuXOP): Added.
231 (CpuCVT16): Added.
232 (i386_cpu_flags): Add cpuxop and cpucvt16.
233 (XOP08): Added.
234 (Vex2Sources): Added.
235 (i386_opcode_modifier): Add xop08, vex2sources.
236 * i386-opc.tbl: Add entries for XOP and CVT16 instructions.
237 * i386-init.h: Regenerated.
238 * i386-tbl.h: Regenerated.
239
aefd8a40
NC		 2402009-11-17 Nick Clifton <nickc@redhat.com>
241
242 PR binutils/10924
243 * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
244 instruction variants. Add pattern for MRS variant that was being
245 confused with CMP.
246 (arm_decode_shift): Place error message in a comment.
247 (print_insn_arm): Note that writing back to the PC is
248 unpredictable.
249 Only print 'p' variants of cmp/cmn/teq/tst instructions if
250 decoding for pre-V6 architectures.
251
0bb027fd
RR		 2522009-11-17 Edward Nevill <edward.nevill@arm.com>
253
254 * arm-dis.c (print_insn_thumb32): Handle undefined instruction.
255
c7e770a0
DE		 2562009-11-14 Doug Evans <dje@sebabeach.org>
257
258 * Makefile.am (stamp-xc16x): Use ../cpu/xc16x.cpu instead of
259 ../cgen/cpu.
260 * Makefile.in: Regenerate.
261
8b3f93e7
L		 2622009-11-13 H.J. Lu <hongjiu.lu@intel.com>
263
264 * i386-dis.c (OP_E_extended): Removed.
265
2a70cca4
L		 2662009-11-13 H.J. Lu <hongjiu.lu@intel.com>
267
268 * i386-dis.c (print_insn): Check rex_ignored.
269
f16cd0d5
L		 2702009-11-13 H.J. Lu <hongjiu.lu@intel.com>
271
272 * i386-dis.c (ckprefix): Updated to return 0 if number of
273 prefixes > 14 and record the last position for each prefix.
274 (lock_prefix): Removed.
275 (data_prefix): Likewise.
276 (addr_prefix): Likewise.
277 (repz_prefix): Likewise.
278 (repnz_prefix): Likewise.
279 (last_lock_prefix): New.
280 (last_repz_prefix): Likewise.
281 (last_repnz_prefix): Likewise.
282 (last_data_prefix): Likewise.
283 (last_addr_prefix): Likewise.
284 (last_rex_prefix): Likewise.
285 (last_seg_prefix): Likewise.
286 (MAX_CODE_LENGTH): Likewise.
287 (ADDR16_PREFIX): Likewise.
288 (ADDR32_PREFIX): Likewise.
289 (DATA16_PREFIX): Likewise.
290 (DATA32_PREFIX): Likewise.
291 (REP_PREFIX): Likewise.
292 (seg_prefix): Likewise.
293 (all_prefixes): Change size to MAX_CODE_LENGTH - 1.
294 (prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
295 DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
296 (get_valid_dis386): Updated.
297 (OP_C): Likewise.
298 (OP_Monitor): Likewise.
299 (REP_Fixup): Likewise.
300 (print_insn): Display all prefixes.
301 (putop): Set PREFIX_DATA on used_prefixes only if it is used.
302 (intel_operand_size): Likewise.
303 (OP_E_register): Likewise.
304 (OP_G): Likewise.
305 (OP_REG): Likewise.
306 (OP_IMREG): Likewise.
307 (OP_I): Likewise.
308 (OP_I64): Likewise.
309 (OP_sI): Likewise.
310 (CRC32_Fixup): Likewise.
311 (MOVBE_Fixup): Likewise.
312 (OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
313 in 16bit mode.
314 (OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
315 used_prefixes only if it is used.
316
20efc689
L		 3172009-11-12 H.J. Lu <hongjiu.lu@intel.com>
318
319 * i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,
320 or, sbb, sub, xor and xchg with register only operands.
321 * i386-tbl.h: Regenerated.
322
c32fa91d
L		 3232009-11-12 H.J. Lu <hongjiu.lu@intel.com>
324
325 * i386-gen.c (opcode_modifiers): Add IsLockable.
326
327 * i386-opc.h (IsLockable): New.
328 (i386_opcode_modifier): Add islockable.
329
330 * i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
331 bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
332 xor, xadd and xchg.
333 * i386-tbl.h: Regenerated.
334
79862e45
DJ		 3352009-11-12 Daniel Jacobowitz <dan@codesourcery.com>
336
337 * arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
338 generic coprocessor instructions for FPA loads and stores.
339 (print_insn_coprocessor): Remove %C support. Display address for
340 PC-relative offsets in %A.
341
f310f33d
L		 3422009-11-11 H.J. Lu <hongjiu.lu@intel.com>
343
344 * i386-dis.c (all_prefixes): New.
345 (ckprefix): Set all_prefixes.
346 (print_insn): Print all_prefixes instead of lock_prefix,
347 repz_prefix, repnz_prefix, addr_prefix and data_prefix.
348
c1e26897
NC		 3492009-11-11 Nick Clifton <nickc@redhat.com>
350
351 PR binutils/10924
352 * arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
353 (print_insn_arm): Extend %s format control code to check for
354 unpredictable addressing modes. Add support for %S format control
355 code which suppresses this check.
356 (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
357 (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
358 PRE_BIT_SET): New macros.
359 (print_insn_coprocessor): Use the new macros instead of magic
360 constants.
361 (print_arm_address): Likewise.
362 (pirnt_insn_arm): Likewise.
363 (print_insn_thumb32): Likewise.
364
41327c9d
NC		 3652009-11-11 Nick Clifton <nickc@redhat.com>
366
367 * po/id.po: Updated Indonesian translation.
368
0d999f33
MK		 3692009-11-10 Maxim Kuvyrkov <maxim@codesourcery.com>
370
371 * m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
372
c48244a5
SP		 3732009-11-06 Sebastian Pop <sebastian.pop@amd.com>
374
375 * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
376 reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
377 B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
378 the xop_table.
379 (get_valid_dis386): Removed unused condition (from cut/n/paste) for
380 XOP instructions.
381
f88c9eb0
SP		 3822009-11-05 Sebastian Pop <sebastian.pop@amd.com>
383 Quentin Neill <quentin.neill@amd.com>
384
385 * opcodes/i386-dis.c (OP_LWPCB_E): New.
386 (OP_LWP_E): New.
387 (OP_LWP_I): New.
388 (USE_XOP_8F_TABLE): New.
389 (XOP_8F_TABLE): New.
390 (REG_XOP_LWPCB): New.
391 (REG_XOP_LWP): New.
392 (XOP_09): New.
393 (XOP_0A): New.
394 (reg_table): Redirect REG_8F to XOP_8F_TABLE.
395 Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
396 (xop_table): New.
397 (get_valid_dis386): Handle USE_XOP_8F_TABLE.
398 Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
399 to access to the vex_table.
400 (OP_LWPCB_E): New.
401 (OP_LWP_E): New.
402 (OP_LWP_I): New.
403 * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
404 (cpu_flags): Add CpuLWP.
405 (opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
406 * opcodes/i386-opc.h (CpuLWP): New.
407 (i386_cpu_flags): Add bit cpulwp.
408 (VexLWP): New.
409 (XOP09): New.
410 (XOP0A): New.
411 (i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
412 * opcodes/i386-opc.tbl (llwpcb): Added.
413 (lwpval): Added.
414 (lwpins): Added.
415
0d734b5d
DD		 4162009-11-04 DJ Delorie <dj@redhat.com>
417
418 * rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
419 (mvtcp, mvfcp, opecp): Remove.
420 * rx-decode.c: Regenerate.
421 * rx-dis.c (cpen): Remove.
422
d51b88d3
DE		 4232009-11-03 Doug Evans <dje@sebabeach.org>
424
425 * m32c-desc.c: Regenerate.
426 * mep-desc.c: Regenerate.
427
62f3b8c8
PB		 4282009-11-02 Paul Brook <paul@codesourcery.com>
429
430 * arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
431 Add VFPv4 instructions.
432
206c2556
L		 4332009-10-29 Sebastian Pop <sebastian.pop@amd.com>
434
435 * i386-dis.c (OP_VEX_FMA): Removed.
436 (VexFMA): Removed.
437 (Vex128FMA): Removed.
438 (prefix_table): First source operand of FMA4 insns is decoded
439 with Vex not with VexFMA.
440 (OP_EX_VexW): Second source operand is decoded with get_vex_imm8
441 when vex.w is set. Third source operand is decoded with
442
a2b2318d
AM		 4432009-10-27 Alan Modra <amodra@bigpond.net.au>
444
445 * Makefile.am (HFILES): Remove cgen-ops.h and cgen-types.h.
446 * Makefile.in: Regenerate.
447 * po/POTFILES.in: Regenerate.
448
ac1e9eca
DE		 4492009-10-23 Doug Evans <dje@sebabeach.org>
450
451 * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h.
452 * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h.
453 * cgen-bitset.c: Update.
454 * fr30-desc.h: Regenerate.
455 * frv-desc.h: Regenerate.
456 * ip2k-desc.h: Regenerate.
457 * iq2000-desc.h: Regenerate.
458 * lm32-desc.h: Regenerate.
459 * m32c-desc.h: Regenerate.
460 * m32c-opc.h: Regenerate.
461 * m32r-desc.h: Regenerate.
462 * mep-desc.h: Regenerate.
463 * mt-desc.h: Regenerate.
464 * openrisc-desc.h: Regenerate.
465 * xc16x-desc.h: Regenerate.
466 * xstormy16-desc.h: Regenerate.
467
f282425e
DD		 4682009-10-22 DJ Delorie <dj@redhat.com>
469
470 * rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.
471 * rx-decode.c: Regenerated.
472
4b06377f
L		 4732009-10-20 H.J. Lu <hongjiu.lu@intel.com>
474
475 PR gas/10775
476 * i386-dis.c: Document LB, LS and LV macros.
477 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
478 with the 64-bit displacement or immediate operand.
479 (putop): Handle LB, LS and LV macros.
480
cedb97b6
DE		 4812009-10-18 Doug Evans <dje@sebabeach.org>
482
483 * lm32-opinst.c: Regenerate.
484 * m32c-desc.c: Regenerate.
485 * m32r-opinst.c: Regenerate.
486 * openrisc-ibld.c: Regenerate.
487 * xc16x-desc.c: Regenerate.
488 * xc16x-desc.h: Regenerate.
489
d1119f7a
DE		 4902009-10-17 Doug Evans <dje@sebabeach.org>
491
492 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.
493 (FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are
494 sorted alphabetically.
495 (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen
496 stamp-* rules are sorted alphabetically.
497 * Makefile.in: Regenerate.
498
52a6c1fe
L		 4992009-10-16 H.J. Lu <hongjiu.lu@intel.com>
500
501 * i386-opc.h: Use enum instead of nested macros.
502
3873ba12
L		 5032009-10-16 H.J. Lu <hongjiu.lu@intel.com>
504
505 * i386-dis.c: Simplify enums.
506
51e7da1b
L		 5072009-10-15 H.J. Lu <hongjiu.lu@intel.com>
508 Ineiev <ineiev@gmail.com>
509
510 PR binutils/10767
511 * i386-dis.c: Use enum instead of nested macros.
512
c39846ed
L		 5132009-10-15 H.J. Lu <hongjiu.lu@intel.com>
514
515 * i386-dis.c (MAX_BYTEMODE): Removed.
516
6a327e17
AM		 5172009-10-14 Tomas Hurka <tom@hukatronic.cz>
518
519 PR 969
520 * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
521
55b126d4
L		 5222009-10-13 H.J. Lu <hongjiu.lu@intel.com>
523
524 * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg
525 and vex_w_done.
526
ef299415
ME		 5272009-10-07 Michael Eager <eager@eagercon.com>
528
55b126d4 529 * microblaze-dis.c: Add include for microblaze-dis.h,
ef299415 530 eliminate local extern decls.
55b126d4 531 * microblaze-dis.h: New.
ef299415 532
245caaea
NC		 5332009-10-06 Nick Clifton <nickc@redhat.com>
534
535 * po/fi.po: Updated Finnish translation.
536
49293ef7
NC		 5372009-10-03 Andreas Schwab <schwab@linux-m68k.org>
538
539 * opc2c.c: Include "libiberty.h" and <errno.h>.
540 (orig_filename): Constify.
541 (dump_lines): Fix line number directive.
542 (main): Set orig_filename to basename of input file. Use
543 xstrerror.
544
545 * Makefile.am (rx-dis.lo): Remove explicit dependencies.
546 ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD)
547 instead of $(EXEEXT).
548 (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use
549 $(LINK_FOR_BUILD). Link with libiberty.
550 (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD).
551 (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c.
552 * Makefile.in: Regenerated.
553 * rx-decode.c: Regenerated.
554
8977d4b2
AM		 5552009-10-03 Paul Reed <paulreed@paddedcell.com>
556
557 * arm-dis.c (print_insn): Check symtab_size not *symtab.
558
f98fa534
L		 5592009-10-02 H.J. Lu <hongjiu.lu@intel.com>
560
561 * i386-opc.tbl: Drop Disp64 on jump and loop instructions.
562 * i386-tbl.h: Regenerated.
563
9fe54b1c
PB		 5642009-10-02 Peter Bergner <bergner@vnet.ibm.com>
565
566 * ppc-dis.c (ppc_opts): Add "476" entry.
567 * ppc-opc.c (PPC476): Define.
568 (powerpc_opcodes): Update mnemonics where required for 476.
569
634b50f2
PB		 5702009-10-01 Peter Bergner <bergner@vnet.ibm.com>
571
572 * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
573 * ppc-dis.c (ppc_opts): Likewise.
574 Rename "ppca2" to "a2".
575
4ded9dda
SR		 5762009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
577
578 * crx-dis.c (match_opcode): Truncate mcode to 32-bit.
579
c7927a3c
NC		 5802009-09-29 DJ Delorie <dj@redhat.com>
581
582 * Makefile.am: Add RX files.
583 * configure.in: Add support for RX target.
584 * disassemble.c: Likewise.
585 * Makefile.in: Regenerate.
586 * configure: Regenerate.
587 * opc2c.c: New file.
588 * rx-decode.c: New file.
589 * rx-decode.opc: New file.
590 * rx-dis.c: New file.
591
8765b556
PB		 5922009-09-29 Peter Bergner <bergner@vnet.ibm.com>
593
594 * ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
595 "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
596
fe2d172c
ME		 5972009-09-25 Michael Eager <eager@eagercon.com>
598
e0c483d6
AM		 599 * microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address,
600 microblaze_decode_insn): Add declarations.
601 (get_delay_slots_microblaze): Remove.
fe2d172c 602
21d799b5
NC		 6032009-09-25 Martin Thuresson <martint@google.com>
604
e0c483d6 605 Update sources to make arc and arm targets compile cleanly with
21d799b5
NC		 606 -Wc++-compat:
607 * arc-dis.c Fix casts.
608 * arc-ext.c: Add casts.
609 * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
610 enum.
611
2bf05e57
L		 6122009-09-24 H.J. Lu <hongjiu.lu@intel.com>
613
614 * i386-gen.c (opcode_modifiers): Remove Vex256.
615 (set_bitfield): Handle XXX=V.
616
617 * i386-opc.h (Vex): Update comments.
618 (Vex256): Removed.
619 (VexNDS): Updated.
e0c483d6 620 (i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
2bf05e57
L		 621
622 * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
623 * i386-tbl.h: Regenerated.
624
8a00d392
NC		 6252009-09-23 Nick Clifton <nickc@redhat.com>
626
627 * po/fr.po: Updated French translation.
628
e0d602ec
BE		 6292009-09-21 Ben Elliston <bje@au.ibm.com>
630 Peter Bergner <bergner@vnet.ibm.com>
631
632 * ppc-dis.c (ppc_opts): Add "ppca2" entry.
633 * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
634 eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
635 icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
636 ici mnemonics.
637 (ERAT_T): New operand.
638 (XWC_MASK): New mask.
639 (XOPL2): New macro.
640 (PPCA2): Define.
641
ca58b19f
NC		 6422009-09-18 Nick Clifton <nickc@redhat.com>
643
644 * po/es.po: Updated Spanish translation.
645 * po/vi.po: Updated Vietnamese translation.
646
05203043
L		 6472009-09-15 H.J. Lu <hongjiu.lu@intel.com>
648
649 * i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if
650 disp == -disp.
651
df58f7b0
NC		 6522009-09-14 Nick Clifton <nickc@redhat.com>
653
654 * po/nl.po: Updated Dutch translation.
655
1e9cc1c2
NC		 6562009-09-11 Nick Clifton <nickc@redhat.com>
657
658 * po/opcodes.pot: Updated by the Translation project.
659
6602009-09-11 Martin Thuresson <martint@google.com>
661
662 Updated sources to compile cleanly with -Wc++-compat:
663 * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level.
664 * ldcref.c: Add casts.
665 * ldctor.c: Add casts.
666 * ldexp.c
667 * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level.
668 * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer.
669 * ldlang.h (enum statement_enum): Move to top level.
670 * ldmain.c: Add casts.
671 * ldwrite.c: Add casts.
672 * lexsup.c: Add casts. (enum control_enum): Move to top level.
673 * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer.
674
c8676ae4 6752009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 676
c8676ae4
AK		 677 * s390-dis.c (print_insn_s390): Avoid 'long long'.
678
7330f9c3 6792009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
e0c483d6 680
7330f9c3
AK		 681 * s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands.
682 (print_insn_s390): Signextend and shift pcrel operands before printing.
683
9daa0d29
L		 6842009-09-09 H.J. Lu <hongjiu.lu@intel.com>
685
686 * i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to
687 VEX_LEN_AE_R_X_M_0 in comments.
688
495c5f87
DD		 6892009-09-08 DJ Delorie <dj@redhat.com>
690
691 * mep-opc.c: Regenerate.
692
84c71969
AS		 6932009-09-08 Andreas Schwab <schwab@linux-m68k.org>
694
695 * z8kgen.c (struct op): Replace unused flavor with id.
696 (opt): Remove extra xorb entry.
697 (func): Use id field as fallback.
698 (sub): Return new string, caller changed.
699 (internal): Allocate end marker. Assign unique id before sorting.
700 (gas): Likewise. Fix loop end condition.
701 * z8k-opc.h: Regenerate.
702
bdc7fcfe
AM		 7032009-09-08 Alan Modra <amodra@bigpond.net.au>
704
705 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.
706
815c0482
AM		 7072009-09-07 Alan Modra <amodra@bigpond.net.au>
708
709 * z8kgen.c (func): Fix thinko last patch.
710
eae14d64
AM		 7112009-09-07 Alan Modra <amodra@bigpond.net.au>
712
713 * z8kgen.c (func): Stabilize qsort of identically named entries.
714 * z8k-opc.h: Regenerate.
715
23f938f1
TG		 7162009-09-07 Tristan Gingold <gingold@adacore.com>
717
718 * po/opcodes.pot: Regenerate.
719
2eee5593
AM		 7202009-09-07 Alan Modra <amodra@bigpond.net.au>
721
722 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.
723 * configure: Regenerate.
724 * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete.
725 (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use..
726 (i386-gen, ia64-gen, z8kgen): ..here.
727 * Makefile.in: Regenerate.
728
ae794f60
TG		 7292009-09-07 Tristan Gingold <gingold@adacore.com>
730
731 * z8k-opc.h: Regenerate.
732
96d56e9f
NC		 7332009-09-05 Martin Thuresson <martin@mtme.org>
734
735 * ia64-dis.c (print_insn_ia64): Update code to use renamed member.
736 * m88k-dis.c (m88kdis): Rename variable class to in_class.
737 * tic80-opc.c (tic80_symbol_to_value, tic80_value_to_symbol):
738 Rename argument class to symbol_class.
739
66a6900a
JZ		 7402009-09-04 Jie Zhang <jie.zhang@analog.com>
741
742 * bfin-dis.c (decode_pseudodbg_assert_0): Change according
743 to the new encoding of DBGA, DBGAH, and DBGAL.
744 (_print_insn_bfin): Likewise.
745
ad15c38e
JZ		 7462009-09-03 Jie Zhang <jie.zhang@analog.com>
747
748 * bfin-dis.c (_print_insn_bfin): Don't declare.
749 (print_insn_bfin): Don't declare.
750 (dregs_pair): Remove.
751 (ignore_bits): Remove.
752 (ccstat): Remove.
753
c958a8a8
JZ		 7542009-09-03 Jie Zhang <jie.zhang@analog.com>
755
756 * bfin-dis.c (IS_DREG): Define.
757 (IS_PREG): Define.
758 (IS_AREG): Define.
759 (IS_GENREG): Define.
760 (IS_DAGREG): Define.
761 (IS_SYSREG): Define.
762 (decode_REGMV_0): Check illegal register move instructions.
763
3df5879c
DK		 7642009-09-03 Dave Korn <dave.korn.cygwin@gmail.com>
765
766 * Makefile.am (BUILD_LIBINTL): New variable.
767 (i386-gen$(EXEEXT_FOR_BUILD)): Use it.
768 (ia64-gen$(EXEEXT_FOR_BUILD)): And here.
769 (z8kgen$(EXEEXT_FOR_BUILD)): And here.
770 * Makefile.in: Regenerate.
771
05316052
DD		 7722009-09-01 DJ Delorie <dj@redhat.com>
773
774 * mep-asm.c: Regenerate.
775 * mep-desc.c: Regenerate.
776 * mep-opc.c: Regenerate.
777
e06ae0d4
TG		 7782009-09-01 Tristan Gingold <gingold@adacore.com>
779
780 * makefile.vms: Ported to Itanium VMS. Remove useless targets and
781 dependencies. Remove unused FORMAT variable.
782 * configure.com: New file to create build.com DCL script for
783 Itanium VMS or Alpha VMS.
784
d3ce72d0
NC		 7852009-08-29 Martin Thuresson <martin@mtme.org>
786
787 * cris-dis.c (bytes_to_skip): Update code to use new name.
788 * i386-dis.c (putop): Update code to use new name.
789 * i386-gen.c (process_i386_opcodes): Update code to use
790 new name.
791 * i386-opc.h (struct template): Rename struct template to
792 insn_template. Update code accordingly.
793 * i386-tbl.h (i386_optab): Update type to use new name.
794 * ia64-dis.c (print_insn_ia64): Rename variable template
795 to template_val.
796 * tic30-dis.c (struct instruction, get_tic30_instruction):
797 Update code to use new name.
798 * tic54x-dis.c (has_lkaddr, get_insn_size)
799 (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
800 Update code to use new name.
801 * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
802 Update type to new name.
803 * z8kgen.c (internal, gas): Rename variable new to new_op.
804
791f3971
L		 8052009-08-28 H.J. Lu <hongjiu.lu@intel.com>
806
807 * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS.
808 Replace BUILD_CFLAGS with CFLAGS_FOR_BUILD.
809 (LINK_FOR_BUILD): Replace BUILD_CFLAGS/BUILD_LDFLAGS with
810 CFLAGS_FOR_BUILD/LDFLAGS_FOR_BUILD.
811 * Makefile.in: Regenerated.
812
573e8a1c
RW		 8132009-08-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
814
815 * Makefile.am (bfdlibdir, bfdincludedir): Move definition ...
816 [INSTALL_LIBBFD]: ... here, ...
817 [INSTALL_LIBBFD]: ... and empty overrides here.
818 [!INSTALL_LIBBFD]: (rpath_bfdlibdir): New variable.
819 [!INSTALL_LIBBFD] (libbfd_la_LDFLAGS): Use it.
820 * Makefile.in: Regenerate.
821 * configure: Regenerate.
822
f7922329
NC		 8232009-08-26 Philippe De Muyter <phdm@macqel.be>
824
825 * m68k-dis.c (print_insn_arg): Add movecr register names for
826 coldfire v4e families.
827
ff13a42d
RW		 8282009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
829
830 * Makefile.am (SUBDIRS): Build '.' before 'po'.
831 (COMPILE_FOR_BUILD, LINK_FOR_BUILD, BUILD_LIBIBERTY)
832 (MOSTLYCLEANFILES, MAINTAINERCLEANFILES): New variables.
833 (i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
834 using *BUILD variables, depend upon $(BUILD_LIBIBERTY).
835 (i386-gen.o): New rule.
836 ($(srcdir)/i386-init.h): Adjust.
837 (i386-opc.lo): Depend on $(srcdir)/i386-tbl.h.
838 (ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
839 (ia64-gen.o): New rule.
840 (ia64_asmtab_deps): New variable.
841 ($(srcdir)/ia64-asmtab.c): Use it; adjust likewise.
842 (ia64-opc.lo): Depend on $(srcdir)/ia64-asmtab.c.
843 (s390-mkopc$(EXEEXT_FOR_BUILD)): Rename from s390-mkopc, adjust
844 likewise.
845 (s390-opc.tab): Adjust.
846 (z8kgen$(EXEEXT_FOR_BUILD), z8kgen.o, $(srcdir)/z8k-opc.h): New
847 rules.
848 (z8k-dis.lo): Depend on $(srcdir)/z8k-opc.h.
849 * Makefile.in: Regenerate.
850 * z8kgen.c (gas): Avoid '/*' in comment.
851 * z8k-opc.h (func): Regenerate.
852
6f01793d
RW		 8532009-08-24 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
854
855 * Makefile.am (TARGET_LIBOPCODES_CFILES): New variable, taken
856 from $(CFILES), sorted, with dis-buf.c, dis-init.c, disassemble.c,
857 i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
858 ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
859 msp430-dis.c added.
860 (LIBOPCODES_CFILES): New variable, adding to
861 TARGET_LIBOPCODES_CFILES also non-target library sources.
862 (CFILES): Factorize based on $(LIBOPCODES_CFILES), adding generator
863 files.
864 (ALL_MACHINES): Factorize based on $(TARGET_LIBOPCODES_CFILES).
865 (EXTRA_libopcodes_la_SOURCES): Use $(LIBOPCODES_CFILES).
866 * Makefile.in: Regenerate.
867 * po/POTFILES.in: Regenerate.
868
81ecdfbb
RW		 8692009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
870
14ec8efd
RW		 871 * Makefile.am (libopcodes_la_LDFLAGS): Initialize early.
872 [INSTALL_LIBBFD] (bfdlib_LTLIBRARIES): Set only in this condition.
873 [INSTALL_LIBBFD] (bfdinclude_DATA): New.
874 [!INSTALL_LIBBFD] (noinst_LTLIBRARIES): New.
875 [!INSTALL_LIBBFD] (libopcodes_la_LDFLAGS): Ensure libopcodes.la
876 is built shared even if it is not to be installed.
877 (install-bfdlibLTLIBRARIES,uninstall-bfdlibLTLIBRARIES)
878 (install_libopcodes, uninstall_libopcodes): Remove.
879 (AM_CPPFLAGS): Renamed from ...
880 (INCLUDES): ... this.
881 * Makefile.in: Regenerate.
882
758227f0
RW		 883 * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9 and cygnus, add
884 1.11, foreign, no-dist.
885 (MKDEP, m32c_opc_h): Remove variables.
886 (disassemble.lo): Rewrite using automake-style dependency
887 tracking rules; only list the dependency upon the primary source
888 file, but no included headers.
889 (m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo)
890 (i386-gen.o, ia64-gen.o): Remove dependency statements.
891 (EXTRA_libopcodes_la_SOURCES): New variable, list $(CFILES) to
892 ensure all dependency fragments are included in the Makefile.
893 (s390-opc.lo): Depend on s390-opc.tab.
894 (DEP, DEP1, dep.sed, dep, dep-in, dep-am): Remove rules.
895 (mkdep section): Remove.
896 * Makefile.in: Regenerate.
897 * po/POTFILES.in: Regenerate.
898
af542c2e
RW		 899 * Makefile.am (install-pdf, install-html): Remove.
900 * Makefile.in: Regenerate.
901
81ecdfbb
RW		 902 * Makefile.in: Regenerate.
903 * aclocal.m4: Likewise.
904 * config.in: Likewise.
905 * configure: Likewise.
906
7ba29e2a
NC		 9072009-08-06 Michael Eager <eager@eagercon.com>
908
909 * Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
910 CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
911 * Makefile.in: Regenerate.
912 * configure.in: Add bfd_microblaze_arch target.
913 * configure: Regenerate.
e0c483d6 914 * disassemble.c: Define ARCH_microblaze, return
7ba29e2a
NC		 915 print_insn_microblaze().
916 * microblaze-dis.c: New MicroBlaze disassembler.
917 * microblaze-opc.h: New MicroBlaze opcode definitions.
918 * microblaze-opcm.h: New MicroBlaze opcode types.
919
8a9036a4
L		 9202009-07-25 H.J. Lu <hongjiu.lu@intel.com>
921
922 * configure.in: Handle bfd_l1om_arch.
923 * disassemble.c (disassembler): Likewise.
924
925 * configure: Regenerated.
926
927 * i386-dis.c (print_insn): Handle bfd_mach_l1om and
928 bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
929
930 * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
931 Add CPU_L1OM_FLAGS.
932 (cpu_flags): Add CpuL1OM.
933 (set_bitfield): Take an argument to set the value field.
934 (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
935 (process_i386_opcode_modifier): Updated.
936 (process_i386_operand_type): Likewise.
937 * i386-init.h: Regenerated.
938 * i386-tbl.h: Likewise.
939
940 * i386-opc.h (CpuL1OM): New.
941 (CpuXsave): Updated.
942 (i386_cpu_flags): Add cpul1om.
943
309d3373
JB		 9442009-07-24 Jan Beulich <jbeulich@novell.com>
945
946 * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
947 frstpm.
948 * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
949 (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
950 (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
951 * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
952 Define.
953 (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
954 and cpufisttp.
955 * i386-opc.tbl: Qualify floating point instructions by their
956 respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
957 and fsincos to be avilable only on 387. Fix fstsw ax to be
958 available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
959 and frstpm.
960 * i386-init.h, i386-tbl.h: Regenerate.
961
7769efb2
NC		 9622009-07-20 Nick Clifton <nickc@redhat.com>
963
964 PR 10288
965 * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
966 offset or indexed based addressing mode 3.
967
74bdfecf
NC		 9682009-07-14 Nick Clifton <nickc@redhat.com>
969
970 PR 10288
971 * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
972 patterns.
973 (arm_decode_shift): Catch illegal register based shifts.
974 (print_insn_arm): Properly handle negative register r0
975 post-indexed addressing.
976
d1aaab3c
DK		 9772009-07-10 Doug Kwan <dougkwan@google.com>
978
979 * arm-disc.c (print_insn_coprocessor, print_insn_arm): Print only
980 lower 32 bits of long types to make hexadecimal output consistent
981 on both 32-bit and 64-bit hosts.
982
87337981
AM		 9832009-07-10 Alan Modra <amodra@bigpond.net.au>
984
985 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, * fr30-opc.h,
986 * frv-desc.c, * frv-desc.h, * frv-opc.c, * frv-opc.h,
987 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * ip2k-opc.h,
988 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * iq2000-opc.h,
989 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opc.h,
990 * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
991 * m32c-opc.h, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c,
992 * m32r-opc.h, * m32r-opinst.c, * mt-desc.c, * mt-desc.h,
993 * mt-opc.c, * mt-opc.h, * openrisc-desc.c, * openrisc-desc.h,
994 * openrisc-opc.c, * openrisc-opc.h, * xc16x-desc.c, * xc16x-desc.h,
e0c483d6 995 * xc16x-opc.c, * xc16x-opc.h, * xstormy16-desc.c, * xstormy16-desc.h,
87337981
AM		 996 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
997
1103f72c
NC		 9982009-07-07 Chung-Lin Tang <cltang@pllab.cs.nthu.edu.tw>
999
1000 * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
1001
78c66db8
NC		 10022009-07-07 Nick Clifton <nickc@redhat.com>
1003
1004 PR 10288
1005 * arm-dis.c (arm_opcodes): Be more strict about decoding scaled
1006 addressing modes.
1007
22102fb0
DD		 10082009-07-06 DJ Delorie <dj@redhat.com>
1009
1010 * mep-desc.c: Regenerate.
1011 * mep-desc.h: Regenerate.
1012 * mep-opc.c: Regenerate.
1013 * mep-opc.h: Regenerate.
1014
922d8de8
DR		 10152009-07-06 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1016
1017 * i386-opc.h (CpuFMA4): Add CpuFMA4.
1018 (i386_cpu_flags): New.
1019 * i386-gen.c: Add CPU_FMA4_FLAGS.
1020 * i386-opc.tbl: Add FMA4 instructions.
1021 * i386-tbl.h: Regenerate.
1022 * i386-init.h: Regenerate.
1023 * i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
1024 (OP_XMM_VexW): Ditto.
1025 (OP_EX_VexW): Ditto.
1026 (VEXI4_Fixup): Ditto.
1027 (VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
1028 (PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
1029 (PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
1030 (PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
1031 (PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
1032 (PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
1033 (PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
1034 (PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
1035 (VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
1036 (VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
1037 (VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
1038 (get_vex_imm8): New. handle FMA4.
1039 (OP_EX_VexReg): Ditto.
e0c483d6 1040
fe56b6ce
NC		 10412009-06-30 Nick Clifton <nickc@redhat.com>
1042
1043 PR 10288
1044 * arm-dis.c (coprocessor): Print the LDC and STC versions of the
1045 LFM and SFM instructions as comments,.
1046 Improve consistency of formatting for instructions displayed as
1047 comments and decimal values displayed with their hexadecimal
1048 equivalents.
1049 Formatting tidy ups.
1050
05413229
NC		 10512009-06-29 Nick Clifton <nickc@redhat.com>
1052
1053 PR 10288
1054 * arm-dis.c (enum opcode_sentinels): New: Used to mark the
1055 boundary between variaant and generic coprocessor instuctions.
1056 (coprocessor): Use it.
1057 Fix architecture version of MCRR and MRRC instructions.
1058 (arm_opcdes): Fix patterns for STRB and STRH instructions.
1059 (print_insn_coprocessor): Check architecture and extension masks.
1060 Print a hexadecimal version of any decimal constant that is
1061 outside of the range of -16 to +32.
1062 (print_arm_address): Add a return value of the offset used in the
1063 adress, if it is worth printing a hexadecimal version of it.
1064 (print_insn_neon): Print a hexadecimal version of any decimal
1065 constant that is outside of the range of -16 to +32.
1066 (print_insn_arm): Likewise.
1067 (print_insn_thumb16): Likewise.
1068 (print_insn_thumb32): Likewise.
e0c483d6 1069
05413229
NC		 1070 PR 10297
1071 * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
1072 of an undefined instruction.
1073 (arm_opcodes): Use it.
1074 (thumb_opcod): Use it.
1075 (thumb32_opc): Use it.
1076
378a0c07
DD		 10772009-06-23 DJ Delorie <dj@redhat.com>
1078
dab97f24
DD		 1079 * mep-desc.c: Regenerate.
1080 * mep-desc.h: Regenerate.
1081 * mep-dis.c: Regenerate.
1082 * mep-ibld.c: Regenerate.
1083 * mep-opc.c: Regenerate.
1084
378a0c07
DD		 1085 * mep-asm.c: Regenerate.
1086 * mep-opc.c: Regenerate.
1087 * mep-opc.h: Regenerate.
1088
aece7d2e
NC		 10892009-06-22 Nick Clifton <nickc@redhat.com>
1090
1091 * po/fi.po: Updated Finish translation.
1092
1998a8e0
AM		 10932009-06-22 Alan Modra <amodra@bigpond.net.au>
1094
1095 * m32c-asm.c: Regenerate.
1096
b33bafa0
AM		 10972009-06-22 Alan Modra <amodra@bigpond.net.au>
1098
1099 * score-dis.c (print_insn_score48, print_insn_score32): Move default
1100 case label to proper lexical block.
1101 * score7-dis.c (print_insn_score32): Likewise.
1102
ce21feb4
MS		 11032009-06-19 Martin Schwidefsky <sschwidefsky@de.ibm.com>
1104
1105 * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
1106 MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
1107 * s390-opc.txt (nopr, nop): Use new instruction format.
1108
0313a2b8
NC		 11092009-06-18 Nick Clifton <nickc@redhat.com>
1110
1111 PR 10288
1112 * arm-dis.c (print_insn_coprocessor): Check that a user specified
1113 ARM architecture supports the matched instruction.
1114 (print_insn_arm): Likewise.
1115 (select_arm_features): New function. Fills in the fields of an
1116 arm_feature_set structure based on a given arm machine number.
1117 (print_insn): Initialise an arm_feature_set structure.
1118
6db7e006
MR		 11192009-06-16 Maciej W. Rozycki <macro@linux-mips.org>
1120
1121 * vax-dis.c (is_function_entry): Return success for synthetic
1122 symbols too.
1123 (is_plt_tail): New function.
1124 (print_insn_vax): Decode PLT entry offset longword.
1125
522fe561
NC		 11262009-06-15 Nick Clifton <nickc@redhat.com>
1127
fe2ceba1
NC		 1128 PR 10186
1129 * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
1130 instruction.
1131
522fe561
NC		 1132 PR 10173
1133 * cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
1134
1316c8b3
NC		 11352009-06-15 Nick Clifton <nickc@redhat.com>
1136
1137 PR 10263
1138 * arm-dis.c (print_insn): Ignore is_data if the user has requested
1139 the disassembly of data as well as instructions.
1140
f6475b48
DE		 11412009-06-11 Doug Evans <dje@sebabeach.org>
1142
1143 * cgen.sh: Handle multiple simultaneous runs for parallel makes.
1144
f865a31d
AG		 11452009-06-11 Anthony Green <green@moxielogic.com>
1146
1147 * moxie-opc.c (moxie_form1_opc_info): Remove branch instructions.
1148 (moxie_form3_opc_info): Add branch instructions.
1149 * moxie-dis.c (print_insn_moxie): Disassemble MOXIE_F3_PCREL
1150 encoded instructions.
1151
0e7c7f11
AG		 11522009-06-06 Anthony Green <green@moxielogic.com>
1153
1154 * moxie-opc.c: Recode some MOXIE_F1_4 opcodes as MOXIE_F1_M.
1155 * moxie-dis.c (print_insn_moxie): Handle MOXIE_F1_M case.
1156
67a648f1
AM		 11572009-06-04 Alan Modra <amodra@bigpond.net.au>
1158
1159 * dep-in.sed: Don't use \n in replacement part of s command.
1160 * Makefile.am (DEP1): LC_ALL for uniq.
1161 * Makefile.in: Regenerate.
1162
06c582ac
NC		 11632009-06-02 Nick Clifton <nickc@redhat.com>
1164
1165 * po/nl.po: Updated Dutch translation.
1166
3164099e
TG		 11672009-06-02 Tristan Gingold <gingold@adacore.com>
1168
1169 * ia64-gen.c (parse_resource_users, print_dependency_table,
1170 add_dis_table_ent, finish_distable, insert_bit_table_ent,
1171 add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
1172 get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
1173 insert_completer_entry, print_completer_entry, print_completer_table,
1174 opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
1175
d285268e
DD		 11762009-05-28 DJ Delorie <dj@redhat.com>
1177
1178 * mep-asm.c: Regenerate.
1179 * mep-desc.c: Regenerate.
1180
2f3565a3
DD		 11812009-05-26 DJ Delorie <dj@redhat.com>
1182
1183 * mep-asm.c: Regenerate.
1184 * mep-desc.c: Regenerate.
1185 * mep-desc.h: Regenerate.
1186 * mep-dis.c: Regenerate.
1187 * mep-ibld.c: Regenerate.
1188 * mep-opc.c: Regenerate.
1189 * mep-opc.h: Regenerate.
1190
f12e7348
NC		 11912009-05-26 Nick Clifton <nickc@redhat.com>
1192
1193 * po/id.po: Updated Indonesian translation.
1194 * po/opcodes.pot: Updated template file.
1195
9e097a72
AM		 11962009-05-26 Alan Modra <amodra@bigpond.net.au>
1197
1198 * dep-in.sed: Don't modify .o to .lo here. Output one filename
1199 per line with all lines having continuation backslash. Prefix
1200 first line with "A", following lines with "B".
1201 * Makefile.am (DEP): Don't use dep.sed here.
1202 (DEP1): Run $MKDEP on single files, modify .o to .lo here. Use
1203 dep.sed here on dependencies, sort and uniq.
1204 * Makefile.in: Regenerate.
1205
4f8318f8
TG		 12062009-05-25 Tristan Gingold <gingold@adacore.com>
1207
1208 * makefile.vms (OPT): New variable.
1209 (CFLAGS): Update compilation flags.
1210
1d74713b
DD		 12112009-05-22 DJ Delorie <dj@redhat.com>
1212
1213 * mep-asm.c: Regenerate.
1214 * mep-desc.c: Regenerate.
1215 * mep-desc.h: Regenerate.
1216 * mep-dis.c: Regenerate.
1217 * mep-ibld.c: Regenerate.
1218 * mep-opc.c: Regenerate.
1219 * mep-opc.h: Regenerate.
1220
c1e679ec
DR		 12212009-05-22 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
1222
1223 * i386-opc.h (Cpusse5): Delete.
1224 (i386_cpu_flags): Delete.
1225 * i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1226 * i386-opc.tbl: Remove SSE5 instructions.
1227 * i386-tbl.h: Regenerate.
1228 * i386-init.h: Regenerate.
1229 * i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
1230 (print_drex_arg): Delete.
1231 (OP_DREX4): Delete.
1232 (OP_DREX3): Delete.
1233 (OP_DREX_ICMP): Delete.
1234 (OP_DREX_FCMP): Delete.
1235 (DREX_*): Delete.
1236 (THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
e0c483d6 1237
2b3decb5
AM		 12382009-05-22 Alan Modra <amodra@bigpond.net.au>
1239
1240 * Makefile.am: Run "make dep-am".
1241 * Makefile.in: Regenerate.
1242 * po/POTFILES.in: Regenerate.
1243
eb956800
DD		 12442009-05-19 DJ Delorie <dj@redhat.com>
1245
1246 * mep-asm.c: Regenerate.
1247 * mep-opc.c: Regenerate.
1248
3526b680
DD		 12492009-04-30 DJ Delorie <dj@redhat.com>
1250
1251 * mep-asm.c: Regenerate.
1252 * mep-desc.c: Regenerate.
1253 * mep-desc.h: Regenerate.
1254 * mep-dis.c: Regenerate.
1255 * mep-ibld.c: Regenerate.
1256 * mep-opc.c: Regenerate.
1257 * mep-opc.h: Regenerate.
1258
45be3704
DD		 12592009-04-17 DJ Delorie <dj@redhat.com
1260
1261 * mep-desc.c: Regenerate.
1262 * mep-ibld.c: Regenerate.
1263 * mep-opc.c: Regenerate.
1264 * mep-opc.h: Regenerate.
1265
20135e4c
NC		 12662009-04-15 Anthony Green <green@moxielogic.com>
1267
1268 * moxie-opc.c, moxie-dis.c: Created.
1269 * Makefile.am: Build the moxie source files.
1270 * configure.in: Add moxie support.
1271 * Makefile.in, configure: Rebuilt.
1272 * disassemble.c (disassembler): Add moxie support.
1273 (ARCH_moxie): Define.
1274
ac5c19e6
JB		 12752009-04-15 Jan Beulich <jbeulich@novell.com>
1276
1277 * i386-opc.tbl (protb, protw, protd, protq): Set opcode
1278 extension to None.
1279 (pshab, pshaw, pshad, pshaq): Likewise.
1280 * i386-tbl.h: Re-generate.
1281
52de720d
DD		 12822009-04-08 DJ Delorie <dj@redhat.com
1283
1284 * mep-asm.c: Regenerate.
1285 * mep-desc.c: Regenerate.
1286 * mep-desc.h: Regenerate.
1287 * mep-dis.c: Regenerate.
1288 * mep-ibld.c: Regenerate.
1289 * mep-opc.c: Regenerate.
1290 * mep-opc.h: Regenerate.
1291
858d7a6d
PB		 12922009-04-07 Peter Bergner <bergner@vnet.ibm.com>
1293
1294 * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
1295 "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
1296 Reorder entries so the extended mnemonics are listed before tlbilx.
1297
70dc4e32
PB		 12982009-04-02 Peter Bergner <bergner@vnet.ibm.com>
1299
1300 * ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
1301 due to -many/-Many.
1302 (print_insn_powerpc): Make sure we only deprecate instructions using
1303 the original dialect and not a modified dialect due to -Many handling.
1304 Move the handling of the condition register and default operands to
1305 the end of the if/else if/else chain.
1306 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1307 instructions from newer processors are listed before older ones.
1308 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1309 that have instructions with conflicting opcodes.
1310
e401b04c
PB		 13112009-04-01 Peter Bergner <bergner@vnet.ibm.com>
1312
1313 * ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
1314 E500MC entries.
1315
b8f9ee44
CL		 13162009-04-01 Christophe Lyon <christophe.lyon@st.com>
1317
1318 * arm-dis.c (print_insn): Print BE8 opcodes in little endianness.
1319
d460e92e
JM		 13202009-03-30 Joseph Myers <joseph@codesourcery.com>
1321
1322 * arm-dis.c (print_insn): Also check section matches in backwards
1323 search for mapping symbol.
1324
d34b5006
L		 13252009-03-26 H.J. Lu <hongjiu.lu@intel.com>
1326
1327 * i386-dis.c (get_valid_dis386): Abort on unhandled table.
1328
8d25cc3d
AM		 13292009-03-18 Alan Modra <amodra@bigpond.net.au>
1330
3889c459 1331 * cgen-opc.c: Include alloca-conf.h rather than alloca.h.
8d25cc3d
AM		 1332 * Makefile.am: Run "make dep-am".
1333 * Makefile.in: Regenerate.
1334 * openrisc-opc.c: Regenerate.
1335
34dd024a
NC		 13362009-03-10 Nick Clifton <nickc@redhat.com>
1337
1338 * po/id.po: Updated Indonesian translation.
1339
69fe9ce5
AM		 13402009-03-10 Alan Modra <amodra@bigpond.net.au>
1341
1342 * ppc-dis.c: Include "opintl.h".
1343 (struct ppc_mopt, ppc_opts): New.
1344 (ppc_parse_cpu): New function.
1345 (powerpc_init_dialect): Use it.
1346 (print_ppc_disassembler_options): Dump options from ppc_opts.
1347 Internationalize message.
1348
d11fd249
NC		 13492009-03-06 Nick Clifton <nickc@redhat.com>
1350
1351 * po/es.po: Updated Spanish translation.
1352
51dec227
AM		 13532009-03-04 Alan Modra <amodra@bigpond.net.au>
1354
1355 PR 6768
1356 * configure.in: Test for ld --as-needed support. Link shared
1357 libopcodes against libm.
1358 * configure: Regenerate.
1359
c72ab5f2
PB		 13602009-03-03 Peter Bergner <bergner@vnet.ibm.com>
1361
1362 * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
1363 instructions from newer processors are listed before older ones.
1364
a1f7ca36
AM		 13652009-03-03 Alan Modra <amodra@bigpond.net.au>
1366
1367 * Makefile.am: Run "make dep-am".
1368 (HFILES): Move lm32-desc.h and lm32-opc.h from..
1369 (CFILES): ..here.
1370 * Makefile.in: Regenerate.
1371
c3b7224a
NC		 13722009-03-02 Qinwei <qinwei@sunnorth.com.cn>
1373
1374 * score7-dis.c: New file.
1375 * Makefile.am: Add dependencies for score7-dis.c.
1376 * Makefile.in: Regenerate.
1377 * configure.in: Add score7-dis to score files.
1378 * configure: Regenerate.
1379 * score-dis.c: Add support for score7 architecture.
1380 * score-opc.h: Likewise.
1381
58e24671
RW		 13822009-03-01 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
1383
1384 * configure: Regenerate.
1385
d6f574e0
L		 13862009-02-27 H.J. Lu <hongjiu.lu@intel.com>
1387
1388 * i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
1389
066be9f7
PB		 13902009-02-26 Peter Bergner <bergner@vnet.ibm.com>
1391
1392 * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
1393 the power7 and the isel instructions.
1394 * ppc-opc.c (insert_xc6, extract_xc6): New static functions.
1395 (insert_dm, extract_dm): Likewise.
1396 (XB6): Update comment to include XX2 form.
1397 (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
1398 XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
1399 (RemoveXX3DM): Delete.
1400 (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
1401 "mftgpr">: Deprecate for POWER7.
1402 <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
1403 "frsqrte.">: Deprecate the three operand form and enable the two
1404 operand form for POWER7 and later.
1405 <"wait">: Extend to accept optional parameter. Enable for POWER7.
1406 <"waitsrv", "waitimpl">: Add extended opcodes.
1407 <"ldbrx", "stdbrx">: Enable for POWER7.
1408 <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
1409 <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
1410 "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
1411 "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
1412 "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
1413 "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
1414 "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
1415 "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
1416 <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
1417 "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
1418 "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
1419 "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
1420 "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
1421 "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
1422 "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
1423 "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
1424 "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
1425 "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
1426 "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
1427 "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
1428 "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
1429 "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
1430 "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
1431 "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
1432 "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
1433 "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
1434 "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
1435 "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
1436 "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
1437 "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
1438 "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
1439 "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
1440 "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
1441 "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
1442 "xxspltw", "xxswapd">: Add VSX opcodes.
1443
4c664d7b
L		 14442009-02-23 H.J. Lu <hongjiu.lu@intel.com>
1445
1446 * i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1447 (operand_types): Remove Vex_Imm4.
1448
1449 * i386-opc.h (Vex_Imm4): Removed.
1450 (OTMax): Updated.
1451 (i386_operand_type): Remove vex_imm4.
1452
1453 * i386-opc.tbl: Remove Vex_Imm4 comments.
1454 * i386-init.h: Regenerated.
1455 * i386-tbl.h: Likewise.
1456
4ce8808b
RE		 14572009-02-23 Richard Earnshaw <rearnsha@arm.com>
1458
1459 * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
1460 vq{r}shr{u}n.s64 insnstructions.
1461
0e55be16
PB		 14622009-02-19 Peter Bergner <bergner@vnet.ibm.com>
1463
1464 * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
1465 operand to be a float point register (FRT/FRS).
1466
b1c9882d
AN		 14672009-02-18 Adam Nemet <anemet@caviumnetworks.com>
1468
1469 * mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
1470 dmfc2 and dmtc2 before the architecture-level variants.
1471
137f2437
NC		 14722009-02-18 Pierre Muller <muller@ics.u-strasbg.fr>
1473
1474 * fr30-opc.c: Regenerate.
1475 * frv-opc.c: Regenerate.
1476 * ip2k-opc.c: Regenerate.
1477 * iq2000-opc.c: Regenerate.
1478 * lm32-opc.c: Regenerate.
1479 * m32c-opc.c: Regenerate.
1480 * m32r-opc.c: Regenerate.
1481 * mep-opc.c: Regenerate.
1482 * mt-opc.c: Regenerate.
1483 * xc16x-opc.c: Regenerate.
1484 * xstormy16-opc.c: Regenerate.
1485 * tic54x-dis.c (print_instruction): Avoid compiler warning on
1486 sprintf call.
1487
87298967
NS		 14882009-02-12 Nathan Sidwell <nathan@codesourcery.com>
1489
1490 * m68k-opc.c (m68k_opcodes): Add stldsr instruction.
1491
80890a61
PB		 14922009-02-05 Peter Bergner <bergner@vnet.ibm.com>
1493
1494 * ppc-opc.c: Update copyright year.
1495 (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
1496 ordering for POWER4 and later and use the correct Server ordering.
1497
ce2f5b3c
L		 14982009-02-04 H.J. Lu <hongjiu.lu@intel.com>
1499
1500 AVX Programming Reference (January, 2009)
1501 * i386-dis.c (PREFIX_VEX_3A44): New.
1502 (VEX_LEN_3A44_P_2): Likewise.
1503 (PREFIX_VEX_3A48): Updated.
1504 (VEX_LEN_3A4C_P_2): Likewise.
1505 (prefix_table): Add PREFIX_VEX_3A44.
1506 (vex_table): Likewise.
1507 (vex_len_table): Add VEX_LEN_3A44_P_2.
1508
1509 * i386-opc.tbl: Add PCLMUL + AVX instructions.
1510 * i386-tbl.h: Regenerated.
1511
52b6b6b9
JM		 15122009-02-03 Sandip Matte <sandip@rmicorp.com>
1513
1514 * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
1515 (mips_arch_choices): Add XLR entry.
1516 * mips-opc.c (XLR): Define.
1517 (mips_builtin_opcodes): Add XLR instructions.
1518
31dd3154
JM		 15192009-02-03 Carlos O'Donell <carlos@codesourcery.com>
1520
1521 * Makefile.am: Add install-pdf target.
1522 * po/Make-in: Add install-pdf target.
1523 * Makefile.in: Regenerate.
1524
c1a0a41f
DD		 15252009-02-02 DJ Delorie <dj@redhat.com>
1526
1527 * mep-asm.c: Regenerate.
1528 * mep-desc.c: Regenerate.
1529 * mep-desc.h: Regenerate.
1530 * mep-dis.c: Regenerate.
1531 * mep-ibld.c: Regenerate.
1532 * mep-opc.c: Regenerate.
1533 * mep-opc.h: Regenerate.
1534
087b80de
JM		 15352009-01-29 Mark Mitchell <mark@codesourcery.com>
1536
1537 * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
1538 qsub, and qdsub.
1539
159073e6
NC		 15402009-01-28 Chao-ying Fu <fu@mips.com>
1541
e0c483d6 1542 * mips-opc.c (suxc1): Add the flag of FP_D.
159073e6 1543
6f3b91a6
AM		 15442009-01-20 Alan Modra <amodra@bigpond.net.au>
1545
1546 * fr30-asm.c, fr30-dis.c, fr30-ibld.c, frv-asm.c, frv-dis.c,
1547 * frv-ibld.c, ip2k-asm.c, ip2k-dis.c, ip2k-ibld.c,
1548 * iq2000-asm.c, iq2000-dis.c, iq2000-ibld.c, m32c-asm.c,
1549 * m32c-dis.c, m32c-ibld.c, m32r-asm.c, m32r-dis.c,
1550 * m32r-ibld.c, mep-asm.c, mep-dis.c, mep-ibld.c, mt-asm.c,
1551 * mt-dis.c, mt-ibld.c, openrisc-asm.c, openrisc-dis.c,
1552 * openrisc-ibld.c, xc16x-asm.c, xc16x-dis.c, xc16x-ibld.c,
1553 * xstormy16-asm.c, xstormy16-dis.c, xstormy16-ibld.c: Regenerate.
1554
29670fb9
AM		 15552009-01-16 Alan Modra <amodra@bigpond.net.au>
1556
1557 * configure.in (commonbfdlib): Delete.
1558 (SHARED_LIBADD): Add pic libiberty if such is available.
1559 * configure: Regenerate.
1560 * po/POTFILES.in: Regenerate.
1561
21169fcf
PB		 15622009-01-14 Peter Bergner <bergner@vnet.ibm.com>
1563
1564 * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
1565 * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
1566 operand form and enable the four operand form for POWER6 and later.
1567 <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
1568 three operand form for POWER6 and later.
1569
4ca47a51
MF		 15702009-01-14 Mike Frysinger <vapier@gentoo.org>
1571
1572 * bfin-dis.c (OUTS): Use "%s" as format string.
1573
8acd5377
L		 15742009-01-13 H.J. Lu <hongjiu.lu@intel.com>
1575
1576 * i386-gen.c (cpu_flag_init): Remove a white space.
1577 (operand_type_init): Likewise.
1578
c1ec1875
L		 15792009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1580
1581 * i386-opc.tbl: Add NoAVX to movnti, lfence and mfence.
1582 * i386-tbl.h: Regenerated.
1583
c7532693
L		 15842009-01-12 H.J. Lu <hongjiu.lu@intel.com>
1585
1586 * i386-dis.c (dis386): Use EbS on addB, orB, adcB, sbbB, andB,
1587 subB, xorB and cmpB. Use EvS on addS, orS, adcS, sbbS, andS,
1588 subS, xorS and cmpS.
1589
bd5295b2
L		 15902009-01-10 H.J. Lu <hongjiu.lu@intel.com>
1591
1592 * i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1593 CpuClflush and CpuSYSCALL, respectively. Remove CpuK8. Add
1594 CPU_COREI7_FLAGS, CPU_CLFLUSH_FLAGS and CPU_SYSCALL_FLAGS.
1595 (cpu_flags): Remove CpuP4, CpuK6 and CpuK8. Add CpuClflush
1596 and CpuSYSCALL.
1597 (lineno): Removed.
1598 (set_bitfield): Take an argument, lineno. Don't report lineno
1599 on error if it is -1.
1600 (process_i386_cpu_flag): Take an argument, lineno.
1601 (process_i386_opcode_modifier): Likewise.
1602 (process_i386_operand_type): Likewise.
1603 (output_i386_opcode): Likewise.
1604 (opcode_hash_entry): Add lineno.
1605 (process_i386_opcodes): Updated.
1606 (process_i386_registers): Likewise.
1607 (process_i386_initializers): Likewise.
1608
1609 * i386-opc.h (CpuP4): Removed.
1610 (CpuK6): Likewise.
1611 (CpuK8): Likewise.
1612 (CpuClflush): New.
1613 (CpuSYSCALL): Likewise.
1614 (CpuMMX): Updated.
1615 (i386_cpu_flags): Remove cpup4, cpuk6 and cpuk8. Add
1616 cpuclflush and cpusyscall.
1617
1618 * i386-opc.tbl: Update movnti, clflush, lfence, mfence, pause,
1619 syscall and sysret.
1620 * i386-init.h: Regenerated.
1621 * i386-tbl.h: Likewise.
1622
1b7f3fb0
L		 16232009-01-09 H.J. Lu <hongjiu.lu@intel.com>
1624
1625 * i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1626 and CPU_AMDFAM10_FLAGS. Add CPU_RDTSCP_FLAGS.
1627 (cpu_flags): Add CpuRdtscp.
1628 (set_bitfield): Remove CpuSledgehammer check.
1629
1630 * i386-opc.h (CpuRdtscp): New.
1631 (CpuLM): Updated.
1632 (i386_cpu_flags): Add cpurdtscp.
1633
1634 * i386-opc.tbl: Replace CpuSledgehammer with CpuRdtscp.
1635 * i386-init.h: Regenerated.
1636 * i386-tbl.h: Likewise.
1637
1cb0a767
PB		 16382009-01-09 Peter Bergner <bergner@vnet.ibm.com>
1639
1640 * ppc-opc.c (PPCNONE): Define.
1641 (NOPOWER4): Delete.
1642 (powerpc_opcodes): Initialize the new "deprecated" field.
1643
168e3097
L		 16442009-01-06 H.J. Lu <hongjiu.lu@intel.com>
1645
1646 AVX Programming Reference (December, 2008)
1647 * i386-dis.c (VEX_LEN_2B_M_0): Removed.
1648 (VEX_LEN_E7_P_2_M_0): Likewise.
1649 (VEX_LEN_2C_P_1): Updated.
1650 (VEX_LEN_E8_P_2): Likewise.
1651 (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
1652 (mod_table): Likewise.
1653
1654 * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
1655 * i386-tbl.h: Regenerated.
1656
22da050b
L		 16572009-01-05 H.J. Lu <hongjiu.lu@intel.com>
1658
1659 * i386-gen.c (process_copyright): Update for 2009.
1660
1661 * i386-init.h: Regenerated.
1662 * i386-tbl.h: Likewise.
1663
0bfee649 16642009-01-05 H.J. Lu <hongjiu.lu@intel.com>
6194aaab 1665
0bfee649
L		 1666 AVX Programming Reference (December, 2008)
1667 * i386-dis.c (OP_VEX_FMA): Removed.
c0f3af97 1668 (OP_EX_VexW): Likewise.
0bfee649 1669 (OP_EX_VexImmW): Likewise.
c0f3af97 1670 (OP_XMM_VexW): Likewise.
c0f3af97 1671 (VEXI4_Fixup): Likewise.
c0f3af97 1672 (VPERMIL2_Fixup): Likewise.
c0f3af97 1673 (VexI4): Likewise.
0bfee649
L		 1674 (VexFMA): Likewise.
1675 (Vex128FMA): Likewise.
c0f3af97
L		 1676 (EXVexW): Likewise.
1677 (EXdVexW): Likewise.
1678 (EXqVexW): Likewise.
0bfee649 1679 (EXVexImmW): Likewise.
c0f3af97 1680 (XMVexW): Likewise.
c0f3af97 1681 (VPERMIL2): Likewise.
0bfee649
L		 1682 (PREFIX_VEX_3A48...PREFIX_VEX_3A4A): Likewise.
1683 (PREFIX_VEX_3A5C...PREFIX_VEX_3A5F): Likewise.
1684 (PREFIX_VEX_3A68...PREFIX_VEX_3A6F): Likewise.
1685 (PREFIX_VEX_3A78...PREFIX_VEX_3A7F): Likewise.
1686 (VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2): Likewise.
1687 (VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2): Likewise.
1688 (get_vex_imm8): Likewise.
1689 (OP_EX_VexReg): Likewise.
1690 vpermil2_op): Likewise.
1691 (EXVexWdq): New.
1692 (vex_w_dq_mode): Likewise.
1693 (PREFIX_VEX_3896...PREFIX_VEX_389F): Likewise.
1694 (PREFIX_VEX_38A6...PREFIX_VEX_38AF): Likewise.
1695 (PREFIX_VEX_38B6...PREFIX_VEX_38BF): Likewise.
1696 (es_reg): Updated.
1697 (PREFIX_VEX_38DB): Likewise.
1698 (PREFIX_VEX_3A4A): Likewise.
1699 (PREFIX_VEX_3A60): Likewise.
1700 (PREFIX_VEX_3ADF): Likewise.
1701 (VEX_LEN_3ADF_P_2): Likewise.
1702 (prefix_table): Remove PREFIX_VEX_3A48...PREFIX_VEX_3A4A,
e0c483d6 1703 PREFIX_VEX_3A5C...PREFIX_VEX_3A5F,
0bfee649
L		 1704 PREFIX_VEX_3A68...PREFIX_VEX_3A6F and
1705 PREFIX_VEX_3A78...PREFIX_VEX_3A7F. Add
1706 PREFIX_VEX_3896...PREFIX_VEX_389F,
1707 PREFIX_VEX_38A6...PREFIX_VEX_38AF and
1708 PREFIX_VEX_38B6...PREFIX_VEX_38BF.
c0f3af97 1709 (vex_table): Likewise.
0bfee649
L		 1710 (vex_len_table): Remove VEX_LEN_3A6A_P_2...VEX_LEN_3A6F_P_2
1711 and VEX_LEN_3A7A_P_2...VEX_LEN_3A7F_P_2.
1712 (putop): Support "%XW".
1713 (intel_operand_size): Handle vex_w_dq_mode.
58c85be7 1714
0bfee649 1715 * i386-opc.h (VexNDS): Add a comment for VEX NDS and VEX DDS.
58c85be7 1716
0bfee649
L		 1717 * i386-opc.tbl: Remove vpermil2pd/vpermil2ps and old FMA
1718 instructions. Add new FMA instructions.
28dbc079
L		 1719 * i386-tbl.h: Regenerated.
1720
e0c483d6 17212009-01-02 Matthias Klose <doko@ubuntu.com>
3fe15143 1722
e0c483d6
AM		 1723 * or32-opc.c (or32_print_register, or32_print_immediate,
1724 disassemble_insn): Don't rely on undefined sprintf behaviour.
3fe15143 1725
0bfee649 1726For older changes see ChangeLog-2008
252b5132
RH		 1727\f
1728Local Variables:
2f6d2f85
NC		 1729mode: change-log
1730left-margin: 8
1731fill-column: 74
252b5132
RH		 1732version-control: never
1733End:
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