projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| af1bd771 PW |
1 | 2020-11-06 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 2 | ||
| 3 | * aarch64-tbl.h (PAC): Handle for PAC feature. | |
| 4 | (PAC_INSN): New PAC instruction. | |
| 5 | (struct aarch64_opcode): Move PAC instructions from V8_3_INSN to | |
| 6 | PAC_INSN. | |
| 7 | ||
| 55cc0128 PW |
8 | 2020-11-04 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 9 | ||
| 10 | * aarch64-opc.c: Add RAS 1.1 new system registers: ERXPFGCTL_EL1, | |
| 11 | ERXPFGCDN_EL1, ERXMISC2_EL1, ERXMISC3_EL1 and ERXPFGF_EL1. | |
| 12 | ||
| fd65497d PW |
13 | 2020-11-03 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 14 | ||
| 15 | * aarch64-tbl.h (QL_X2NIL): New qualifier for 64-byte stores. | |
| 16 | (LS64): Handler with +ls64 feature flags. | |
| 17 | (_LS64_INSN): New instruction group macro. | |
| 18 | (struct aarch64_opcode): Add LS64 instructions. | |
| 19 | * aarch64-asm-2.c: Regenerated. | |
| 20 | * aarch64-dis-2.c: Regenerated. | |
| 21 | * aarch64-opc-2.c: Regenerated. | |
| 22 | ||
| 3a959875 PW |
23 | 2020-10-30 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 24 | ||
| 25 | * aarch65-tbl.h (struct aarch64_opcode): New instruction WFIT. | |
| 26 | * aarch64-asm-2.c: Regenerated. | |
| 27 | * aarch64-dis-2.c: Regenerated. | |
| 28 | * aarch64-opc-2.c: Regenerated. | |
| 29 | ||
| 30 | 2020-10-27 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | |
| 31 | ||
| 32 | * aarch64-opc.c (aarch64_print_operand): CSR PDEC operand print-out. | |
| 33 | * aarch64-tbl.h (CSRE): New CSRE feature handler. | |
| 34 | (_CSRE_INSN): New CSRE instruction type. | |
| 35 | (struct aarch64_opcode): New 'csre' entry for a CSRE CLI feature. | |
| 36 | * aarch64-asm-2.c: Regenerated. | |
| 37 | * aarch64-dis-2.c: Regenerated. | |
| 38 | * aarch64-opc-2.c: Regenerated. | |
| 39 | ||
| 40 | 2020-10-27 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | |
| 41 | ||
| 42 | * aarch64-tbl.h (struct aarch64_opcode): Add new WFET instruction encoding | |
| 43 | and operand description. | |
| 44 | * aarch64-asm-2.c: Regenerated. | |
| 45 | * aarch64-dis-2.c: Regenerated. | |
| 46 | * aarch64-opc-2.c: Regenerated. | |
| 47 | ||
| eae61d61 CQ |
48 | 2020-10-26 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 49 | ||
| 50 | * csky-opc.h (csky_v2_opcodes): Change plsl.u16 to plsl.16. | |
| 51 | ||
| 039dac29 CQ |
52 | 2020-10-26 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 53 | ||
| 54 | * csky-dis.c (csky_output_operand): Add handler for | |
| 55 | OPRND_TYPE_IMM5b_VSH and OPRND_TYPE_VREG_WITH_INDEX. | |
| 56 | * csky-opc.h (OPRND_TYPE_VREG_WITH_INDEX): New enum. | |
| 57 | (OPRND_TYPE_IMM5b_VSH): New enum. (csky_v2_opcodes): Fix and add | |
| 58 | some instructions for VDSPV1. | |
| 59 | ||
| 069ef164 CL |
60 | 2020-10-26 Lili Cui <lili.cui@intel.com> |
| 61 | ||
| 62 | * i386-dis.c: Change "XV" to print "{vex}" pseudo prefix. | |
| 63 | ||
| 3a959875 PW |
64 | 2020-10-23 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 65 | ||
| 66 | * aarch64-asm.c (aarch64_ins_barrier_dsb_nxs): New inserter. | |
| 67 | * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): New inserter | |
| 68 | ins_barrier_dsb_nx. | |
| 69 | * aarch64-dis.c (aarch64_ext_barrier_dsb_nxs): New extractor. | |
| 70 | * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): New extractor | |
| 71 | ext_barrier_dsb_nx. | |
| 72 | * aarch64-opc.c (aarch64_print_operand): New options table | |
| 73 | aarch64_barrier_dsb_nxs_options. | |
| 74 | * aarch64-opc.h (enum aarch64_field_kind): New field name FLD_CRm_dsb_nxs. | |
| 75 | * aarch64-tbl.h (struct aarch64_opcode): Define DSB nXS barrier | |
| 76 | Armv8.7-a instruction. | |
| 77 | * aarch64-asm-2.c: Regenerated. | |
| 78 | * aarch64-dis-2.c: Regenerated. | |
| 79 | * aarch64-opc-2.c: Regenerated. | |
| 80 | ||
| 9ef6c56f L |
81 | 2020-10-22 H.J. Lu <hongjiu.lu@intel.com> |
| 82 | ||
| 83 | * po/es.po: Remove the duplicated entry. | |
| 84 | ||
| 777cd7ab DDAG |
85 | 2020-10-20 Dr. David Alan Gilbert <dgilbert@redhat.com> |
| 86 | ||
| 87 | * po/es.po: Fix printf format. | |
| 88 | ||
| 646cc3e0 GG |
89 | 2020-10-20 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> |
| 90 | ||
| 91 | * i386-dis.c (rm_table): Add tlbsync, snp, invlpgb. | |
| 92 | * i386-gen.c (cpu_flag_init): Add new CPU_INVLPGB_FLAGS, | |
| 93 | CPU_TLBSYNC_FLAGS, and CPU_SNP_FLAGS. | |
| 94 | Add CPU_ZNVER3_FLAGS. | |
| 95 | (cpu_flags): Add CpuINVLPGB, CpuTLBSYNC, CpuSNP. | |
| 96 | * i386-opc.h: Add CpuINVLPGB, CpuTLBSYNC, CpuSNP. | |
| 97 | * i386-opc.tbl: Add invlpgb, tlbsync, psmash, pvalidate, | |
| 98 | rmpupdate, rmpadjust. | |
| 99 | * i386-init.h: Re-generated. | |
| 100 | * i386-tbl.h: Re-generated. | |
| 101 | ||
| 57392598 CL |
102 | 2020-10-16 Lili Cui <lili.cui@intel.com> |
| 103 | ||
| 104 | * i386-opc.tbl: Rename CpuVEX_PREFIX to PseudoVexPrefix | |
| 105 | and move it from cpu_flags to opcode_modifiers. | |
| 106 | Use VexW0 and VexVVVV in the AVX-VNNI instructions. | |
| 107 | * i386-gen.c: Likewise. | |
| 108 | * i386-opc.h: Likewise. | |
| 109 | * i386-opc.h: Likewise. | |
| 110 | * i386-init.h: Regenerated. | |
| 111 | * i386-tbl.h: Likewise. | |
| 112 | ||
| 3a959875 PW |
113 | 2020-10-16 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 114 | ||
| 115 | * aarch64-tbl.h (ARMV8_7): New macro. | |
| 116 | ||
| 58bf9b6a L |
117 | 2020-10-14 H.J. Lu <hongjiu.lu@intel.com> |
| 118 | Lili Cui <lili.cui@intel.com> | |
| 119 | ||
| 120 | * i386-dis.c (PREFIX_VEX_0F3850): New. | |
| 121 | (PREFIX_VEX_0F3851): Likewise. | |
| 122 | (PREFIX_VEX_0F3852): Likewise. | |
| 123 | (PREFIX_VEX_0F3853): Likewise. | |
| 124 | (VEX_W_0F3850_P_2): Likewise. | |
| 125 | (VEX_W_0F3851_P_2): Likewise. | |
| 126 | (VEX_W_0F3852_P_2): Likewise. | |
| 127 | (VEX_W_0F3853_P_2): Likewise. | |
| 128 | (prefix_table): Add PREFIX_VEX_0F3850, PREFIX_VEX_0F3851, | |
| 129 | PREFIX_VEX_0F3852 and PREFIX_VEX_0F3853. | |
| 130 | (vex_table): Add VEX_W_0F3850_P_2, VEX_W_0F3851_P_2, | |
| 131 | VEX_W_0F3852_P_2 and VEX_W_0F3853_P_2. | |
| 132 | (putop): Add support for "XV" to print "{vex3}" pseudo prefix. | |
| 133 | * i386-gen.c (cpu_flag_init): Clear the CpuAVX_VNNI bit in | |
| 134 | CPU_UNKNOWN_FLAGS. Add CPU_AVX_VNNI_FLAGS and | |
| 135 | CPU_ANY_AVX_VNNI_FLAGS. | |
| 136 | (cpu_flags): Add CpuAVX_VNNI and CpuVEX_PREFIX. | |
| 137 | * i386-opc.h (CpuAVX_VNNI): New. | |
| 138 | (CpuVEX_PREFIX): Likewise. | |
| 139 | (i386_cpu_flags): Add cpuavx_vnni and cpuvex_prefix. | |
| 140 | * i386-opc.tbl: Add Intel AVX VNNI instructions. | |
| 141 | * i386-init.h: Regenerated. | |
| 142 | * i386-tbl.h: Likewise. | |
| 143 | ||
| c1fa250a LC |
144 | 2020-10-14 Lili Cui <lili.cui@intel.com> |
| 145 | H.J. Lu <hongjiu.lu@intel.com> | |
| 146 | ||
| 147 | * i386-dis.c (PREFIX_0F3A0F): New. | |
| 148 | (MOD_0F3A0F_PREFIX_1): Likewise. | |
| 149 | (REG_0F3A0F_PREFIX_1_MOD_3): Likewise. | |
| 150 | (RM_0F3A0F_P_1_MOD_3_REG_0): Likewise. | |
| 151 | (prefix_table): Add PREFIX_0F3A0F. | |
| 152 | (mod_table): Add MOD_0F3A0F_PREFIX_1. | |
| 153 | (reg_table): Add REG_0F3A0F_PREFIX_1_MOD_3. | |
| 154 | (rm_table): Add RM_0F3A0F_P_1_MOD_3_REG_0. | |
| 155 | * i386-gen.c (cpu_flag_init): Add HRESET_FLAGS, | |
| 156 | CPU_ANY_HRESET_FLAGS. | |
| 157 | (cpu_flags): Add CpuHRESET. | |
| 158 | (output_i386_opcode): Allow 4 byte base_opcode. | |
| 159 | * i386-opc.h (enum): Add CpuHRESET. | |
| 160 | (i386_cpu_flags): Add cpuhreset. | |
| 161 | * i386-opc.tbl: Add Intel HRESET instruction. | |
| 162 | * i386-init.h: Regenerate. | |
| 163 | * i386-tbl.h: Likewise. | |
| 164 | ||
| f64c42a9 LC |
165 | 2020-10-14 Lili Cui <lili.cui@intel.com> |
| 166 | ||
| 167 | * i386-dis.c (enum): Add | |
| 168 | PREFIX_MOD_3_0F01_REG_5_RM_4, | |
| 169 | PREFIX_MOD_3_0F01_REG_5_RM_5, | |
| 170 | PREFIX_MOD_3_0F01_REG_5_RM_6, | |
| 171 | PREFIX_MOD_3_0F01_REG_5_RM_7, | |
| 172 | X86_64_0F01_REG_5_MOD_3_RM_4_PREFIX_1, | |
| 173 | X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1, | |
| 174 | X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1, | |
| 175 | X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1, | |
| 176 | X86_64_0FC7_REG_6_MOD_3_PREFIX_1. | |
| 177 | (prefix_table): New instructions (see prefixes above). | |
| 178 | (rm_table): Likewise | |
| 179 | * i386-gen.c (cpu_flag_init): Add CPU_UINTR_FLAGS, | |
| 180 | CPU_ANY_UINTR_FLAGS. | |
| 181 | (cpu_flags): Add CpuUINTR. | |
| 182 | * i386-opc.h (enum): Add CpuUINTR. | |
| 183 | (i386_cpu_flags): Add cpuuintr. | |
| 184 | * i386-opc.tbl: Add UINTR insns. | |
| 185 | * i386-init.h: Regenerate. | |
| 186 | * i386-tbl.h: Likewise. | |
| 187 | ||
| 8b65b895 L |
188 | 2020-10-14 H.J. Lu <hongjiu.lu@intel.com> |
| 189 | ||
| 190 | * i386-gen.c (process_i386_opcode_modifier): Return 1 for | |
| 191 | non-VEX/EVEX/prefix encoding. | |
| 192 | (output_i386_opcode): Fail if non-VEX/EVEX/prefix base_opcode | |
| 193 | has a prefix byte. | |
| 194 | * i386-opc.tbl: Replace the prefix byte in non-VEX/EVEX | |
| 195 | base_opcode with PREFIX_0X66, PREFIX_0XF2 or PREFIX_0XF3. | |
| 196 | * i386-tbl.h: Regenerated. | |
| 197 | ||
| 7b47a312 L |
198 | 2020-10-13 H.J. Lu <hongjiu.lu@intel.com> |
| 199 | ||
| 200 | * i386-gen.c (opcode_modifiers): Replace VexOpcode with | |
| 201 | OpcodePrefix. | |
| 202 | * i386-opc.h (VexOpcode): Renamed to ... | |
| 203 | (OpcodePrefix): This. | |
| 204 | (PREFIX_NONE): New. | |
| 205 | (PREFIX_0X66): Likewise. | |
| 206 | (PREFIX_0XF2): Likewise. | |
| 207 | (PREFIX_0XF3): Likewise. | |
| 208 | * i386-opc.tbl (Prefix_0X66): New. | |
| 209 | (Prefix_0XF2): Likewise. | |
| 210 | (Prefix_0XF3): Likewise. | |
| 211 | Replace VexOpcode= with OpcodePrefix=. Use Prefix_0X66 on xorpd. | |
| 212 | Use Prefix_0XF3 on cvtdq2pd. Use Prefix_0XF2 on cvtpd2dq. | |
| 213 | * i386-tbl.h: Regenerated. | |
| 214 | ||
| 3a959875 PW |
215 | 2020-10-08 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 216 | ||
| 217 | * aarch64-opc.c: Add BRBE system registers. | |
| 218 | ||
| 219 | 2020-10-08 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | |
| 220 | ||
| 221 | * aarch64-opc.c: New CSRE system registers defined. | |
| 222 | ||
| 0cc79db2 SN |
223 | 2020-10-05 Samanta Navarro <ferivoz@riseup.net> |
| 224 | ||
| 225 | * cgen-asm.c: Fix spelling mistakes. | |
| 226 | * cgen-dis.c: Fix spelling mistakes. | |
| 227 | * tic30-dis.c: Fix spelling mistakes. | |
| 228 | ||
| 5b316d90 L |
229 | 2020-10-05 H.J. Lu <hongjiu.lu@intel.com> |
| 230 | ||
| 231 | PR binutils/26704 | |
| 232 | * i386-dis.c (putop): Always display suffix for %LQ in 64bit. | |
| 233 | ||
| 0e9f3bf1 L |
234 | 2020-10-05 H.J. Lu <hongjiu.lu@intel.com> |
| 235 | ||
| 236 | PR binutils/26705 | |
| 237 | * i386-dis.c (print_insn): Clear modrm if not needed. | |
| 238 | (putop): Check need_modrm for modrm.mod != 3. Don't check | |
| 239 | need_modrm for modrm.mod == 3. | |
| 240 | ||
| 3454861d PW |
241 | 2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 242 | ||
| 12e35da6 PW |
243 | * aarch64-opc.c: Added ETMv4 system registers TRCACATRn, TRCACVRn, |
| 244 | TRCAUTHSTATUS, TRCAUXCTLR, TRCBBCTLR, TRCCCCTLR, TRCCIDCCTLR0, TRCCIDCCTLR1, | |
| 245 | TRCCIDCVRn, TRCCIDR0, TRCCIDR1, TRCCIDR2, TRCCIDR3, TRCCLAIMCLR, TRCCLAIMSET, | |
| 246 | TRCCNTCTLRn, TRCCNTRLDVRn, TRCCNTVRn, TRCCONFIGR, TRCDEVAFF0, TRCDEVAFF1, | |
| 247 | TRCDEVARCH, TRCDEVID, TRCDEVTYPE, TRCDVCMRn, TRCDVCVRn, TRCEVENTCTL0R, | |
| 248 | TRCEVENTCTL1R, TRCEXTINSELR, TRCIDR0, TRCIDR1, TRCIDR2, TRCIDR3, TRCIDR4, | |
| 249 | TRCIDR5, TRCIDR6, TRCIDR7, TRCIDR8, TRCIDR9, TRCIDR10, TRCIDR11, TRCIDR12, | |
| 250 | TRCIDR13, TRCIMSPEC0, TRCIMSPECn, TRCITCTRL, TRCLAR WOTRCLSR, TRCOSLAR | |
| 251 | WOTRCOSLSR, TRCPDCR, TRCPDSR, TRCPIDR0, TRCPIDR1, TRCPIDR2, TRCPIDR3, | |
| 252 | TRCPIDR4, TRCPIDR[5,6,7], TRCPRGCTLR, TRCP,CSELR, TRCQCTLR, TRCRSCTLRn, | |
| 253 | TRCSEQEVRn, TRCSEQRSTEVR, TRCSEQSTR, TRCSSCCRn, TRCSSCSRn, TRCSSPCICRn, | |
| 254 | TRCSTALLCTLR, TRCSTATR, TRCSYNCPR, TRCTRACEIDR, TRCTSCTLR, TRCVDARCCTLR, | |
| 255 | TRCVDCTLR, TRCVDSACCTLR, TRCVICTLR, TRCVIIECTLR, TRCVIPCSSCTLR, TRCVISSCTLR, | |
| 256 | TRCVMIDCCTLR0, TRCVMIDCCTLR1 and TRCVMIDCVRn. | |
| 3454861d | 257 | |
| 1ff8e401 PW |
258 | 2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 259 | ||
| 12e35da6 PW |
260 | * aarch64-opc.c: Add ETE system registers TRCEXTINSELR<0-3> and TRCRSR. |
| 261 | ||
| 262 | 2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | |
| 263 | ||
| 264 | * aarch64-opc.c: Add TRBE system registers TRBIDR_EL1 , TRBBASER_EL1 , | |
| 265 | TRBLIMITR_EL1 , TRBMAR_EL1 , TRBPTR_EL1, TRBSR_EL1 and TRBTRG_EL1. | |
| 1ff8e401 | 266 | |
| 0be2fe67 AM |
267 | 2020-09-26 Alan Modra <amodra@gmail.com> |
| 268 | ||
| 269 | * csky-opc.h: Formatting. | |
| 270 | (GENERAL_REG_BANK): Correct spelling. Update use throughout file. | |
| 271 | (get_register_name): Mask arch with CSKY_ARCH_MASK for shift, | |
| 272 | and shift 1u. | |
| 273 | (get_register_number): Likewise. | |
| 274 | * csky-dis.c (get_gr_name, get_cr_name): Don't mask mach_flag. | |
| 275 | ||
| 09d73035 CL |
276 | 2020-09-24 Lili Cui <lili.cui@intel.com> |
| 277 | ||
| 278 | PR 26654 | |
| 0be2fe67 | 279 | * i386-dis.c (enum): Put MOD_VEX_0F38* together. |
| 09d73035 | 280 | |
| 011a045a AB |
281 | 2020-09-24 Andrew Burgess <andrew.burgess@embecosm.com> |
| 282 | ||
| 283 | * csky-dis.c (csky_output_operand): Enclose body of if in curly | |
| 284 | braces. | |
| 285 | ||
| 81d54bb7 CL |
286 | 2020-09-24 Lili Cui <lili.cui@intel.com> |
| 287 | ||
| 288 | * i386-dis.c (enum): Add PREFIX_0F01_REG_1_RM_5, | |
| 289 | PREFIX_0F01_REG_1_RM_6, PREFIX_0F01_REG_1_RM_7, | |
| 290 | X86_64_0F01_REG_1_RM_5_P_2, X86_64_0F01_REG_1_RM_6_P_2, | |
| 291 | X86_64_0F01_REG_1_RM_7_P_2. | |
| 292 | (prefix_table): Likewise. | |
| 293 | (x86_64_table): Likewise. | |
| 294 | (rm_table): Likewise. | |
| 295 | * i386-gen.c (cpu_flag_init): Add CPU_TDX_FLAGS | |
| 296 | and CPU_ANY_TDX_FLAGS. | |
| 297 | (cpu_flags): Add CpuTDX. | |
| 298 | * i386-opc.h (enum): Add CpuTDX. | |
| 299 | (i386_cpu_flags): Add cputdx. | |
| 300 | * i386-opc.tbl: Add TDX insns. | |
| 301 | * i386-init.h: Regenerate. | |
| 302 | * i386-tbl.h: Likewise. | |
| 303 | ||
| afdcafe8 CQ |
304 | 2020-09-17 Cooper Qu <<cooper.qu@linux.alibaba.com>> |
| 305 | ||
| afdcafe8 CQ |
306 | * csky-dis.c (using_abi): New. |
| 307 | (parse_csky_dis_options): New function. | |
| 308 | (get_gr_name): New function. | |
| 309 | (get_cr_name): New function. | |
| 310 | (csky_output_operand): Use get_gr_name and get_cr_name to | |
| 311 | disassemble and add handle of OPRND_TYPE_IMM5b_LS. | |
| 312 | (print_insn_csky): Parse disassembler options. | |
| 0be2fe67 | 313 | * csky-opc.h (OPRND_TYPE_IMM5b_LS): New enum. |
| afdcafe8 CQ |
314 | (GENARAL_REG_BANK): Define. |
| 315 | (REG_SUPPORT_ALL): Define. | |
| 316 | (REG_SUPPORT_ALL): New. | |
| 317 | (ASH): Define. | |
| 318 | (REG_SUPPORT_A): Define. | |
| 319 | (REG_SUPPORT_B): Define. | |
| 320 | (REG_SUPPORT_C): Define. | |
| 321 | (REG_SUPPORT_D): Define. | |
| 322 | (REG_SUPPORT_E): Define. | |
| 323 | (csky_abiv1_general_regs): New. | |
| 324 | (csky_abiv1_control_regs): New. | |
| 325 | (csky_abiv2_general_regs): New. | |
| 326 | (csky_abiv2_control_regs): New. | |
| 327 | (get_register_name): New function. | |
| 328 | (get_register_number): New function. | |
| 329 | (csky_get_general_reg_name): New function. | |
| 330 | (csky_get_general_regno): New function. | |
| 331 | (csky_get_control_reg_name): New function. | |
| 332 | (csky_get_control_regno): New function. | |
| 333 | (csky_v2_opcodes): Prefer two oprerans format for bclri and | |
| 334 | bseti, strengthen the operands legality check of addc, zext | |
| 335 | and sext. | |
| 336 | ||
| c4694f17 TG |
337 | 2020-09-23 Lili Cui <lili.cui@intel.com> |
| 338 | ||
| 339 | * i386-dis.c (enum): Add REG_0F38D8_PREFIX_1, | |
| 340 | MOD_0F38FA_PREFIX_1, MOD_0F38FB_PREFIX_1, | |
| 341 | MOD_0F38DC_PREFIX_1, MOD_0F38DD_PREFIX_1, | |
| 342 | MOD_0F38DE_PREFIX_1, MOD_0F38DF_PREFIX_1, | |
| 343 | PREFIX_0F38D8, PREFIX_0F38FA, PREFIX_0F38FB. | |
| 344 | (reg_table): New instructions (see prefixes above). | |
| 345 | (prefix_table): Likewise. | |
| 346 | (three_byte_table): Likewise. | |
| 347 | (mod_table): Likewise | |
| 348 | * i386-gen.c (cpu_flag_init): Add CPU_KL_FLAGS, CPU_WIDE_KL_FLAGS, | |
| 349 | CPU_ANY_KL_FLAGS and CPU_ANY_WIDE_KL_FLAGS. | |
| 350 | (cpu_flags): Likewise. | |
| 351 | (operand_type_init): Likewise. | |
| 352 | * i386-opc.h (enum): Add CpuKL and CpuWide_KL. | |
| 353 | (i386_cpu_flags): Add cpukl and cpuwide_kl. | |
| 354 | * i386-opc.tbl: Add KL and WIDE_KL insns. | |
| 355 | * i386-init.h: Regenerate. | |
| 356 | * i386-tbl.h: Likewise. | |
| 357 | ||
| c73eac96 AM |
358 | 2020-09-21 Alan Modra <amodra@gmail.com> |
| 359 | ||
| 360 | * rx-dis.c (flag_names): Add missing comma. | |
| 361 | (register_names, flag_names, double_register_names), | |
| 362 | (double_register_high_names, double_register_low_names), | |
| 363 | (double_control_register_names, double_condition_names): Remove | |
| 364 | trailing commas. | |
| 365 | ||
| 6e25f888 DF |
366 | 2020-09-18 David Faust <david.faust@oracle.com> |
| 367 | ||
| 368 | * bpf-desc.c: Regenerate. | |
| 369 | * bpf-desc.h: Likewise. | |
| 370 | * bpf-opc.c: Likewise. | |
| 371 | * bpf-opc.h: Likewise. | |
| 372 | ||
| c568ac5f AB |
373 | 2020-09-16 Andrew Burgess <andrew.burgess@embecosm.com> |
| 374 | ||
| 375 | * csky-dis.c (csky_get_disassembler): Don't return NULL when there | |
| 376 | is no BFD. | |
| 377 | ||
| c1229f84 AM |
378 | 2020-09-16 Alan Modra <amodra@gmail.com> |
| 379 | ||
| 380 | * ppc-dis.c (ppc_symbol_is_valid): Adjust elf_symbol_from invocation. | |
| 381 | ||
| 7ad57880 NC |
382 | 2020-09-10 Nick Clifton <nickc@redhat.com> |
| 383 | ||
| 384 | * ppc-dis.c (ppc_symbol_is_valid): New function. Returns false | |
| 385 | for hidden, local, no-type symbols. | |
| 386 | (disassemble_init_powerpc): Point the symbol_is_valid field in the | |
| 387 | info structure at the new function. | |
| 388 | ||
| 79c8d443 CQ |
389 | 2020-09-10 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 390 | ||
| 391 | * csky-opc.h (csky_v2_opcodes): Add L2Cache instructions. | |
| 392 | * testsuite/gas/csky/cskyv2_ck860.d : Adjust to icache.iva | |
| 393 | opcode fixing. | |
| 394 | ||
| 0332f662 NC |
395 | 2020-09-10 Nick Clifton <nickc@redhat.com> |
| 396 | ||
| 397 | * csky-dis.c (csky_output_operand): Coerce the immediate values to | |
| 398 | long before printing. | |
| 399 | ||
| 23bef3fe AM |
400 | 2020-09-10 Alan Modra <amodra@gmail.com> |
| 401 | ||
| 402 | * csky-dis.c (csky_output_operand): Don't sprintf str to itself. | |
| 403 | ||
| 6a1ed910 CQ |
404 | 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 405 | ||
| 406 | * csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's | |
| 407 | ISA flag. | |
| 408 | ||
| 1feede9b CQ |
409 | 2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 410 | ||
| 411 | * csky-dis.c (csky_output_operand): Add handlers for | |
| 412 | OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and | |
| 413 | OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH | |
| 414 | to support FPUV3 instructions. | |
| 415 | * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b, | |
| 416 | OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and | |
| 417 | OPRND_TYPE_DFLOAT_FMOVI. | |
| 418 | (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8, | |
| 419 | OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24, | |
| 420 | OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22, | |
| 421 | OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25, | |
| 422 | OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25, | |
| 423 | OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21, | |
| 424 | OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24, | |
| 425 | OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25, | |
| 426 | OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20, | |
| 427 | OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25, | |
| 428 | OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24, | |
| 429 | OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20, | |
| 430 | OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define. | |
| 431 | (csky_v2_opcodes): Add FPUV3 instructions. | |
| 432 | ||
| 38cf07a6 AC |
433 | 2020-09-08 Alex Coplan <alex.coplan@arm.com> |
| 434 | ||
| 435 | * aarch64-dis.c (print_operands): Pass CPU features to | |
| 436 | aarch64_print_operand(). | |
| 437 | * aarch64-opc.c (aarch64_print_operand): Use CPU features to determine | |
| 438 | preferred disassembly of system registers. | |
| 439 | (SR_RNG): Refactor to use new SR_FEAT2 macro. | |
| 440 | (SR_FEAT2): New. | |
| 441 | (SR_V8_1_A): New. | |
| 442 | (SR_V8_4_A): New. | |
| 443 | (SR_V8_A): New. | |
| 444 | (SR_V8_R): New. | |
| 445 | (SR_EXPAND_ELx): New. | |
| 446 | (SR_EXPAND_EL12): New. | |
| 447 | (aarch64_sys_regs): Specify which registers are only on | |
| 448 | A-profile, add R-profile system registers. | |
| 449 | (ENC_BARLAR): New. | |
| 450 | (PRBARn_ELx): New. | |
| 451 | (PRLARn_ELx): New. | |
| 452 | (aarch64_sys_ins_reg_supported_p): Reject EL3 registers for | |
| 453 | Armv8-R AArch64. | |
| 454 | ||
| 03fb3142 AC |
455 | 2020-09-08 Alex Coplan <alex.coplan@arm.com> |
| 456 | ||
| 457 | * aarch64-tbl.h (aarch64_feature_v8_r): New. | |
| 458 | (ARMV8_R): New. | |
| 459 | (V8_R_INSN): New. | |
| 460 | (aarch64_opcode_table): Add dfb. | |
| 461 | * aarch64-opc-2.c: Regenerate. | |
| 462 | * aarch64-asm-2.c: Regenerate. | |
| 463 | * aarch64-dis-2.c: Regenerate. | |
| 464 | ||
| 95830c98 AC |
465 | 2020-09-08 Alex Coplan <alex.coplan@arm.com> |
| 466 | ||
| 467 | * aarch64-dis.c (arch_variant): New. | |
| 468 | (determine_disassembling_preference): Disassemble according to | |
| 469 | arch variant. | |
| 470 | (select_aarch64_variant): New. | |
| 471 | (print_insn_aarch64): Set feature set. | |
| 472 | ||
| 7c80dd4c AM |
473 | 2020-09-02 Alan Modra <amodra@gmail.com> |
| 474 | ||
| 475 | * v850-opc.c (insert_i5div1, insert_i5div2, insert_i5div3), | |
| 476 | (insert_d5_4, insert_d8_6, insert_d8_7, insert_v8, insert_d9), | |
| 477 | (insert_u16_loop, insert_d16_15, insert_d16_16, insert_d17_16), | |
| 478 | (insert_d22, insert_d23, insert_d23_align1, insert_i9, insert_u9), | |
| 479 | (insert_spe, insert_r4, insert_POS, insert_WIDTH, insert_SELID), | |
| 480 | (insert_VECTOR8, insert_VECTOR5, insert_CACHEOP, insert_PREFOP), | |
| 481 | (nsert_IMM10U, insert_SRSEL1, insert_SRSEL2): Use unsigned long | |
| 482 | for value parameter and update code to suit. | |
| 483 | (extract_d9, extract_d16_15, extract_d16_16, extract_d17_16), | |
| 484 | (extract_d22, extract_d23, extract_i9): Use unsigned long variables. | |
| 485 | ||
| b4b39349 AM |
486 | 2020-09-02 Alan Modra <amodra@gmail.com> |
| 487 | ||
| 488 | * i386-dis.c (OP_E_memory): Don't cast to signed type when | |
| 489 | negating. | |
| 490 | (get32, get32s): Use unsigned types in shift expressions. | |
| 491 | ||
| caf4537a AM |
492 | 2020-09-02 Alan Modra <amodra@gmail.com> |
| 493 | ||
| 494 | * csky-dis.c (print_insn_csky): Use unsigned type for "given". | |
| 495 | ||
| 3c5097ea AM |
496 | 2020-09-02 Alan Modra <amodra@gmail.com> |
| 497 | ||
| 498 | * crx-dis.c: Whitespace. | |
| 499 | (print_arg): Use unsigned type for longdisp and mask variables, | |
| 500 | and for left shift constant. | |
| 501 | ||
| ae3e98b4 AM |
502 | 2020-09-02 Alan Modra <amodra@gmail.com> |
| 503 | ||
| 504 | * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift. | |
| 505 | * bpf-ibld.c: Regenerate. | |
| 506 | * epiphany-ibld.c: Regenerate. | |
| 507 | * fr30-ibld.c: Regenerate. | |
| 508 | * frv-ibld.c: Regenerate. | |
| 509 | * ip2k-ibld.c: Regenerate. | |
| 510 | * iq2000-ibld.c: Regenerate. | |
| 511 | * lm32-ibld.c: Regenerate. | |
| 512 | * m32c-ibld.c: Regenerate. | |
| 513 | * m32r-ibld.c: Regenerate. | |
| 514 | * mep-ibld.c: Regenerate. | |
| 515 | * mt-ibld.c: Regenerate. | |
| 516 | * or1k-ibld.c: Regenerate. | |
| 517 | * xc16x-ibld.c: Regenerate. | |
| 518 | * xstormy16-ibld.c: Regenerate. | |
| 519 | ||
| 427202d9 AM |
520 | 2020-09-02 Alan Modra <amodra@gmail.com> |
| 521 | ||
| 522 | * bfin-dis.c (MASKBITS): Use SIGNBIT. | |
| 523 | ||
| 4211a340 CQ |
524 | 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 525 | ||
| 526 | * csky-opc.h (csky_v2_opcodes): Move divul and divsl | |
| 527 | to CSKYV2_ISA_3E3R3 instruction set. | |
| 528 | ||
| 8119cc38 CQ |
529 | 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 530 | ||
| 531 | * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws. | |
| 532 | ||
| 8dbe96f0 AM |
533 | 2020-09-01 Alan Modra <amodra@gmail.com> |
| 534 | ||
| 535 | * mep-ibld.c: Regenerate. | |
| 536 | ||
| e2e82b11 CQ |
537 | 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 538 | ||
| 539 | * csky-dis.c (csky_output_operand): Assign dis_info.value for | |
| 540 | OPRND_TYPE_VREG. | |
| 541 | ||
| 2781f857 AM |
542 | 2020-08-30 Alan Modra <amodra@gmail.com> |
| 543 | ||
| 544 | * cr16-dis.c: Formatting. | |
| 545 | (parameter): Delete struct typedef. Use dwordU instead | |
| 546 | throughout file. | |
| 547 | (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb | |
| 548 | and tbitb. | |
| 549 | (make_argument <arg_cr>): Extract 20-bit field not 16-bit. | |
| 550 | ||
| 0c0577f6 AM |
551 | 2020-08-29 Alan Modra <amodra@gmail.com> |
| 552 | ||
| 553 | PR 26446 | |
| 554 | * csky-opc.h (MAX_OPRND_NUM): Define to 5. | |
| 555 | (union csky_operand): Use MAX_OPRND_NUM to size oprnds array. | |
| 556 | ||
| a1e60a1b AM |
557 | 2020-08-28 Alan Modra <amodra@gmail.com> |
| 558 | ||
| 559 | PR 26449 | |
| 560 | PR 26450 | |
| 561 | * cgen-ibld.in (insert_1): Use 1UL in forming mask. | |
| 562 | (extract_normal): Likewise. | |
| 563 | (insert_normal): Likewise, and move past zero length test. | |
| 564 | (put_insn_int_value): Handle mask for zero length, use 1UL. | |
| 565 | * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c, | |
| 566 | * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, | |
| 567 | * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c, | |
| 568 | * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate. | |
| 569 | ||
| 0861f561 CQ |
570 | 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 571 | ||
| 572 | * csky-dis.c (CSKY_DEFAULT_ISA): Define. | |
| 573 | (csky_dis_info): Add member isa. | |
| 574 | (csky_find_inst_info): Skip instructions that do not belong to | |
| 575 | current CPU. | |
| 576 | (csky_get_disassembler): Get infomation from attribute section. | |
| 577 | (print_insn_csky): Set defualt ISA flag. | |
| 578 | * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2. | |
| 579 | * csky-opc.h (struct csky_opcode): Change isa_flag16 and | |
| 580 | isa_flag32'type to unsigned 64 bits. | |
| 581 | ||
| 31b3f3e6 JM |
582 | 2020-08-26 Jose E. Marchesi <jemarch@gnu.org> |
| 583 | ||
| 584 | * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX. | |
| 585 | ||
| 4449c81a DF |
586 | 2020-08-26 David Faust <david.faust@oracle.com> |
| 587 | ||
| 588 | * bpf-desc.c: Regenerate. | |
| 589 | * bpf-desc.h: Likewise. | |
| 590 | * bpf-opc.c: Likewise. | |
| 591 | * bpf-opc.h: Likewise. | |
| 592 | * disassemble.c (disassemble_init_for_target): Set bits for xBPF | |
| 593 | ISA when appropriate. | |
| 594 | ||
| 8640c87d AM |
595 | 2020-08-25 Alan Modra <amodra@gmail.com> |
| 596 | ||
| 597 | PR 26504 | |
| 598 | * vax-dis.c (parse_disassembler_options): Always add at least one | |
| 599 | to entry_addr_total_slots. | |
| 600 | ||
| 531c73a3 CQ |
601 | 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 602 | ||
| 603 | * csky-dis.c (csky_find_inst_info): Skip CK860's instructions | |
| 604 | in other CPUs to speed up disassembling. | |
| 605 | * csky-opc.h (csky_v2_opcodes): Add CK860's instructions, | |
| 606 | Change plsli.u16 to plsli.16, change sync's operand format. | |
| 607 | ||
| d04aee0f CQ |
608 | 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 609 | ||
| 610 | * csky-opc.h (csky_v2_opcodes): Add instruction bnezad. | |
| 611 | ||
| ccf61261 NC |
612 | 2020-08-21 Nick Clifton <nickc@redhat.com> |
| 613 | ||
| 614 | * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF | |
| 615 | symbols. | |
| 616 | ||
| d285ba8d CQ |
617 | 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com> |
| 618 | ||
| 619 | * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop. | |
| 620 | ||
| 18a8a00e AM |
621 | 2020-08-19 Alan Modra <amodra@gmail.com> |
| 622 | ||
| 623 | * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq, | |
| 624 | vcmpuq and xvtlsbb. | |
| 625 | ||
| 587a4371 PB |
626 | 2020-08-18 Peter Bergner <bergner@linux.ibm.com> |
| 627 | ||
| 628 | * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this... | |
| 629 | <xvcvbf16spn>: ...to this. | |
| 630 | ||
| 2e49fd1e AC |
631 | 2020-08-12 Alex Coplan <alex.coplan@arm.com> |
| 632 | ||
| 633 | * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers. | |
| 634 | ||
| 79ddc884 NC |
635 | 2020-08-12 Nick Clifton <nickc@redhat.com> |
| 636 | ||
| 637 | * po/sr.po: Updated Serbian translation. | |
| 638 | ||
| 08770ec2 AM |
639 | 2020-08-11 Alan Modra <amodra@gmail.com> |
| 640 | ||
| 641 | * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph. | |
| 642 | ||
| f7cb161e PW |
643 | 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> |
| 644 | ||
| 645 | * aarch64-opc.c (aarch64_print_operand): | |
| 646 | (aarch64_sys_reg_deprecated_p): Functions paramaters changed. | |
| 647 | (aarch64_sys_reg_supported_p): Function removed. | |
| 648 | (aarch64_sys_ins_reg_supported_p): Functions paramaters changed. | |
| 649 | (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p | |
| 650 | into this function. | |
| 651 | ||
| 3eb65174 AM |
652 | 2020-08-10 Alan Modra <amodra@gmail.com> |
| 653 | ||
| 654 | * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended | |
| 655 | instructions. | |
| 656 | ||
| 8b2742a1 AM |
657 | 2020-08-10 Alan Modra <amodra@gmail.com> |
| 658 | ||
| 659 | * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru. | |
| 660 | Enable icbt for power5, miso for power8. | |
| 661 | ||
| 5fbec329 AM |
662 | 2020-08-10 Alan Modra <amodra@gmail.com> |
| 663 | ||
| 664 | * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over | |
| 665 | mtvsrd, and similarly for mfvsrd. | |
| 666 | ||
| 563a3225 CG |
667 | 2020-08-04 Christian Groessler <chris@groessler.org> |
| 668 | Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com> | |
| 669 | ||
| 670 | * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs" | |
| 671 | opcodes (special "out" to absolute address). | |
| 672 | * z8k-opc.h: Regenerate. | |
| 673 | ||
| 41eb8e88 L |
674 | 2020-07-30 H.J. Lu <hongjiu.lu@intel.com> |
| 675 | ||
| 676 | PR gas/26305 | |
| 677 | * i386-opc.h (Prefix_Disp8): New. | |
| 678 | (Prefix_Disp16): Likewise. | |
| 679 | (Prefix_Disp32): Likewise. | |
| 680 | (Prefix_Load): Likewise. | |
| 681 | (Prefix_Store): Likewise. | |
| 682 | (Prefix_VEX): Likewise. | |
| 683 | (Prefix_VEX3): Likewise. | |
| 684 | (Prefix_EVEX): Likewise. | |
| 685 | (Prefix_REX): Likewise. | |
| 686 | (Prefix_NoOptimize): Likewise. | |
| 687 | * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}. | |
| 688 | * i386-tbl.h: Regenerated. | |
| 689 | ||
| 98116973 AA |
690 | 2020-07-29 Andreas Arnez <arnez@linux.ibm.com> |
| 691 | ||
| 692 | * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable | |
| 693 | default case with abort() instead of printing an error message and | |
| 694 | continuing, to avoid a maybe-uninitialized warning. | |
| 695 | ||
| 2dddfa20 NC |
696 | 2020-07-24 Nick Clifton <nickc@redhat.com> |
| 697 | ||
| 698 | * po/de.po: Updated German translation. | |
| 699 | ||
| bf4ba07c JB |
700 | 2020-07-21 Jan Beulich <jbeulich@suse.com> |
| 701 | ||
| 702 | * i386-dis.c (OP_E_memory): Revert previous change. | |
| 703 | ||
| 04c662e2 L |
704 | 2020-07-15 H.J. Lu <hongjiu.lu@intel.com> |
| 705 | ||
| 706 | PR gas/26237 | |
| 707 | * i386-dis.c (OP_E_memory): Don't display eiz with no scale | |
| 708 | without base nor index registers. | |
| 709 | ||
| f0e8d0ba JB |
710 | 2020-07-15 Jan Beulich <jbeulich@suse.com> |
| 711 | ||
| 712 | * i386-dis.c (putop): Move 'V' and 'W' handling. | |
| 713 | ||
| c3f5525f JB |
714 | 2020-07-15 Jan Beulich <jbeulich@suse.com> |
| 715 | ||
| 716 | * i386-dis.c (dis386): Adjust 'V' description. Use P-based | |
| 717 | construct for push/pop of register. | |
| 718 | (putop): Honor cond when handling 'P'. Drop handling of plain | |
| 719 | 'V'. | |
| 720 | ||
| 36938cab JB |
721 | 2020-07-15 Jan Beulich <jbeulich@suse.com> |
| 722 | ||
| 723 | * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@' | |
| 724 | description. Drop '&' description. Use P for push of immediate, | |
| 725 | pushf/popf, enter, and leave. Use %LP for lret/retf. | |
| 726 | (dis386_twobyte): Use P for push/pop of fs/gs. | |
| 727 | (reg_table): Use P for push/pop. Use @ for near call/jmp. | |
| 728 | (x86_64_table): Use P for far call/jmp. | |
| 729 | (putop): Drop handling of 'U' and '&'. Move and adjust handling | |
| 730 | of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q | |
| 731 | labels. | |
| 732 | (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent) | |
| 733 | and dqw_mode (unconditional). | |
| 734 | ||
| 8e58ef80 L |
735 | 2020-07-14 H.J. Lu <hongjiu.lu@intel.com> |
| 736 | ||
| 737 | PR gas/26237 | |
| 738 | * i386-dis.c (OP_E_memory): Without base nor index registers, | |
| 739 | 32-bit displacement to 64 bits. | |
| 740 | ||
| 570b0ed6 CZ |
741 | 2020-07-14 Claudiu Zissulescu <claziss@gmail.com> |
| 742 | ||
| 743 | * arc-dis.c (print_insn_arc): Detect and emit a warning when a | |
| 744 | faulty double register pair is detected. | |
| 745 | ||
| bfbd9438 JB |
746 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 747 | ||
| 748 | * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode. | |
| 749 | ||
| 78467458 JB |
750 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 751 | ||
| 752 | * i386-dis.c (OP_R, Rm): Delete. | |
| 753 | (MOD_0F24, MOD_0F26): Rename to ... | |
| 754 | (X86_64_0F24, X86_64_0F26): ... respectively. | |
| 755 | (dis386): Update 'L' and 'Z' comments. | |
| 756 | (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26 | |
| 757 | table references. | |
| 758 | (mod_table): Move opcode 0F24 and 0F26 entries ... | |
| 759 | (x86_64_table): ... here. | |
| 760 | (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move | |
| 761 | 'Z' case block. | |
| 762 | ||
| 464d2b65 JB |
763 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 764 | ||
| 765 | * i386-dis.c (Rd, Rdq, MaskR): Delete. | |
| 766 | (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1, | |
| 767 | MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0, | |
| 768 | MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0, | |
| 769 | MOD_EVEX_0F387C): New enumerators. | |
| 770 | (reg_table): Use Edq for rdssp. | |
| 771 | (prefix_table): Use Edq for incssp. | |
| 772 | (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*, | |
| 773 | kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*, | |
| 774 | ktest*, and kshift*. Use Edq / MaskE for kmov*. | |
| 775 | * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C. | |
| 776 | * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A, | |
| 777 | 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C. | |
| 778 | * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes | |
| 779 | 0F3828_P_1 and 0F3838_P_1. | |
| 780 | * i386-dis-evex-w.h: Reference mod_table[] for opcodes | |
| 781 | 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B. | |
| 782 | ||
| 035e7389 JB |
783 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 784 | ||
| 785 | * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3, | |
| 786 | PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8, | |
| 787 | PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC, | |
| 788 | PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77, | |
| 789 | PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1, | |
| 790 | PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete. | |
| 791 | (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0, | |
| 792 | VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0, | |
| 793 | VEX_LEN_0F38F3_R_3_P_0): Rename to ... | |
| 794 | (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1, | |
| 795 | VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively. | |
| 796 | (reg_table, prefix_table, three_byte_table, vex_table, | |
| 797 | vex_len_table, mod_table, rm_table): Replace / remove respective | |
| 798 | entries. | |
| 799 | (intel_operand_size, OP_E_register, OP_G): Avoid undue setting | |
| 800 | of PREFIX_DATA in used_prefixes. | |
| 801 | ||
| bb5b3501 JB |
802 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 803 | ||
| 804 | * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1, | |
| 805 | MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1, | |
| 806 | MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1, | |
| 807 | MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ... | |
| 808 | (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0, | |
| 809 | MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these. | |
| 810 | (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0, | |
| 811 | VEX_W_0F3A33_L_0): Delete. | |
| 812 | (dis386): Adjust "BW" description. | |
| 813 | (vex_len_table): Refer to mod_table[] for opcodes 0F3A30, | |
| 814 | 0F3A31, 0F3A32, and 0F3A33. | |
| 815 | (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33 | |
| 816 | entries. | |
| 817 | (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33 | |
| 818 | entries. | |
| 819 | ||
| 7531c613 JB |
820 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 821 | ||
| 822 | * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3, | |
| 823 | PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815, | |
| 824 | PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822, | |
| 825 | PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828, | |
| 826 | PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830, | |
| 827 | PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834, | |
| 828 | PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839, | |
| 829 | PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D, | |
| 830 | PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841, | |
| 831 | PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF, | |
| 832 | PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE, | |
| 833 | PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09, | |
| 834 | PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D, | |
| 835 | PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16, | |
| 836 | PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22, | |
| 837 | PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44, | |
| 838 | PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63, | |
| 839 | PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60, | |
| 840 | PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63, | |
| 841 | PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66, | |
| 842 | PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69, | |
| 843 | PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C, | |
| 844 | PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2, | |
| 845 | PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6, | |
| 846 | PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4, | |
| 847 | PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2, | |
| 848 | PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6, | |
| 849 | PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74, | |
| 850 | PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4, | |
| 851 | PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2, | |
| 852 | PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5, | |
| 853 | PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8, | |
| 854 | PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB, | |
| 855 | PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE, | |
| 856 | PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1, | |
| 857 | PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4, | |
| 858 | PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8, | |
| 859 | PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB, | |
| 860 | PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE, | |
| 861 | PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2, | |
| 862 | PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5, | |
| 863 | PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8, | |
| 864 | PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB, | |
| 865 | PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE, | |
| 866 | PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802, | |
| 867 | PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805, | |
| 868 | PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808, | |
| 869 | PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B, | |
| 870 | PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E, | |
| 871 | PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816, | |
| 872 | PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819, | |
| 873 | PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D, | |
| 874 | PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821, | |
| 875 | PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824, | |
| 876 | PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829, | |
| 877 | PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C, | |
| 878 | PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F, | |
| 879 | PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832, | |
| 880 | PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835, | |
| 881 | PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838, | |
| 882 | PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B, | |
| 883 | PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E, | |
| 884 | PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841, | |
| 885 | PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847, | |
| 886 | PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A, | |
| 887 | PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C, | |
| 888 | PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891, | |
| 889 | PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896, | |
| 890 | PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899, | |
| 891 | PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C, | |
| 892 | PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F, | |
| 893 | PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8, | |
| 894 | PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB, | |
| 895 | PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE, | |
| 896 | PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7, | |
| 897 | PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA, | |
| 898 | PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD, | |
| 899 | PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF, | |
| 900 | PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD, | |
| 901 | PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00, | |
| 902 | PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04, | |
| 903 | PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08, | |
| 904 | PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B, | |
| 905 | PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E, | |
| 906 | PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15, | |
| 907 | PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18, | |
| 908 | PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20, | |
| 909 | PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30, | |
| 910 | PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33, | |
| 911 | PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40, | |
| 912 | PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44, | |
| 913 | PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49, | |
| 914 | PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C, | |
| 915 | PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E, | |
| 916 | PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61, | |
| 917 | PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68, | |
| 918 | PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B, | |
| 919 | PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E, | |
| 920 | PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79, | |
| 921 | PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C, | |
| 922 | PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F, | |
| 923 | PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF, | |
| 924 | PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66, | |
| 925 | PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2, | |
| 926 | PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6, | |
| 927 | PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1, | |
| 928 | PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4, | |
| 929 | PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2, | |
| 930 | PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6, | |
| 931 | PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, | |
| 932 | PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5, | |
| 933 | PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF, | |
| 934 | PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB, | |
| 935 | PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816, | |
| 936 | PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B, | |
| 937 | PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C, | |
| 938 | PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837, | |
| 939 | PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F, | |
| 940 | PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843, | |
| 941 | PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846, | |
| 942 | PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D, | |
| 943 | PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850, | |
| 944 | PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855, | |
| 945 | PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B, | |
| 946 | PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864, | |
| 947 | PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870, | |
| 948 | PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875, | |
| 949 | PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A, | |
| 950 | PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D, | |
| 951 | PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883, | |
| 952 | PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A, | |
| 953 | PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F, | |
| 954 | PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892, | |
| 955 | PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1, | |
| 956 | PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4, | |
| 957 | PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4, | |
| 958 | PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2, | |
| 959 | PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6, | |
| 960 | PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2, | |
| 961 | PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6, | |
| 962 | PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB, | |
| 963 | PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00, | |
| 964 | PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05, | |
| 965 | PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A, | |
| 966 | PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, | |
| 967 | PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18, | |
| 968 | PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B, | |
| 969 | PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20, | |
| 970 | PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23, | |
| 971 | PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27, | |
| 972 | PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A, | |
| 973 | PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F, | |
| 974 | PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50, | |
| 975 | PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55, | |
| 976 | PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, | |
| 977 | PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71, | |
| 978 | PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete. | |
| 979 | (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2, | |
| 980 | MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2, | |
| 981 | MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2, | |
| 982 | MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2, | |
| 983 | MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2, | |
| 984 | MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2, | |
| 985 | MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0, | |
| 986 | MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0, | |
| 987 | MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0, | |
| 988 | MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0, | |
| 989 | MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0, | |
| 990 | MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0, | |
| 991 | MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0, | |
| 992 | MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, | |
| 993 | MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2, | |
| 994 | VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2, | |
| 995 | VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2, | |
| 996 | VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2, | |
| 997 | VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0, | |
| 998 | VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2, | |
| 999 | VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2, | |
| 1000 | VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2, | |
| 1001 | VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2, | |
| 1002 | VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2, | |
| 1003 | VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2, | |
| 1004 | VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2, | |
| 1005 | VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2, | |
| 1006 | VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2, | |
| 1007 | EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2, | |
| 1008 | EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0, | |
| 1009 | EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0, | |
| 1010 | EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0, | |
| 1011 | EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2, | |
| 1012 | EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0, | |
| 1013 | EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0, | |
| 1014 | EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2, | |
| 1015 | EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2, | |
| 1016 | EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1, | |
| 1017 | EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1, | |
| 1018 | EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1, | |
| 1019 | EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1, | |
| 1020 | EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1, | |
| 1021 | EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2, | |
| 1022 | EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0, | |
| 1023 | EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0, | |
| 1024 | EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0, | |
| 1025 | EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0, | |
| 1026 | EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2, | |
| 1027 | EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2, | |
| 1028 | EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1, | |
| 1029 | EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1, | |
| 1030 | EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1, | |
| 1031 | EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1, | |
| 1032 | EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1, | |
| 1033 | EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1 | |
| 1034 | VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2, | |
| 1035 | VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2, | |
| 1036 | VEX_W_0F3818_P_2, VEX_W_0F3819_P_2, | |
| 1037 | VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0, | |
| 1038 | VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0, | |
| 1039 | VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2, | |
| 1040 | VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2, | |
| 1041 | VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2, | |
| 1042 | VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2, | |
| 1043 | VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2, | |
| 1044 | VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0, | |
| 1045 | VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0, | |
| 1046 | VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0, | |
| 1047 | VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0, | |
| 1048 | VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0, | |
| 1049 | VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0, | |
| 1050 | VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2, | |
| 1051 | VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2, | |
| 1052 | EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2, | |
| 1053 | EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2, | |
| 1054 | EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2, | |
| 1055 | EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2, | |
| 1056 | EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, | |
| 1057 | EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2, | |
| 1058 | EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2, | |
| 1059 | EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2, | |
| 1060 | EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2, | |
| 1061 | EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2, | |
| 1062 | EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2, | |
| 1063 | EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2, | |
| 1064 | EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2, | |
| 1065 | EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2, | |
| 1066 | EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2, | |
| 1067 | EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2, | |
| 1068 | EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2, | |
| 1069 | EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2, | |
| 1070 | EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2, | |
| 1071 | EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2, | |
| 1072 | EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2, | |
| 1073 | EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2, | |
| 1074 | EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2, | |
| 1075 | EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2, | |
| 1076 | EVEX_W_0F3A72_P_2): Rename to ... | |
| 1077 | (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7, | |
| 1078 | MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D, | |
| 1079 | MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C, | |
| 1080 | MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0, | |
| 1081 | MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0, | |
| 1082 | MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0, | |
| 1083 | MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0, | |
| 1084 | MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0, | |
| 1085 | MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1, | |
| 1086 | MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0, | |
| 1087 | MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5, | |
| 1088 | VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819, | |
| 1089 | VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841, | |
| 1090 | VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00, | |
| 1091 | VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15, | |
| 1092 | VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19, | |
| 1093 | VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30, | |
| 1094 | VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38, | |
| 1095 | VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60, | |
| 1096 | VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF, | |
| 1097 | EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6, | |
| 1098 | EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1, | |
| 1099 | EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0, | |
| 1100 | EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0, | |
| 1101 | EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0, | |
| 1102 | EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0, | |
| 1103 | EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0, | |
| 1104 | EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0, | |
| 1105 | EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0, | |
| 1106 | EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0, | |
| 1107 | EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0, | |
| 1108 | EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0, | |
| 1109 | EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1, | |
| 1110 | EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15, | |
| 1111 | EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0, | |
| 1112 | EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0, | |
| 1113 | EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0, | |
| 1114 | EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0, | |
| 1115 | EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0, | |
| 1116 | EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1, | |
| 1117 | EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1, | |
| 1118 | EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1, | |
| 1119 | EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1, | |
| 1120 | EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1, | |
| 1121 | EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1 | |
| 1122 | VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F, | |
| 1123 | VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818, | |
| 1124 | VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0, | |
| 1125 | VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0, | |
| 1126 | VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859, | |
| 1127 | VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879, | |
| 1128 | VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1, | |
| 1129 | VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1, | |
| 1130 | VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D, | |
| 1131 | VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0, | |
| 1132 | VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1, | |
| 1133 | VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C, | |
| 1134 | VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2, | |
| 1135 | EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6, | |
| 1136 | EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D, | |
| 1137 | EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E, | |
| 1138 | EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A, | |
| 1139 | EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B, | |
| 1140 | EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1, | |
| 1141 | EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0, | |
| 1142 | EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0, | |
| 1143 | EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01, | |
| 1144 | EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A, | |
| 1145 | EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A, | |
| 1146 | EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38, | |
| 1147 | EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42, | |
| 1148 | EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these | |
| 0be2fe67 | 1149 | respectively. |
| 7531c613 JB |
1150 | (dis386_twobyte, three_byte_table, vex_table, vex_len_table, |
| 1151 | vex_w_table, mod_table): Replace / remove respective entries. | |
| 1152 | (print_insn): Move up dp->prefix_requirement handling. Handle | |
| 1153 | PREFIX_DATA. | |
| 1154 | * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h, | |
| 1155 | i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h: | |
| 1156 | Replace / remove respective entries. | |
| 1157 | ||
| 17d3c7ec JB |
1158 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1159 | ||
| 1160 | * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D, | |
| 1161 | PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete. | |
| 1162 | (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si, | |
| 1163 | vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries. | |
| 1164 | Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for | |
| 1165 | the latter two. | |
| 1166 | * i386-dis-evex.h (evex_table): Reference VEX table for opcodes | |
| 1167 | 0F2C, 0F2D, 0F2E, and 0F2F. | |
| 1168 | * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and | |
| 1169 | 0F2F table entries. | |
| 1170 | ||
| 41f5efc6 JB |
1171 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1172 | ||
| 1173 | * i386-dis.c (OP_VexR, VexScalarR): New. | |
| 1174 | (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS, | |
| 1175 | XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode, | |
| 1176 | need_vex_reg): Delete. | |
| 1177 | (prefix_table): Replace VexScalar by VexScalarR and | |
| 1178 | XMVexScalar by XMScalar for vmovss and vmovsd. Replace | |
| 1179 | EXdVexScalarS by EXdS and EXqVexScalarS by EXqS. | |
| 1180 | (vex_len_table): Replace EXqVexScalarS by EXqS. | |
| 1181 | (get_valid_dis386): Don't set need_vex_reg. | |
| 1182 | (print_insn): Don't initialize need_vex_reg. | |
| 1183 | (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and | |
| 1184 | q_scalar_swap_mode cases. | |
| 1185 | (OP_EX): Don't check for d_scalar_swap_mode and | |
| 1186 | q_scalar_swap_mode. | |
| 1187 | (OP_VEX): Done check need_vex_reg. | |
| 1188 | * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and | |
| 1189 | XMVexScalar by XMScalar for vmovss and vmovsd. Replace | |
| 1190 | EXdVexScalarS by EXdS and EXqVexScalarS by EXqS. | |
| 1191 | ||
| 89e65d17 JB |
1192 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1193 | ||
| 1194 | * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete. | |
| 1195 | (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2, | |
| 1196 | VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2, | |
| 1197 | VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ... | |
| 1198 | (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0, | |
| 1199 | VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0, | |
| 1200 | VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0, | |
| 1201 | VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively. | |
| 1202 | (vex_table): Replace Vex128 by Vex. | |
| 1203 | (vex_len_table): Likewise. Adjust referenced enum names. | |
| 1204 | (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust | |
| 1205 | referenced enum names. | |
| 1206 | (OP_VEX): Drop vex128_mode and vex256_mode cases. | |
| 1207 | * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex. | |
| 1208 | ||
| 492a76aa JB |
1209 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1210 | ||
| 1211 | * i386-dis.c (dis386): "LW" description now applies to "DQ". | |
| 1212 | (putop): Handle "DQ". Don't handle "LW" anymore. | |
| 1213 | (prefix_table, mod_table): Replace %LW by %DQ. | |
| 1214 | * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise. | |
| 1215 | ||
| 059edf8b JB |
1216 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1217 | ||
| 1218 | * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode, | |
| 1219 | dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and | |
| 1220 | d_scalar_swap_mode case handling. Move shift adjsutment into | |
| 1221 | the case its applicable to. | |
| 1222 | ||
| 4726e9a4 JB |
1223 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1224 | ||
| 1225 | * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete. | |
| 1226 | (EXbScalar, EXwScalar): Fold to ... | |
| 1227 | (EXbwUnit): ... this. | |
| 1228 | (b_scalar_mode, w_scalar_mode): Fold to ... | |
| 1229 | (bw_unit_mode): ... this. | |
| 1230 | (intel_operand_size, OP_E_memory): Replace b_scalar_mode / | |
| 1231 | w_scalar_mode handling by bw_unit_mode one. | |
| 1232 | * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863 | |
| 1233 | ... | |
| 1234 | * i386-dis-evex-prefix.h: ... here. | |
| 1235 | ||
| b24d668c JB |
1236 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1237 | ||
| 1238 | * i386-dis.c (PCMPESTR_Fixup): Delete. | |
| 1239 | (dis386): Adjust "LQ" description. | |
| 1240 | (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss, | |
| 1241 | cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of | |
| 1242 | PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri, | |
| 1243 | vpcmpestrm, and vpcmpestri. | |
| 1244 | (putop): Honor "cond" when handling LQ. | |
| 1245 | * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for | |
| 1246 | vcvtsi2ss and vcvtusi2ss. | |
| 1247 | * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for | |
| 1248 | vcvtsi2sd and vcvtusi2sd. | |
| 1249 | ||
| c4de7606 JB |
1250 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1251 | ||
| 1252 | * i386-dis.c (VCMP_Fixup, VCMP): Delete. | |
| 1253 | (simd_cmp_op): Add const. | |
| 1254 | (vex_cmp_op): Move up and drop initial 8 entries. Add const. | |
| 1255 | (CMP_Fixup): Handle VEX case. | |
| 1256 | (prefix_table): Replace VCMP by CMP. | |
| 1257 | * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise. | |
| 1258 | ||
| 9ab00b61 JB |
1259 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1260 | ||
| 1261 | * i386-dis.c (MOVBE_Fixup): Delete. | |
| 1262 | (Mv): Define. | |
| 1263 | (prefix_table): Use Mv for movbe entries. | |
| 1264 | ||
| 2875b28a JB |
1265 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1266 | ||
| 1267 | * i386-dis.c (CRC32_Fixup): Delete. | |
| 1268 | (prefix_table): Use Eb/Ev for crc32 entries. | |
| 1269 | ||
| e184e611 JB |
1270 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1271 | ||
| 1272 | * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup): | |
| 1273 | Conditionalize invocations of "USED_REX (0)". | |
| 1274 | ||
| e8b5d5f9 JB |
1275 | 2020-07-14 Jan Beulich <jbeulich@suse.com> |
| 1276 | ||
| 1277 | * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH, | |
| 1278 | CH, DH, BH, AX, DX): Delete. | |
| 1279 | (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg, | |
| 1280 | eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg, | |
| 1281 | dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left. | |
| 1282 | ||
| 260cd341 LC |
1283 | 2020-07-10 Lili Cui <lili.cui@intel.com> |
| 1284 | ||
| 1285 | * i386-dis.c (TMM): New. | |
| 1286 | (EXtmm): Likewise. | |
| 1287 | (VexTmm): Likewise. | |
| 1288 | (MVexSIBMEM): Likewise. | |
| 1289 | (tmm_mode): Likewise. | |
| 1290 | (vex_sibmem_mode): Likewise. | |
| 1291 | (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise. | |
| 1292 | (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise. | |
| 1293 | (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise. | |
| 1294 | (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise. | |
| 1295 | (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise. | |
| 1296 | (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise. | |
| 1297 | (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise. | |
| 1298 | (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise. | |
| 1299 | (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise. | |
| 1300 | (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise. | |
| 1301 | (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise. | |
| 1302 | (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise. | |
| 1303 | (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise. | |
| 1304 | (PREFIX_VEX_0F3849_X86_64): Likewise. | |
| 1305 | (PREFIX_VEX_0F384B_X86_64): Likewise. | |
| 1306 | (PREFIX_VEX_0F385C_X86_64): Likewise. | |
| 1307 | (PREFIX_VEX_0F385E_X86_64): Likewise. | |
| 1308 | (X86_64_VEX_0F3849): Likewise. | |
| 1309 | (X86_64_VEX_0F384B): Likewise. | |
| 1310 | (X86_64_VEX_0F385C): Likewise. | |
| 1311 | (X86_64_VEX_0F385E): Likewise. | |
| 1312 | (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise. | |
| 1313 | (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise. | |
| 1314 | (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise. | |
| 1315 | (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise. | |
| 1316 | (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise. | |
| 1317 | (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise. | |
| 1318 | (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise. | |
| 1319 | (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise. | |
| 1320 | (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise. | |
| 1321 | (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise. | |
| 1322 | (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise. | |
| 1323 | (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise. | |
| 1324 | (VEX_W_0F3849_X86_64_P_0): Likewise. | |
| 1325 | (VEX_W_0F3849_X86_64_P_2): Likewise. | |
| 1326 | (VEX_W_0F3849_X86_64_P_3): Likewise. | |
| 1327 | (VEX_W_0F384B_X86_64_P_1): Likewise. | |
| 1328 | (VEX_W_0F384B_X86_64_P_2): Likewise. | |
| 1329 | (VEX_W_0F384B_X86_64_P_3): Likewise. | |
| 1330 | (VEX_W_0F385C_X86_64_P_1): Likewise. | |
| 1331 | (VEX_W_0F385E_X86_64_P_0): Likewise. | |
| 1332 | (VEX_W_0F385E_X86_64_P_1): Likewise. | |
| 1333 | (VEX_W_0F385E_X86_64_P_2): Likewise. | |
| 1334 | (VEX_W_0F385E_X86_64_P_3): Likewise. | |
| 1335 | (names_tmm): Likewise. | |
| 1336 | (att_names_tmm): Likewise. | |
| 1337 | (intel_operand_size): Handle void_mode. | |
| 1338 | (OP_XMM): Handle tmm_mode. | |
| 1339 | (OP_EX): Likewise. | |
| 1340 | (OP_VEX): Likewise. | |
| 1341 | * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8, | |
| 1342 | CpuAMX_BF16 and CpuAMX_TILE. | |
| 1343 | (operand_type_shorthands): Add RegTMM. | |
| 1344 | (operand_type_init): Likewise. | |
| 1345 | (operand_types): Add Tmmword. | |
| 1346 | (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. | |
| 1347 | (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE. | |
| 1348 | * i386-opc.h (CpuAMX_INT8): New. | |
| 1349 | (CpuAMX_BF16): Likewise. | |
| 1350 | (CpuAMX_TILE): Likewise. | |
| 1351 | (SIBMEM): Likewise. | |
| 1352 | (Tmmword): Likewise. | |
| 1353 | (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile. | |
| 1354 | (i386_opcode_modifier): Extend width of fields vexvvvv and sib. | |
| 1355 | (i386_operand_type): Add tmmword. | |
| 1356 | * i386-opc.tbl: Add AMX instructions. | |
| 1357 | * i386-reg.tbl: Add AMX registers. | |
| 1358 | * i386-init.h: Regenerated. | |
| 1359 | * i386-tbl.h: Likewise. | |
| 1360 | ||
| 467bbef0 JB |
1361 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
| 1362 | ||
| 1363 | * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete. | |
| 1364 | (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02): | |
| 1365 | Rename to ... | |
| 1366 | (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0, | |
| 1367 | REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these | |
| 1368 | respectively. | |
| 1369 | (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86, | |
| 1370 | VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F, | |
| 1371 | VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97, | |
| 1372 | VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3, | |
| 1373 | VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0, | |
| 1374 | VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3, | |
| 1375 | VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1, | |
| 1376 | VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92, | |
| 1377 | VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95, | |
| 1378 | VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98, | |
| 1379 | VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B, | |
| 1380 | VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3, | |
| 1381 | VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB, | |
| 1382 | VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3, | |
| 1383 | VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB, | |
| 1384 | VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3, | |
| 1385 | VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0, | |
| 1386 | VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0, | |
| 1387 | VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0, | |
| 1388 | VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0, | |
| 1389 | VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0, | |
| 1390 | VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0, | |
| 1391 | VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0, | |
| 1392 | VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0, | |
| 1393 | VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0, | |
| 1394 | VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0, | |
| 1395 | VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0, | |
| 1396 | VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0, | |
| 1397 | VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0, | |
| 1398 | VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0, | |
| 1399 | VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0, | |
| 1400 | VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0, | |
| 1401 | VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0, | |
| 1402 | VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0, | |
| 1403 | VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0, | |
| 1404 | VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators. | |
| 1405 | (reg_table): Re-order XOP entries. Adjust their operands. | |
| 1406 | (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95, | |
| 1407 | 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1, | |
| 1408 | 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93, | |
| 1409 | 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1, | |
| 1410 | 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6, | |
| 1411 | 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12 | |
| 1412 | entries by references ... | |
| 1413 | (vex_len_table): ... to resepctive new entries here. For several | |
| 1414 | new and existing entries reference ... | |
| 1415 | (vex_w_table): ... new entries here. | |
| 1416 | (mod_table): New MOD_VEX_0FXOP_09_12 entry. | |
| 1417 | ||
| 6384fd9e JB |
1418 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
| 1419 | ||
| 1420 | * i386-dis.c (XMVexScalarI4): Define. | |
| 1421 | (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2, | |
| 1422 | VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2, | |
| 1423 | VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete. | |
| 1424 | (vex_len_table): Move scalar FMA4 entries ... | |
| 1425 | (prefix_table): ... here. | |
| 1426 | (OP_REG_VexI4): Handle scalar_mode. | |
| 1427 | * i386-opc.tbl: Use VexLIG for scalar FMA4 insns. | |
| 1428 | * i386-tbl.h: Re-generate. | |
| 1429 | ||
| e6123d0c JB |
1430 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
| 1431 | ||
| 1432 | * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1, | |
| 1433 | Vex_2src_2): Delete. | |
| 1434 | (OP_VexW, VexW): New. | |
| 1435 | (xop_table): Use EXx for rotates by immediate. Use EXx and VexW | |
| 1436 | for shifts and rotates by register. | |
| 1437 | ||
| 93abb146 JB |
1438 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
| 1439 | ||
| 1440 | * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW, | |
| 1441 | VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8, | |
| 1442 | OP_EX_VexReg): Delete. | |
| 1443 | (OP_VexI4, VexI4): New. | |
| 1444 | (vex_w_table): Move vpermil2ps and vpermil2pd entries ... | |
| 1445 | (prefix_table): ... here. | |
| 1446 | (print_insn): Drop setting of vex_w_done. | |
| 1447 | ||
| b13b1bc0 JB |
1448 | 2020-07-08 Jan Beulich <jbeulich@suse.com> |
| 1449 | ||
| 1450 | * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete. | |
| 1451 | (prefix_table, vex_len_table): Replace operands for FMA4 insns. | |
| 1452 | (xop_table): Replace operands of 4-operand insns. | |
| 1453 | (OP_REG_VexI4): Move VEX.W based operand swaping here. | |
| 1454 | ||
| f337259f CZ |
1455 | 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com> |
| 1456 | ||
| 1457 | * arc-opc.c (insert_rbd): New function. | |
| 1458 | (RBD): Define. | |
| 1459 | (RBDdup): Likewise. | |
| 1460 | * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update | |
| 1461 | instructions. | |
| 1462 | ||
| 931452b6 JB |
1463 | 2020-07-07 Jan Beulich <jbeulich@suse.com> |
| 1464 | ||
| 1465 | * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, | |
| 1466 | EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2, | |
| 1467 | EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2, | |
| 1468 | EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2): | |
| 1469 | Delete. | |
| 1470 | (putop): Handle "BW". | |
| 1471 | * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826, | |
| 1472 | 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E, | |
| 1473 | and 0F3A3F ... | |
| 1474 | * i386-dis-evex-prefix.h: ... here. | |
| 1475 | ||
| b5b098c2 JB |
1476 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1477 | ||
| 1478 | * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete. | |
| 1479 | (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0, | |
| 1480 | VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82, | |
| 1481 | VEX_W_0FXOP_09_83): New enumerators. | |
| 1482 | (xop_table): Reference the above. | |
| 1483 | (vex_len_table): Replace vfrczp* entries by vfrczs* ones. | |
| 1484 | (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, | |
| 1485 | VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries. | |
| 1486 | (get_valid_dis386): Return bad_opcode for XOP.PP != 0. | |
| 1487 | ||
| 21a3faeb JB |
1488 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1489 | ||
| 1490 | * i386-dis.c (EVEX_W_0F3838_P_1, | |
| 1491 | EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2, | |
| 1492 | EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2, | |
| 1493 | EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, | |
| 1494 | EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2, | |
| 1495 | EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete. | |
| 1496 | (putop): Centralize management of last[]. Delete SAVE_LAST. | |
| 1497 | * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839, | |
| 1498 | 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56, | |
| 1499 | 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ... | |
| 1500 | * i386-dis-evex-prefix.h: here. | |
| 1501 | ||
| bc152a17 JB |
1502 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1503 | ||
| 1504 | * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1, | |
| 1505 | MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1, | |
| 1506 | MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1, | |
| 1507 | MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New | |
| 1508 | enumerators. | |
| 1509 | (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1, | |
| 1510 | EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1, | |
| 1511 | EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1, | |
| 1512 | EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ... | |
| 1513 | (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0, | |
| 1514 | EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0, | |
| 1515 | EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0, | |
| 1516 | EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ... | |
| 1517 | these, respectively. | |
| 1518 | * i386-dis-evex-len.h: Adjust comments. | |
| 1519 | * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0, | |
| 1520 | MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0, | |
| 1521 | MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0, | |
| 1522 | MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and | |
| 1523 | MOD_EVEX_0F385B_P_2_W_1 table entries. | |
| 1524 | * i386-dis-evex-w.h: Reference mod_table[] for | |
| 1525 | EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and | |
| 1526 | EVEX_W_0F385B_P_2. | |
| 1527 | ||
| c82a99a0 JB |
1528 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1529 | ||
| 1530 | * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8, | |
| 1531 | vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use | |
| 1532 | EXymm. | |
| 1533 | (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4): | |
| 1534 | Likewise. Mark 256-bit entries invalid. | |
| 1535 | ||
| fedfb81e JB |
1536 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1537 | ||
| 1538 | * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A, | |
| 1539 | PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D, | |
| 1540 | PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4, | |
| 1541 | PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, | |
| 1542 | PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE, | |
| 1543 | PREFIX_EVEX_0F382B): Delete. | |
| 1544 | (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2, | |
| 1545 | EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2, | |
| 1546 | EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2, | |
| 1547 | EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2, | |
| 1548 | EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename | |
| 1549 | to ... | |
| 1550 | (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C, | |
| 1551 | EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4, | |
| 1552 | EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA, | |
| 1553 | EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these | |
| 1554 | respectively. | |
| 1555 | * i386-dis-evex.h (evex_table): Reference VEX_W table entries | |
| 1556 | for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, | |
| 1557 | 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B. | |
| 1558 | * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A, | |
| 1559 | PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D, | |
| 1560 | PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4, | |
| 1561 | PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, | |
| 1562 | PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE, | |
| 1563 | PREFIX_EVEX_0F382B): Remove table entries. | |
| 1564 | * i386-dis-evex-w.h: Reference VEX table entries for opcodes | |
| 1565 | 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3, | |
| 1566 | 0FF4, 0FFA, 0FFB, 0FFE, 0F382B. | |
| 1567 | ||
| 3a57774c JB |
1568 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1569 | ||
| 1570 | * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2, | |
| 1571 | EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New | |
| 1572 | enumerators. | |
| 1573 | * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2, | |
| 1574 | EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and | |
| 1575 | EVEX_LEN_0F3A01_P_2_W_1 table entries. | |
| 1576 | * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above | |
| 1577 | entries. | |
| 1578 | ||
| e74d9fa9 JB |
1579 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1580 | ||
| 1581 | * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, | |
| 1582 | EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2, | |
| 1583 | EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2, | |
| 1584 | EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators. | |
| 1585 | * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2, | |
| 1586 | EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, | |
| 1587 | EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2, | |
| 1588 | EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries. | |
| 1589 | * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above | |
| 1590 | entries. | |
| 1591 | ||
| 6431c801 JB |
1592 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1593 | ||
| 1594 | * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete. | |
| 1595 | (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators. | |
| 1596 | (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 | |
| 1597 | respectively. | |
| 1598 | (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table | |
| 1599 | entries. | |
| 1600 | * i386-dis-evex.h (evex_table): Reference VEX table entry for | |
| 1601 | opcode 0F3A1D. | |
| 1602 | * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table | |
| 1603 | entry. | |
| 1604 | * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise. | |
| 1605 | ||
| 6df22cf6 JB |
1606 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1607 | ||
| 1608 | * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, | |
| 1609 | PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, | |
| 1610 | PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, | |
| 1611 | PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA, | |
| 1612 | PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, | |
| 1613 | PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, | |
| 1614 | PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, | |
| 1615 | PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC, | |
| 1616 | PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, | |
| 1617 | PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, | |
| 1618 | PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, | |
| 1619 | PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B, | |
| 1620 | PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C, | |
| 1621 | PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, | |
| 1622 | PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, | |
| 1623 | PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, | |
| 1624 | PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D, | |
| 1625 | PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6, | |
| 1626 | PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, | |
| 1627 | PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE, | |
| 1628 | PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7, | |
| 1629 | PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA, | |
| 1630 | PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD, | |
| 1631 | PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF, | |
| 1632 | PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE, | |
| 1633 | PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F, | |
| 1634 | PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF, | |
| 1635 | EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2, | |
| 1636 | EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2, | |
| 1637 | EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete. | |
| 1638 | (prefix_table): Add EXxEVexR to FMA table entries. | |
| 1639 | (OP_Rounding): Move abort() invocation. | |
| 1640 | * i386-dis-evex.h (evex_table): Reference VEX table for opcodes | |
| 1641 | 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9, | |
| 1642 | 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8, | |
| 1643 | 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9, | |
| 1644 | 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C, | |
| 1645 | 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897, | |
| 1646 | 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7, | |
| 1647 | 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7, | |
| 1648 | 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF, | |
| 1649 | 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44, | |
| 1650 | 0F3ACE, 0F3ACF. | |
| 1651 | * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, | |
| 1652 | PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, | |
| 1653 | PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, | |
| 1654 | PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA, | |
| 1655 | PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, | |
| 1656 | PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, | |
| 1657 | PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, | |
| 1658 | PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC, | |
| 1659 | PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, | |
| 1660 | PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, | |
| 1661 | PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, | |
| 1662 | PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B, | |
| 1663 | PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C, | |
| 1664 | PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, | |
| 1665 | PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, | |
| 1666 | PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, | |
| 1667 | PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D, | |
| 1668 | PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6, | |
| 1669 | PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, | |
| 1670 | PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE, | |
| 1671 | PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7, | |
| 1672 | PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA, | |
| 1673 | PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD, | |
| 1674 | PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF, | |
| 1675 | PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE, | |
| 1676 | PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F, | |
| 1677 | PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF): | |
| 1678 | Delete table entries. | |
| 1679 | * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, | |
| 1680 | EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, | |
| 1681 | EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): | |
| 1682 | Likewise. | |
| 1683 | ||
| 39e0f456 JB |
1684 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1685 | ||
| 1686 | * i386-dis.c (EXqScalarS): Delete. | |
| 1687 | (vex_len_table): Replace EXqScalarS by EXqVexScalarS. | |
| 1688 | * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS. | |
| 1689 | ||
| 5b872f7d JB |
1690 | 2020-07-06 Jan Beulich <jbeulich@suse.com> |
| 1691 | ||
| 1692 | * i386-dis.c (safe-ctype.h): Include. | |
| 1693 | (EXdScalar, EXqScalar): Delete. | |
| 1694 | (d_scalar_mode, q_scalar_mode): Delete. | |
| 1695 | (prefix_table, vex_len_table): Use EXxmm_md in place of | |
| 1696 | EXdScalar and EXxmm_mq in place of EXqScalar. | |
| 1697 | (intel_operand_size, OP_E_memory, OP_EX): Remove uses of | |
| 1698 | d_scalar_mode and q_scalar_mode. | |
| 1699 | * i386-dis-evex-w.h (vmovss): Use EXxmm_md. | |
| 1700 | (vmovsd): Use EXxmm_mq. | |
| 1701 | ||
| ddc73fa9 NC |
1702 | 2020-07-06 Yuri Chornoivan <yurchor@ukr.net> |
| 1703 | ||
| 1704 | PR 26204 | |
| 1705 | * arc-dis.c: Fix spelling mistake. | |
| 1706 | * po/opcodes.pot: Regenerate. | |
| 1707 | ||
| 17550be7 NC |
1708 | 2020-07-06 Nick Clifton <nickc@redhat.com> |
| 1709 | ||
| 1710 | * po/pt_BR.po: Updated Brazilian Portugugese translation. | |
| 1711 | * po/uk.po: Updated Ukranian translation. | |
| 1712 | ||
| b19d852d NC |
1713 | 2020-07-04 Nick Clifton <nickc@redhat.com> |
| 1714 | ||
| 1715 | * configure: Regenerate. | |
| 1716 | * po/opcodes.pot: Regenerate. | |
| 1717 | ||
| b115b9fd NC |
1718 | 2020-07-04 Nick Clifton <nickc@redhat.com> |
| 1719 | ||
| 1720 | Binutils 2.35 branch created. | |
| 1721 | ||
| c2ecccb3 L |
1722 | 2020-07-02 H.J. Lu <hongjiu.lu@intel.com> |
| 1723 | ||
| 1724 | * i386-gen.c (opcode_modifiers): Add VexSwapSources. | |
| 1725 | * i386-opc.h (VexSwapSources): New. | |
| 1726 | (i386_opcode_modifier): Add vexswapsources. | |
| 1727 | * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions | |
| 1728 | with two source operands swapped. | |
| 1729 | * i386-tbl.h: Regenerated. | |
| 1730 | ||
| 08ccfccf NC |
1731 | 2020-06-30 Nelson Chu <nelson.chu@sifive.com> |
| 1732 | ||
| 1733 | * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the | |
| 1734 | unprivileged CSR can also be initialized. | |
| 1735 | ||
| 279edac5 AM |
1736 | 2020-06-29 Alan Modra <amodra@gmail.com> |
| 1737 | ||
| 1738 | * arm-dis.c: Use C style comments. | |
| 1739 | * cr16-opc.c: Likewise. | |
| 1740 | * ft32-dis.c: Likewise. | |
| 1741 | * moxie-opc.c: Likewise. | |
| 1742 | * tic54x-dis.c: Likewise. | |
| 1743 | * s12z-opc.c: Remove useless comment. | |
| 1744 | * xgate-dis.c: Likewise. | |
| 1745 | ||
| e978ad62 L |
1746 | 2020-06-26 H.J. Lu <hongjiu.lu@intel.com> |
| 1747 | ||
| 1748 | * i386-opc.tbl: Add a blank line. | |
| 1749 | ||
| 63112cd6 L |
1750 | 2020-06-26 H.J. Lu <hongjiu.lu@intel.com> |
| 1751 | ||
| 1752 | * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB. | |
| 1753 | (VecSIB128): Renamed to ... | |
| 1754 | (VECSIB128): This. | |
| 1755 | (VecSIB256): Renamed to ... | |
| 1756 | (VECSIB256): This. | |
| 1757 | (VecSIB512): Renamed to ... | |
| 1758 | (VECSIB512): This. | |
| 1759 | (VecSIB): Renamed to ... | |
| 1760 | (SIB): This. | |
| 1761 | (i386_opcode_modifier): Replace vecsib with sib. | |
| 79b32e73 | 1762 | * i386-opc.tbl (VecSIB128): New. |
| 63112cd6 L |
1763 | (VecSIB256): Likewise. |
| 1764 | (VecSIB512): Likewise. | |
| 79b32e73 | 1765 | Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256 |
| 63112cd6 L |
1766 | and VecSIB512, respectively. |
| 1767 | ||
| d1c36125 JB |
1768 | 2020-06-26 Jan Beulich <jbeulich@suse.com> |
| 1769 | ||
| 1770 | * i386-dis.c: Adjust description of I macro. | |
| 1771 | (x86_64_table): Drop use of I. | |
| 1772 | (float_mem): Replace use of I. | |
| 1773 | (putop): Remove handling of I. Adjust setting/clearing of "alt". | |
| 1774 | ||
| 2a1bb84c JB |
1775 | 2020-06-26 Jan Beulich <jbeulich@suse.com> |
| 1776 | ||
| 1777 | * i386-dis.c: (print_insn): Avoid straight assignment to | |
| 1778 | priv.orig_sizeflag when processing -M sub-options. | |
| 1779 | ||
| 8f570d62 JB |
1780 | 2020-06-25 Jan Beulich <jbeulich@suse.com> |
| 1781 | ||
| 1782 | * i386-dis.c: Adjust description of J macro. | |
| 1783 | (dis386, x86_64_table, mod_table): Replace J. | |
| 1784 | (putop): Remove handling of J. | |
| 1785 | ||
| 464dc4af JB |
1786 | 2020-06-25 Jan Beulich <jbeulich@suse.com> |
| 1787 | ||
| 1788 | * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt. | |
| 1789 | ||
| 589958d6 JB |
1790 | 2020-06-25 Jan Beulich <jbeulich@suse.com> |
| 1791 | ||
| 1792 | * i386-dis.c: Adjust description of "LQ" macro. | |
| 1793 | (dis386_twobyte): Use LQ for sysret. | |
| 1794 | (putop): Adjust handling of LQ. | |
| 1795 | ||
| 39ff0b81 NC |
1796 | 2020-06-22 Nelson Chu <nelson.chu@sifive.com> |
| 1797 | ||
| 1798 | * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c. | |
| 1799 | * riscv-dis.c: Include elfxx-riscv.h. | |
| 1800 | ||
| d27c357a JB |
1801 | 2020-06-18 H.J. Lu <hongjiu.lu@intel.com> |
| 1802 | ||
| 1803 | * i386-dis.c (prefix_table): Revert the last vmgexit change. | |
| 1804 | ||
| 6fde587f CL |
1805 | 2020-06-17 Lili Cui <lili.cui@intel.com> |
| 1806 | ||
| 1807 | * i386-dis.c (prefix_table): Delete the incorrect vmgexit. | |
| 1808 | ||
| efe30057 L |
1809 | 2020-06-14 H.J. Lu <hongjiu.lu@intel.com> |
| 1810 | ||
| 1811 | PR gas/26115 | |
| 1812 | * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk. | |
| 1813 | * i386-opc.tbl: Likewise. | |
| 1814 | * i386-tbl.h: Regenerated. | |
| 1815 | ||
| d8af286f NC |
1816 | 2020-06-12 Nelson Chu <nelson.chu@sifive.com> |
| 1817 | ||
| 1818 | * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9. | |
| 1819 | ||
| 14962256 AC |
1820 | 2020-06-11 Alex Coplan <alex.coplan@arm.com> |
| 1821 | ||
| 1822 | * aarch64-opc.c (SYSREG): New macro for describing system registers. | |
| 1823 | (SR_CORE): Likewise. | |
| 1824 | (SR_FEAT): Likewise. | |
| 1825 | (SR_RNG): Likewise. | |
| 1826 | (SR_V8_1): Likewise. | |
| 1827 | (SR_V8_2): Likewise. | |
| 1828 | (SR_V8_3): Likewise. | |
| 1829 | (SR_V8_4): Likewise. | |
| 1830 | (SR_PAN): Likewise. | |
| 1831 | (SR_RAS): Likewise. | |
| 1832 | (SR_SSBS): Likewise. | |
| 1833 | (SR_SVE): Likewise. | |
| 1834 | (SR_ID_PFR2): Likewise. | |
| 1835 | (SR_PROFILE): Likewise. | |
| 1836 | (SR_MEMTAG): Likewise. | |
| 1837 | (SR_SCXTNUM): Likewise. | |
| 1838 | (aarch64_sys_regs): Refactor to store feature information in the table. | |
| 1839 | (aarch64_sys_reg_supported_p): Collapse logic for system registers | |
| 1840 | that now describe their own features. | |
| 1841 | (aarch64_pstatefield_supported_p): Likewise. | |
| 1842 | ||
| f9630fa6 L |
1843 | 2020-06-09 H.J. Lu <hongjiu.lu@intel.com> |
| 1844 | ||
| 1845 | * i386-dis.c (prefix_table): Fix a typo in comments. | |
| 1846 | ||
| 73239888 JB |
1847 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
| 1848 | ||
| 1849 | * i386-dis.c (rex_ignored): Delete. | |
| 1850 | (ckprefix): Drop rex_ignored initialization. | |
| 1851 | (get_valid_dis386): Drop setting of rex_ignored. | |
| 1852 | (print_insn): Drop checking of rex_ignored. Don't record data | |
| 1853 | size prefix as used with VEX-and-alike encodings. | |
| 1854 | ||
| 18897deb JB |
1855 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
| 1856 | ||
| 1857 | * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2, | |
| 1858 | MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators. | |
| 1859 | (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete. | |
| 1860 | (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define. | |
| 1861 | (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16, | |
| 1862 | VEX_0F12, and VEX_0F16. | |
| 1863 | (vex_len_table): Use X for vmovlp* and vmovh*s. Drop | |
| 1864 | VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries. | |
| 1865 | (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE | |
| 1866 | from movlps and movhlps. New MOD_0F12_PREFIX_2, | |
| 1867 | MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and | |
| 1868 | MOD_VEX_0F16_PREFIX_2 entries. | |
| 1869 | ||
| 97e6786a JB |
1870 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
| 1871 | ||
| 1872 | * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13, | |
| 1873 | MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators. | |
| 1874 | (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15, | |
| 1875 | PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29, | |
| 1876 | PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, | |
| 1877 | PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6, | |
| 1878 | EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0, | |
| 1879 | EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2, | |
| 1880 | EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, | |
| 1881 | EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, | |
| 1882 | EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, | |
| 1883 | EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, | |
| 1884 | EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, | |
| 1885 | EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, | |
| 1886 | EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, | |
| 1887 | EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, | |
| 1888 | EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, | |
| 1889 | EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, | |
| 1890 | EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, | |
| 1891 | EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, | |
| 1892 | EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, | |
| 1893 | EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, | |
| 1894 | EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, | |
| 1895 | EVEX_W_0FC6_P_2): Delete. | |
| 1896 | (print_insn): Add EVEX.W vs embedded prefix consistency check | |
| 1897 | to prefix validation. | |
| 1898 | * i386-dis-evex.h (evex_table): Don't further descend for | |
| 1899 | vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX, | |
| 1900 | and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17, | |
| 1901 | and 0F2B. | |
| 1902 | * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries. | |
| 1903 | * i386-dis-evex-prefix.h: Don't further descend for vmovupX, | |
| 1904 | vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX, | |
| 1905 | vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases | |
| 1906 | 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29. | |
| 1907 | Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15, | |
| 1908 | PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B, | |
| 1909 | PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56, | |
| 1910 | PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries. | |
| 1911 | * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, | |
| 1912 | EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, | |
| 1913 | EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0, | |
| 1914 | EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2, | |
| 1915 | EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0, | |
| 1916 | EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2, | |
| 1917 | EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0, | |
| 1918 | EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2, | |
| 1919 | EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0, | |
| 1920 | EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2, | |
| 1921 | EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0, | |
| 1922 | EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, | |
| 1923 | EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0, | |
| 1924 | EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2, | |
| 1925 | EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0, | |
| 1926 | EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2, | |
| 1927 | EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0, | |
| 1928 | EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries. | |
| 1929 | ||
| bf926894 JB |
1930 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
| 1931 | ||
| 1932 | * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX, | |
| 1933 | vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX. | |
| 1934 | (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and | |
| 1935 | vmovmskpX. | |
| 1936 | (print_insn): Drop pointless check against bad_opcode. Split | |
| 1937 | prefix validation into legacy and VEX-and-alike parts. | |
| 1938 | (putop): Re-work 'X' macro handling. | |
| 1939 | ||
| a5aaedb9 JB |
1940 | 2020-06-09 Jan Beulich <jbeulich@suse.com> |
| 1941 | ||
| 1942 | * i386-dis.c (MOD_0F51): Rename to ... | |
| 1943 | (MOD_0F50): ... this. | |
| 1944 | ||
| 26417f19 AC |
1945 | 2020-06-08 Alex Coplan <alex.coplan@arm.com> |
| 1946 | ||
| 1947 | * arm-dis.c (arm_opcodes): Add dfb. | |
| 1948 | (thumb32_opcodes): Add dfb. | |
| 1949 | ||
| 8a6fb3f9 JB |
1950 | 2020-06-08 Jan Beulich <jbeulich@suse.com> |
| 1951 | ||
| 1952 | * i386-opc.h (reg_entry): Const-qualify reg_name field. | |
| 1953 | ||
| 1424c35d AM |
1954 | 2020-06-06 Alan Modra <amodra@gmail.com> |
| 1955 | ||
| 1956 | * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10. | |
| 1957 | ||
| d3d1cc7b AM |
1958 | 2020-06-05 Alan Modra <amodra@gmail.com> |
| 1959 | ||
| 1960 | * cgen-dis.c (hash_insn_array): Increase size of buf. Assert | |
| 1961 | size is large enough. | |
| 1962 | ||
| d8740be1 JM |
1963 | 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> |
| 1964 | ||
| 1965 | * disassemble.c (disassemble_init_for_target): Set endian_code for | |
| 1966 | bpf targets. | |
| 1967 | * bpf-desc.c: Regenerate. | |
| 1968 | * bpf-opc.c: Likewise. | |
| 1969 | * bpf-dis.c: Likewise. | |
| 1970 | ||
| e9bffec9 JM |
1971 | 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com> |
| 1972 | ||
| 1973 | * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument. | |
| 1974 | (cgen_put_insn_value): Likewise. | |
| 1975 | (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value. | |
| 1976 | * cgen-dis.in (print_insn): Likewise. | |
| 1977 | * cgen-ibld.in (insert_1): Likewise. | |
| 1978 | (insert_1): Likewise. | |
| 1979 | (insert_insn_normal): Likewise. | |
| 1980 | (extract_1): Likewise. | |
| 1981 | * bpf-dis.c: Regenerate. | |
| 1982 | * bpf-ibld.c: Likewise. | |
| 1983 | * bpf-ibld.c: Likewise. | |
| 1984 | * cgen-dis.in: Likewise. | |
| 1985 | * cgen-ibld.in: Likewise. | |
| 1986 | * cgen-opc.c: Likewise. | |
| 1987 | * epiphany-dis.c: Likewise. | |
| 1988 | * epiphany-ibld.c: Likewise. | |
| 1989 | * fr30-dis.c: Likewise. | |
| 1990 | * fr30-ibld.c: Likewise. | |
| 1991 | * frv-dis.c: Likewise. | |
| 1992 | * frv-ibld.c: Likewise. | |
| 1993 | * ip2k-dis.c: Likewise. | |
| 1994 | * ip2k-ibld.c: Likewise. | |
| 1995 | * iq2000-dis.c: Likewise. | |
| 1996 | * iq2000-ibld.c: Likewise. | |
| 1997 | * lm32-dis.c: Likewise. | |
| 1998 | * lm32-ibld.c: Likewise. | |
| 1999 | * m32c-dis.c: Likewise. | |
| 2000 | * m32c-ibld.c: Likewise. | |
| 2001 | * m32r-dis.c: Likewise. | |
| 2002 | * m32r-ibld.c: Likewise. | |
| 2003 | * mep-dis.c: Likewise. | |
| 2004 | * mep-ibld.c: Likewise. | |
| 2005 | * mt-dis.c: Likewise. | |
| 2006 | * mt-ibld.c: Likewise. | |
| 2007 | * or1k-dis.c: Likewise. | |
| 2008 | * or1k-ibld.c: Likewise. | |
| 2009 | * xc16x-dis.c: Likewise. | |
| 2010 | * xc16x-ibld.c: Likewise. | |
| 2011 | * xstormy16-dis.c: Likewise. | |
| 2012 | * xstormy16-ibld.c: Likewise. | |
| 2013 | ||
| b3db6d07 JM |
2014 | 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> |
| 2015 | ||
| 2016 | * cgen-dis.in (cpu_desc_list): New field `insn_endian'. | |
| 2017 | (print_insn_): Handle instruction endian. | |
| 2018 | * bpf-dis.c: Regenerate. | |
| 2019 | * bpf-desc.c: Regenerate. | |
| 2020 | * epiphany-dis.c: Likewise. | |
| 2021 | * epiphany-desc.c: Likewise. | |
| 2022 | * fr30-dis.c: Likewise. | |
| 2023 | * fr30-desc.c: Likewise. | |
| 2024 | * frv-dis.c: Likewise. | |
| 2025 | * frv-desc.c: Likewise. | |
| 2026 | * ip2k-dis.c: Likewise. | |
| 2027 | * ip2k-desc.c: Likewise. | |
| 2028 | * iq2000-dis.c: Likewise. | |
| 2029 | * iq2000-desc.c: Likewise. | |
| 2030 | * lm32-dis.c: Likewise. | |
| 2031 | * lm32-desc.c: Likewise. | |
| 2032 | * m32c-dis.c: Likewise. | |
| 2033 | * m32c-desc.c: Likewise. | |
| 2034 | * m32r-dis.c: Likewise. | |
| 2035 | * m32r-desc.c: Likewise. | |
| 2036 | * mep-dis.c: Likewise. | |
| 2037 | * mep-desc.c: Likewise. | |
| 2038 | * mt-dis.c: Likewise. | |
| 2039 | * mt-desc.c: Likewise. | |
| 2040 | * or1k-dis.c: Likewise. | |
| 2041 | * or1k-desc.c: Likewise. | |
| 2042 | * xc16x-dis.c: Likewise. | |
| 2043 | * xc16x-desc.c: Likewise. | |
| 2044 | * xstormy16-dis.c: Likewise. | |
| 2045 | * xstormy16-desc.c: Likewise. | |
| 2046 | ||
| 4ee4189f NC |
2047 | 2020-06-03 Nick Clifton <nickc@redhat.com> |
| 2048 | ||
| 2049 | * po/sr.po: Updated Serbian translation. | |
| 2050 | ||
| 44730156 NC |
2051 | 2020-06-03 Nelson Chu <nelson.chu@sifive.com> |
| 2052 | ||
| 2053 | * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int. | |
| 2054 | (riscv_get_priv_spec_class): Likewise. | |
| 2055 | ||
| 3c3d0376 AM |
2056 | 2020-06-01 Alan Modra <amodra@gmail.com> |
| 2057 | ||
| 2058 | * bpf-desc.c: Regenerate. | |
| 2059 | ||
| 78c1c354 JM |
2060 | 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com> |
| 2061 | David Faust <david.faust@oracle.com> | |
| 2062 | ||
| 2063 | * bpf-desc.c: Regenerate. | |
| 2064 | * bpf-opc.h: Likewise. | |
| 2065 | * bpf-opc.c: Likewise. | |
| 2066 | * bpf-dis.c: Likewise. | |
| 2067 | ||
| efcf5fb5 AM |
2068 | 2020-05-28 Alan Modra <amodra@gmail.com> |
| 2069 | ||
| 2070 | * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative | |
| 2071 | values. | |
| 2072 | ||
| ab382d64 AM |
2073 | 2020-05-28 Alan Modra <amodra@gmail.com> |
| 2074 | ||
| 2075 | * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for | |
| 2076 | immediates. | |
| 2077 | (print_insn_ns32k): Revert last change. | |
| 2078 | ||
| 151f5de4 NC |
2079 | 2020-05-28 Nick Clifton <nickc@redhat.com> |
| 2080 | ||
| 2081 | * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to | |
| 2082 | static. | |
| 2083 | ||
| 25e1eca8 SL |
2084 | 2020-05-26 Sandra Loosemore <sandra@codesourcery.com> |
| 2085 | ||
| 2086 | Fix extraction of signed constants in nios2 disassembler (again). | |
| 2087 | ||
| 2088 | * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to | |
| 2089 | extractions of signed fields. | |
| 2090 | ||
| 57b17940 SSF |
2091 | 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> |
| 2092 | ||
| 2093 | * s390-opc.txt: Relocate vector load/store instructions with | |
| 2094 | additional alignment parameter and change architecture level | |
| 2095 | constraint from z14 to z13. | |
| 2096 | ||
| d96bf37b AM |
2097 | 2020-05-21 Alan Modra <amodra@gmail.com> |
| 2098 | ||
| 2099 | * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout. | |
| 2100 | * sparc-dis.c: Likewise. | |
| 2101 | * tic4x-dis.c: Likewise. | |
| 2102 | * xtensa-dis.c: Likewise. | |
| 2103 | * bpf-desc.c: Regenerate. | |
| 2104 | * epiphany-desc.c: Regenerate. | |
| 2105 | * fr30-desc.c: Regenerate. | |
| 2106 | * frv-desc.c: Regenerate. | |
| 2107 | * ip2k-desc.c: Regenerate. | |
| 2108 | * iq2000-desc.c: Regenerate. | |
| 2109 | * lm32-desc.c: Regenerate. | |
| 2110 | * m32c-desc.c: Regenerate. | |
| 2111 | * m32r-desc.c: Regenerate. | |
| 2112 | * mep-asm.c: Regenerate. | |
| 2113 | * mep-desc.c: Regenerate. | |
| 2114 | * mt-desc.c: Regenerate. | |
| 2115 | * or1k-desc.c: Regenerate. | |
| 2116 | * xc16x-desc.c: Regenerate. | |
| 2117 | * xstormy16-desc.c: Regenerate. | |
| 2118 | ||
| 8f595e9b NC |
2119 | 2020-05-20 Nelson Chu <nelson.chu@sifive.com> |
| 2120 | ||
| 2121 | * riscv-opc.c (riscv_ext_version_table): The table used to store | |
| 2122 | all information about the supported spec and the corresponding ISA | |
| 2123 | versions. Currently, only Zicsr is supported to verify the | |
| 2124 | correctness of Z sub extension settings. Others will be supported | |
| 2125 | in the future patches. | |
| 2126 | (struct isa_spec_t, isa_specs): List for all supported ISA spec | |
| 2127 | classes and the corresponding strings. | |
| 2128 | (riscv_get_isa_spec_class): New function. Get the corresponding ISA | |
| 2129 | spec class by giving a ISA spec string. | |
| 2130 | * riscv-opc.c (struct priv_spec_t): New structure. | |
| 2131 | (struct priv_spec_t priv_specs): List for all supported privilege spec | |
| 2132 | classes and the corresponding strings. | |
| 2133 | (riscv_get_priv_spec_class): New function. Get the corresponding | |
| 2134 | privilege spec class by giving a spec string. | |
| 2135 | (riscv_get_priv_spec_name): New function. Get the corresponding | |
| 2136 | privilege spec string by giving a CSR version class. | |
| 2137 | * riscv-dis.c: Updated since DECLARE_CSR is changed. | |
| 2138 | * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR | |
| 2139 | according to the chosen version. Build a hash table riscv_csr_hash to | |
| 2140 | store the valid CSR for the chosen pirv verison. Dump the direct | |
| 2141 | CSR address rather than it's name if it is invalid. | |
| 2142 | (parse_riscv_dis_option_without_args): New function. Parse the options | |
| 2143 | without arguments. | |
| 2144 | (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to | |
| 2145 | parse the options without arguments first, and then handle the options | |
| 2146 | with arguments. Add the new option -Mpriv-spec, which has argument. | |
| 2147 | * riscv-dis.c (print_riscv_disassembler_options): Add description | |
| 2148 | about the new OBJDUMP option. | |
| 2149 | ||
| 3d205eb4 PB |
2150 | 2020-05-19 Peter Bergner <bergner@linux.ibm.com> |
| 2151 | ||
| 2152 | * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new | |
| 2153 | WC values on POWER10 sync, dcbf and wait instructions. | |
| 2154 | (insert_pl, extract_pl): New functions. | |
| 2155 | (L2OPT, LS, WC): Use insert_ls and extract_ls. | |
| 2156 | (LS3): New , 3-bit L for sync. | |
| 2157 | (LS3, L3OPT): New, 3-bit L for sync and dcbf. | |
| 2158 | (SC2, PL): New, 2-bit SC and PL for sync and wait. | |
| 2159 | (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks. | |
| 2160 | (XOPL3, XWCPL, XSYNCLS): New opcode macros. | |
| 2161 | (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync, | |
| 2162 | plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics. | |
| 2163 | <wait>: Enable PL operand on POWER10. | |
| 2164 | <dcbf>: Enable L3OPT operand on POWER10. | |
| 2165 | <sync>: Enable SC2 operand on POWER10. | |
| 2166 | ||
| a501eb44 SH |
2167 | 2020-05-19 Stafford Horne <shorne@gmail.com> |
| 2168 | ||
| 2169 | PR 25184 | |
| 2170 | * or1k-asm.c: Regenerate. | |
| 2171 | * or1k-desc.c: Regenerate. | |
| 2172 | * or1k-desc.h: Regenerate. | |
| 2173 | * or1k-dis.c: Regenerate. | |
| 2174 | * or1k-ibld.c: Regenerate. | |
| 2175 | * or1k-opc.c: Regenerate. | |
| 2176 | * or1k-opc.h: Regenerate. | |
| 2177 | * or1k-opinst.c: Regenerate. | |
| 2178 | ||
| 3b646889 AM |
2179 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2180 | ||
| 2181 | * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp, | |
| 2182 | xsmaxcqp, xsmincqp. | |
| 2183 | ||
| 9cc4ce88 AM |
2184 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2185 | ||
| 2186 | * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx, | |
| 2187 | stxvrbx, stxvrhx, stxvrwx, stxvrdx. | |
| 2188 | ||
| 5d57bc3f AM |
2189 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2190 | ||
| 2191 | * ppc-opc.c (powerpc_opcodes): Add xvtlsbb. | |
| 2192 | ||
| 66ef5847 AM |
2193 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2194 | ||
| 2195 | * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr, | |
| 2196 | vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr.. | |
| 2197 | ||
| 4f3e9537 PB |
2198 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
| 2199 | ||
| 2200 | * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New | |
| 2201 | mnemonics. | |
| 2202 | ||
| ec40e91c AM |
2203 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2204 | ||
| 2205 | * ppc-opc.c (UIM8, P_U8XX4_MASK): Define. | |
| 2206 | (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm, | |
| 2207 | vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm. | |
| 2208 | (prefix_opcodes): Add xxeval. | |
| 2209 | ||
| d7e97a76 AM |
2210 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2211 | ||
| 2212 | * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm, | |
| 2213 | xxgenpcvwm, xxgenpcvdm. | |
| 2214 | ||
| fdefed7c AM |
2215 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2216 | ||
| 2217 | * ppc-opc.c (MP, VXVAM_MASK): Define. | |
| 2218 | (VXVAPS_MASK): Use VXVA_MASK. | |
| 2219 | (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm, | |
| 2220 | vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm, | |
| 2221 | vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm, | |
| 2222 | vcntmbb, vcntmbh, vcntmbw, vcntmbd. | |
| 2223 | ||
| aa3c112f AM |
2224 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2225 | Peter Bergner <bergner@linux.ibm.com> | |
| 2226 | ||
| 2227 | * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a): | |
| 2228 | New functions. | |
| 2229 | (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK, | |
| 2230 | YMSK2, XA6a, XA6ap, XB6a entries. | |
| 2231 | (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define | |
| 2232 | (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define. | |
| 2233 | (PPCVSX4): Define. | |
| 2234 | (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz, | |
| 2235 | xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger, | |
| 2236 | xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp, | |
| 2237 | xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np, | |
| 2238 | xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp, | |
| 2239 | xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn, | |
| 2240 | xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16. | |
| 2241 | (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp, | |
| 2242 | pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8, | |
| 2243 | pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2, | |
| 2244 | pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp, | |
| 2245 | pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp, | |
| 2246 | pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn, | |
| 2247 | pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn. | |
| 2248 | ||
| 6edbfd3b AM |
2249 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2250 | ||
| 2251 | * ppc-opc.c (insert_imm32, extract_imm32): New functions. | |
| 2252 | (insert_xts, extract_xts): New functions. | |
| 2253 | (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define. | |
| 2254 | (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define. | |
| 2255 | (VXRC_MASK, VXSH_MASK): Define. | |
| 2256 | (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx, | |
| 2257 | vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx, | |
| 2258 | vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx, | |
| 2259 | vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx, | |
| 2260 | vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq. | |
| 2261 | (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb, | |
| 2262 | xxblendvh, xxblendvw, xxblendvd, xxpermx. | |
| 2263 | ||
| c7d7aea2 AM |
2264 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2265 | ||
| 2266 | * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi, | |
| 2267 | vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd, | |
| 2268 | vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd, | |
| 2269 | vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz, | |
| 2270 | xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq. | |
| 2271 | ||
| 94ba9882 AM |
2272 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2273 | ||
| 2274 | * ppc-opc.c (insert_xtp, extract_xtp): New functions. | |
| 2275 | (XTP, DQXP, DQXP_MASK): Define. | |
| 2276 | (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx. | |
| 2277 | (prefix_opcodes): Add plxvp and pstxvp. | |
| 2278 | ||
| f4791f1a AM |
2279 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2280 | ||
| 2281 | * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld, | |
| 2282 | vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw, | |
| 2283 | vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd. | |
| 2284 | ||
| 3ff0a5ba PB |
2285 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
| 2286 | ||
| 2287 | * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics. | |
| 2288 | ||
| afef4fe9 PB |
2289 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
| 2290 | ||
| 2291 | * ppc-opc.c (insert_l1opt, extract_l1opt): New functions. | |
| 2292 | (L1OPT): Define. | |
| 2293 | (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10. | |
| 2294 | ||
| 1224c05d PB |
2295 | 2020-05-11 Peter Bergner <bergner@linux.ibm.com> |
| 2296 | ||
| 2297 | * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand. | |
| 2298 | ||
| 6bbb0c05 AM |
2299 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2300 | ||
| 2301 | * ppc-dis.c (powerpc_init_dialect): Default to "power10". | |
| 2302 | ||
| 7c1f4227 AM |
2303 | 2020-05-11 Alan Modra <amodra@gmail.com> |
| 2304 | ||
| 2305 | * ppc-dis.c (ppc_opts): Add "power10" entry. | |
| 2306 | (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming. | |
| 2307 | * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses. | |
| 2308 | ||
| 73199c2b NC |
2309 | 2020-05-11 Nick Clifton <nickc@redhat.com> |
| 2310 | ||
| 2311 | * po/fr.po: Updated French translation. | |
| 2312 | ||
| 09c1e68a AC |
2313 | 2020-04-30 Alex Coplan <alex.coplan@arm.com> |
| 2314 | ||
| 2315 | * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2. | |
| 2316 | * aarch64-opc.c (fields): Add entry for FLD_imm16_2. | |
| 2317 | (operand_general_constraint_met_p): validate | |
| 2318 | AARCH64_OPND_UNDEFINED. | |
| 2319 | * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry | |
| 2320 | for FLD_imm16_2. | |
| 2321 | * aarch64-asm-2.c: Regenerated. | |
| 2322 | * aarch64-dis-2.c: Regenerated. | |
| 2323 | * aarch64-opc-2.c: Regenerated. | |
| 2324 | ||
| 9654d51a NC |
2325 | 2020-04-29 Nick Clifton <nickc@redhat.com> |
| 2326 | ||
| 2327 | PR 22699 | |
| 2328 | * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC | |
| 2329 | and SETRC insns. | |
| 2330 | ||
| c2e71e57 NC |
2331 | 2020-04-29 Nick Clifton <nickc@redhat.com> |
| 2332 | ||
| 2333 | * po/sv.po: Updated Swedish translation. | |
| 2334 | ||
| 5c936ef5 NC |
2335 | 2020-04-29 Nick Clifton <nickc@redhat.com> |
| 2336 | ||
| 2337 | PR 22699 | |
| 2338 | * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use | |
| 2339 | IMM0_8S for arithmetic insns and IMM0_8U for logical insns. | |
| 2340 | * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add | |
| 2341 | IMM0_8U case. | |
| 2342 | ||
| bb2a1453 AS |
2343 | 2020-04-21 Andreas Schwab <schwab@linux-m68k.org> |
| 2344 | ||
| 2345 | PR 25848 | |
| 2346 | * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of | |
| 2347 | cmpi only on m68020up and cpu32. | |
| 2348 | ||
| c2e5c986 SD |
2349 | 2020-04-20 Sudakshina Das <sudi.das@arm.com> |
| 2350 | ||
| 2351 | * aarch64-asm.c (aarch64_ins_none): New. | |
| 2352 | * aarch64-asm.h (ins_none): New declaration. | |
| 2353 | * aarch64-dis.c (aarch64_ext_none): New. | |
| 2354 | * aarch64-dis.h (ext_none): New declaration. | |
| 2355 | * aarch64-opc.c (aarch64_print_operand): Update case for | |
| 2356 | AARCH64_OPND_BARRIER_PSB. | |
| 2357 | * aarch64-tbl.h (aarch64_opcode_table): Add tsb. | |
| 2358 | (AARCH64_OPERANDS): Update inserter/extracter for | |
| 2359 | AARCH64_OPND_BARRIER_PSB to use new dummy functions. | |
| 2360 | * aarch64-asm-2.c: Regenerated. | |
| 2361 | * aarch64-dis-2.c: Regenerated. | |
| 2362 | * aarch64-opc-2.c: Regenerated. | |
| 2363 | ||
| 8a6e1d1d SD |
2364 | 2020-04-20 Sudakshina Das <sudi.das@arm.com> |
| 2365 | ||
| 2366 | * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove. | |
| 2367 | (aarch64_feature_ras, RAS): Likewise. | |
| 2368 | (aarch64_feature_stat_profile, STAT_PROFILE): Likewise. | |
| 2369 | (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716, | |
| 2370 | autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp, | |
| 2371 | autiaz, autiasp, autibz, autibsp to be CORE_INSN. | |
| 2372 | * aarch64-asm-2.c: Regenerated. | |
| 2373 | * aarch64-dis-2.c: Regenerated. | |
| 2374 | * aarch64-opc-2.c: Regenerated. | |
| 2375 | ||
| e409955d FS |
2376 | 2020-04-17 Fredrik Strupe <fredrik@strupe.net> |
| 2377 | ||
| 2378 | * arm-dis.c (neon_opcodes): Fix VDUP instruction masks. | |
| 2379 | (print_insn_neon): Support disassembly of conditional | |
| 2380 | instructions. | |
| 2381 | ||
| c54a9b56 DF |
2382 | 2020-02-16 David Faust <david.faust@oracle.com> |
| 2383 | ||
| 2384 | * bpf-desc.c: Regenerate. | |
| 2385 | * bpf-desc.h: Likewise. | |
| 2386 | * bpf-opc.c: Regenerate. | |
| 2387 | * bpf-opc.h: Likewise. | |
| 2388 | ||
| bb651e8b CL |
2389 | 2020-04-07 Lili Cui <lili.cui@intel.com> |
| 2390 | ||
| 2391 | * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1, | |
| 2392 | (prefix_table): New instructions (see prefixes above). | |
| 2393 | (rm_table): Likewise | |
| 2394 | * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS, | |
| 2395 | CPU_ANY_TSXLDTRK_FLAGS. | |
| 2396 | (cpu_flags): Add CpuTSXLDTRK. | |
| 2397 | * i386-opc.h (enum): Add CpuTSXLDTRK. | |
| 2398 | (i386_cpu_flags): Add cputsxldtrk. | |
| 2399 | * i386-opc.tbl: Add XSUSPLDTRK insns. | |
| 2400 | * i386-init.h: Regenerate. | |
| 2401 | * i386-tbl.h: Likewise. | |
| 2402 | ||
| 4b27d27c L |
2403 | 2020-04-02 Lili Cui <lili.cui@intel.com> |
| 2404 | ||
| 2405 | * i386-dis.c (prefix_table): New instructions serialize. | |
| 2406 | * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS, | |
| 2407 | CPU_ANY_SERIALIZE_FLAGS. | |
| 2408 | (cpu_flags): Add CpuSERIALIZE. | |
| 2409 | * i386-opc.h (enum): Add CpuSERIALIZE. | |
| 2410 | (i386_cpu_flags): Add cpuserialize. | |
| 2411 | * i386-opc.tbl: Add SERIALIZE insns. | |
| 2412 | * i386-init.h: Regenerate. | |
| 2413 | * i386-tbl.h: Likewise. | |
| 2414 | ||
| 832a5807 AM |
2415 | 2020-03-26 Alan Modra <amodra@gmail.com> |
| 2416 | ||
| 2417 | * disassemble.h (opcodes_assert): Declare. | |
| 2418 | (OPCODES_ASSERT): Define. | |
| 2419 | * disassemble.c: Don't include assert.h. Include opintl.h. | |
| 2420 | (opcodes_assert): New function. | |
| 2421 | * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT. | |
| 2422 | (bfd_h8_disassemble): Reduce size of data array. Correctly | |
| 2423 | calculate maxlen. Omit insn decoding when insn length exceeds | |
| 2424 | maxlen. Exit from nibble loop when looking for E, before | |
| 2425 | accessing next data byte. Move processing of E outside loop. | |
| 2426 | Replace tests of maxlen in loop with assertions. | |
| 2427 | ||
| 4c4addbe AM |
2428 | 2020-03-26 Alan Modra <amodra@gmail.com> |
| 2429 | ||
| 2430 | * arc-dis.c (find_format): Init needs_limm. Simplify use of limm. | |
| 2431 | ||
| a18cd0ca AM |
2432 | 2020-03-25 Alan Modra <amodra@gmail.com> |
| 2433 | ||
| 2434 | * z80-dis.c (suffix): Init mybuf. | |
| 2435 | ||
| 57cb32b3 AM |
2436 | 2020-03-22 Alan Modra <amodra@gmail.com> |
| 2437 | ||
| 2438 | * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that | |
| 2439 | successflly read from section. | |
| 2440 | ||
| beea5cc1 AM |
2441 | 2020-03-22 Alan Modra <amodra@gmail.com> |
| 2442 | ||
| 2443 | * arc-dis.c (find_format): Use ISO C string concatenation rather | |
| 2444 | than line continuation within a string. Don't access needs_limm | |
| 2445 | before testing opcode != NULL. | |
| 2446 | ||
| 03704c77 AM |
2447 | 2020-03-22 Alan Modra <amodra@gmail.com> |
| 2448 | ||
| 2449 | * ns32k-dis.c (print_insn_arg): Update comment. | |
| 2450 | (print_insn_ns32k): Reduce size of index_offset array, and | |
| 2451 | initialize, passing -1 to print_insn_arg for args that are not | |
| 2452 | an index. Don't exit arg loop early. Abort on bad arg number. | |
| 2453 | ||
| d1023b5d AM |
2454 | 2020-03-22 Alan Modra <amodra@gmail.com> |
| 2455 | ||
| 2456 | * s12z-dis.c (abstract_read_memory): Don't print error on EOI. | |
| 2457 | * s12z-opc.c: Formatting. | |
| 2458 | (operands_f): Return an int. | |
| 2459 | (opr_n_bytes_p1): Return -1 on reaching buffer memory limit. | |
| 2460 | (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes), | |
| 2461 | (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes), | |
| 2462 | (exg_sex_discrim): Likewise. | |
| 2463 | (create_immediate_operand, create_bitfield_operand), | |
| 2464 | (create_register_operand_with_size, create_register_all_operand), | |
| 2465 | (create_register_all16_operand, create_simple_memory_operand), | |
| 2466 | (create_memory_operand, create_memory_auto_operand): Don't | |
| 2467 | segfault on malloc failure. | |
| 2468 | (z_ext24_decode): Return an int status, negative on fail, zero | |
| 2469 | on success. | |
| 2470 | (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2), | |
| 2471 | (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base), | |
| 2472 | (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7), | |
| 2473 | (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x), | |
| 2474 | (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode), | |
| 2475 | (mov_imm_opr, ld_18bit_decode, exg_sex_decode), | |
| 2476 | (loop_primitive_decode, shift_decode, psh_pul_decode), | |
| 2477 | (bit_field_decode): Similarly. | |
| 2478 | (z_decode_signed_value, decode_signed_value): Similarly. Add arg | |
| 2479 | to return value, update callers. | |
| 2480 | (x_opr_decode_with_size): Check all reads, returning NULL on fail. | |
| 2481 | Don't segfault on NULL operand. | |
| 2482 | (decode_operation): Return OP_INVALID on first fail. | |
| 2483 | (decode_s12z): Check all reads, returning -1 on fail. | |
| 2484 | ||
| 340f3ac8 AM |
2485 | 2020-03-20 Alan Modra <amodra@gmail.com> |
| 2486 | ||
| 2487 | * metag-dis.c (print_insn_metag): Don't ignore status from | |
| 2488 | read_memory_func. | |
| 2489 | ||
| fe90ae8a AM |
2490 | 2020-03-20 Alan Modra <amodra@gmail.com> |
| 2491 | ||
| 2492 | * nds32-dis.c (print_insn_nds32): Remove unnecessary casts. | |
| 2493 | Initialize parts of buffer not written when handling a possible | |
| 2494 | 2-byte insn at end of section. Don't attempt decoding of such | |
| 2495 | an insn by the 4-byte machinery. | |
| 2496 | ||
| 833d919c AM |
2497 | 2020-03-20 Alan Modra <amodra@gmail.com> |
| 2498 | ||
| 2499 | * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of | |
| 2500 | partially filled buffer. Prevent lookup of 4-byte insns when | |
| 2501 | only VLE 2-byte insns are possible due to section size. Print | |
| 2502 | ".word" rather than ".long" for 2-byte leftovers. | |
| 2503 | ||
| 327ef784 NC |
2504 | 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com> |
| 2505 | ||
| 2506 | PR 25641 | |
| 2507 | * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes. | |
| 2508 | ||
| 1673df32 JB |
2509 | 2020-03-13 Jan Beulich <jbeulich@suse.com> |
| 2510 | ||
| 2511 | * i386-dis.c (X86_64_0D): Rename to ... | |
| 2512 | (X86_64_0E): ... this. | |
| 2513 | ||
| 384f3689 L |
2514 | 2020-03-09 H.J. Lu <hongjiu.lu@intel.com> |
| 2515 | ||
| 2516 | * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP). | |
| 2517 | * Makefile.in: Regenerated. | |
| 2518 | ||
| 865e2027 JB |
2519 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
| 2520 | ||
| 2521 | * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp* | |
| 2522 | 3-operand pseudos. | |
| 2523 | * i386-tbl.h: Re-generate. | |
| 2524 | ||
| 2f13234b JB |
2525 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
| 2526 | ||
| 2527 | * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*, | |
| 2528 | vprot*, vpsha*, and vpshl*. | |
| 2529 | * i386-tbl.h: Re-generate. | |
| 2530 | ||
| 3fabc179 JB |
2531 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
| 2532 | ||
| 2533 | * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps, | |
| 2534 | vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops. | |
| 2535 | * i386-tbl.h: Re-generate. | |
| 2536 | ||
| 3677e4c1 JB |
2537 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
| 2538 | ||
| 2539 | * i386-gen.c (set_bitfield): Ignore zero-length field names. | |
| 2540 | * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps, | |
| 2541 | cmpss, cmppd, and cmpsd 2-operand pseudo-ops. | |
| 2542 | * i386-tbl.h: Re-generate. | |
| 2543 | ||
| 4c4898e8 JB |
2544 | 2020-03-09 Jan Beulich <jbeulich@suse.com> |
| 2545 | ||
| 2546 | * i386-gen.c (struct template_arg, struct template_instance, | |
| 2547 | struct template_param, struct template, templates, | |
| 2548 | parse_template, expand_templates): New. | |
| 2549 | (process_i386_opcodes): Various local variables moved to | |
| 2550 | expand_templates. Call parse_template and expand_templates. | |
| 2551 | * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc. | |
| 2552 | * i386-tbl.h: Re-generate. | |
| 2553 | ||
| bc49bfd8 JB |
2554 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2555 | ||
| 2556 | * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph, | |
| 2557 | vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate | |
| 2558 | register and memory source templates. Replace VexW= by VexW* | |
| 2559 | where applicable. | |
| 2560 | * i386-tbl.h: Re-generate. | |
| 2561 | ||
| 4873e243 JB |
2562 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2563 | ||
| 2564 | * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace | |
| 2565 | VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable. | |
| 2566 | * i386-tbl.h: Re-generate. | |
| 2567 | ||
| 672a349b JB |
2568 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2569 | ||
| 2570 | * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax. | |
| 2571 | * i386-tbl.h: Re-generate. | |
| 2572 | ||
| 4ed21b58 JB |
2573 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2574 | ||
| 2575 | * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants. | |
| 2576 | (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps, | |
| 2577 | pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use | |
| 2578 | VexW0 on SSE2AVX variants. | |
| 2579 | (vmovq): Drop NoRex64 from XMM/XMM variants. | |
| 2580 | (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb, | |
| 2581 | vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where | |
| 2582 | applicable use VexW0. | |
| 2583 | * i386-tbl.h: Re-generate. | |
| 2584 | ||
| 643bb870 JB |
2585 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2586 | ||
| 2587 | * i386-gen.c (opcode_modifiers): Remove Rex64 field. | |
| 2588 | * i386-opc.h (Rex64): Delete. | |
| 2589 | (struct i386_opcode_modifier): Remove rex64 field. | |
| 2590 | * i386-opc.tbl (crc32): Drop Rex64. | |
| 2591 | Replace Rex64 with Size64 everywhere else. | |
| 2592 | * i386-tbl.h: Re-generate. | |
| 2593 | ||
| a23b33b3 JB |
2594 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2595 | ||
| 2596 | * i386-dis.c (OP_E_memory): Exclude recording of used address | |
| 2597 | prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit | |
| 2598 | addressed memory operands for MPX insns. | |
| 2599 | ||
| a0497384 JB |
2600 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2601 | ||
| 2602 | * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept, | |
| 2603 | invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx, | |
| 2604 | adox, mwaitx, rdpid, movdiri): Add IgnoreSize. | |
| 2605 | (ptwrite): Split into non-64-bit and 64-bit forms. | |
| 2606 | * i386-tbl.h: Re-generate. | |
| 2607 | ||
| b630c145 JB |
2608 | 2020-03-06 Jan Beulich <jbeulich@suse.com> |
| 2609 | ||
| 2610 | * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand | |
| 2611 | template. | |
| 2612 | * i386-tbl.h: Re-generate. | |
| 2613 | ||
| a847e322 JB |
2614 | 2020-03-04 Jan Beulich <jbeulich@suse.com> |
| 2615 | ||
| 2616 | * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New. | |
| 2617 | (prefix_table): Move vmmcall here. Add vmgexit. | |
| 2618 | (rm_table): Replace vmmcall entry by prefix_table[] escape. | |
| 2619 | * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry. | |
| 2620 | (cpu_flags): Add CpuSEV_ES entry. | |
| 2621 | * i386-opc.h (CpuSEV_ES): New. | |
| 2622 | (union i386_cpu_flags): Add cpusev_es field. | |
| 2623 | * i386-opc.tbl (vmgexit): New. | |
| 2624 | * i386-init.h, i386-tbl.h: Re-generate. | |
| 2625 | ||
| 3cd7f3e3 L |
2626 | 2020-03-03 H.J. Lu <hongjiu.lu@intel.com> |
| 2627 | ||
| 2628 | * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize | |
| 2629 | with MnemonicSize. | |
| 2630 | * i386-opc.h (IGNORESIZE): New. | |
| 2631 | (DEFAULTSIZE): Likewise. | |
| 2632 | (IgnoreSize): Removed. | |
| 2633 | (DefaultSize): Likewise. | |
| 2634 | (MnemonicSize): New. | |
| 2635 | (i386_opcode_modifier): Replace ignoresize/defaultsize with | |
| 2636 | mnemonicsize. | |
| 2637 | * i386-opc.tbl (IgnoreSize): New. | |
| 2638 | (DefaultSize): Likewise. | |
| 2639 | * i386-tbl.h: Regenerated. | |
| 2640 | ||
| b8ba1385 SB |
2641 | 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com> |
| 2642 | ||
| 2643 | PR 25627 | |
| 2644 | * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX | |
| 2645 | instructions. | |
| 2646 | ||
| 10d97a0f L |
2647 | 2020-03-03 H.J. Lu <hongjiu.lu@intel.com> |
| 2648 | ||
| 2649 | PR gas/25622 | |
| 2650 | * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd, | |
| 2651 | vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax. | |
| 2652 | * i386-tbl.h: Regenerated. | |
| 2653 | ||
| dc1e8a47 AM |
2654 | 2020-02-26 Alan Modra <amodra@gmail.com> |
| 2655 | ||
| 2656 | * aarch64-asm.c: Indent labels correctly. | |
| 2657 | * aarch64-dis.c: Likewise. | |
| 2658 | * aarch64-gen.c: Likewise. | |
| 2659 | * aarch64-opc.c: Likewise. | |
| 2660 | * alpha-dis.c: Likewise. | |
| 2661 | * i386-dis.c: Likewise. | |
| 2662 | * nds32-asm.c: Likewise. | |
| 2663 | * nfp-dis.c: Likewise. | |
| 2664 | * visium-dis.c: Likewise. | |
| 2665 | ||
| 265b4673 CZ |
2666 | 2020-02-25 Claudiu Zissulescu <claziss@gmail.com> |
| 2667 | ||
| 2668 | * arc-regs.h (int_vector_base): Make it available for all ARC | |
| 2669 | CPUs. | |
| 2670 | ||
| bd0cf5a6 NC |
2671 | 2020-02-20 Nelson Chu <nelson.chu@sifive.com> |
| 2672 | ||
| 2673 | * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is | |
| 2674 | changed. | |
| 2675 | ||
| fa164239 JW |
2676 | 2020-02-19 Nelson Chu <nelson.chu@sifive.com> |
| 2677 | ||
| 2678 | * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed | |
| 2679 | c.mv/c.li if rs1 is zero. | |
| 2680 | ||
| 272a84b1 L |
2681 | 2020-02-17 H.J. Lu <hongjiu.lu@intel.com> |
| 2682 | ||
| 2683 | * i386-gen.c (cpu_flag_init): Replace CpuABM with | |
| 2684 | CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add | |
| 2685 | CPU_POPCNT_FLAGS. | |
| 2686 | (cpu_flags): Remove CpuABM. Add CpuPOPCNT. | |
| 2687 | * i386-opc.h (CpuABM): Removed. | |
| 2688 | (CpuPOPCNT): New. | |
| 2689 | (i386_cpu_flags): Remove cpuabm. Add cpupopcnt. | |
| 2690 | * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on | |
| 2691 | popcnt. Remove CpuABM from lzcnt. | |
| 2692 | * i386-init.h: Regenerated. | |
| 2693 | * i386-tbl.h: Likewise. | |
| 2694 | ||
| 1f730c46 JB |
2695 | 2020-02-17 Jan Beulich <jbeulich@suse.com> |
| 2696 | ||
| 2697 | * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss): | |
| 2698 | Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/ | |
| 2699 | VexW1 instead of open-coding them. | |
| 2700 | * i386-tbl.h: Re-generate. | |
| 2701 | ||
| c8f8eebc JB |
2702 | 2020-02-17 Jan Beulich <jbeulich@suse.com> |
| 2703 | ||
| 2704 | * i386-opc.tbl (AddrPrefixOpReg): Define. | |
| 2705 | (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx, | |
| 2706 | umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64 | |
| 2707 | templates. Drop NoRex64. | |
| 2708 | * i386-tbl.h: Re-generate. | |
| 2709 | ||
| b9915cbc JB |
2710 | 2020-02-17 Jan Beulich <jbeulich@suse.com> |
| 2711 | ||
| 2712 | PR gas/6518 | |
| 2713 | * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq, | |
| 2714 | vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms | |
| 2715 | into Intel syntax instance (with Unpsecified) and AT&T one | |
| 2716 | (without). | |
| 2717 | (vcvtneps2bf16): Likewise, along with folding the two so far | |
| 2718 | separate ones. | |
| 2719 | * i386-tbl.h: Re-generate. | |
| 2720 | ||
| ce504911 L |
2721 | 2020-02-16 H.J. Lu <hongjiu.lu@intel.com> |
| 2722 | ||
| 2723 | * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from | |
| 2724 | CPU_ANY_SSE4A_FLAGS. | |
| 2725 | ||
| dabec65d AM |
2726 | 2020-02-17 Alan Modra <amodra@gmail.com> |
| 2727 | ||
| 2728 | * i386-gen.c (cpu_flag_init): Correct last change. | |
| 2729 | ||
| af5c13b0 L |
2730 | 2020-02-16 H.J. Lu <hongjiu.lu@intel.com> |
| 2731 | ||
| 2732 | * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove | |
| 2733 | CPU_ANY_SSE4_FLAGS. | |
| 2734 | ||
| 6867aac0 L |
2735 | 2020-02-14 H.J. Lu <hongjiu.lu@intel.com> |
| 2736 | ||
| 2737 | * i386-opc.tbl (movsx): Remove Intel syntax comments. | |
| 2738 | (movzx): Likewise. | |
| 2739 | ||
| 65fca059 JB |
2740 | 2020-02-14 Jan Beulich <jbeulich@suse.com> |
| 2741 | ||
| 2742 | PR gas/25438 | |
| 2743 | * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as | |
| 2744 | destination for Cpu64-only variant. | |
| 2745 | (movzx): Fold patterns. | |
| 2746 | * i386-tbl.h: Re-generate. | |
| 2747 | ||
| 7deea9aa JB |
2748 | 2020-02-13 Jan Beulich <jbeulich@suse.com> |
| 2749 | ||
| 2750 | * i386-gen.c (cpu_flag_init): Move CpuSSE4a from | |
| 2751 | CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add | |
| 2752 | CPU_ANY_SSE4_FLAGS entry. | |
| 2753 | * i386-init.h: Re-generate. | |
| 2754 | ||
| 6c0946d0 JB |
2755 | 2020-02-12 Jan Beulich <jbeulich@suse.com> |
| 2756 | ||
| 2757 | * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form | |
| 2758 | with Unspecified, making the present one AT&T syntax only. | |
| 2759 | * i386-tbl.h: Re-generate. | |
| 2760 | ||
| ddb56fe6 JB |
2761 | 2020-02-12 Jan Beulich <jbeulich@suse.com> |
| 2762 | ||
| 2763 | * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants. | |
| 2764 | * i386-tbl.h: Re-generate. | |
| 2765 | ||
| 5990e377 JB |
2766 | 2020-02-12 Jan Beulich <jbeulich@suse.com> |
| 2767 | ||
| 2768 | PR gas/24546 | |
| 2769 | * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode. | |
| 2770 | * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into | |
| 2771 | Amd64 and Intel64 templates. | |
| 2772 | (call, jmp): Likewise for far indirect variants. Dro | |
| 2773 | Unspecified. | |
| 2774 | * i386-tbl.h: Re-generate. | |
| 2775 | ||
| 50128d0c JB |
2776 | 2020-02-11 Jan Beulich <jbeulich@suse.com> |
| 2777 | ||
| 2778 | * i386-gen.c (opcode_modifiers): Remove ShortForm entry. | |
| 2779 | * i386-opc.h (ShortForm): Delete. | |
| 2780 | (struct i386_opcode_modifier): Remove shortform field. | |
| 2781 | * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld, | |
| 2782 | fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub, | |
| 2783 | fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp, | |
| 2784 | ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq): | |
| 2785 | Drop ShortForm. | |
| 2786 | * i386-tbl.h: Re-generate. | |
| 2787 | ||
| 1e05b5c4 JB |
2788 | 2020-02-11 Jan Beulich <jbeulich@suse.com> |
| 2789 | ||
| 2790 | * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip, | |
| 2791 | fucompi): Drop ShortForm from operand-less templates. | |
| 2792 | * i386-tbl.h: Re-generate. | |
| 2793 | ||
| 2f5dd314 AM |
2794 | 2020-02-11 Alan Modra <amodra@gmail.com> |
| 2795 | ||
| 2796 | * cgen-ibld.in (extract_normal): Set *valuep on all return paths. | |
| 2797 | * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c, | |
| 2798 | * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, | |
| 2799 | * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c, | |
| 2800 | * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate. | |
| 2801 | ||
| 5aae9ae9 MM |
2802 | 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com> |
| 2803 | ||
| 2804 | * arm-dis.c (print_insn_cde): Define 'V' parse character. | |
| 2805 | (cde_opcodes): Add VCX* instructions. | |
| 2806 | ||
| 4934a27c MM |
2807 | 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> |
| 2808 | Matthew Malcomson <matthew.malcomson@arm.com> | |
| 2809 | ||
| 2810 | * arm-dis.c (struct cdeopcode32): New. | |
| 2811 | (CDE_OPCODE): New macro. | |
| 2812 | (cde_opcodes): New disassembly table. | |
| 2813 | (regnames): New option to table. | |
| 2814 | (cde_coprocs): New global variable. | |
| 2815 | (print_insn_cde): New | |
| 2816 | (print_insn_thumb32): Use print_insn_cde. | |
| 2817 | (parse_arm_disassembler_options): Parse coprocN args. | |
| 2818 | ||
| 4b5aaf5f L |
2819 | 2020-02-10 H.J. Lu <hongjiu.lu@intel.com> |
| 2820 | ||
| 2821 | PR gas/25516 | |
| 2822 | * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64 | |
| 2823 | with ISA64. | |
| 2824 | * i386-opc.h (AMD64): Removed. | |
| 2825 | (Intel64): Likewose. | |
| 2826 | (AMD64): New. | |
| 2827 | (INTEL64): Likewise. | |
| 2828 | (INTEL64ONLY): Likewise. | |
| 2829 | (i386_opcode_modifier): Replace amd64 and intel64 with isa64. | |
| 2830 | * i386-opc.tbl (Amd64): New. | |
| 2831 | (Intel64): Likewise. | |
| 2832 | (Intel64Only): Likewise. | |
| 2833 | Replace AMD64 with Amd64. Update sysenter/sysenter with | |
| 2834 | Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter. | |
| 2835 | * i386-tbl.h: Regenerated. | |
| 2836 | ||
| 9fc0b501 SB |
2837 | 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com> |
| 2838 | ||
| 2839 | PR 25469 | |
| 2840 | * z80-dis.c: Add support for GBZ80 opcodes. | |
| 2841 | ||
| c5d7be0c AM |
2842 | 2020-02-04 Alan Modra <amodra@gmail.com> |
| 2843 | ||
| 2844 | * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned. | |
| 2845 | ||
| 44e4546f AM |
2846 | 2020-02-03 Alan Modra <amodra@gmail.com> |
| 2847 | ||
| 2848 | * m32c-ibld.c: Regenerate. | |
| 2849 | ||
| b2b1453a AM |
2850 | 2020-02-01 Alan Modra <amodra@gmail.com> |
| 2851 | ||
| 2852 | * frv-ibld.c: Regenerate. | |
| 2853 | ||
| 4102be5c JB |
2854 | 2020-01-31 Jan Beulich <jbeulich@suse.com> |
| 2855 | ||
| 2856 | * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete. | |
| 2857 | (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label. | |
| 2858 | (OP_E_memory): Replace xmm_mdq_mode case label by | |
| 2859 | vex_scalar_w_dq_mode one. | |
| 2860 | * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar. | |
| 2861 | ||
| 825bd36c JB |
2862 | 2020-01-31 Jan Beulich <jbeulich@suse.com> |
| 2863 | ||
| 2864 | * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete. | |
| 2865 | (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode, | |
| 2866 | vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments. | |
| 2867 | (intel_operand_size): Drop vex_w_dq_mode case label. | |
| 2868 | ||
| c3036ed0 RS |
2869 | 2020-01-31 Richard Sandiford <richard.sandiford@arm.com> |
| 2870 | ||
| 2871 | * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt. | |
| 2872 | Remove C_SCAN_MOVPRFX for SVE bfcvtnt. | |
| 2873 | ||
| 0c115f84 AM |
2874 | 2020-01-30 Alan Modra <amodra@gmail.com> |
| 2875 | ||
| 2876 | * m32c-ibld.c: Regenerate. | |
| 2877 | ||
| bd434cc4 JM |
2878 | 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com> |
| 2879 | ||
| 2880 | * bpf-opc.c: Regenerate. | |
| 2881 | ||
| aeab2b26 JB |
2882 | 2020-01-30 Jan Beulich <jbeulich@suse.com> |
| 2883 | ||
| 2884 | * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators. | |
| 2885 | (dis386): Use them to replace C2/C3 table entries. | |
| 2886 | (x86_64_table): Add X86_64_C2 and X86_64_C3 entries. | |
| 2887 | * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64 | |
| 2888 | ones. Use Size64 instead of DefaultSize on Intel64 ones. | |
| 2889 | * i386-tbl.h: Re-generate. | |
| 2890 | ||
| 62b3f548 JB |
2891 | 2020-01-30 Jan Beulich <jbeulich@suse.com> |
| 2892 | ||
| 2893 | * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword | |
| 2894 | forms. | |
| 2895 | (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop | |
| 2896 | DefaultSize. | |
| 2897 | * i386-tbl.h: Re-generate. | |
| 2898 | ||
| 1bd8ae10 AM |
2899 | 2020-01-30 Alan Modra <amodra@gmail.com> |
| 2900 | ||
| 2901 | * tic4x-dis.c (tic4x_dp): Make unsigned. | |
| 2902 | ||
| bc31405e L |
2903 | 2020-01-27 H.J. Lu <hongjiu.lu@intel.com> |
| 2904 | Jan Beulich <jbeulich@suse.com> | |
| 2905 | ||
| 2906 | PR binutils/25445 | |
| 2907 | * i386-dis.c (MOVSXD_Fixup): New function. | |
| 2908 | (movsxd_mode): New enum. | |
| 2909 | (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd. | |
| 2910 | (intel_operand_size): Handle movsxd_mode. | |
| 2911 | (OP_E_register): Likewise. | |
| 2912 | (OP_G): Likewise. | |
| 2913 | * i386-opc.tbl: Remove Rex64 and allow 32-bit destination | |
| 2914 | register on movsxd. Add movsxd with 16-bit destination register | |
| 2915 | for AMD64 and Intel64 ISAs. | |
| 2916 | * i386-tbl.h: Regenerated. | |
| 2917 | ||
| 7568c93b TC |
2918 | 2020-01-27 Tamar Christina <tamar.christina@arm.com> |
| 2919 | ||
| 2920 | PR 25403 | |
| 2921 | * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv. | |
| 2922 | * aarch64-asm-2.c: Regenerate | |
| 2923 | * aarch64-dis-2.c: Likewise. | |
| 2924 | * aarch64-opc-2.c: Likewise. | |
| 2925 | ||
| c006a730 JB |
2926 | 2020-01-21 Jan Beulich <jbeulich@suse.com> |
| 2927 | ||
| 2928 | * i386-opc.tbl (sysret): Drop DefaultSize. | |
| 2929 | * i386-tbl.h: Re-generate. | |
| 2930 | ||
| c906a69a JB |
2931 | 2020-01-21 Jan Beulich <jbeulich@suse.com> |
| 2932 | ||
| 2933 | * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and | |
| 2934 | Dword. | |
| 2935 | (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword. | |
| 2936 | * i386-tbl.h: Re-generate. | |
| 2937 | ||
| 26916852 NC |
2938 | 2020-01-20 Nick Clifton <nickc@redhat.com> |
| 2939 | ||
| 2940 | * po/de.po: Updated German translation. | |
| 2941 | * po/pt_BR.po: Updated Brazilian Portuguese translation. | |
| 2942 | * po/uk.po: Updated Ukranian translation. | |
| 2943 | ||
| 4d6cbb64 AM |
2944 | 2020-01-20 Alan Modra <amodra@gmail.com> |
| 2945 | ||
| 2946 | * hppa-dis.c (fput_const): Remove useless cast. | |
| 2947 | ||
| 2bddb71a AM |
2948 | 2020-01-20 Alan Modra <amodra@gmail.com> |
| 2949 | ||
| 2950 | * arm-dis.c (print_insn_arm): Wrap 'T' value. | |
| 2951 | ||
| 1b1bb2c6 NC |
2952 | 2020-01-18 Nick Clifton <nickc@redhat.com> |
| 2953 | ||
| 2954 | * configure: Regenerate. | |
| 2955 | * po/opcodes.pot: Regenerate. | |
| 2956 | ||
| ae774686 NC |
2957 | 2020-01-18 Nick Clifton <nickc@redhat.com> |
| 2958 | ||
| 2959 | Binutils 2.34 branch created. | |
| 2960 | ||
| 07f1f3aa CB |
2961 | 2020-01-17 Christian Biesinger <cbiesinger@google.com> |
| 2962 | ||
| 2963 | * opintl.h: Fix spelling error (seperate). | |
| 2964 | ||
| 42e04b36 L |
2965 | 2020-01-17 H.J. Lu <hongjiu.lu@intel.com> |
| 2966 | ||
| 2967 | * i386-opc.tbl: Add {vex} pseudo prefix. | |
| 2968 | * i386-tbl.h: Regenerated. | |
| 2969 | ||
| 2da2eaf4 AV |
2970 | 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> |
| 2971 | ||
| 2972 | PR 25376 | |
| 0be2fe67 | 2973 | * arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits. |
| 2da2eaf4 AV |
2974 | (neon_opcodes): Likewise. |
| 2975 | (select_arm_features): Make sure we enable MVE bits when selecting | |
| 2976 | armv8.1-m.main. Make sure we do not enable MVE bits when not selecting | |
| 2977 | any architecture. | |
| 2978 | ||
| d0849eed JB |
2979 | 2020-01-16 Jan Beulich <jbeulich@suse.com> |
| 2980 | ||
| 2981 | * i386-opc.tbl: Drop stale comment from XOP section. | |
| 2982 | ||
| 9cf70a44 JB |
2983 | 2020-01-16 Jan Beulich <jbeulich@suse.com> |
| 2984 | ||
| 2985 | * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms. | |
| 2986 | (extractps): Add VexWIG to SSE2AVX forms. | |
| 2987 | * i386-tbl.h: Re-generate. | |
| 2988 | ||
| 4814632e JB |
2989 | 2020-01-16 Jan Beulich <jbeulich@suse.com> |
| 2990 | ||
| 2991 | * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop | |
| 2992 | Size64 from and use VexW1 on SSE2AVX forms. | |
| 2993 | (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from | |
| 2994 | VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1. | |
| 2995 | * i386-tbl.h: Re-generate. | |
| 2996 | ||
| aad09917 AM |
2997 | 2020-01-15 Alan Modra <amodra@gmail.com> |
| 2998 | ||
| 2999 | * tic4x-dis.c (tic4x_version): Make unsigned long. | |
| 3000 | (optab, optab_special, registernames): New file scope vars. | |
| 3001 | (tic4x_print_register): Set up registernames rather than | |
| 3002 | malloc'd registertable. | |
| 3003 | (tic4x_disassemble): Delete optable and optable_special. Use | |
| 3004 | optab and optab_special instead. Throw away old optab, | |
| 3005 | optab_special and registernames when info->mach changes. | |
| 3006 | ||
| 7a6bf3be SB |
3007 | 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com> |
| 3008 | ||
| 3009 | PR 25377 | |
| 3010 | * z80-dis.c (suffix): Use .db instruction to generate double | |
| 3011 | prefix. | |
| 3012 | ||
| ca1eaac0 AM |
3013 | 2020-01-14 Alan Modra <amodra@gmail.com> |
| 3014 | ||
| 3015 | * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short | |
| 3016 | values to unsigned before shifting. | |
| 3017 | ||
| 1d67fe3b TT |
3018 | 2020-01-13 Thomas Troeger <tstroege@gmx.de> |
| 3019 | ||
| 3020 | * arm-dis.c (print_insn_arm): Fill in insn info fields for control | |
| 3021 | flow instructions. | |
| 3022 | (print_insn_thumb16, print_insn_thumb32): Likewise. | |
| 3023 | (print_insn): Initialize the insn info. | |
| 3024 | * i386-dis.c (print_insn): Initialize the insn info fields, and | |
| 3025 | detect jumps. | |
| 3026 | ||
| 0be2fe67 | 3027 | 2020-01-13 Claudiu Zissulescu <claziss@gmail.com> |
| 5e4f7e05 CZ |
3028 | |
| 3029 | * arc-opc.c (C_NE): Make it required. | |
| 3030 | ||
| 0be2fe67 | 3031 | 2020-01-13 Claudiu Zissulescu <claziss@gmail.com> |
| b9fe6b8a | 3032 | |
| 0be2fe67 | 3033 | * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo |
| b9fe6b8a CZ |
3034 | reserved register name. |
| 3035 | ||
| 90dee485 AM |
3036 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3037 | ||
| 3038 | * ns32k-dis.c (Is_gen): Use strchr, add 'f'. | |
| 3039 | (print_insn_ns32k): Adjust ioffset for 'f' index_offset. | |
| 3040 | ||
| febda64f AM |
3041 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3042 | ||
| 3043 | * wasm32-dis.c (print_insn_wasm32): Localise variables. Store | |
| 3044 | result of wasm_read_leb128 in a uint64_t and check that bits | |
| 3045 | are not lost when copying to other locals. Use uint32_t for | |
| 3046 | most locals. Use PRId64 when printing int64_t. | |
| 3047 | ||
| df08b588 AM |
3048 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3049 | ||
| 3050 | * score-dis.c: Formatting. | |
| 3051 | * score7-dis.c: Formatting. | |
| 3052 | ||
| b2c759ce AM |
3053 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3054 | ||
| 3055 | * score-dis.c (print_insn_score48): Use unsigned variables for | |
| 3056 | unsigned values. Don't left shift negative values. | |
| 3057 | (print_insn_score32): Likewise. | |
| 3058 | * score7-dis.c (print_insn_score32, print_insn_score16): Likewise. | |
| 3059 | ||
| 5496abe1 AM |
3060 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3061 | ||
| 3062 | * tic4x-dis.c (tic4x_print_register): Remove dead code. | |
| 3063 | ||
| 202e762b AM |
3064 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3065 | ||
| 3066 | * fr30-ibld.c: Regenerate. | |
| 3067 | ||
| 7ef412cf AM |
3068 | 2020-01-13 Alan Modra <amodra@gmail.com> |
| 3069 | ||
| 3070 | * xgate-dis.c (print_insn): Don't left shift signed value. | |
| 3071 | (ripBits): Formatting, use 1u. | |
| 3072 | ||
| 7f578b95 AM |
3073 | 2020-01-10 Alan Modra <amodra@gmail.com> |
| 3074 | ||
| 3075 | * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned. | |
| 3076 | * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval. | |
| 3077 | ||
| 441af85b AM |
3078 | 2020-01-10 Alan Modra <amodra@gmail.com> |
| 3079 | ||
| 3080 | * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG, | |
| 3081 | and XRREG value earlier to avoid a shift with negative exponent. | |
| 3082 | * m10200-dis.c (disassemble): Similarly. | |
| 3083 | ||
| bce58db4 NC |
3084 | 2020-01-09 Nick Clifton <nickc@redhat.com> |
| 3085 | ||
| 3086 | PR 25224 | |
| 3087 | * z80-dis.c (ld_ii_ii): Use correct cast. | |
| 3088 | ||
| 40c75bc8 SB |
3089 | 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com> |
| 3090 | ||
| 3091 | PR 25224 | |
| 3092 | * z80-dis.c (ld_ii_ii): Use character constant when checking | |
| 3093 | opcode byte value. | |
| 3094 | ||
| d835a58b JB |
3095 | 2020-01-09 Jan Beulich <jbeulich@suse.com> |
| 3096 | ||
| 3097 | * i386-dis.c (SEP_Fixup): New. | |
| 3098 | (SEP): Define. | |
| 3099 | (dis386_twobyte): Use it for sysenter/sysexit. | |
| 3100 | (enum x86_64_isa): Change amd64 enumerator to value 1. | |
| 3101 | (OP_J): Compare isa64 against intel64 instead of amd64. | |
| 3102 | * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64 | |
| 3103 | forms. | |
| 3104 | * i386-tbl.h: Re-generate. | |
| 3105 | ||
| 030a2e78 AM |
3106 | 2020-01-08 Alan Modra <amodra@gmail.com> |
| 3107 | ||
| 3108 | * z8k-dis.c: Include libiberty.h | |
| 3109 | (instr_data_s): Make max_fetched unsigned. | |
| 3110 | (z8k_lookup_instr): Make nibl_index and tabl_index unsigned. | |
| 3111 | Don't exceed byte_info bounds. | |
| 3112 | (output_instr): Make num_bytes unsigned. | |
| 3113 | (unpack_instr): Likewise for nibl_count and loop. | |
| 3114 | * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and | |
| 3115 | idx unsigned. | |
| 3116 | * z8k-opc.h: Regenerate. | |
| 3117 | ||
| bb82aefe SV |
3118 | 2020-01-07 Shahab Vahedi <shahab@synopsys.com> |
| 3119 | ||
| 3120 | * arc-tbl.h (llock): Use 'LLOCK' as class. | |
| 3121 | (llockd): Likewise. | |
| 3122 | (scond): Use 'SCOND' as class. | |
| 3123 | (scondd): Likewise. | |
| 3124 | (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit. | |
| 3125 | (scondd): Likewise. | |
| 3126 | ||
| cc6aa1a6 AM |
3127 | 2020-01-06 Alan Modra <amodra@gmail.com> |
| 3128 | ||
| 3129 | * m32c-ibld.c: Regenerate. | |
| 3130 | ||
| 660e62b1 AM |
3131 | 2020-01-06 Alan Modra <amodra@gmail.com> |
| 3132 | ||
| 3133 | PR 25344 | |
| 3134 | * z80-dis.c (suffix): Don't use a local struct buffer copy. | |
| 3135 | Peek at next byte to prevent recursion on repeated prefix bytes. | |
| 3136 | Ensure uninitialised "mybuf" is not accessed. | |
| 3137 | (print_insn_z80): Don't zero n_fetch and n_used here,.. | |
| 3138 | (print_insn_z80_buf): ..do it here instead. | |
| 3139 | ||
| c9ae58fe AM |
3140 | 2020-01-04 Alan Modra <amodra@gmail.com> |
| 3141 | ||
| 3142 | * m32r-ibld.c: Regenerate. | |
| 3143 | ||
| 5f57d4ec AM |
3144 | 2020-01-04 Alan Modra <amodra@gmail.com> |
| 3145 | ||
| 3146 | * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value. | |
| 3147 | ||
| 2c5c1196 AM |
3148 | 2020-01-04 Alan Modra <amodra@gmail.com> |
| 3149 | ||
| 3150 | * crx-dis.c (match_opcode): Avoid shift left of signed value. | |
| 3151 | ||
| 2e98c6c5 AM |
3152 | 2020-01-04 Alan Modra <amodra@gmail.com> |
| 3153 | ||
| 3154 | * d30v-dis.c (print_insn): Avoid signed overflow in left shift. | |
| 3155 | ||
| 567dfba2 JB |
3156 | 2020-01-03 Jan Beulich <jbeulich@suse.com> |
| 3157 | ||
| 5437a02a JB |
3158 | * aarch64-tbl.h (aarch64_opcode_table): Use |
| 3159 | SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}. | |
| 3160 | ||
| 3161 | 2020-01-03 Jan Beulich <jbeulich@suse.com> | |
| 3162 | ||
| 3163 | * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD | |
| 567dfba2 JB |
3164 | forms of SUDOT and USDOT. |
| 3165 | ||
| 8c45011a JB |
3166 | 2020-01-03 Jan Beulich <jbeulich@suse.com> |
| 3167 | ||
| 5437a02a | 3168 | * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from |
| 8c45011a | 3169 | uzip{1,2}. |
| 0be2fe67 | 3170 | * aarch64-dis-2.c: Re-generate. |
| 8c45011a | 3171 | |
| f4950f76 JB |
3172 | 2020-01-03 Jan Beulich <jbeulich@suse.com> |
| 3173 | ||
| 5437a02a | 3174 | * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit |
| f4950f76 | 3175 | FMMLA encoding. |
| 0be2fe67 | 3176 | * aarch64-dis-2.c: Re-generate. |
| f4950f76 | 3177 | |
| 6655dba2 SB |
3178 | 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com> |
| 3179 | ||
| 3180 | * z80-dis.c: Add support for eZ80 and Z80 instructions. | |
| 3181 | ||
| b14ce8bf AM |
3182 | 2020-01-01 Alan Modra <amodra@gmail.com> |
| 3183 | ||
| 3184 | Update year range in copyright notice of all files. | |
| 3185 | ||
| 0b114740 | 3186 | For older changes see ChangeLog-2019 |
| 3499769a | 3187 | \f |
| 0b114740 | 3188 | Copyright (C) 2020 Free Software Foundation, Inc. |
| 3499769a AM |
3189 | |
| 3190 | Copying and distribution of this file, with or without modification, | |
| 3191 | are permitted in any medium without royalty provided the copyright | |
| 3192 | notice and this notice are preserved. | |
| 3193 | ||
| 3194 | Local Variables: | |
| 3195 | mode: change-log | |
| 3196 | left-margin: 8 | |
| 3197 | fill-column: 74 | |
| 3198 | version-control: never | |
| 3199 | End: |