projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| dec0624d MR |
1 | 2011-08-09 Chao-ying Fu <fu@mips.com> |
| 2 | Maciej W. Rozycki <macro@codesourcery.com> | |
| 3 | ||
| 4 | * mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2" | |
| 5 | and "mips64r2". | |
| 6 | (print_insn_args, print_insn_micromips): Handle MCU. | |
| 7 | * micromips-opc.c (MC): New macro. | |
| 8 | (micromips_opcodes): Add "aclr", "aset" and "iret". | |
| 9 | * mips-opc.c (MC): New macro. | |
| 10 | (mips_builtin_opcodes): Add "aclr", "aset" and "iret". | |
| 11 | ||
| 2b0c8b40 MR |
12 | 2011-08-09 Maciej W. Rozycki <macro@codesourcery.com> |
| 13 | ||
| 14 | * micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros. | |
| 15 | (MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise. | |
| 16 | (MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise. | |
| 17 | (WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros. | |
| 18 | (RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise. | |
| 19 | (RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise. | |
| 20 | (WR_s): Update macro. | |
| 21 | (micromips_opcodes): Update register use flags of: "addiu", | |
| 22 | "addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu", | |
| 23 | "and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j", | |
| 24 | "jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li", | |
| 25 | "lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not", | |
| 26 | "nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw", | |
| 27 | "swm" and "xor" instructions. | |
| 28 | ||
| ea783ef3 DM |
29 | 2011-08-05 David S. Miller <davem@davemloft.net> |
| 30 | ||
| 31 | * sparc-dis.c (v9a_ast_reg_names): Add "cps". | |
| 32 | (X_RS3): New macro. | |
| 33 | (print_insn_sparc): Handle '4', '5', and '(' format codes. | |
| 34 | Accept %asr numbers below 28. | |
| 35 | * sparc-opc.c (sparc_opcodes): Add entries for HPC and VIS3 | |
| 36 | instructions. | |
| 37 | ||
| 3929df09 QN |
38 | 2011-08-02 Quentin Neill <quentin.neill@amd.com> |
| 39 | ||
| 40 | * i386-dis.c (xop_table): Remove spurious bextr insn. | |
| 41 | ||
| d7921315 L |
42 | 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> |
| 43 | ||
| 44 | PR ld/13048 | |
| 45 | * i386-dis.c (print_insn): Optimize info->mach check. | |
| 46 | ||
| 00f51a41 L |
47 | 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> |
| 48 | ||
| 49 | PR gas/13046 | |
| 50 | * i386-opc.tbl: Add Disp32S to 64bit call. | |
| 51 | * i386-tbl.h: Regenerated. | |
| 52 | ||
| df58fc94 RS |
53 | 2011-07-24 Chao-ying Fu <fu@mips.com> |
| 54 | Maciej W. Rozycki <macro@codesourcery.com> | |
| 55 | ||
| 56 | * micromips-opc.c: New file. | |
| 57 | * mips-dis.c (micromips_to_32_reg_b_map): New array. | |
| 58 | (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. | |
| 59 | (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. | |
| 60 | (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. | |
| 61 | (micromips_to_32_reg_q_map): Likewise. | |
| 62 | (micromips_imm_b_map, micromips_imm_c_map): Likewise. | |
| 63 | (micromips_ase): New variable. | |
| 64 | (is_micromips): New function. | |
| 65 | (set_default_mips_dis_options): Handle microMIPS ASE. | |
| 66 | (print_insn_micromips): New function. | |
| 67 | (is_compressed_mode_p): Likewise. | |
| 68 | (_print_insn_mips): Handle microMIPS instructions. | |
| 69 | * Makefile.am (CFILES): Add micromips-opc.c. | |
| 70 | * configure.in (bfd_mips_arch): Add micromips-opc.lo. | |
| 71 | * Makefile.in: Regenerate. | |
| 72 | * configure: Regenerate. | |
| 73 | ||
| 74 | * mips-dis.c (micromips_to_32_reg_h_map): New variable. | |
| 75 | (micromips_to_32_reg_i_map): Likewise. | |
| 76 | (micromips_to_32_reg_m_map): Likewise. | |
| 77 | (micromips_to_32_reg_n_map): New macro. | |
| 78 | ||
| bcd530a7 RS |
79 | 2011-07-24 Maciej W. Rozycki <macro@codesourcery.com> |
| 80 | ||
| 81 | * mips-opc.c (NODS): New macro. | |
| 82 | (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. | |
| 83 | (DSP_VOLA): Likewise. | |
| 84 | (mips_builtin_opcodes): Add NODS annotation to "deret" and | |
| 85 | "eret". Replace INSN_SYNC with NODS throughout. Use NODS in | |
| 86 | place of TRAP for "wait", "waiti" and "yield". | |
| 87 | * mips16-opc.c (NODS): New macro. | |
| 88 | (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. | |
| 89 | (mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc", | |
| 90 | "restore" and "save". | |
| 91 | ||
| 7a9068fe L |
92 | 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> |
| 93 | ||
| 94 | * configure.in: Handle bfd_k1om_arch. | |
| 95 | * configure: Regenerated. | |
| 96 | ||
| 97 | * disassemble.c (disassembler): Handle bfd_k1om_arch. | |
| 98 | ||
| 99 | * i386-dis.c (print_insn): Handle bfd_mach_k1om and | |
| 100 | bfd_mach_k1om_intel_syntax. | |
| 101 | ||
| 102 | * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to | |
| 103 | ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. | |
| 104 | (cpu_flags): Add CpuK1OM. | |
| 105 | ||
| 106 | * i386-opc.h (CpuK1OM): New. | |
| 107 | (i386_cpu_flags): Add cpuk1om. | |
| 108 | ||
| 109 | * i386-init.h: Regenerated. | |
| 110 | * i386-tbl.h: Likewise. | |
| 111 | ||
| 1b93226d NC |
112 | 2011-07-12 Nick Clifton <nickc@redhat.com> |
| 113 | ||
| 114 | * arm-dis.c (print_insn_arm): Revert previous, undocumented, | |
| 115 | accidental change. | |
| 116 | ||
| 5d73b1f1 NC |
117 | 2011-07-01 Nick Clifton <nickc@redhat.com> |
| 118 | ||
| 119 | PR binutils/12329 | |
| 120 | * avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM | |
| 121 | insns using post-increment addressing. | |
| 122 | ||
| 182ae480 L |
123 | 2011-06-30 H.J. Lu <hongjiu.lu@intel.com> |
| 124 | ||
| 125 | * i386-dis.c (vex_len_table): Update rorxS. | |
| 126 | ||
| 4cb0953d L |
127 | 2011-06-30 H.J. Lu <hongjiu.lu@intel.com> |
| 128 | ||
| 129 | AVX Programming Reference (June, 2011) | |
| 130 | * i386-dis.c (vex_len_table): Correct rorxS. | |
| 131 | ||
| 132 | * i386-opc.tbl: Correct rorx. | |
| 133 | * i386-tbl.h: Regenerated. | |
| 134 | ||
| 906efcbc L |
135 | 2011-06-29 H.J. Lu <hongjiu.lu@intel.com> |
| 136 | ||
| 137 | * tilegx-opc.c (find_opcode): Replace "index" with "i". | |
| 138 | * tilepro-opc.c (find_opcode): Likewise. | |
| 139 | ||
| ceb94aa5 RS |
140 | 2011-06-29 Richard Sandiford <rdsandiford@googlemail.com> |
| 141 | ||
| 142 | * mips16-opc.c (jalrc, jrc): Move earlier in file. | |
| 143 | ||
| f7002f42 L |
144 | 2011-06-21 H.J. Lu <hongjiu.lu@intel.com> |
| 145 | ||
| 146 | * i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and | |
| 147 | PREFIX_VEX_0F388E. | |
| 148 | ||
| 56300268 AS |
149 | 2011-06-17 Andreas Schwab <schwab@redhat.com> |
| 150 | ||
| 151 | * Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ... | |
| 152 | (MOSTLYCLEANFILES): ... here. | |
| 153 | * Makefile.in: Regenerate. | |
| 154 | ||
| bcf2cf9f AM |
155 | 2011-06-14 Alan Modra <amodra@gmail.com> |
| 156 | ||
| 157 | * Makefile.in: Regenerate. | |
| 158 | ||
| aa137e4d NC |
159 | 2011-06-13 Walter Lee <walt@tilera.com> |
| 160 | ||
| 161 | * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, | |
| 162 | tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. | |
| 163 | * Makefile.in: Regenerate. | |
| 164 | * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. | |
| 165 | * configure: Regenerate. | |
| 166 | * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. | |
| 167 | * po/POTFILES.in: Regenerate. | |
| 168 | * tilegx-dis.c: New file. | |
| 169 | * tilegx-opc.c: New file. | |
| 170 | * tilepro-dis.c: New file. | |
| 171 | * tilepro-opc.c: New file. | |
| 172 | ||
| 6c30d220 L |
173 | 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> |
| 174 | ||
| 175 | AVX Programming Reference (June, 2011) | |
| 176 | * i386-dis.c (XMGatherQ): New. | |
| 177 | * i386-dis.c (EXxmm_mb): New. | |
| 178 | (EXxmm_mb): Likewise. | |
| 179 | (EXxmm_mw): Likewise. | |
| 180 | (EXxmm_md): Likewise. | |
| 181 | (EXxmm_mq): Likewise. | |
| 182 | (EXxmmdw): Likewise. | |
| 183 | (EXxmmqd): Likewise. | |
| 184 | (VexGatherQ): Likewise. | |
| 185 | (MVexVSIBDWpX): Likewise. | |
| 186 | (MVexVSIBQWpX): Likewise. | |
| 187 | (xmm_mb_mode): Likewise. | |
| 188 | (xmm_mw_mode): Likewise. | |
| 189 | (xmm_md_mode): Likewise. | |
| 190 | (xmm_mq_mode): Likewise. | |
| 191 | (xmmdw_mode): Likewise. | |
| 192 | (xmmqd_mode): Likewise. | |
| 193 | (ymmxmm_mode): Likewise. | |
| 194 | (vex_vsib_d_w_dq_mode): Likewise. | |
| 195 | (vex_vsib_q_w_dq_mode): Likewise. | |
| 196 | (MOD_VEX_0F385A_PREFIX_2): Likewise. | |
| 197 | (MOD_VEX_0F388C_PREFIX_2): Likewise. | |
| 198 | (MOD_VEX_0F388E_PREFIX_2): Likewise. | |
| 199 | (PREFIX_0F3882): Likewise. | |
| 200 | (PREFIX_VEX_0F3816): Likewise. | |
| 201 | (PREFIX_VEX_0F3836): Likewise. | |
| 202 | (PREFIX_VEX_0F3845): Likewise. | |
| 203 | (PREFIX_VEX_0F3846): Likewise. | |
| 204 | (PREFIX_VEX_0F3847): Likewise. | |
| 205 | (PREFIX_VEX_0F3858): Likewise. | |
| 206 | (PREFIX_VEX_0F3859): Likewise. | |
| 207 | (PREFIX_VEX_0F385A): Likewise. | |
| 208 | (PREFIX_VEX_0F3878): Likewise. | |
| 209 | (PREFIX_VEX_0F3879): Likewise. | |
| 210 | (PREFIX_VEX_0F388C): Likewise. | |
| 211 | (PREFIX_VEX_0F388E): Likewise. | |
| 212 | (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise. | |
| 213 | (PREFIX_VEX_0F38F5): Likewise. | |
| 214 | (PREFIX_VEX_0F38F6): Likewise. | |
| 215 | (PREFIX_VEX_0F3A00): Likewise. | |
| 216 | (PREFIX_VEX_0F3A01): Likewise. | |
| 217 | (PREFIX_VEX_0F3A02): Likewise. | |
| 218 | (PREFIX_VEX_0F3A38): Likewise. | |
| 219 | (PREFIX_VEX_0F3A39): Likewise. | |
| 220 | (PREFIX_VEX_0F3A46): Likewise. | |
| 221 | (PREFIX_VEX_0F3AF0): Likewise. | |
| 222 | (VEX_LEN_0F3816_P_2): Likewise. | |
| 223 | (VEX_LEN_0F3819_P_2): Likewise. | |
| 224 | (VEX_LEN_0F3836_P_2): Likewise. | |
| 225 | (VEX_LEN_0F385A_P_2_M_0): Likewise. | |
| 226 | (VEX_LEN_0F38F5_P_0): Likewise. | |
| 227 | (VEX_LEN_0F38F5_P_1): Likewise. | |
| 228 | (VEX_LEN_0F38F5_P_3): Likewise. | |
| 229 | (VEX_LEN_0F38F6_P_3): Likewise. | |
| 230 | (VEX_LEN_0F38F7_P_1): Likewise. | |
| 231 | (VEX_LEN_0F38F7_P_2): Likewise. | |
| 232 | (VEX_LEN_0F38F7_P_3): Likewise. | |
| 233 | (VEX_LEN_0F3A00_P_2): Likewise. | |
| 234 | (VEX_LEN_0F3A01_P_2): Likewise. | |
| 235 | (VEX_LEN_0F3A38_P_2): Likewise. | |
| 236 | (VEX_LEN_0F3A39_P_2): Likewise. | |
| 237 | (VEX_LEN_0F3A46_P_2): Likewise. | |
| 238 | (VEX_LEN_0F3AF0_P_3): Likewise. | |
| 239 | (VEX_W_0F3816_P_2): Likewise. | |
| 240 | (VEX_W_0F3818_P_2): Likewise. | |
| 241 | (VEX_W_0F3819_P_2): Likewise. | |
| 242 | (VEX_W_0F3836_P_2): Likewise. | |
| 243 | (VEX_W_0F3846_P_2): Likewise. | |
| 244 | (VEX_W_0F3858_P_2): Likewise. | |
| 245 | (VEX_W_0F3859_P_2): Likewise. | |
| 246 | (VEX_W_0F385A_P_2_M_0): Likewise. | |
| 247 | (VEX_W_0F3878_P_2): Likewise. | |
| 248 | (VEX_W_0F3879_P_2): Likewise. | |
| 249 | (VEX_W_0F3A00_P_2): Likewise. | |
| 250 | (VEX_W_0F3A01_P_2): Likewise. | |
| 251 | (VEX_W_0F3A02_P_2): Likewise. | |
| 252 | (VEX_W_0F3A38_P_2): Likewise. | |
| 253 | (VEX_W_0F3A39_P_2): Likewise. | |
| 254 | (VEX_W_0F3A46_P_2): Likewise. | |
| 255 | (MOD_VEX_0F3818_PREFIX_2): Removed. | |
| 256 | (MOD_VEX_0F3819_PREFIX_2): Likewise. | |
| 257 | (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise. | |
| 258 | (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise. | |
| 259 | (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise. | |
| 260 | (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise. | |
| 261 | (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise. | |
| 262 | (VEX_LEN_0F3A0E_P_2): Likewise. | |
| 263 | (VEX_LEN_0F3A0F_P_2): Likewise. | |
| 264 | (VEX_LEN_0F3A42_P_2): Likewise. | |
| 265 | (VEX_LEN_0F3A4C_P_2): Likewise. | |
| 266 | (VEX_W_0F3818_P_2_M_0): Likewise. | |
| 267 | (VEX_W_0F3819_P_2_M_0): Likewise. | |
| 268 | (prefix_table): Updated. | |
| 269 | (three_byte_table): Likewise. | |
| 270 | (vex_table): Likewise. | |
| 271 | (vex_len_table): Likewise. | |
| 272 | (vex_w_table): Likewise. | |
| 273 | (mod_table): Likewise. | |
| 274 | (putop): Handle "LW". | |
| 275 | (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode, | |
| 276 | xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode, | |
| 277 | vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode. | |
| 278 | (OP_EX): Likewise. | |
| 279 | (OP_E_memory): Handle vex_vsib_d_w_dq_mode and | |
| 280 | vex_vsib_q_w_dq_mode. | |
| 281 | (OP_XMM): Handle vex_vsib_q_w_dq_mode. | |
| 282 | (OP_VEX): Likewise. | |
| 283 | ||
| 284 | * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS | |
| 285 | and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS, | |
| 286 | CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS. | |
| 287 | (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID. | |
| 288 | (opcode_modifiers): Add VecSIB. | |
| 289 | ||
| 290 | * i386-opc.h (CpuAVX2): New. | |
| 291 | (CpuBMI2): Likewise. | |
| 292 | (CpuLZCNT): Likewise. | |
| 293 | (CpuINVPCID): Likewise. | |
| 294 | (VecSIB128): Likewise. | |
| 295 | (VecSIB256): Likewise. | |
| 296 | (VecSIB): Likewise. | |
| 297 | (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid. | |
| 298 | (i386_opcode_modifier): Add vecsib. | |
| 299 | ||
| 300 | * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions. | |
| 301 | * i386-init.h: Regenerated. | |
| 302 | * i386-tbl.h: Likewise. | |
| 303 | ||
| d535accd QN |
304 | 2011-06-03 Quentin Neill <quentin.neill@amd.com> |
| 305 | ||
| 306 | * i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS. | |
| 307 | * i386-init.h: Regenerated. | |
| 308 | ||
| f8b960bc NC |
309 | 2011-06-03 Nick Clifton <nickc@redhat.com> |
| 310 | ||
| 311 | PR binutils/12752 | |
| 312 | * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for | |
| 313 | computing address offsets. | |
| 314 | (print_arm_address): Likewise. | |
| 315 | (print_insn_arm): Likewise. | |
| 316 | (print_insn_thumb16): Likewise. | |
| 317 | (print_insn_thumb32): Likewise. | |
| 318 | ||
| 26d97720 NS |
319 | 2011-06-02 Jie Zhang <jie@codesourcery.com> |
| 320 | Nathan Sidwell <nathan@codesourcery.com> | |
| 321 | Maciej Rozycki <macro@codesourcery.com> | |
| 322 | ||
| 323 | * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 | |
| 324 | as address offset. | |
| 325 | (print_arm_address): Likewise. Elide positive #0 appropriately. | |
| 326 | (print_insn_arm): Likewise. | |
| 327 | ||
| f8b960bc NC |
328 | 2011-06-02 Nick Clifton <nickc@redhat.com> |
| 329 | ||
| 330 | PR gas/12752 | |
| 331 | * arm-dis.c (print_insn_thumb32): Do not sign extend addresses | |
| 332 | passed to print_address_func. | |
| 333 | ||
| cc643b88 NC |
334 | 2011-06-02 Nick Clifton <nickc@redhat.com> |
| 335 | ||
| 336 | * arm-dis.c: Fix spelling mistakes. | |
| 337 | * op/opcodes.pot: Regenerate. | |
| 338 | ||
| c8fa16ed AK |
339 | 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
| 340 | ||
| 341 | * s390-opc.c: Replace S390_OPERAND_REG_EVEN with | |
| 342 | S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type. | |
| 343 | * s390-opc.txt: Fix cxr instruction type. | |
| 344 | ||
| 5e4b319c AK |
345 | 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
| 346 | ||
| 347 | * s390-opc.c: Add new instruction types marking register pair | |
| 348 | operands. | |
| 349 | * s390-opc.txt: Match instructions having register pair operands | |
| 350 | to the new instruction types. | |
| 351 | ||
| fda544a2 NC |
352 | 2011-05-19 Nick Clifton <nickc@redhat.com> |
| 353 | ||
| 354 | * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2 | |
| 355 | operands. | |
| 356 | ||
| 4cab4add QN |
357 | 2011-05-10 Quentin Neill <quentin.neill@amd.com> |
| 358 | ||
| 359 | * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS. | |
| 360 | * i386-init.h: Regenerated. | |
| 361 | ||
| b4e7b885 NC |
362 | 2011-04-27 Nick Clifton <nickc@redhat.com> |
| 363 | ||
| 364 | * po/da.po: Updated Danish translation. | |
| 365 | ||
| 2f7f7710 AM |
366 | 2011-04-26 Anton Blanchard <anton@samba.org> |
| 367 | ||
| 368 | * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7. | |
| 369 | ||
| 9887672f DD |
370 | 2011-04-21 DJ Delorie <dj@redhat.com> |
| 371 | ||
| 372 | * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs. | |
| 373 | * rx-decode.c: Regenerate. | |
| 374 | ||
| 3251b375 L |
375 | 2011-04-20 H.J. Lu <hongjiu.lu@intel.com> |
| 376 | ||
| 377 | * i386-init.h: Regenerated. | |
| 378 | ||
| b13a3ca6 QN |
379 | 2011-04-19 Quentin Neill <quentin.neill@amd.com> |
| 380 | ||
| 381 | * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits | |
| 382 | from bdver1 flags. | |
| 383 | ||
| 7d063384 NC |
384 | 2011-04-13 Nick Clifton <nickc@redhat.com> |
| 385 | ||
| 386 | * v850-dis.c (disassemble): Always print a closing square brace if | |
| 387 | an opening square brace was printed. | |
| 388 | ||
| 32a94698 NC |
389 | 2011-04-12 Nick Clifton <nickc@redhat.com> |
| 390 | ||
| 391 | PR binutils/12534 | |
| 392 | * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn | |
| 393 | patterns. | |
| 394 | (print_insn_thumb32): Handle %L. | |
| 395 | ||
| d2cd1205 JB |
396 | 2011-04-11 Julian Brown <julian@codesourcery.com> |
| 397 | ||
| 398 | * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. | |
| 399 | (print_insn_thumb32): Add APSR bitmask support. | |
| 400 | ||
| 1fbaefec PB |
401 | 2011-04-07 Paul Carroll<pcarroll@codesourcery.com> |
| 402 | ||
| 403 | * arm-dis.c (print_insn): init vars moved into private_data structure. | |
| 404 | ||
| 67171547 MF |
405 | 2011-03-24 Mike Frysinger <vapier@gentoo.org> |
| 406 | ||
| 407 | * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic. | |
| 408 | ||
| 8cc66334 EW |
409 | 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> |
| 410 | ||
| 411 | * avr-dis.c (avr_operand): Add opcode_str parameter. Check for | |
| 412 | post-increment to support LPM Z+ instruction. Add support for 'E' | |
| 413 | constraint for DES instruction. | |
| 414 | (print_insn_avr): Adjust calls to avr_operand. Rename variable. | |
| 415 | ||
| 34e77a92 RS |
416 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
| 417 | ||
| 418 | * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. | |
| 419 | ||
| 35fc36a8 RS |
420 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
| 421 | ||
| 422 | * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. | |
| 423 | Use branch types instead. | |
| 424 | (print_insn): Likewise. | |
| 425 | ||
| 0067d8fc MR |
426 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
| 427 | ||
| 428 | * mips-opc.c (mips_builtin_opcodes): Correct register use | |
| 429 | annotation of "alnv.ps". | |
| 430 | ||
| 3eebd5eb MR |
431 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
| 432 | ||
| 433 | * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. | |
| 434 | ||
| 500cccad MF |
435 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
| 436 | ||
| 437 | * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. | |
| 438 | ||
| f5caf9f4 MF |
439 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
| 440 | ||
| 441 | * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. | |
| 442 | ||
| e5bc4265 MF |
443 | 2011-02-19 Mike Frysinger <vapier@gentoo.org> |
| 444 | ||
| 445 | * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and | |
| 446 | a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, | |
| 447 | av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, | |
| 448 | exception, end_of_registers, msize, memory, bfd_mach. | |
| 449 | (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, | |
| 450 | LB0REG, LC1REG, LT1REG, LB1REG): Delete | |
| 451 | (AXREG, AWREG, LCREG, LTREG, LBREG): Define. | |
| 452 | (get_allreg): Change to new defines. Fallback to abort(). | |
| 453 | ||
| 602427c4 MF |
454 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 455 | ||
| 456 | * bfin-dis.c: Add whitespace/parenthesis where needed. | |
| 457 | ||
| 298c1ec2 MF |
458 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 459 | ||
| 460 | * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater | |
| 461 | than 7. | |
| 462 | ||
| 822ce8ee RW |
463 | 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 464 | ||
| 465 | * configure: Regenerate. | |
| 466 | ||
| 13c02f06 MF |
467 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 468 | ||
| 469 | * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. | |
| 470 | ||
| 4db66394 MF |
471 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 472 | ||
| 473 | * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output | |
| 474 | dregs only when P is set, and dregs_lo otherwise. | |
| 475 | ||
| 36f44611 MF |
476 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 477 | ||
| 478 | * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. | |
| 479 | ||
| 9805c0a5 MF |
480 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 481 | ||
| 482 | * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. | |
| 483 | ||
| 43a6aa65 MF |
484 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 485 | ||
| 486 | * bfin-dis.c (machine_registers): Delete REG_GP. | |
| 487 | (reg_names): Delete "GP". | |
| 488 | (decode_allregs): Change REG_GP to REG_LASTREG. | |
| 489 | ||
| 26bb3ddd MF |
490 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 491 | ||
| 89c0d58c MR |
492 | * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, |
| 493 | M_IH, M_IU): Delete. | |
| 26bb3ddd | 494 | |
| 69b8ea4a MF |
495 | 2011-02-11 Mike Frysinger <vapier@gentoo.org> |
| 496 | ||
| 497 | * bfin-dis.c (reg_names): Add const. | |
| 498 | (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, | |
| 499 | decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, | |
| 500 | decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, | |
| 501 | decode_counters, decode_allregs): Likewise. | |
| 502 | ||
| 42d5f9c6 MS |
503 | 2011-02-09 Michael Snyder <msnyder@vmware.com> |
| 504 | ||
| 56300268 | 505 | * i386-dis.c (OP_J): Parenthesize expression to prevent |
| 42d5f9c6 MS |
506 | truncated addresses. |
| 507 | (print_insn): Fix indentation off-by-one. | |
| 508 | ||
| 4be0c941 NC |
509 | 2011-02-01 Nick Clifton <nickc@redhat.com> |
| 510 | ||
| 511 | * po/da.po: Updated Danish translation. | |
| 512 | ||
| 6b069ee7 AM |
513 | 2011-01-21 Dave Murphy <davem@devkitpro.org> |
| 514 | ||
| 515 | * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. | |
| 516 | ||
| e3949f17 L |
517 | 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> |
| 518 | ||
| 519 | * i386-dis.c (sIbT): New. | |
| 520 | (b_T_mode): Likewise. | |
| 521 | (dis386): Replace sIb with sIbT on "pushT". | |
| 522 | (x86_64_table): Replace sIb with Ib on "aam" and "aad". | |
| 523 | (OP_sI): Handle b_T_mode. Properly sign-extend byte. | |
| 524 | ||
| 752573b2 JK |
525 | 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com> |
| 526 | ||
| 527 | * i386-init.h: Regenerated. | |
| 528 | * i386-tbl.h: Regenerated | |
| 529 | ||
| 2a2a0f38 QN |
530 | 2011-01-17 Quentin Neill <quentin.neill@amd.com> |
| 531 | ||
| 532 | * i386-dis.c (REG_XOP_TBM_01): New. | |
| 533 | (REG_XOP_TBM_02): New. | |
| 534 | (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. | |
| 535 | (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 | |
| 536 | entries, and add bextr instruction. | |
| 537 | ||
| 538 | * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. | |
| 539 | (cpu_flags): Add CpuTBM. | |
| 540 | ||
| 541 | * i386-opc.h (CpuTBM) New. | |
| 542 | (i386_cpu_flags): Add bit cputbm. | |
| 543 | ||
| 544 | * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, | |
| 545 | blcs, blsfill, blsic, t1mskc, and tzmsk. | |
| 546 | ||
| 90d6ff62 DD |
547 | 2011-01-12 DJ Delorie <dj@redhat.com> |
| 548 | ||
| 549 | * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. | |
| 550 | ||
| c95354ed MX |
551 | 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com> |
| 552 | ||
| 553 | * mips-dis.c (print_insn_args): Adjust the value to print the real | |
| 554 | offset for "+c" argument. | |
| 555 | ||
| f7465604 NC |
556 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
| 557 | ||
| 558 | * po/da.po: Updated Danish translation. | |
| 559 | ||
| 639e30d2 NS |
560 | 2011-01-05 Nathan Sidwell <nathan@codesourcery.com> |
| 561 | ||
| 562 | * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. | |
| 563 | ||
| f12dc422 L |
564 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 565 | ||
| 566 | * i386-dis.c (REG_VEX_38F3): New. | |
| 567 | (PREFIX_0FBC): Likewise. | |
| 568 | (PREFIX_VEX_38F2): Likewise. | |
| 569 | (PREFIX_VEX_38F3_REG_1): Likewise. | |
| 570 | (PREFIX_VEX_38F3_REG_2): Likewise. | |
| 571 | (PREFIX_VEX_38F3_REG_3): Likewise. | |
| 572 | (PREFIX_VEX_38F7): Likewise. | |
| 573 | (VEX_LEN_38F2_P_0): Likewise. | |
| 574 | (VEX_LEN_38F3_R_1_P_0): Likewise. | |
| 575 | (VEX_LEN_38F3_R_2_P_0): Likewise. | |
| 576 | (VEX_LEN_38F3_R_3_P_0): Likewise. | |
| 577 | (VEX_LEN_38F7_P_0): Likewise. | |
| 578 | (dis386_twobyte): Use PREFIX_0FBC. | |
| 579 | (reg_table): Add REG_VEX_38F3. | |
| 580 | (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, | |
| 581 | PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, | |
| 582 | PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. | |
| 583 | (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and | |
| 584 | PREFIX_VEX_38F7. | |
| 585 | (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, | |
| 586 | VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and | |
| 587 | VEX_LEN_38F7_P_0. | |
| 588 | ||
| 589 | * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. | |
| 590 | (cpu_flags): Add CpuBMI. | |
| 591 | ||
| 592 | * i386-opc.h (CpuBMI): New. | |
| 593 | (i386_cpu_flags): Add cpubmi. | |
| 594 | ||
| 595 | * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. | |
| 596 | * i386-init.h: Regenerated. | |
| 597 | * i386-tbl.h: Likewise. | |
| 598 | ||
| cb21baef L |
599 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 600 | ||
| 601 | * i386-dis.c (VexGdq): New. | |
| 602 | (OP_VEX): Handle dq_mode. | |
| 603 | ||
| 0db46eb4 L |
604 | 2011-01-01 H.J. Lu <hongjiu.lu@intel.com> |
| 605 | ||
| 606 | * i386-gen.c (process_copyright): Update copyright to 2011. | |
| 607 | ||
| 9e9e0820 | 608 | For older changes see ChangeLog-2010 |
| 252b5132 RH |
609 | \f |
| 610 | Local Variables: | |
| 2f6d2f85 NC |
611 | mode: change-log |
| 612 | left-margin: 8 | |
| 613 | fill-column: 74 | |
| 252b5132 RH |
614 | version-control: never |
| 615 | End: |