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252b5132 1/* Select disassembly routine for specified architecture.
219d1afa 2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132
RH
43#define ARCH_h8300
44#define ARCH_h8500
45#define ARCH_hppa
5b93d8bb 46#define ARCH_i370
252b5132 47#define ARCH_i386
800eeca4 48#define ARCH_ia64
e729279b
NC
49#define ARCH_ip2k
50#define ARCH_iq2000
84e94c90 51#define ARCH_lm32
e729279b 52#define ARCH_m32c
252b5132 53#define ARCH_m32r
60bcf0fa
NC
54#define ARCH_m68hc11
55#define ARCH_m68hc12
e729279b 56#define ARCH_m68k
252b5132
RH
57#define ARCH_m88k
58#define ARCH_mcore
bd2f2e55 59#define ARCH_mep
a3c62988 60#define ARCH_metag
7ba29e2a 61#define ARCH_microblaze
252b5132 62#define ARCH_mips
3c3bdf30 63#define ARCH_mmix
252b5132
RH
64#define ARCH_mn10200
65#define ARCH_mn10300
59b1530d 66#define ARCH_moxie
d031aafb 67#define ARCH_mt
2469cfa2 68#define ARCH_msp430
35c08157 69#define ARCH_nds32
36591ba1 70#define ARCH_nios2
252b5132 71#define ARCH_ns32k
73589c9d 72#define ARCH_or1k
e135f41b 73#define ARCH_pdp11
1e608f98 74#define ARCH_pj
252b5132 75#define ARCH_powerpc
11146849 76#define ARCH_pru
0bccfb29 77#define ARCH_riscv
252b5132 78#define ARCH_rs6000
99c513f6 79#define ARCH_rl78
c7927a3c 80#define ARCH_rx
a85d7ed0 81#define ARCH_s390
1c0d3aa6 82#define ARCH_score
252b5132
RH
83#define ARCH_sh
84#define ARCH_sparc
e9f53129 85#define ARCH_spu
252b5132 86#define ARCH_tic30
026df7c5 87#define ARCH_tic4x
5c84d377 88#define ARCH_tic54x
40b36596 89#define ARCH_tic6x
252b5132 90#define ARCH_tic80
aa137e4d
NC
91#define ARCH_tilegx
92#define ARCH_tilepro
252b5132
RH
93#define ARCH_v850
94#define ARCH_vax
1945cfa5 95#define ARCH_visium
252b5132 96#define ARCH_w65
62ecb94c 97#define ARCH_wasm32
93fbbb04 98#define ARCH_xstormy16
d70c5fc7 99#define ARCH_xc16x
f6c1a2d5 100#define ARCH_xgate
e0001a05 101#define ARCH_xtensa
3c9b82ba 102#define ARCH_z80
252b5132 103#define ARCH_z8k
d28847ce 104#define INCLUDE_SHMEDIA
252b5132
RH
105#endif
106
49f58d10
JB
107#ifdef ARCH_m32c
108#include "m32c-desc.h"
109#endif
252b5132
RH
110
111disassembler_ftype
b28b8b5e
L
112disassembler (enum bfd_architecture a,
113 bfd_boolean big ATTRIBUTE_UNUSED,
114 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 115 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 116{
252b5132
RH
117 disassembler_ftype disassemble;
118
119 switch (a)
120 {
121 /* If you add a case to this table, also add it to the
122 ARCH_all definition right above this function. */
a06ea964
NC
123#ifdef ARCH_aarch64
124 case bfd_arch_aarch64:
125 disassemble = print_insn_aarch64;
126 break;
127#endif
252b5132
RH
128#ifdef ARCH_alpha
129 case bfd_arch_alpha:
130 disassemble = print_insn_alpha;
131 break;
132#endif
133#ifdef ARCH_arc
134 case bfd_arch_arc:
6ca4eb77
AM
135 disassemble = arc_get_disassembler (abfd);
136 break;
252b5132
RH
137#endif
138#ifdef ARCH_arm
139 case bfd_arch_arm:
003ca0fd 140 if (big)
252b5132
RH
141 disassemble = print_insn_big_arm;
142 else
143 disassemble = print_insn_little_arm;
144 break;
145#endif
adde6300
AM
146#ifdef ARCH_avr
147 case bfd_arch_avr:
148 disassemble = print_insn_avr;
149 break;
150#endif
4b7f6baa
CM
151#ifdef ARCH_bfin
152 case bfd_arch_bfin:
153 disassemble = print_insn_bfin;
154 break;
155#endif
3d3d428f
NC
156#ifdef ARCH_cr16
157 case bfd_arch_cr16:
158 disassemble = print_insn_cr16;
159 break;
160#endif
6c95a37f
HPN
161#ifdef ARCH_cris
162 case bfd_arch_cris:
78966507 163 disassemble = cris_get_disassembler (abfd);
6c95a37f 164 break;
1fe1f39c
NC
165#endif
166#ifdef ARCH_crx
167 case bfd_arch_crx:
168 disassemble = print_insn_crx;
169 break;
6c95a37f 170#endif
252b5132
RH
171#ifdef ARCH_d10v
172 case bfd_arch_d10v:
173 disassemble = print_insn_d10v;
174 break;
175#endif
176#ifdef ARCH_d30v
177 case bfd_arch_d30v:
178 disassemble = print_insn_d30v;
179 break;
180#endif
d172d4ba
NC
181#ifdef ARCH_dlx
182 case bfd_arch_dlx:
183 /* As far as I know we only handle big-endian DLX objects. */
184 disassemble = print_insn_dlx;
185 break;
186#endif
252b5132
RH
187#ifdef ARCH_h8300
188 case bfd_arch_h8300:
003ca0fd 189 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 190 disassemble = print_insn_h8300h;
003ca0fd
YQ
191 else if (mach == bfd_mach_h8300s
192 || mach == bfd_mach_h8300sn
193 || mach == bfd_mach_h8300sx
194 || mach == bfd_mach_h8300sxn)
252b5132 195 disassemble = print_insn_h8300s;
b7ed8fad 196 else
252b5132
RH
197 disassemble = print_insn_h8300;
198 break;
199#endif
200#ifdef ARCH_h8500
201 case bfd_arch_h8500:
202 disassemble = print_insn_h8500;
203 break;
204#endif
205#ifdef ARCH_hppa
206 case bfd_arch_hppa:
207 disassemble = print_insn_hppa;
208 break;
209#endif
5b93d8bb
AM
210#ifdef ARCH_i370
211 case bfd_arch_i370:
212 disassemble = print_insn_i370;
213 break;
214#endif
252b5132
RH
215#ifdef ARCH_i386
216 case bfd_arch_i386:
7b6d09fb 217 case bfd_arch_iamcu:
8a9036a4 218 case bfd_arch_l1om:
7a9068fe 219 case bfd_arch_k1om:
e396998b 220 disassemble = print_insn_i386;
252b5132
RH
221 break;
222#endif
800eeca4
JW
223#ifdef ARCH_ia64
224 case bfd_arch_ia64:
225 disassemble = print_insn_ia64;
226 break;
227#endif
a40cbfa3
NC
228#ifdef ARCH_ip2k
229 case bfd_arch_ip2k:
230 disassemble = print_insn_ip2k;
231 break;
232#endif
cfb8c092
NC
233#ifdef ARCH_epiphany
234 case bfd_arch_epiphany:
235 disassemble = print_insn_epiphany;
236 break;
237#endif
252b5132
RH
238#ifdef ARCH_fr30
239 case bfd_arch_fr30:
240 disassemble = print_insn_fr30;
241 break;
242#endif
84e94c90
NC
243#ifdef ARCH_lm32
244 case bfd_arch_lm32:
245 disassemble = print_insn_lm32;
246 break;
247#endif
252b5132
RH
248#ifdef ARCH_m32r
249 case bfd_arch_m32r:
250 disassemble = print_insn_m32r;
251 break;
252#endif
6927f982
NC
253#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
254 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
255 case bfd_arch_m68hc11:
256 disassemble = print_insn_m68hc11;
257 break;
258 case bfd_arch_m68hc12:
259 disassemble = print_insn_m68hc12;
260 break;
6927f982
NC
261 case bfd_arch_m9s12x:
262 disassemble = print_insn_m9s12x;
263 break;
264 case bfd_arch_m9s12xg:
265 disassemble = print_insn_m9s12xg;
266 break;
60bcf0fa 267#endif
252b5132
RH
268#ifdef ARCH_m68k
269 case bfd_arch_m68k:
270 disassemble = print_insn_m68k;
271 break;
272#endif
273#ifdef ARCH_m88k
274 case bfd_arch_m88k:
275 disassemble = print_insn_m88k;
276 break;
277#endif
d031aafb
NS
278#ifdef ARCH_mt
279 case bfd_arch_mt:
280 disassemble = print_insn_mt;
ac188222
DB
281 break;
282#endif
7ba29e2a
NC
283#ifdef ARCH_microblaze
284 case bfd_arch_microblaze:
285 disassemble = print_insn_microblaze;
286 break;
287#endif
2469cfa2
NC
288#ifdef ARCH_msp430
289 case bfd_arch_msp430:
290 disassemble = print_insn_msp430;
291 break;
292#endif
35c08157
KLC
293#ifdef ARCH_nds32
294 case bfd_arch_nds32:
295 disassemble = print_insn_nds32;
296 break;
297#endif
252b5132
RH
298#ifdef ARCH_ns32k
299 case bfd_arch_ns32k:
300 disassemble = print_insn_ns32k;
301 break;
302#endif
303#ifdef ARCH_mcore
304 case bfd_arch_mcore:
305 disassemble = print_insn_mcore;
306 break;
307#endif
bd2f2e55
DB
308#ifdef ARCH_mep
309 case bfd_arch_mep:
310 disassemble = print_insn_mep;
311 break;
312#endif
a3c62988
NC
313#ifdef ARCH_metag
314 case bfd_arch_metag:
315 disassemble = print_insn_metag;
316 break;
317#endif
252b5132
RH
318#ifdef ARCH_mips
319 case bfd_arch_mips:
003ca0fd 320 if (big)
252b5132
RH
321 disassemble = print_insn_big_mips;
322 else
323 disassemble = print_insn_little_mips;
324 break;
325#endif
3c3bdf30
NC
326#ifdef ARCH_mmix
327 case bfd_arch_mmix:
328 disassemble = print_insn_mmix;
329 break;
330#endif
252b5132
RH
331#ifdef ARCH_mn10200
332 case bfd_arch_mn10200:
333 disassemble = print_insn_mn10200;
334 break;
335#endif
336#ifdef ARCH_mn10300
337 case bfd_arch_mn10300:
338 disassemble = print_insn_mn10300;
339 break;
340#endif
36591ba1
SL
341#ifdef ARCH_nios2
342 case bfd_arch_nios2:
003ca0fd 343 if (big)
36591ba1
SL
344 disassemble = print_insn_big_nios2;
345 else
346 disassemble = print_insn_little_nios2;
347 break;
348#endif
73589c9d
CS
349#ifdef ARCH_or1k
350 case bfd_arch_or1k:
351 disassemble = print_insn_or1k;
3b16e843
NC
352 break;
353#endif
e135f41b
NC
354#ifdef ARCH_pdp11
355 case bfd_arch_pdp11:
356 disassemble = print_insn_pdp11;
357 break;
358#endif
1e608f98
ILT
359#ifdef ARCH_pj
360 case bfd_arch_pj:
361 disassemble = print_insn_pj;
362 break;
363#endif
252b5132
RH
364#ifdef ARCH_powerpc
365 case bfd_arch_powerpc:
52fe4420
AM
366#endif
367#ifdef ARCH_rs6000
368 case bfd_arch_rs6000:
369#endif
370#if defined ARCH_powerpc || defined ARCH_rs6000
003ca0fd 371 if (big)
252b5132
RH
372 disassemble = print_insn_big_powerpc;
373 else
374 disassemble = print_insn_little_powerpc;
375 break;
376#endif
11146849
DD
377#ifdef ARCH_pru
378 case bfd_arch_pru:
379 disassemble = print_insn_pru;
380 break;
381#endif
e23eba97
NC
382#ifdef ARCH_riscv
383 case bfd_arch_riscv:
384 disassemble = print_insn_riscv;
ae4c0df4 385 break;
e23eba97 386#endif
99c513f6
DD
387#ifdef ARCH_rl78
388 case bfd_arch_rl78:
0952813b 389 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
390 break;
391#endif
c7927a3c
NC
392#ifdef ARCH_rx
393 case bfd_arch_rx:
394 disassemble = print_insn_rx;
395 break;
396#endif
a85d7ed0
NC
397#ifdef ARCH_s390
398 case bfd_arch_s390:
399 disassemble = print_insn_s390;
400 break;
401#endif
1c0d3aa6
NC
402#ifdef ARCH_score
403 case bfd_arch_score:
003ca0fd 404 if (big)
6ca4eb77 405 disassemble = print_insn_big_score;
1c0d3aa6 406 else
6ca4eb77 407 disassemble = print_insn_little_score;
1c0d3aa6
NC
408 break;
409#endif
252b5132
RH
410#ifdef ARCH_sh
411 case bfd_arch_sh:
1c509ca8 412 disassemble = print_insn_sh;
252b5132
RH
413 break;
414#endif
415#ifdef ARCH_sparc
416 case bfd_arch_sparc:
417 disassemble = print_insn_sparc;
418 break;
419#endif
e9f53129
AM
420#ifdef ARCH_spu
421 case bfd_arch_spu:
422 disassemble = print_insn_spu;
423 break;
424#endif
252b5132
RH
425#ifdef ARCH_tic30
426 case bfd_arch_tic30:
427 disassemble = print_insn_tic30;
428 break;
429#endif
026df7c5
NC
430#ifdef ARCH_tic4x
431 case bfd_arch_tic4x:
432 disassemble = print_insn_tic4x;
433 break;
434#endif
5c84d377
TW
435#ifdef ARCH_tic54x
436 case bfd_arch_tic54x:
437 disassemble = print_insn_tic54x;
438 break;
439#endif
40b36596
JM
440#ifdef ARCH_tic6x
441 case bfd_arch_tic6x:
442 disassemble = print_insn_tic6x;
443 break;
444#endif
252b5132
RH
445#ifdef ARCH_tic80
446 case bfd_arch_tic80:
447 disassemble = print_insn_tic80;
448 break;
449#endif
3f8107ab
AM
450#ifdef ARCH_ft32
451 case bfd_arch_ft32:
452 disassemble = print_insn_ft32;
453 break;
454#endif
252b5132
RH
455#ifdef ARCH_v850
456 case bfd_arch_v850:
de863c74 457 case bfd_arch_v850_rh850:
252b5132
RH
458 disassemble = print_insn_v850;
459 break;
460#endif
461#ifdef ARCH_w65
462 case bfd_arch_w65:
463 disassemble = print_insn_w65;
464 break;
465#endif
62ecb94c
PC
466#ifdef ARCH_wasm32
467 case bfd_arch_wasm32:
468 disassemble = print_insn_wasm32;
469 break;
470#endif
f6c1a2d5
NC
471#ifdef ARCH_xgate
472 case bfd_arch_xgate:
473 disassemble = print_insn_xgate;
474 break;
475#endif
93fbbb04
GK
476#ifdef ARCH_xstormy16
477 case bfd_arch_xstormy16:
478 disassemble = print_insn_xstormy16;
479 break;
480#endif
d70c5fc7
NC
481#ifdef ARCH_xc16x
482 case bfd_arch_xc16x:
483 disassemble = print_insn_xc16x;
484 break;
485#endif
e0001a05
NC
486#ifdef ARCH_xtensa
487 case bfd_arch_xtensa:
488 disassemble = print_insn_xtensa;
489 break;
490#endif
3c9b82ba
NC
491#ifdef ARCH_z80
492 case bfd_arch_z80:
493 disassemble = print_insn_z80;
494 break;
495#endif
252b5132
RH
496#ifdef ARCH_z8k
497 case bfd_arch_z8k:
003ca0fd 498 if (mach == bfd_mach_z8001)
252b5132 499 disassemble = print_insn_z8001;
b7ed8fad 500 else
252b5132
RH
501 disassemble = print_insn_z8002;
502 break;
503#endif
504#ifdef ARCH_vax
505 case bfd_arch_vax:
506 disassemble = print_insn_vax;
507 break;
fd3c93d5 508#endif
1945cfa5
EB
509#ifdef ARCH_visium
510 case bfd_arch_visium:
511 disassemble = print_insn_visium;
512 break;
513#endif
fd3c93d5
DB
514#ifdef ARCH_frv
515 case bfd_arch_frv:
516 disassemble = print_insn_frv;
517 break;
47b1a55a 518#endif
59b1530d
AG
519#ifdef ARCH_moxie
520 case bfd_arch_moxie:
521 disassemble = print_insn_moxie;
522 break;
523#endif
47b1a55a
SC
524#ifdef ARCH_iq2000
525 case bfd_arch_iq2000:
526 disassemble = print_insn_iq2000;
527 break;
49f58d10
JB
528#endif
529#ifdef ARCH_m32c
530 case bfd_arch_m32c:
531 disassemble = print_insn_m32c;
532 break;
aa137e4d
NC
533#endif
534#ifdef ARCH_tilegx
535 case bfd_arch_tilegx:
536 disassemble = print_insn_tilegx;
537 break;
538#endif
539#ifdef ARCH_tilepro
540 case bfd_arch_tilepro:
541 disassemble = print_insn_tilepro;
542 break;
252b5132
RH
543#endif
544 default:
545 return 0;
546 }
547 return disassemble;
548}
94470b23
NC
549
550void
e6c7cdec 551disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 552{
a06ea964
NC
553#ifdef ARCH_aarch64
554 print_aarch64_disassembler_options (stream);
555#endif
37fd5ef3
CZ
556#ifdef ARCH_arc
557 print_arc_disassembler_options (stream);
558#endif
58efb6c0
NC
559#ifdef ARCH_arm
560 print_arm_disassembler_options (stream);
561#endif
640c0ccd
CD
562#ifdef ARCH_mips
563 print_mips_disassembler_options (stream);
564#endif
07dd56a9
NC
565#ifdef ARCH_powerpc
566 print_ppc_disassembler_options (stream);
567#endif
e23eba97
NC
568#ifdef ARCH_riscv
569 print_riscv_disassembler_options (stream);
570#endif
f59a29b9
L
571#ifdef ARCH_i386
572 print_i386_disassembler_options (stream);
573#endif
112b7c50
AK
574#ifdef ARCH_s390
575 print_s390_disassembler_options (stream);
576#endif
62ecb94c
PC
577#ifdef ARCH_wasm32
578 print_wasm32_disassembler_options (stream);
579#endif
b7ed8fad 580
94470b23
NC
581 return;
582}
22a398e1
NC
583
584void
585disassemble_init_for_target (struct disassemble_info * info)
586{
587 if (info == NULL)
588 return;
589
590 switch (info->arch)
591 {
a06ea964
NC
592#ifdef ARCH_aarch64
593 case bfd_arch_aarch64:
594 info->symbol_is_valid = aarch64_symbol_is_valid;
595 info->disassembler_needs_relocs = TRUE;
596 break;
597#endif
22a398e1
NC
598#ifdef ARCH_arm
599 case bfd_arch_arm:
600 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 601 info->disassembler_needs_relocs = TRUE;
22a398e1 602 break;
0bcb06d2
AS
603#endif
604#ifdef ARCH_ia64
605 case bfd_arch_ia64:
606 info->skip_zeroes = 16;
607 break;
608#endif
609#ifdef ARCH_tic4x
610 case bfd_arch_tic4x:
611 info->skip_zeroes = 32;
fb53f5a8 612 break;
49f58d10 613#endif
bd2f2e55
DB
614#ifdef ARCH_mep
615 case bfd_arch_mep:
616 info->skip_zeroes = 256;
617 info->skip_zeroes_at_end = 0;
618 break;
619#endif
a3c62988
NC
620#ifdef ARCH_metag
621 case bfd_arch_metag:
622 info->disassembler_needs_relocs = TRUE;
623 break;
624#endif
49f58d10
JB
625#ifdef ARCH_m32c
626 case bfd_arch_m32c:
6ca4eb77
AM
627 /* This processor in fact is little endian. The value set here
628 reflects the way opcodes are written in the cgen description. */
49f58d10 629 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
630 if (! info->insn_sets)
631 {
632 info->insn_sets = cgen_bitset_create (ISA_MAX);
633 if (info->mach == bfd_mach_m16c)
634 cgen_bitset_set (info->insn_sets, ISA_M16C);
635 else
636 cgen_bitset_set (info->insn_sets, ISA_M32C);
637 }
49f58d10 638 break;
b240011a 639#endif
024d185c
DD
640#ifdef ARCH_pru
641 case bfd_arch_pru:
642 info->disassembler_needs_relocs = TRUE;
643 break;
644#endif
fbc22555
DD
645#ifdef ARCH_powerpc
646 case bfd_arch_powerpc:
647#endif
b240011a
AM
648#ifdef ARCH_rs6000
649 case bfd_arch_rs6000:
650#endif
651#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
652 disassemble_init_powerpc (info);
653 break;
65b48a81 654#endif
62ecb94c
PC
655#ifdef ARCH_wasm32
656 case bfd_arch_wasm32:
657 disassemble_init_wasm32 (info);
658 break;
659#endif
65b48a81
PB
660#ifdef ARCH_s390
661 case bfd_arch_s390:
662 disassemble_init_s390 (info);
663 break;
22a398e1
NC
664#endif
665 default:
666 break;
667 }
668}
65b48a81
PB
669
670/* Remove whitespace and consecutive commas from OPTIONS. */
671
672char *
673remove_whitespace_and_extra_commas (char *options)
674{
675 char *str;
676 size_t i, len;
677
678 if (options == NULL)
679 return NULL;
680
681 /* Strip off all trailing whitespace and commas. */
682 for (len = strlen (options); len > 0; len--)
683 {
684 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
685 break;
686 options[len - 1] = '\0';
687 }
688
689 /* Convert all remaining whitespace to commas. */
690 for (i = 0; options[i] != '\0'; i++)
691 if (ISSPACE (options[i]))
692 options[i] = ',';
693
694 /* Remove consecutive commas. */
695 for (str = options; *str != '\0'; str++)
696 if (*str == ',' && (*(str + 1) == ',' || str == options))
697 {
698 char *next = str + 1;
699 while (*next == ',')
700 next++;
701 len = strlen (next);
702 if (str != options)
703 str++;
704 memmove (str, next, len);
705 next[len - (size_t)(next - str)] = '\0';
706 }
707 return (strlen (options) != 0) ? options : NULL;
708}
709
710/* Like STRCMP, but treat ',' the same as '\0' so that we match
711 strings like "foobar" against "foobar,xxyyzz,...". */
712
713int
714disassembler_options_cmp (const char *s1, const char *s2)
715{
716 unsigned char c1, c2;
717
718 do
719 {
720 c1 = (unsigned char) *s1++;
721 if (c1 == ',')
722 c1 = '\0';
723 c2 = (unsigned char) *s2++;
724 if (c2 == ',')
725 c2 = '\0';
726 if (c1 == '\0')
727 return c1 - c2;
728 }
729 while (c1 == c2);
730
731 return c1 - c2;
732}