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opcodes/arc: Implement style support in the disassembler
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252b5132 1/* Select disassembly routine for specified architecture.
a2c58332 2 Copyright (C) 1994-2022 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
832a5807 24#include "opintl.h"
252b5132
RH
25
26#ifdef ARCH_all
0b32f05b 27#ifdef BFD64
a06ea964 28#define ARCH_aarch64
252b5132 29#define ARCH_alpha
0b32f05b 30#define ARCH_bpf
0b32f05b
AM
31#define ARCH_ia64
32#define ARCH_loongarch
33#define ARCH_mips
34#define ARCH_mmix
35#define ARCH_nfp
36#define ARCH_riscv
37#define ARCH_score
38#define ARCH_tilegx
39#endif
252b5132
RH
40#define ARCH_arc
41#define ARCH_arm
adde6300 42#define ARCH_avr
4b7f6baa 43#define ARCH_bfin
3d3d428f 44#define ARCH_cr16
e4e883c0 45#define ARCH_cris
1fe1f39c 46#define ARCH_crx
b8891f8d 47#define ARCH_csky
252b5132
RH
48#define ARCH_d10v
49#define ARCH_d30v
d172d4ba 50#define ARCH_dlx
56b13185 51#define ARCH_epiphany
e729279b
NC
52#define ARCH_fr30
53#define ARCH_frv
3f8107ab 54#define ARCH_ft32
252b5132 55#define ARCH_h8300
252b5132
RH
56#define ARCH_hppa
57#define ARCH_i386
e729279b
NC
58#define ARCH_ip2k
59#define ARCH_iq2000
84e94c90 60#define ARCH_lm32
e729279b 61#define ARCH_m32c
252b5132 62#define ARCH_m32r
60bcf0fa
NC
63#define ARCH_m68hc11
64#define ARCH_m68hc12
e729279b 65#define ARCH_m68k
252b5132 66#define ARCH_mcore
bd2f2e55 67#define ARCH_mep
a3c62988 68#define ARCH_metag
7ba29e2a 69#define ARCH_microblaze
252b5132
RH
70#define ARCH_mn10200
71#define ARCH_mn10300
59b1530d 72#define ARCH_moxie
d031aafb 73#define ARCH_mt
2469cfa2 74#define ARCH_msp430
35c08157 75#define ARCH_nds32
36591ba1 76#define ARCH_nios2
252b5132 77#define ARCH_ns32k
73589c9d 78#define ARCH_or1k
e135f41b 79#define ARCH_pdp11
1e608f98 80#define ARCH_pj
252b5132 81#define ARCH_powerpc
11146849 82#define ARCH_pru
252b5132 83#define ARCH_rs6000
99c513f6 84#define ARCH_rl78
c7927a3c 85#define ARCH_rx
9da4dfd6 86#define ARCH_s12z
a85d7ed0 87#define ARCH_s390
252b5132
RH
88#define ARCH_sh
89#define ARCH_sparc
e9f53129 90#define ARCH_spu
252b5132 91#define ARCH_tic30
026df7c5 92#define ARCH_tic4x
5c84d377 93#define ARCH_tic54x
40b36596 94#define ARCH_tic6x
aa137e4d 95#define ARCH_tilepro
252b5132
RH
96#define ARCH_v850
97#define ARCH_vax
1945cfa5 98#define ARCH_visium
62ecb94c 99#define ARCH_wasm32
93fbbb04 100#define ARCH_xstormy16
f6c1a2d5 101#define ARCH_xgate
e0001a05 102#define ARCH_xtensa
3c9b82ba 103#define ARCH_z80
252b5132
RH
104#define ARCH_z8k
105#endif
106
49f58d10
JB
107#ifdef ARCH_m32c
108#include "m32c-desc.h"
109#endif
252b5132 110
79472b45
JM
111#ifdef ARCH_bpf
112/* XXX this should be including bpf-desc.h instead of this hackery,
113 but at the moment it is not possible to include several CGEN
114 generated *-desc.h files simultaneously. To be fixed in
115 CGEN... */
116
117# ifdef ARCH_m32c
118enum epbf_isa_attr
119{
31b3f3e6 120 ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE, ISA_EBPFMAX
79472b45
JM
121};
122# else
123# include "bpf-desc.h"
124# define ISA_EBPFMAX ISA_MAX
125# endif
126#endif /* ARCH_bpf */
127
252b5132 128disassembler_ftype
b28b8b5e 129disassembler (enum bfd_architecture a,
78933a4a 130 bool big ATTRIBUTE_UNUSED,
b28b8b5e 131 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 132 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 133{
252b5132
RH
134 disassembler_ftype disassemble;
135
136 switch (a)
137 {
138 /* If you add a case to this table, also add it to the
139 ARCH_all definition right above this function. */
a06ea964
NC
140#ifdef ARCH_aarch64
141 case bfd_arch_aarch64:
142 disassemble = print_insn_aarch64;
143 break;
144#endif
252b5132
RH
145#ifdef ARCH_alpha
146 case bfd_arch_alpha:
147 disassemble = print_insn_alpha;
148 break;
149#endif
150#ifdef ARCH_arc
151 case bfd_arch_arc:
6ca4eb77
AM
152 disassemble = arc_get_disassembler (abfd);
153 break;
252b5132
RH
154#endif
155#ifdef ARCH_arm
156 case bfd_arch_arm:
003ca0fd 157 if (big)
252b5132
RH
158 disassemble = print_insn_big_arm;
159 else
160 disassemble = print_insn_little_arm;
161 break;
162#endif
adde6300
AM
163#ifdef ARCH_avr
164 case bfd_arch_avr:
165 disassemble = print_insn_avr;
166 break;
167#endif
4b7f6baa
CM
168#ifdef ARCH_bfin
169 case bfd_arch_bfin:
170 disassemble = print_insn_bfin;
171 break;
172#endif
3d3d428f
NC
173#ifdef ARCH_cr16
174 case bfd_arch_cr16:
175 disassemble = print_insn_cr16;
176 break;
177#endif
6c95a37f
HPN
178#ifdef ARCH_cris
179 case bfd_arch_cris:
78966507 180 disassemble = cris_get_disassembler (abfd);
6c95a37f 181 break;
1fe1f39c
NC
182#endif
183#ifdef ARCH_crx
184 case bfd_arch_crx:
185 disassemble = print_insn_crx;
186 break;
6c95a37f 187#endif
b8891f8d
AJ
188#ifdef ARCH_csky
189 case bfd_arch_csky:
190 disassemble = csky_get_disassembler (abfd);
191 break;
192#endif
193
252b5132
RH
194#ifdef ARCH_d10v
195 case bfd_arch_d10v:
196 disassemble = print_insn_d10v;
197 break;
198#endif
199#ifdef ARCH_d30v
200 case bfd_arch_d30v:
201 disassemble = print_insn_d30v;
202 break;
203#endif
d172d4ba
NC
204#ifdef ARCH_dlx
205 case bfd_arch_dlx:
206 /* As far as I know we only handle big-endian DLX objects. */
207 disassemble = print_insn_dlx;
208 break;
209#endif
252b5132
RH
210#ifdef ARCH_h8300
211 case bfd_arch_h8300:
003ca0fd 212 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 213 disassemble = print_insn_h8300h;
003ca0fd
YQ
214 else if (mach == bfd_mach_h8300s
215 || mach == bfd_mach_h8300sn
216 || mach == bfd_mach_h8300sx
217 || mach == bfd_mach_h8300sxn)
252b5132 218 disassemble = print_insn_h8300s;
b7ed8fad 219 else
252b5132
RH
220 disassemble = print_insn_h8300;
221 break;
222#endif
252b5132
RH
223#ifdef ARCH_hppa
224 case bfd_arch_hppa:
225 disassemble = print_insn_hppa;
226 break;
227#endif
228#ifdef ARCH_i386
229 case bfd_arch_i386:
7b6d09fb 230 case bfd_arch_iamcu:
e396998b 231 disassemble = print_insn_i386;
252b5132
RH
232 break;
233#endif
800eeca4
JW
234#ifdef ARCH_ia64
235 case bfd_arch_ia64:
236 disassemble = print_insn_ia64;
237 break;
238#endif
a40cbfa3
NC
239#ifdef ARCH_ip2k
240 case bfd_arch_ip2k:
241 disassemble = print_insn_ip2k;
242 break;
243#endif
79472b45
JM
244#ifdef ARCH_bpf
245 case bfd_arch_bpf:
246 disassemble = print_insn_bpf;
247 break;
248#endif
cfb8c092
NC
249#ifdef ARCH_epiphany
250 case bfd_arch_epiphany:
251 disassemble = print_insn_epiphany;
252 break;
253#endif
252b5132
RH
254#ifdef ARCH_fr30
255 case bfd_arch_fr30:
256 disassemble = print_insn_fr30;
257 break;
258#endif
84e94c90
NC
259#ifdef ARCH_lm32
260 case bfd_arch_lm32:
261 disassemble = print_insn_lm32;
262 break;
263#endif
252b5132
RH
264#ifdef ARCH_m32r
265 case bfd_arch_m32r:
266 disassemble = print_insn_m32r;
267 break;
268#endif
6927f982
NC
269#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
270 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
271 case bfd_arch_m68hc11:
272 disassemble = print_insn_m68hc11;
273 break;
274 case bfd_arch_m68hc12:
275 disassemble = print_insn_m68hc12;
276 break;
6927f982
NC
277 case bfd_arch_m9s12x:
278 disassemble = print_insn_m9s12x;
279 break;
280 case bfd_arch_m9s12xg:
281 disassemble = print_insn_m9s12xg;
282 break;
60bcf0fa 283#endif
7b4ae824
JD
284#if defined(ARCH_s12z)
285 case bfd_arch_s12z:
286 disassemble = print_insn_s12z;
287 break;
288#endif
252b5132
RH
289#ifdef ARCH_m68k
290 case bfd_arch_m68k:
291 disassemble = print_insn_m68k;
292 break;
293#endif
d031aafb
NS
294#ifdef ARCH_mt
295 case bfd_arch_mt:
296 disassemble = print_insn_mt;
ac188222
DB
297 break;
298#endif
7ba29e2a
NC
299#ifdef ARCH_microblaze
300 case bfd_arch_microblaze:
301 disassemble = print_insn_microblaze;
302 break;
303#endif
2469cfa2
NC
304#ifdef ARCH_msp430
305 case bfd_arch_msp430:
306 disassemble = print_insn_msp430;
307 break;
308#endif
35c08157
KLC
309#ifdef ARCH_nds32
310 case bfd_arch_nds32:
311 disassemble = print_insn_nds32;
312 break;
313#endif
fe944acf
FT
314#ifdef ARCH_nfp
315 case bfd_arch_nfp:
316 disassemble = print_insn_nfp;
317 break;
318#endif
252b5132
RH
319#ifdef ARCH_ns32k
320 case bfd_arch_ns32k:
321 disassemble = print_insn_ns32k;
322 break;
323#endif
324#ifdef ARCH_mcore
325 case bfd_arch_mcore:
326 disassemble = print_insn_mcore;
327 break;
328#endif
bd2f2e55
DB
329#ifdef ARCH_mep
330 case bfd_arch_mep:
331 disassemble = print_insn_mep;
332 break;
333#endif
a3c62988
NC
334#ifdef ARCH_metag
335 case bfd_arch_metag:
336 disassemble = print_insn_metag;
337 break;
338#endif
252b5132
RH
339#ifdef ARCH_mips
340 case bfd_arch_mips:
003ca0fd 341 if (big)
252b5132
RH
342 disassemble = print_insn_big_mips;
343 else
344 disassemble = print_insn_little_mips;
345 break;
346#endif
3c3bdf30
NC
347#ifdef ARCH_mmix
348 case bfd_arch_mmix:
349 disassemble = print_insn_mmix;
350 break;
351#endif
252b5132
RH
352#ifdef ARCH_mn10200
353 case bfd_arch_mn10200:
354 disassemble = print_insn_mn10200;
355 break;
356#endif
357#ifdef ARCH_mn10300
358 case bfd_arch_mn10300:
359 disassemble = print_insn_mn10300;
360 break;
361#endif
36591ba1
SL
362#ifdef ARCH_nios2
363 case bfd_arch_nios2:
003ca0fd 364 if (big)
36591ba1
SL
365 disassemble = print_insn_big_nios2;
366 else
367 disassemble = print_insn_little_nios2;
368 break;
369#endif
73589c9d
CS
370#ifdef ARCH_or1k
371 case bfd_arch_or1k:
372 disassemble = print_insn_or1k;
3b16e843
NC
373 break;
374#endif
e135f41b
NC
375#ifdef ARCH_pdp11
376 case bfd_arch_pdp11:
377 disassemble = print_insn_pdp11;
378 break;
379#endif
1e608f98
ILT
380#ifdef ARCH_pj
381 case bfd_arch_pj:
382 disassemble = print_insn_pj;
383 break;
384#endif
252b5132
RH
385#ifdef ARCH_powerpc
386 case bfd_arch_powerpc:
52fe4420
AM
387#endif
388#ifdef ARCH_rs6000
389 case bfd_arch_rs6000:
390#endif
391#if defined ARCH_powerpc || defined ARCH_rs6000
003ca0fd 392 if (big)
252b5132
RH
393 disassemble = print_insn_big_powerpc;
394 else
395 disassemble = print_insn_little_powerpc;
396 break;
397#endif
11146849
DD
398#ifdef ARCH_pru
399 case bfd_arch_pru:
400 disassemble = print_insn_pru;
401 break;
402#endif
e23eba97
NC
403#ifdef ARCH_riscv
404 case bfd_arch_riscv:
8152e040 405 disassemble = riscv_get_disassembler (abfd);
ae4c0df4 406 break;
e23eba97 407#endif
99c513f6
DD
408#ifdef ARCH_rl78
409 case bfd_arch_rl78:
0952813b 410 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
411 break;
412#endif
c7927a3c
NC
413#ifdef ARCH_rx
414 case bfd_arch_rx:
415 disassemble = print_insn_rx;
416 break;
417#endif
a85d7ed0
NC
418#ifdef ARCH_s390
419 case bfd_arch_s390:
420 disassemble = print_insn_s390;
421 break;
422#endif
1c0d3aa6
NC
423#ifdef ARCH_score
424 case bfd_arch_score:
003ca0fd 425 if (big)
6ca4eb77 426 disassemble = print_insn_big_score;
1c0d3aa6 427 else
6ca4eb77 428 disassemble = print_insn_little_score;
1c0d3aa6
NC
429 break;
430#endif
252b5132
RH
431#ifdef ARCH_sh
432 case bfd_arch_sh:
1c509ca8 433 disassemble = print_insn_sh;
252b5132
RH
434 break;
435#endif
436#ifdef ARCH_sparc
437 case bfd_arch_sparc:
438 disassemble = print_insn_sparc;
439 break;
440#endif
e9f53129
AM
441#ifdef ARCH_spu
442 case bfd_arch_spu:
443 disassemble = print_insn_spu;
444 break;
445#endif
252b5132
RH
446#ifdef ARCH_tic30
447 case bfd_arch_tic30:
448 disassemble = print_insn_tic30;
449 break;
450#endif
026df7c5
NC
451#ifdef ARCH_tic4x
452 case bfd_arch_tic4x:
453 disassemble = print_insn_tic4x;
454 break;
455#endif
5c84d377
TW
456#ifdef ARCH_tic54x
457 case bfd_arch_tic54x:
458 disassemble = print_insn_tic54x;
459 break;
460#endif
40b36596
JM
461#ifdef ARCH_tic6x
462 case bfd_arch_tic6x:
463 disassemble = print_insn_tic6x;
464 break;
465#endif
3f8107ab
AM
466#ifdef ARCH_ft32
467 case bfd_arch_ft32:
468 disassemble = print_insn_ft32;
469 break;
470#endif
252b5132
RH
471#ifdef ARCH_v850
472 case bfd_arch_v850:
de863c74 473 case bfd_arch_v850_rh850:
252b5132
RH
474 disassemble = print_insn_v850;
475 break;
476#endif
62ecb94c
PC
477#ifdef ARCH_wasm32
478 case bfd_arch_wasm32:
479 disassemble = print_insn_wasm32;
480 break;
481#endif
f6c1a2d5
NC
482#ifdef ARCH_xgate
483 case bfd_arch_xgate:
484 disassemble = print_insn_xgate;
485 break;
486#endif
93fbbb04
GK
487#ifdef ARCH_xstormy16
488 case bfd_arch_xstormy16:
489 disassemble = print_insn_xstormy16;
490 break;
491#endif
e0001a05
NC
492#ifdef ARCH_xtensa
493 case bfd_arch_xtensa:
494 disassemble = print_insn_xtensa;
495 break;
496#endif
3c9b82ba
NC
497#ifdef ARCH_z80
498 case bfd_arch_z80:
499 disassemble = print_insn_z80;
500 break;
501#endif
252b5132
RH
502#ifdef ARCH_z8k
503 case bfd_arch_z8k:
003ca0fd 504 if (mach == bfd_mach_z8001)
252b5132 505 disassemble = print_insn_z8001;
b7ed8fad 506 else
252b5132
RH
507 disassemble = print_insn_z8002;
508 break;
509#endif
510#ifdef ARCH_vax
511 case bfd_arch_vax:
512 disassemble = print_insn_vax;
513 break;
fd3c93d5 514#endif
1945cfa5
EB
515#ifdef ARCH_visium
516 case bfd_arch_visium:
517 disassemble = print_insn_visium;
518 break;
519#endif
fd3c93d5
DB
520#ifdef ARCH_frv
521 case bfd_arch_frv:
522 disassemble = print_insn_frv;
523 break;
47b1a55a 524#endif
59b1530d
AG
525#ifdef ARCH_moxie
526 case bfd_arch_moxie:
527 disassemble = print_insn_moxie;
528 break;
529#endif
47b1a55a
SC
530#ifdef ARCH_iq2000
531 case bfd_arch_iq2000:
532 disassemble = print_insn_iq2000;
533 break;
49f58d10
JB
534#endif
535#ifdef ARCH_m32c
536 case bfd_arch_m32c:
537 disassemble = print_insn_m32c;
538 break;
aa137e4d
NC
539#endif
540#ifdef ARCH_tilegx
541 case bfd_arch_tilegx:
542 disassemble = print_insn_tilegx;
543 break;
544#endif
545#ifdef ARCH_tilepro
546 case bfd_arch_tilepro:
547 disassemble = print_insn_tilepro;
548 break;
6cc76c40 549#endif
550#ifdef ARCH_loongarch
551 case bfd_arch_loongarch:
552 disassemble = print_insn_loongarch;
553 break;
252b5132
RH
554#endif
555 default:
556 return 0;
557 }
558 return disassemble;
559}
94470b23
NC
560
561void
e6c7cdec 562disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 563{
a06ea964
NC
564#ifdef ARCH_aarch64
565 print_aarch64_disassembler_options (stream);
566#endif
37fd5ef3
CZ
567#ifdef ARCH_arc
568 print_arc_disassembler_options (stream);
569#endif
58efb6c0
NC
570#ifdef ARCH_arm
571 print_arm_disassembler_options (stream);
572#endif
640c0ccd
CD
573#ifdef ARCH_mips
574 print_mips_disassembler_options (stream);
575#endif
fe944acf
FT
576#ifdef ARCH_nfp
577 print_nfp_disassembler_options (stream);
578#endif
07dd56a9
NC
579#ifdef ARCH_powerpc
580 print_ppc_disassembler_options (stream);
581#endif
e23eba97
NC
582#ifdef ARCH_riscv
583 print_riscv_disassembler_options (stream);
584#endif
f59a29b9
L
585#ifdef ARCH_i386
586 print_i386_disassembler_options (stream);
587#endif
112b7c50
AK
588#ifdef ARCH_s390
589 print_s390_disassembler_options (stream);
590#endif
62ecb94c
PC
591#ifdef ARCH_wasm32
592 print_wasm32_disassembler_options (stream);
593#endif
6cc76c40 594#ifdef ARCH_loongarch
595 print_loongarch_disassembler_options (stream);
596#endif
b7ed8fad 597
94470b23
NC
598 return;
599}
22a398e1
NC
600
601void
602disassemble_init_for_target (struct disassemble_info * info)
603{
604 if (info == NULL)
605 return;
606
607 switch (info->arch)
608 {
a06ea964
NC
609#ifdef ARCH_aarch64
610 case bfd_arch_aarch64:
611 info->symbol_is_valid = aarch64_symbol_is_valid;
78933a4a 612 info->disassembler_needs_relocs = true;
a06ea964
NC
613 break;
614#endif
bbcab336
CZ
615#ifdef ARCH_arc
616 case bfd_arch_arc:
617 info->created_styled_output = true;
618 break;
619#endif
22a398e1
NC
620#ifdef ARCH_arm
621 case bfd_arch_arm:
622 info->symbol_is_valid = arm_symbol_is_valid;
78933a4a 623 info->disassembler_needs_relocs = true;
22a398e1 624 break;
0bcb06d2 625#endif
a0f3a4c6
MN
626#ifdef ARCH_avr
627 case bfd_arch_avr:
628 info->created_styled_output = true;
629 break;
630#endif
b8891f8d
AJ
631#ifdef ARCH_csky
632 case bfd_arch_csky:
633 info->symbol_is_valid = csky_symbol_is_valid;
78933a4a 634 info->disassembler_needs_relocs = true;
b8891f8d
AJ
635 break;
636#endif
fbbb45ce
AB
637#ifdef ARCH_i386
638 case bfd_arch_i386:
639 case bfd_arch_iamcu:
640 info->created_styled_output = true;
641 break;
642#endif
0bcb06d2
AS
643#ifdef ARCH_ia64
644 case bfd_arch_ia64:
645 info->skip_zeroes = 16;
646 break;
647#endif
648#ifdef ARCH_tic4x
649 case bfd_arch_tic4x:
650 info->skip_zeroes = 32;
fb53f5a8 651 break;
49f58d10 652#endif
bd2f2e55
DB
653#ifdef ARCH_mep
654 case bfd_arch_mep:
655 info->skip_zeroes = 256;
656 info->skip_zeroes_at_end = 0;
657 break;
658#endif
a3c62988
NC
659#ifdef ARCH_metag
660 case bfd_arch_metag:
78933a4a 661 info->disassembler_needs_relocs = true;
a3c62988
NC
662 break;
663#endif
49f58d10
JB
664#ifdef ARCH_m32c
665 case bfd_arch_m32c:
6ca4eb77
AM
666 /* This processor in fact is little endian. The value set here
667 reflects the way opcodes are written in the cgen description. */
49f58d10 668 info->endian = BFD_ENDIAN_BIG;
103ebbc3 669 if (!info->private_data)
fb53f5a8 670 {
103ebbc3 671 info->private_data = cgen_bitset_create (ISA_MAX);
fb53f5a8 672 if (info->mach == bfd_mach_m16c)
103ebbc3 673 cgen_bitset_set (info->private_data, ISA_M16C);
fb53f5a8 674 else
103ebbc3 675 cgen_bitset_set (info->private_data, ISA_M32C);
fb53f5a8 676 }
49f58d10 677 break;
b240011a 678#endif
79472b45
JM
679#ifdef ARCH_bpf
680 case bfd_arch_bpf:
d8740be1 681 info->endian_code = BFD_ENDIAN_LITTLE;
103ebbc3
AM
682 if (!info->private_data)
683 {
4449c81a 684 info->private_data = cgen_bitset_create (ISA_MAX);
103ebbc3 685 if (info->endian == BFD_ENDIAN_BIG)
4449c81a
DF
686 {
687 cgen_bitset_set (info->private_data, ISA_EBPFBE);
688 if (info->mach == bfd_mach_xbpf)
689 cgen_bitset_set (info->private_data, ISA_XBPFBE);
690 }
103ebbc3 691 else
4449c81a
DF
692 {
693 cgen_bitset_set (info->private_data, ISA_EBPFLE);
694 if (info->mach == bfd_mach_xbpf)
695 cgen_bitset_set (info->private_data, ISA_XBPFLE);
696 }
103ebbc3 697 }
79472b45
JM
698 break;
699#endif
024d185c
DD
700#ifdef ARCH_pru
701 case bfd_arch_pru:
78933a4a 702 info->disassembler_needs_relocs = true;
024d185c
DD
703 break;
704#endif
fbc22555
DD
705#ifdef ARCH_powerpc
706 case bfd_arch_powerpc:
707#endif
b240011a
AM
708#ifdef ARCH_rs6000
709 case bfd_arch_rs6000:
710#endif
711#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
712 disassemble_init_powerpc (info);
713 break;
65b48a81 714#endif
884b49e3
AB
715#ifdef ARCH_riscv
716 case bfd_arch_riscv:
717 info->symbol_is_valid = riscv_symbol_is_valid;
49d31dc9 718 info->created_styled_output = true;
884b49e3
AB
719 break;
720#endif
62ecb94c
PC
721#ifdef ARCH_wasm32
722 case bfd_arch_wasm32:
723 disassemble_init_wasm32 (info);
724 break;
725#endif
65b48a81
PB
726#ifdef ARCH_s390
727 case bfd_arch_s390:
728 disassemble_init_s390 (info);
ec54dc91 729 info->created_styled_output = true;
65b48a81 730 break;
22a398e1 731#endif
fbaf61ad
NC
732#ifdef ARCH_nds32
733 case bfd_arch_nds32:
734 disassemble_init_nds32 (info);
735 break;
736 #endif
22a398e1
NC
737 default:
738 break;
739 }
740}
65b48a81 741
20135676
AM
742void
743disassemble_free_target (struct disassemble_info *info)
744{
745 if (info == NULL)
746 return;
747
748 switch (info->arch)
749 {
750 default:
751 return;
752
753#ifdef ARCH_bpf
754 case bfd_arch_bpf:
755#endif
756#ifdef ARCH_m32c
757 case bfd_arch_m32c:
758#endif
759#if defined ARCH_bpf || defined ARCH_m32c
760 if (info->private_data)
761 {
762 CGEN_BITSET *mask = info->private_data;
763 free (mask->bits);
764 }
765 break;
766#endif
767
768#ifdef ARCH_arc
769 case bfd_arch_arc:
770 break;
771#endif
772#ifdef ARCH_cris
773 case bfd_arch_cris:
774 break;
775#endif
776#ifdef ARCH_mmix
777 case bfd_arch_mmix:
778 break;
779#endif
780#ifdef ARCH_nfp
781 case bfd_arch_nfp:
782 break;
783#endif
784#ifdef ARCH_powerpc
785 case bfd_arch_powerpc:
786 break;
787#endif
788#ifdef ARCH_riscv
789 case bfd_arch_riscv:
790 break;
791#endif
792#ifdef ARCH_rs6000
793 case bfd_arch_rs6000:
794 break;
795#endif
796 }
797
798 free (info->private_data);
799}
800
65b48a81
PB
801/* Remove whitespace and consecutive commas from OPTIONS. */
802
803char *
804remove_whitespace_and_extra_commas (char *options)
805{
806 char *str;
807 size_t i, len;
808
809 if (options == NULL)
810 return NULL;
811
812 /* Strip off all trailing whitespace and commas. */
813 for (len = strlen (options); len > 0; len--)
814 {
815 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
816 break;
817 options[len - 1] = '\0';
818 }
819
820 /* Convert all remaining whitespace to commas. */
821 for (i = 0; options[i] != '\0'; i++)
822 if (ISSPACE (options[i]))
823 options[i] = ',';
824
825 /* Remove consecutive commas. */
826 for (str = options; *str != '\0'; str++)
827 if (*str == ',' && (*(str + 1) == ',' || str == options))
828 {
829 char *next = str + 1;
830 while (*next == ',')
831 next++;
832 len = strlen (next);
833 if (str != options)
834 str++;
835 memmove (str, next, len);
836 next[len - (size_t)(next - str)] = '\0';
837 }
838 return (strlen (options) != 0) ? options : NULL;
839}
840
841/* Like STRCMP, but treat ',' the same as '\0' so that we match
842 strings like "foobar" against "foobar,xxyyzz,...". */
843
844int
845disassembler_options_cmp (const char *s1, const char *s2)
846{
847 unsigned char c1, c2;
848
849 do
850 {
851 c1 = (unsigned char) *s1++;
852 if (c1 == ',')
853 c1 = '\0';
854 c2 = (unsigned char) *s2++;
855 if (c2 == ',')
856 c2 = '\0';
857 if (c1 == '\0')
858 return c1 - c2;
859 }
860 while (c1 == c2);
861
862 return c1 - c2;
863}
832a5807
AM
864
865void
866opcodes_assert (const char *file, int line)
867{
868 opcodes_error_handler (_("assertion fail %s:%d"), file, line);
869 opcodes_error_handler (_("Please report this bug"));
870 abort ();
871}
60a3da00
AB
872
873/* Set the stream, and the styled and unstyled printf functions within
874 INFO. */
875
876void
877disassemble_set_printf (struct disassemble_info *info, void *stream,
878 fprintf_ftype unstyled_printf,
879 fprintf_styled_ftype styled_printf)
880{
881 info->stream = stream;
882 info->fprintf_func = unstyled_printf;
883 info->fprintf_styled_func = styled_printf;
884}