]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - opcodes/iq2000-ibld.c
Add missing ChangeLog entries
[thirdparty/binutils-gdb.git] / opcodes / iq2000-ibld.c
CommitLineData
4162bb66 1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
47b1a55a
SC
2/* Instruction building/extraction support for iq2000. -*- C -*-
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
47b1a55a 6
2571583a 7 Copyright (C) 1996-2017 Free Software Foundation, Inc.
47b1a55a 8
9b201bb5 9 This file is part of libopcodes.
47b1a55a 10
9b201bb5 11 This library is free software; you can redistribute it and/or modify
47b0e7ad 12 it under the terms of the GNU General Public License as published by
9b201bb5 13 the Free Software Foundation; either version 3, or (at your option)
47b0e7ad 14 any later version.
47b1a55a 15
9b201bb5
NC
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
47b1a55a 20
47b0e7ad
NC
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
47b1a55a
SC
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "dis-asm.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "iq2000-desc.h"
35#include "iq2000-opc.h"
fe8afbc4 36#include "cgen/basic-modes.h"
47b1a55a
SC
37#include "opintl.h"
38#include "safe-ctype.h"
39
47b0e7ad 40#undef min
47b1a55a 41#define min(a,b) ((a) < (b) ? (a) : (b))
47b0e7ad 42#undef max
47b1a55a
SC
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45/* Used by the ifield rtx function. */
46#define FLD(f) (fields->f)
47
48static const char * insert_normal
ffead7ae
MM
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
47b1a55a 51static const char * insert_insn_normal
ffead7ae
MM
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
47b1a55a 54static int extract_normal
ffead7ae
MM
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
47b1a55a 58static int extract_insn_normal
ffead7ae
MM
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
47b1a55a
SC
61#if CGEN_INT_INSN_P
62static void put_insn_int_value
ffead7ae 63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
47b1a55a
SC
64#endif
65#if ! CGEN_INT_INSN_P
66static CGEN_INLINE void insert_1
ffead7ae 67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
47b1a55a 68static CGEN_INLINE int fill_cache
ffead7ae 69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
47b1a55a 70static CGEN_INLINE long extract_1
ffead7ae 71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
47b1a55a
SC
72#endif
73\f
74/* Operand insertion. */
75
76#if ! CGEN_INT_INSN_P
77
78/* Subroutine of insert_normal. */
79
80static CGEN_INLINE void
ffead7ae
MM
81insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
47b1a55a
SC
87{
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102}
103
104#endif /* ! CGEN_INT_INSN_P */
105
106/* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117/* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119/* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122static const char *
ffead7ae
MM
123insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
47b1a55a
SC
132{
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
b7cd1872 141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
47b1a55a
SC
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
43e65147 158
47b1a55a
SC
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
ed963e2d
NC
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
47b1a55a
SC
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
ed963e2d
NC
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
47b1a55a
SC
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
43e65147 196
47b1a55a
SC
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208#if CGEN_INT_INSN_P
209
210 {
a143b004 211 int shift_within_word, shift_to_word, shift;
47b1a55a 212
a143b004
AB
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
47b1a55a 217 if (CGEN_INSN_LSB0_P)
a143b004 218 shift_within_word = start + 1 - length;
47b1a55a 219 else
a143b004
AB
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
47b1a55a
SC
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227#else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235#endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238}
239
240/* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247static const char *
ffead7ae
MM
248insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
47b1a55a
SC
253{
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264#if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269#else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275#endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296}
297
298#if CGEN_INT_INSN_P
299/* Cover function to store an insn value into an integral insn. Must go here
47b0e7ad 300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
47b1a55a
SC
301
302static void
ffead7ae
MM
303put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
47b1a55a
SC
308{
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
47b0e7ad 318
47b1a55a
SC
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321}
322#endif
323\f
324/* Operand extraction. */
325
326#if ! CGEN_INT_INSN_P
327
328/* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334static CGEN_INLINE int
ffead7ae
MM
335fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
47b1a55a
SC
340{
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374}
375
376/* Subroutine of extract_normal. */
377
378static CGEN_INLINE long
ffead7ae
MM
379extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
47b1a55a
SC
386{
387 unsigned long x;
388 int shift;
47b0e7ad 389
47b1a55a
SC
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397}
398
399#endif /* ! CGEN_INT_INSN_P */
400
401/* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416/* ??? The return code isn't properly used. wip. */
417
418/* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421static int
ffead7ae 422extract_normal (CGEN_CPU_DESC cd,
47b1a55a 423#if ! CGEN_INT_INSN_P
ffead7ae 424 CGEN_EXTRACT_INFO *ex_info,
47b1a55a 425#else
ffead7ae 426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
47b1a55a 427#endif
ffead7ae
MM
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
47b1a55a 435#if ! CGEN_INT_INSN_P
ffead7ae 436 bfd_vma pc,
47b1a55a 437#else
ffead7ae 438 bfd_vma pc ATTRIBUTE_UNUSED,
47b1a55a 439#endif
ffead7ae 440 long *valuep)
47b1a55a
SC
441{
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
b7cd1872 452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
47b1a55a
SC
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
ed963e2d
NC
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
47b1a55a
SC
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473#if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
b7cd1872 479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
47b1a55a
SC
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 return 0;
484
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
486 }
487
488#endif /* ! CGEN_INT_INSN_P */
489
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
492
493 value &= mask;
494 /* sign extend? */
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
497 value |= ~mask;
498
499 *valuep = value;
500
501 return 1;
502}
503
504/* Default insn extractor.
505
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
511 been called). */
512
513static int
ffead7ae
MM
514extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
518 CGEN_FIELDS *fields,
519 bfd_vma pc)
47b1a55a
SC
520{
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
523
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
525
526 CGEN_INIT_EXTRACT (cd);
527
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
529 {
530 int length;
531
532 if (CGEN_SYNTAX_CHAR_P (*syn))
533 continue;
534
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
537 if (length <= 0)
538 return length;
539 }
540
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
543}
544\f
47b0e7ad 545/* Machine generated code added here. */
47b1a55a
SC
546
547const char * iq2000_cgen_insert_operand
47b0e7ad 548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
47b1a55a
SC
549
550/* Main entry point for operand insertion.
551
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
558
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
563
564const char *
47b0e7ad
NC
565iq2000_cgen_insert_operand (CGEN_CPU_DESC cd,
566 int opindex,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
47b1a55a
SC
570{
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
573
574 switch (opindex)
575 {
4030fa5a
NC
576 case IQ2000_OPERAND__INDEX :
577 errmsg = insert_normal (cd, fields->f_index, 0, 0, 8, 9, 32, total_length, buffer);
578 break;
47b1a55a
SC
579 case IQ2000_OPERAND_BASE :
580 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
581 break;
582 case IQ2000_OPERAND_BASEOFF :
583 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
584 break;
585 case IQ2000_OPERAND_BITNUM :
586 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
587 break;
588 case IQ2000_OPERAND_BYTECOUNT :
589 errmsg = insert_normal (cd, fields->f_bytecount, 0, 0, 7, 8, 32, total_length, buffer);
590 break;
591 case IQ2000_OPERAND_CAM_Y :
592 errmsg = insert_normal (cd, fields->f_cam_y, 0, 0, 2, 3, 32, total_length, buffer);
593 break;
594 case IQ2000_OPERAND_CAM_Z :
595 errmsg = insert_normal (cd, fields->f_cam_z, 0, 0, 5, 3, 32, total_length, buffer);
596 break;
597 case IQ2000_OPERAND_CM_3FUNC :
598 errmsg = insert_normal (cd, fields->f_cm_3func, 0, 0, 5, 3, 32, total_length, buffer);
599 break;
600 case IQ2000_OPERAND_CM_3Z :
601 errmsg = insert_normal (cd, fields->f_cm_3z, 0, 0, 1, 2, 32, total_length, buffer);
602 break;
603 case IQ2000_OPERAND_CM_4FUNC :
604 errmsg = insert_normal (cd, fields->f_cm_4func, 0, 0, 5, 4, 32, total_length, buffer);
605 break;
606 case IQ2000_OPERAND_CM_4Z :
607 errmsg = insert_normal (cd, fields->f_cm_4z, 0, 0, 2, 3, 32, total_length, buffer);
608 break;
609 case IQ2000_OPERAND_COUNT :
610 errmsg = insert_normal (cd, fields->f_count, 0, 0, 15, 7, 32, total_length, buffer);
611 break;
612 case IQ2000_OPERAND_EXECODE :
613 errmsg = insert_normal (cd, fields->f_excode, 0, 0, 25, 20, 32, total_length, buffer);
614 break;
615 case IQ2000_OPERAND_HI16 :
616 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
617 break;
618 case IQ2000_OPERAND_IMM :
619 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
620 break;
47b1a55a
SC
621 case IQ2000_OPERAND_JMPTARG :
622 {
623 long value = fields->f_jtarg;
fe8afbc4 624 value = ((USI) (((value) & (262143))) >> (2));
47b1a55a
SC
625 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, buffer);
626 }
627 break;
628 case IQ2000_OPERAND_JMPTARGQ10 :
629 {
630 long value = fields->f_jtargq10;
fe8afbc4 631 value = ((USI) (((value) & (8388607))) >> (2));
47b1a55a
SC
632 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer);
633 }
634 break;
635 case IQ2000_OPERAND_LO16 :
636 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
637 break;
638 case IQ2000_OPERAND_MASK :
639 errmsg = insert_normal (cd, fields->f_mask, 0, 0, 9, 4, 32, total_length, buffer);
640 break;
641 case IQ2000_OPERAND_MASKL :
642 errmsg = insert_normal (cd, fields->f_maskl, 0, 0, 4, 5, 32, total_length, buffer);
643 break;
644 case IQ2000_OPERAND_MASKQ10 :
645 errmsg = insert_normal (cd, fields->f_maskq10, 0, 0, 10, 5, 32, total_length, buffer);
646 break;
647 case IQ2000_OPERAND_MASKR :
648 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
649 break;
650 case IQ2000_OPERAND_MLO16 :
651 errmsg = insert_normal (cd, fields->f_imm, 0, 0, 15, 16, 32, total_length, buffer);
652 break;
653 case IQ2000_OPERAND_OFFSET :
654 {
655 long value = fields->f_offset;
fe8afbc4 656 value = ((SI) (((value) - (pc))) >> (2));
47b1a55a
SC
657 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer);
658 }
659 break;
660 case IQ2000_OPERAND_RD :
661 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
662 break;
663 case IQ2000_OPERAND_RD_RS :
664 {
665{
666 FLD (f_rd) = FLD (f_rd_rs);
667 FLD (f_rs) = FLD (f_rd_rs);
668}
669 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
670 if (errmsg)
671 break;
672 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
673 if (errmsg)
674 break;
675 }
676 break;
677 case IQ2000_OPERAND_RD_RT :
678 {
679{
680 FLD (f_rd) = FLD (f_rd_rt);
681 FLD (f_rt) = FLD (f_rd_rt);
682}
683 errmsg = insert_normal (cd, fields->f_rd, 0, 0, 15, 5, 32, total_length, buffer);
684 if (errmsg)
685 break;
686 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
687 if (errmsg)
688 break;
689 }
690 break;
691 case IQ2000_OPERAND_RS :
692 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
693 break;
694 case IQ2000_OPERAND_RT :
695 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
696 break;
697 case IQ2000_OPERAND_RT_RS :
698 {
699{
700 FLD (f_rt) = FLD (f_rt_rs);
701 FLD (f_rs) = FLD (f_rt_rs);
702}
703 errmsg = insert_normal (cd, fields->f_rt, 0, 0, 20, 5, 32, total_length, buffer);
704 if (errmsg)
705 break;
706 errmsg = insert_normal (cd, fields->f_rs, 0, 0, 25, 5, 32, total_length, buffer);
707 if (errmsg)
708 break;
709 }
710 break;
711 case IQ2000_OPERAND_SHAMT :
712 errmsg = insert_normal (cd, fields->f_shamt, 0, 0, 10, 5, 32, total_length, buffer);
713 break;
714
715 default :
716 /* xgettext:c-format */
717 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
718 opindex);
719 abort ();
720 }
721
722 return errmsg;
723}
724
725int iq2000_cgen_extract_operand
47b0e7ad 726 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
47b1a55a
SC
727
728/* Main entry point for operand extraction.
729 The result is <= 0 for error, >0 for success.
730 ??? Actual values aren't well defined right now.
731
732 This function is basically just a big switch statement. Earlier versions
733 used tables to look up the function to use, but
734 - if the table contains both assembler and disassembler functions then
735 the disassembler contains much of the assembler and vice-versa,
736 - there's a lot of inlining possibilities as things grow,
737 - using a switch statement avoids the function call overhead.
738
739 This function could be moved into `print_insn_normal', but keeping it
740 separate makes clear the interface between `print_insn_normal' and each of
741 the handlers. */
742
743int
47b0e7ad
NC
744iq2000_cgen_extract_operand (CGEN_CPU_DESC cd,
745 int opindex,
746 CGEN_EXTRACT_INFO *ex_info,
747 CGEN_INSN_INT insn_value,
748 CGEN_FIELDS * fields,
749 bfd_vma pc)
47b1a55a
SC
750{
751 /* Assume success (for those operands that are nops). */
752 int length = 1;
753 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
754
755 switch (opindex)
756 {
4030fa5a
NC
757 case IQ2000_OPERAND__INDEX :
758 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 9, 32, total_length, pc, & fields->f_index);
759 break;
47b1a55a
SC
760 case IQ2000_OPERAND_BASE :
761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
762 break;
763 case IQ2000_OPERAND_BASEOFF :
764 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
765 break;
766 case IQ2000_OPERAND_BITNUM :
767 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
768 break;
769 case IQ2000_OPERAND_BYTECOUNT :
770 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 32, total_length, pc, & fields->f_bytecount);
771 break;
772 case IQ2000_OPERAND_CAM_Y :
773 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cam_y);
774 break;
775 case IQ2000_OPERAND_CAM_Z :
776 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cam_z);
777 break;
778 case IQ2000_OPERAND_CM_3FUNC :
779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cm_3func);
780 break;
781 case IQ2000_OPERAND_CM_3Z :
782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 2, 32, total_length, pc, & fields->f_cm_3z);
783 break;
784 case IQ2000_OPERAND_CM_4FUNC :
785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 4, 32, total_length, pc, & fields->f_cm_4func);
786 break;
787 case IQ2000_OPERAND_CM_4Z :
788 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 32, total_length, pc, & fields->f_cm_4z);
789 break;
790 case IQ2000_OPERAND_COUNT :
791 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 7, 32, total_length, pc, & fields->f_count);
792 break;
793 case IQ2000_OPERAND_EXECODE :
794 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 20, 32, total_length, pc, & fields->f_excode);
795 break;
796 case IQ2000_OPERAND_HI16 :
797 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
798 break;
799 case IQ2000_OPERAND_IMM :
800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
801 break;
47b1a55a
SC
802 case IQ2000_OPERAND_JMPTARG :
803 {
804 long value;
805 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, pc, & value);
806 value = ((((pc) & (0xf0000000))) | (((value) << (2))));
807 fields->f_jtarg = value;
808 }
809 break;
810 case IQ2000_OPERAND_JMPTARGQ10 :
811 {
812 long value;
813 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, pc, & value);
814 value = ((((pc) & (0xf0000000))) | (((value) << (2))));
815 fields->f_jtargq10 = value;
816 }
817 break;
818 case IQ2000_OPERAND_LO16 :
819 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
820 break;
821 case IQ2000_OPERAND_MASK :
822 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 4, 32, total_length, pc, & fields->f_mask);
823 break;
824 case IQ2000_OPERAND_MASKL :
825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 5, 32, total_length, pc, & fields->f_maskl);
826 break;
827 case IQ2000_OPERAND_MASKQ10 :
828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_maskq10);
829 break;
830 case IQ2000_OPERAND_MASKR :
831 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
832 break;
833 case IQ2000_OPERAND_MLO16 :
834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_imm);
835 break;
836 case IQ2000_OPERAND_OFFSET :
837 {
838 long value;
839 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value);
840 value = ((((value) << (2))) + (((pc) + (4))));
841 fields->f_offset = value;
842 }
843 break;
844 case IQ2000_OPERAND_RD :
845 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
846 break;
847 case IQ2000_OPERAND_RD_RS :
848 {
849 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
850 if (length <= 0) break;
851 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
852 if (length <= 0) break;
853{
854 FLD (f_rd_rs) = FLD (f_rs);
855}
856 }
857 break;
858 case IQ2000_OPERAND_RD_RT :
859 {
860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_rd);
861 if (length <= 0) break;
862 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
863 if (length <= 0) break;
864{
865 FLD (f_rd_rt) = FLD (f_rt);
866}
867 }
868 break;
869 case IQ2000_OPERAND_RS :
870 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
871 break;
872 case IQ2000_OPERAND_RT :
873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
874 break;
875 case IQ2000_OPERAND_RT_RS :
876 {
877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_rt);
878 if (length <= 0) break;
879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_rs);
880 if (length <= 0) break;
881{
882 FLD (f_rd_rs) = FLD (f_rs);
883}
884 }
885 break;
886 case IQ2000_OPERAND_SHAMT :
887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 5, 32, total_length, pc, & fields->f_shamt);
888 break;
889
890 default :
891 /* xgettext:c-format */
892 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
893 opindex);
894 abort ();
895 }
896
897 return length;
898}
899
43e65147 900cgen_insert_fn * const iq2000_cgen_insert_handlers[] =
47b1a55a
SC
901{
902 insert_insn_normal,
903};
904
43e65147 905cgen_extract_fn * const iq2000_cgen_extract_handlers[] =
47b1a55a
SC
906{
907 extract_insn_normal,
908};
909
47b0e7ad
NC
910int iq2000_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
911bfd_vma iq2000_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
47b1a55a
SC
912
913/* Getting values from cgen_fields is handled by a collection of functions.
914 They are distinguished by the type of the VALUE argument they return.
915 TODO: floating point, inlining support, remove cases where result type
916 not appropriate. */
917
918int
47b0e7ad
NC
919iq2000_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
920 int opindex,
921 const CGEN_FIELDS * fields)
47b1a55a
SC
922{
923 int value;
924
925 switch (opindex)
926 {
4030fa5a
NC
927 case IQ2000_OPERAND__INDEX :
928 value = fields->f_index;
929 break;
47b1a55a
SC
930 case IQ2000_OPERAND_BASE :
931 value = fields->f_rs;
932 break;
933 case IQ2000_OPERAND_BASEOFF :
934 value = fields->f_imm;
935 break;
936 case IQ2000_OPERAND_BITNUM :
937 value = fields->f_rt;
938 break;
939 case IQ2000_OPERAND_BYTECOUNT :
940 value = fields->f_bytecount;
941 break;
942 case IQ2000_OPERAND_CAM_Y :
943 value = fields->f_cam_y;
944 break;
945 case IQ2000_OPERAND_CAM_Z :
946 value = fields->f_cam_z;
947 break;
948 case IQ2000_OPERAND_CM_3FUNC :
949 value = fields->f_cm_3func;
950 break;
951 case IQ2000_OPERAND_CM_3Z :
952 value = fields->f_cm_3z;
953 break;
954 case IQ2000_OPERAND_CM_4FUNC :
955 value = fields->f_cm_4func;
956 break;
957 case IQ2000_OPERAND_CM_4Z :
958 value = fields->f_cm_4z;
959 break;
960 case IQ2000_OPERAND_COUNT :
961 value = fields->f_count;
962 break;
963 case IQ2000_OPERAND_EXECODE :
964 value = fields->f_excode;
965 break;
966 case IQ2000_OPERAND_HI16 :
967 value = fields->f_imm;
968 break;
969 case IQ2000_OPERAND_IMM :
970 value = fields->f_imm;
971 break;
47b1a55a
SC
972 case IQ2000_OPERAND_JMPTARG :
973 value = fields->f_jtarg;
974 break;
975 case IQ2000_OPERAND_JMPTARGQ10 :
976 value = fields->f_jtargq10;
977 break;
978 case IQ2000_OPERAND_LO16 :
979 value = fields->f_imm;
980 break;
981 case IQ2000_OPERAND_MASK :
982 value = fields->f_mask;
983 break;
984 case IQ2000_OPERAND_MASKL :
985 value = fields->f_maskl;
986 break;
987 case IQ2000_OPERAND_MASKQ10 :
988 value = fields->f_maskq10;
989 break;
990 case IQ2000_OPERAND_MASKR :
991 value = fields->f_rs;
992 break;
993 case IQ2000_OPERAND_MLO16 :
994 value = fields->f_imm;
995 break;
996 case IQ2000_OPERAND_OFFSET :
997 value = fields->f_offset;
998 break;
999 case IQ2000_OPERAND_RD :
1000 value = fields->f_rd;
1001 break;
1002 case IQ2000_OPERAND_RD_RS :
1003 value = fields->f_rd_rs;
1004 break;
1005 case IQ2000_OPERAND_RD_RT :
1006 value = fields->f_rd_rt;
1007 break;
1008 case IQ2000_OPERAND_RS :
1009 value = fields->f_rs;
1010 break;
1011 case IQ2000_OPERAND_RT :
1012 value = fields->f_rt;
1013 break;
1014 case IQ2000_OPERAND_RT_RS :
1015 value = fields->f_rt_rs;
1016 break;
1017 case IQ2000_OPERAND_SHAMT :
1018 value = fields->f_shamt;
1019 break;
1020
1021 default :
1022 /* xgettext:c-format */
1023 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1024 opindex);
1025 abort ();
1026 }
1027
1028 return value;
1029}
1030
1031bfd_vma
47b0e7ad
NC
1032iq2000_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1033 int opindex,
1034 const CGEN_FIELDS * fields)
47b1a55a
SC
1035{
1036 bfd_vma value;
1037
1038 switch (opindex)
1039 {
4030fa5a
NC
1040 case IQ2000_OPERAND__INDEX :
1041 value = fields->f_index;
1042 break;
47b1a55a
SC
1043 case IQ2000_OPERAND_BASE :
1044 value = fields->f_rs;
1045 break;
1046 case IQ2000_OPERAND_BASEOFF :
1047 value = fields->f_imm;
1048 break;
1049 case IQ2000_OPERAND_BITNUM :
1050 value = fields->f_rt;
1051 break;
1052 case IQ2000_OPERAND_BYTECOUNT :
1053 value = fields->f_bytecount;
1054 break;
1055 case IQ2000_OPERAND_CAM_Y :
1056 value = fields->f_cam_y;
1057 break;
1058 case IQ2000_OPERAND_CAM_Z :
1059 value = fields->f_cam_z;
1060 break;
1061 case IQ2000_OPERAND_CM_3FUNC :
1062 value = fields->f_cm_3func;
1063 break;
1064 case IQ2000_OPERAND_CM_3Z :
1065 value = fields->f_cm_3z;
1066 break;
1067 case IQ2000_OPERAND_CM_4FUNC :
1068 value = fields->f_cm_4func;
1069 break;
1070 case IQ2000_OPERAND_CM_4Z :
1071 value = fields->f_cm_4z;
1072 break;
1073 case IQ2000_OPERAND_COUNT :
1074 value = fields->f_count;
1075 break;
1076 case IQ2000_OPERAND_EXECODE :
1077 value = fields->f_excode;
1078 break;
1079 case IQ2000_OPERAND_HI16 :
1080 value = fields->f_imm;
1081 break;
1082 case IQ2000_OPERAND_IMM :
1083 value = fields->f_imm;
1084 break;
47b1a55a
SC
1085 case IQ2000_OPERAND_JMPTARG :
1086 value = fields->f_jtarg;
1087 break;
1088 case IQ2000_OPERAND_JMPTARGQ10 :
1089 value = fields->f_jtargq10;
1090 break;
1091 case IQ2000_OPERAND_LO16 :
1092 value = fields->f_imm;
1093 break;
1094 case IQ2000_OPERAND_MASK :
1095 value = fields->f_mask;
1096 break;
1097 case IQ2000_OPERAND_MASKL :
1098 value = fields->f_maskl;
1099 break;
1100 case IQ2000_OPERAND_MASKQ10 :
1101 value = fields->f_maskq10;
1102 break;
1103 case IQ2000_OPERAND_MASKR :
1104 value = fields->f_rs;
1105 break;
1106 case IQ2000_OPERAND_MLO16 :
1107 value = fields->f_imm;
1108 break;
1109 case IQ2000_OPERAND_OFFSET :
1110 value = fields->f_offset;
1111 break;
1112 case IQ2000_OPERAND_RD :
1113 value = fields->f_rd;
1114 break;
1115 case IQ2000_OPERAND_RD_RS :
1116 value = fields->f_rd_rs;
1117 break;
1118 case IQ2000_OPERAND_RD_RT :
1119 value = fields->f_rd_rt;
1120 break;
1121 case IQ2000_OPERAND_RS :
1122 value = fields->f_rs;
1123 break;
1124 case IQ2000_OPERAND_RT :
1125 value = fields->f_rt;
1126 break;
1127 case IQ2000_OPERAND_RT_RS :
1128 value = fields->f_rt_rs;
1129 break;
1130 case IQ2000_OPERAND_SHAMT :
1131 value = fields->f_shamt;
1132 break;
1133
1134 default :
1135 /* xgettext:c-format */
1136 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1137 opindex);
1138 abort ();
1139 }
1140
1141 return value;
1142}
1143
47b0e7ad
NC
1144void iq2000_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1145void iq2000_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
47b1a55a
SC
1146
1147/* Stuffing values in cgen_fields is handled by a collection of functions.
1148 They are distinguished by the type of the VALUE argument they accept.
1149 TODO: floating point, inlining support, remove cases where argument type
1150 not appropriate. */
1151
1152void
47b0e7ad
NC
1153iq2000_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1154 int opindex,
1155 CGEN_FIELDS * fields,
1156 int value)
47b1a55a
SC
1157{
1158 switch (opindex)
1159 {
4030fa5a
NC
1160 case IQ2000_OPERAND__INDEX :
1161 fields->f_index = value;
1162 break;
47b1a55a
SC
1163 case IQ2000_OPERAND_BASE :
1164 fields->f_rs = value;
1165 break;
1166 case IQ2000_OPERAND_BASEOFF :
1167 fields->f_imm = value;
1168 break;
1169 case IQ2000_OPERAND_BITNUM :
1170 fields->f_rt = value;
1171 break;
1172 case IQ2000_OPERAND_BYTECOUNT :
1173 fields->f_bytecount = value;
1174 break;
1175 case IQ2000_OPERAND_CAM_Y :
1176 fields->f_cam_y = value;
1177 break;
1178 case IQ2000_OPERAND_CAM_Z :
1179 fields->f_cam_z = value;
1180 break;
1181 case IQ2000_OPERAND_CM_3FUNC :
1182 fields->f_cm_3func = value;
1183 break;
1184 case IQ2000_OPERAND_CM_3Z :
1185 fields->f_cm_3z = value;
1186 break;
1187 case IQ2000_OPERAND_CM_4FUNC :
1188 fields->f_cm_4func = value;
1189 break;
1190 case IQ2000_OPERAND_CM_4Z :
1191 fields->f_cm_4z = value;
1192 break;
1193 case IQ2000_OPERAND_COUNT :
1194 fields->f_count = value;
1195 break;
1196 case IQ2000_OPERAND_EXECODE :
1197 fields->f_excode = value;
1198 break;
1199 case IQ2000_OPERAND_HI16 :
1200 fields->f_imm = value;
1201 break;
1202 case IQ2000_OPERAND_IMM :
1203 fields->f_imm = value;
1204 break;
47b1a55a
SC
1205 case IQ2000_OPERAND_JMPTARG :
1206 fields->f_jtarg = value;
1207 break;
1208 case IQ2000_OPERAND_JMPTARGQ10 :
1209 fields->f_jtargq10 = value;
1210 break;
1211 case IQ2000_OPERAND_LO16 :
1212 fields->f_imm = value;
1213 break;
1214 case IQ2000_OPERAND_MASK :
1215 fields->f_mask = value;
1216 break;
1217 case IQ2000_OPERAND_MASKL :
1218 fields->f_maskl = value;
1219 break;
1220 case IQ2000_OPERAND_MASKQ10 :
1221 fields->f_maskq10 = value;
1222 break;
1223 case IQ2000_OPERAND_MASKR :
1224 fields->f_rs = value;
1225 break;
1226 case IQ2000_OPERAND_MLO16 :
1227 fields->f_imm = value;
1228 break;
1229 case IQ2000_OPERAND_OFFSET :
1230 fields->f_offset = value;
1231 break;
1232 case IQ2000_OPERAND_RD :
1233 fields->f_rd = value;
1234 break;
1235 case IQ2000_OPERAND_RD_RS :
1236 fields->f_rd_rs = value;
1237 break;
1238 case IQ2000_OPERAND_RD_RT :
1239 fields->f_rd_rt = value;
1240 break;
1241 case IQ2000_OPERAND_RS :
1242 fields->f_rs = value;
1243 break;
1244 case IQ2000_OPERAND_RT :
1245 fields->f_rt = value;
1246 break;
1247 case IQ2000_OPERAND_RT_RS :
1248 fields->f_rt_rs = value;
1249 break;
1250 case IQ2000_OPERAND_SHAMT :
1251 fields->f_shamt = value;
1252 break;
1253
1254 default :
1255 /* xgettext:c-format */
1256 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1257 opindex);
1258 abort ();
1259 }
1260}
1261
1262void
47b0e7ad
NC
1263iq2000_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1264 int opindex,
1265 CGEN_FIELDS * fields,
1266 bfd_vma value)
47b1a55a
SC
1267{
1268 switch (opindex)
1269 {
4030fa5a
NC
1270 case IQ2000_OPERAND__INDEX :
1271 fields->f_index = value;
1272 break;
47b1a55a
SC
1273 case IQ2000_OPERAND_BASE :
1274 fields->f_rs = value;
1275 break;
1276 case IQ2000_OPERAND_BASEOFF :
1277 fields->f_imm = value;
1278 break;
1279 case IQ2000_OPERAND_BITNUM :
1280 fields->f_rt = value;
1281 break;
1282 case IQ2000_OPERAND_BYTECOUNT :
1283 fields->f_bytecount = value;
1284 break;
1285 case IQ2000_OPERAND_CAM_Y :
1286 fields->f_cam_y = value;
1287 break;
1288 case IQ2000_OPERAND_CAM_Z :
1289 fields->f_cam_z = value;
1290 break;
1291 case IQ2000_OPERAND_CM_3FUNC :
1292 fields->f_cm_3func = value;
1293 break;
1294 case IQ2000_OPERAND_CM_3Z :
1295 fields->f_cm_3z = value;
1296 break;
1297 case IQ2000_OPERAND_CM_4FUNC :
1298 fields->f_cm_4func = value;
1299 break;
1300 case IQ2000_OPERAND_CM_4Z :
1301 fields->f_cm_4z = value;
1302 break;
1303 case IQ2000_OPERAND_COUNT :
1304 fields->f_count = value;
1305 break;
1306 case IQ2000_OPERAND_EXECODE :
1307 fields->f_excode = value;
1308 break;
1309 case IQ2000_OPERAND_HI16 :
1310 fields->f_imm = value;
1311 break;
1312 case IQ2000_OPERAND_IMM :
1313 fields->f_imm = value;
1314 break;
47b1a55a
SC
1315 case IQ2000_OPERAND_JMPTARG :
1316 fields->f_jtarg = value;
1317 break;
1318 case IQ2000_OPERAND_JMPTARGQ10 :
1319 fields->f_jtargq10 = value;
1320 break;
1321 case IQ2000_OPERAND_LO16 :
1322 fields->f_imm = value;
1323 break;
1324 case IQ2000_OPERAND_MASK :
1325 fields->f_mask = value;
1326 break;
1327 case IQ2000_OPERAND_MASKL :
1328 fields->f_maskl = value;
1329 break;
1330 case IQ2000_OPERAND_MASKQ10 :
1331 fields->f_maskq10 = value;
1332 break;
1333 case IQ2000_OPERAND_MASKR :
1334 fields->f_rs = value;
1335 break;
1336 case IQ2000_OPERAND_MLO16 :
1337 fields->f_imm = value;
1338 break;
1339 case IQ2000_OPERAND_OFFSET :
1340 fields->f_offset = value;
1341 break;
1342 case IQ2000_OPERAND_RD :
1343 fields->f_rd = value;
1344 break;
1345 case IQ2000_OPERAND_RD_RS :
1346 fields->f_rd_rs = value;
1347 break;
1348 case IQ2000_OPERAND_RD_RT :
1349 fields->f_rd_rt = value;
1350 break;
1351 case IQ2000_OPERAND_RS :
1352 fields->f_rs = value;
1353 break;
1354 case IQ2000_OPERAND_RT :
1355 fields->f_rt = value;
1356 break;
1357 case IQ2000_OPERAND_RT_RS :
1358 fields->f_rt_rs = value;
1359 break;
1360 case IQ2000_OPERAND_SHAMT :
1361 fields->f_shamt = value;
1362 break;
1363
1364 default :
1365 /* xgettext:c-format */
1366 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1367 opindex);
1368 abort ();
1369 }
1370}
1371
1372/* Function to call before using the instruction builder tables. */
1373
1374void
47b0e7ad 1375iq2000_cgen_init_ibld_table (CGEN_CPU_DESC cd)
47b1a55a
SC
1376{
1377 cd->insert_handlers = & iq2000_cgen_insert_handlers[0];
1378 cd->extract_handlers = & iq2000_cgen_extract_handlers[0];
1379
1380 cd->insert_operand = iq2000_cgen_insert_operand;
1381 cd->extract_operand = iq2000_cgen_extract_operand;
1382
1383 cd->get_int_operand = iq2000_cgen_get_int_operand;
1384 cd->set_int_operand = iq2000_cgen_set_int_operand;
1385 cd->get_vma_operand = iq2000_cgen_get_vma_operand;
1386 cd->set_vma_operand = iq2000_cgen_set_vma_operand;
1387}