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[thirdparty/binutils-gdb.git] / opcodes / m32r-opc.c
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252b5132
RH		 1/* Instruction opcode table for m32r.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
9b201bb5 5Copyright 1996-2007 Free Software Foundation, Inc.
252b5132
RH		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9b201bb5
NC		 9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
252b5132 13
9b201bb5
NC		 14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
252b5132 18
9b201bb5
NC		 19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
252b5132
RH		 22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "m32r-desc.h"
30#include "m32r-opc.h"
6bb95a0f 31#include "libiberty.h"
252b5132 32
88845958
NC		 33/* -- opc.c */
34unsigned int
47b0e7ad 35m32r_cgen_dis_hash (const char * buf ATTRIBUTE_UNUSED, CGEN_INSN_INT value)
88845958
NC		 36{
37 unsigned int x;
47b0e7ad
NC		 38
39 if (value & 0xffff0000) /* 32bit instructions. */
88845958 40 value = (value >> 16) & 0xffff;
47b0e7ad
NC		 41
42 x = (value >> 8) & 0xf0;
88845958
NC		 43 if (x == 0x40 || x == 0xe0 || x == 0x60 || x == 0x50)
44 return x;
47b0e7ad 45
88845958 46 if (x == 0x70 || x == 0xf0)
47b0e7ad
NC		 47 return x | ((value >> 8) & 0x0f);
48
88845958
NC		 49 if (x == 0x30)
50 return x | ((value & 0x70) >> 4);
51 else
52 return x | ((value & 0xf0) >> 4);
53}
47b0e7ad 54
88845958 55/* -- */
252b5132
RH		 56/* The hash functions are recorded here to help keep assembler code out of
57 the disassembler and vice versa. */
58
47b0e7ad
NC		 59static int asm_hash_insn_p (const CGEN_INSN *);
60static unsigned int asm_hash_insn (const char *);
61static int dis_hash_insn_p (const CGEN_INSN *);
62static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
252b5132
RH		 63
64/* Instruction formats. */
65
b3466c39
DB		 66#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
67#define F(f) & m32r_cgen_ifld_table[M32R_##f]
68#else
69#define F(f) & m32r_cgen_ifld_table[M32R_/**/f]
70#endif
bf143b25 71static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
6bb95a0f 72 0, 0, 0x0, { { 0 } }
252b5132
RH		 73};
74
bf143b25 75static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
6bb95a0f 76 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 77};
78
bf143b25 79static const CGEN_IFMT ifmt_add3 ATTRIBUTE_UNUSED = {
6bb95a0f 80 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 81};
82
bf143b25 83static const CGEN_IFMT ifmt_and3 ATTRIBUTE_UNUSED = {
6bb95a0f 84 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
252b5132
RH		 85};
86
bf143b25 87static const CGEN_IFMT ifmt_or3 ATTRIBUTE_UNUSED = {
6bb95a0f 88 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
252b5132
RH		 89};
90
bf143b25 91static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
6bb95a0f 92 16, 16, 0xf000, { { F (F_OP1) }, { F (F_R1) }, { F (F_SIMM8) }, { 0 } }
252b5132
RH		 93};
94
bf143b25 95static const CGEN_IFMT ifmt_addv3 ATTRIBUTE_UNUSED = {
6bb95a0f 96 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 97};
98
bf143b25 99static const CGEN_IFMT ifmt_bc8 ATTRIBUTE_UNUSED = {
6bb95a0f 100 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
252b5132
RH		 101};
102
bf143b25 103static const CGEN_IFMT ifmt_bc24 ATTRIBUTE_UNUSED = {
6bb95a0f 104 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
252b5132
RH		 105};
106
bf143b25 107static const CGEN_IFMT ifmt_beq ATTRIBUTE_UNUSED = {
6bb95a0f 108 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_DISP16) }, { 0 } }
252b5132
RH		 109};
110
bf143b25 111static const CGEN_IFMT ifmt_beqz ATTRIBUTE_UNUSED = {
6bb95a0f 112 32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_DISP16) }, { 0 } }
252b5132
RH		 113};
114
bf143b25 115static const CGEN_IFMT ifmt_cmp ATTRIBUTE_UNUSED = {
6bb95a0f 116 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 117};
118
bf143b25 119static const CGEN_IFMT ifmt_cmpi ATTRIBUTE_UNUSED = {
6bb95a0f 120 32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 121};
122
bf143b25 123static const CGEN_IFMT ifmt_cmpz ATTRIBUTE_UNUSED = {
6bb95a0f 124 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
1fa60b5d
DE		 125};
126
bf143b25 127static const CGEN_IFMT ifmt_div ATTRIBUTE_UNUSED = {
6bb95a0f 128 32, 32, 0xf0f0ffff, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 129};
130
bf143b25 131static const CGEN_IFMT ifmt_jc ATTRIBUTE_UNUSED = {
6bb95a0f 132 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 133};
134
bf143b25 135static const CGEN_IFMT ifmt_ld24 ATTRIBUTE_UNUSED = {
6bb95a0f 136 32, 32, 0xf0000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_UIMM24) }, { 0 } }
252b5132
RH		 137};
138
bf143b25 139static const CGEN_IFMT ifmt_ldi16 ATTRIBUTE_UNUSED = {
6bb95a0f 140 32, 32, 0xf0ff0000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 141};
142
bf143b25 143static const CGEN_IFMT ifmt_machi_a ATTRIBUTE_UNUSED = {
6bb95a0f 144 16, 16, 0xf070, { { F (F_OP1) }, { F (F_R1) }, { F (F_ACC) }, { F (F_OP23) }, { F (F_R2) }, { 0 } }
1fa60b5d
DE		 145};
146
bf143b25 147static const CGEN_IFMT ifmt_mvfachi ATTRIBUTE_UNUSED = {
6bb95a0f 148 16, 16, 0xf0ff, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 149};
150
bf143b25 151static const CGEN_IFMT ifmt_mvfachi_a ATTRIBUTE_UNUSED = {
6bb95a0f 152 16, 16, 0xf0f3, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_OP3) }, { 0 } }
1fa60b5d
DE		 153};
154
bf143b25 155static const CGEN_IFMT ifmt_mvfc ATTRIBUTE_UNUSED = {
6bb95a0f 156 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 157};
158
bf143b25 159static const CGEN_IFMT ifmt_mvtachi ATTRIBUTE_UNUSED = {
6bb95a0f 160 16, 16, 0xf0ff, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 161};
162
bf143b25 163static const CGEN_IFMT ifmt_mvtachi_a ATTRIBUTE_UNUSED = {
6bb95a0f 164 16, 16, 0xf0f3, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_OP3) }, { 0 } }
1fa60b5d
DE		 165};
166
bf143b25 167static const CGEN_IFMT ifmt_mvtc ATTRIBUTE_UNUSED = {
6bb95a0f 168 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 169};
170
bf143b25 171static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
6bb95a0f 172 16, 16, 0xffff, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 173};
174
bf143b25 175static const CGEN_IFMT ifmt_rac_dsi ATTRIBUTE_UNUSED = {
6bb95a0f 176 16, 16, 0xf3f2, { { F (F_OP1) }, { F (F_ACCD) }, { F (F_BITS67) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_BIT14) }, { F (F_IMM1) }, { 0 } }
1fa60b5d
DE		 177};
178
bf143b25 179static const CGEN_IFMT ifmt_seth ATTRIBUTE_UNUSED = {
6bb95a0f 180 32, 32, 0xf0ff0000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_HI16) }, { 0 } }
252b5132
RH		 181};
182
bf143b25 183static const CGEN_IFMT ifmt_slli ATTRIBUTE_UNUSED = {
6bb95a0f 184 16, 16, 0xf0e0, { { F (F_OP1) }, { F (F_R1) }, { F (F_SHIFT_OP2) }, { F (F_UIMM5) }, { 0 } }
252b5132
RH		 185};
186
bf143b25 187static const CGEN_IFMT ifmt_st_d ATTRIBUTE_UNUSED = {
6bb95a0f 188 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 189};
190
bf143b25 191static const CGEN_IFMT ifmt_trap ATTRIBUTE_UNUSED = {
6bb95a0f 192 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_UIMM4) }, { 0 } }
252b5132
RH		 193};
194
bf143b25 195static const CGEN_IFMT ifmt_satb ATTRIBUTE_UNUSED = {
6bb95a0f 196 32, 32, 0xf0f0ffff, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
1fa60b5d
DE		 197};
198
bf143b25 199static const CGEN_IFMT ifmt_clrpsw ATTRIBUTE_UNUSED = {
88845958
NC		 200 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_UIMM8) }, { 0 } }
201};
202
bf143b25 203static const CGEN_IFMT ifmt_bset ATTRIBUTE_UNUSED = {
88845958
NC		 204 32, 32, 0xf8f00000, { { F (F_OP1) }, { F (F_BIT4) }, { F (F_UIMM3) }, { F (F_OP2) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
205};
206
bf143b25 207static const CGEN_IFMT ifmt_btst ATTRIBUTE_UNUSED = {
88845958
NC		 208 16, 16, 0xf8f0, { { F (F_OP1) }, { F (F_BIT4) }, { F (F_UIMM3) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
209};
210
252b5132
RH		 211#undef F
212
b3466c39
DB		 213#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
214#define A(a) (1 << CGEN_INSN_##a)
215#else
216#define A(a) (1 << CGEN_INSN_/**/a)
217#endif
218#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
219#define OPERAND(op) M32R_OPERAND_##op
220#else
221#define OPERAND(op) M32R_OPERAND_/**/op
222#endif
252b5132 223#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
252b5132
RH		 224#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
225
226/* The instruction table. */
227
228static const CGEN_OPCODE m32r_cgen_insn_opcode_table[MAX_INSNS] =
229{
230 /* Special null first entry.
231 A `num' value of zero is thus invalid.
232 Also, the special `invalid' insn resides here. */
6bb95a0f 233 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
252b5132
RH		 234/* add $dr,$sr */
235 {
236 { 0, 0, 0, 0 },
237 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
238 & ifmt_add, { 0xa0 }
239 },
240/* add3 $dr,$sr,$hash$slo16 */
241 {
242 { 0, 0, 0, 0 },
243 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (HASH), OP (SLO16), 0 } },
244 & ifmt_add3, { 0x80a00000 }
245 },
246/* and $dr,$sr */
247 {
248 { 0, 0, 0, 0 },
249 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
250 & ifmt_add, { 0xc0 }
251 },
252/* and3 $dr,$sr,$uimm16 */
253 {
254 { 0, 0, 0, 0 },
255 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (UIMM16), 0 } },
256 & ifmt_and3, { 0x80c00000 }
257 },
258/* or $dr,$sr */
259 {
260 { 0, 0, 0, 0 },
261 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
262 & ifmt_add, { 0xe0 }
263 },
264/* or3 $dr,$sr,$hash$ulo16 */
265 {
266 { 0, 0, 0, 0 },
267 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (HASH), OP (ULO16), 0 } },
268 & ifmt_or3, { 0x80e00000 }
269 },
270/* xor $dr,$sr */
271 {
272 { 0, 0, 0, 0 },
273 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
274 & ifmt_add, { 0xd0 }
275 },
276/* xor3 $dr,$sr,$uimm16 */
277 {
278 { 0, 0, 0, 0 },
279 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (UIMM16), 0 } },
280 & ifmt_and3, { 0x80d00000 }
281 },
282/* addi $dr,$simm8 */
283 {
284 { 0, 0, 0, 0 },
285 { { MNEM, ' ', OP (DR), ',', OP (SIMM8), 0 } },
286 & ifmt_addi, { 0x4000 }
287 },
288/* addv $dr,$sr */
289 {
290 { 0, 0, 0, 0 },
291 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
292 & ifmt_add, { 0x80 }
293 },
294/* addv3 $dr,$sr,$simm16 */
295 {
296 { 0, 0, 0, 0 },
297 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (SIMM16), 0 } },
298 & ifmt_addv3, { 0x80800000 }
299 },
300/* addx $dr,$sr */
301 {
302 { 0, 0, 0, 0 },
303 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
304 & ifmt_add, { 0x90 }
305 },
306/* bc.s $disp8 */
307 {
308 { 0, 0, 0, 0 },
309 { { MNEM, ' ', OP (DISP8), 0 } },
310 & ifmt_bc8, { 0x7c00 }
311 },
312/* bc.l $disp24 */
313 {
314 { 0, 0, 0, 0 },
315 { { MNEM, ' ', OP (DISP24), 0 } },
316 & ifmt_bc24, { 0xfc000000 }
317 },
318/* beq $src1,$src2,$disp16 */
319 {
320 { 0, 0, 0, 0 },
321 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
322 & ifmt_beq, { 0xb0000000 }
323 },
324/* beqz $src2,$disp16 */
325 {
326 { 0, 0, 0, 0 },
327 { { MNEM, ' ', OP (SRC2), ',', OP (DISP16), 0 } },
328 & ifmt_beqz, { 0xb0800000 }
329 },
330/* bgez $src2,$disp16 */
331 {
332 { 0, 0, 0, 0 },
333 { { MNEM, ' ', OP (SRC2), ',', OP (DISP16), 0 } },
334 & ifmt_beqz, { 0xb0b00000 }
335 },
336/* bgtz $src2,$disp16 */
337 {
338 { 0, 0, 0, 0 },
339 { { MNEM, ' ', OP (SRC2), ',', OP (DISP16), 0 } },
340 & ifmt_beqz, { 0xb0d00000 }
341 },
342/* blez $src2,$disp16 */
343 {
344 { 0, 0, 0, 0 },
345 { { MNEM, ' ', OP (SRC2), ',', OP (DISP16), 0 } },
346 & ifmt_beqz, { 0xb0c00000 }
347 },
348/* bltz $src2,$disp16 */
349 {
350 { 0, 0, 0, 0 },
351 { { MNEM, ' ', OP (SRC2), ',', OP (DISP16), 0 } },
352 & ifmt_beqz, { 0xb0a00000 }
353 },
354/* bnez $src2,$disp16 */
355 {
356 { 0, 0, 0, 0 },
357 { { MNEM, ' ', OP (SRC2), ',', OP (DISP16), 0 } },
358 & ifmt_beqz, { 0xb0900000 }
359 },
360/* bl.s $disp8 */
361 {
362 { 0, 0, 0, 0 },
363 { { MNEM, ' ', OP (DISP8), 0 } },
364 & ifmt_bc8, { 0x7e00 }
365 },
366/* bl.l $disp24 */
367 {
368 { 0, 0, 0, 0 },
369 { { MNEM, ' ', OP (DISP24), 0 } },
370 & ifmt_bc24, { 0xfe000000 }
371 },
1fa60b5d
DE		 372/* bcl.s $disp8 */
373 {
374 { 0, 0, 0, 0 },
375 { { MNEM, ' ', OP (DISP8), 0 } },
376 & ifmt_bc8, { 0x7800 }
377 },
378/* bcl.l $disp24 */
379 {
380 { 0, 0, 0, 0 },
381 { { MNEM, ' ', OP (DISP24), 0 } },
382 & ifmt_bc24, { 0xf8000000 }
383 },
252b5132
RH		 384/* bnc.s $disp8 */
385 {
386 { 0, 0, 0, 0 },
387 { { MNEM, ' ', OP (DISP8), 0 } },
388 & ifmt_bc8, { 0x7d00 }
389 },
390/* bnc.l $disp24 */
391 {
392 { 0, 0, 0, 0 },
393 { { MNEM, ' ', OP (DISP24), 0 } },
394 & ifmt_bc24, { 0xfd000000 }
395 },
396/* bne $src1,$src2,$disp16 */
397 {
398 { 0, 0, 0, 0 },
399 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
400 & ifmt_beq, { 0xb0100000 }
401 },
402/* bra.s $disp8 */
403 {
404 { 0, 0, 0, 0 },
405 { { MNEM, ' ', OP (DISP8), 0 } },
406 & ifmt_bc8, { 0x7f00 }
407 },
408/* bra.l $disp24 */
409 {
410 { 0, 0, 0, 0 },
411 { { MNEM, ' ', OP (DISP24), 0 } },
412 & ifmt_bc24, { 0xff000000 }
413 },
1fa60b5d
DE		 414/* bncl.s $disp8 */
415 {
416 { 0, 0, 0, 0 },
417 { { MNEM, ' ', OP (DISP8), 0 } },
418 & ifmt_bc8, { 0x7900 }
419 },
420/* bncl.l $disp24 */
421 {
422 { 0, 0, 0, 0 },
423 { { MNEM, ' ', OP (DISP24), 0 } },
424 & ifmt_bc24, { 0xf9000000 }
425 },
252b5132
RH		 426/* cmp $src1,$src2 */
427 {
428 { 0, 0, 0, 0 },
429 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
430 & ifmt_cmp, { 0x40 }
431 },
432/* cmpi $src2,$simm16 */
433 {
434 { 0, 0, 0, 0 },
435 { { MNEM, ' ', OP (SRC2), ',', OP (SIMM16), 0 } },
436 & ifmt_cmpi, { 0x80400000 }
437 },
438/* cmpu $src1,$src2 */
439 {
440 { 0, 0, 0, 0 },
441 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
442 & ifmt_cmp, { 0x50 }
443 },
444/* cmpui $src2,$simm16 */
445 {
446 { 0, 0, 0, 0 },
447 { { MNEM, ' ', OP (SRC2), ',', OP (SIMM16), 0 } },
448 & ifmt_cmpi, { 0x80500000 }
449 },
1fa60b5d
DE		 450/* cmpeq $src1,$src2 */
451 {
452 { 0, 0, 0, 0 },
453 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
454 & ifmt_cmp, { 0x60 }
455 },
456/* cmpz $src2 */
457 {
458 { 0, 0, 0, 0 },
459 { { MNEM, ' ', OP (SRC2), 0 } },
460 & ifmt_cmpz, { 0x70 }
461 },
252b5132
RH		 462/* div $dr,$sr */
463 {
464 { 0, 0, 0, 0 },
465 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
466 & ifmt_div, { 0x90000000 }
467 },
468/* divu $dr,$sr */
469 {
470 { 0, 0, 0, 0 },
471 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
472 & ifmt_div, { 0x90100000 }
473 },
474/* rem $dr,$sr */
475 {
476 { 0, 0, 0, 0 },
477 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
478 & ifmt_div, { 0x90200000 }
479 },
480/* remu $dr,$sr */
481 {
482 { 0, 0, 0, 0 },
483 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
484 & ifmt_div, { 0x90300000 }
485 },
88845958
NC		 486/* remh $dr,$sr */
487 {
488 { 0, 0, 0, 0 },
489 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
490 & ifmt_div, { 0x90200010 }
491 },
492/* remuh $dr,$sr */
493 {
494 { 0, 0, 0, 0 },
495 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
496 & ifmt_div, { 0x90300010 }
497 },
498/* remb $dr,$sr */
499 {
500 { 0, 0, 0, 0 },
501 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
502 & ifmt_div, { 0x90200018 }
503 },
504/* remub $dr,$sr */
505 {
506 { 0, 0, 0, 0 },
507 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
508 & ifmt_div, { 0x90300018 }
509 },
510/* divuh $dr,$sr */
511 {
512 { 0, 0, 0, 0 },
513 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
514 & ifmt_div, { 0x90100010 }
515 },
516/* divb $dr,$sr */
517 {
518 { 0, 0, 0, 0 },
519 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
520 & ifmt_div, { 0x90000018 }
521 },
522/* divub $dr,$sr */
523 {
524 { 0, 0, 0, 0 },
525 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
526 & ifmt_div, { 0x90100018 }
527 },
1fa60b5d
DE		 528/* divh $dr,$sr */
529 {
530 { 0, 0, 0, 0 },
531 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
532 & ifmt_div, { 0x90000010 }
533 },
534/* jc $sr */
535 {
536 { 0, 0, 0, 0 },
537 { { MNEM, ' ', OP (SR), 0 } },
538 & ifmt_jc, { 0x1cc0 }
539 },
540/* jnc $sr */
541 {
542 { 0, 0, 0, 0 },
543 { { MNEM, ' ', OP (SR), 0 } },
544 & ifmt_jc, { 0x1dc0 }
545 },
252b5132
RH		 546/* jl $sr */
547 {
548 { 0, 0, 0, 0 },
549 { { MNEM, ' ', OP (SR), 0 } },
1fa60b5d 550 & ifmt_jc, { 0x1ec0 }
252b5132
RH		 551 },
552/* jmp $sr */
553 {
554 { 0, 0, 0, 0 },
555 { { MNEM, ' ', OP (SR), 0 } },
1fa60b5d 556 & ifmt_jc, { 0x1fc0 }
252b5132
RH		 557 },
558/* ld $dr,@$sr */
559 {
560 { 0, 0, 0, 0 },
561 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), 0 } },
562 & ifmt_add, { 0x20c0 }
563 },
564/* ld $dr,@($slo16,$sr) */
565 {
566 { 0, 0, 0, 0 },
567 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
568 & ifmt_add3, { 0xa0c00000 }
569 },
570/* ldb $dr,@$sr */
571 {
572 { 0, 0, 0, 0 },
573 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), 0 } },
574 & ifmt_add, { 0x2080 }
575 },
576/* ldb $dr,@($slo16,$sr) */
577 {
578 { 0, 0, 0, 0 },
579 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
580 & ifmt_add3, { 0xa0800000 }
581 },
582/* ldh $dr,@$sr */
583 {
584 { 0, 0, 0, 0 },
585 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), 0 } },
586 & ifmt_add, { 0x20a0 }
587 },
588/* ldh $dr,@($slo16,$sr) */
589 {
590 { 0, 0, 0, 0 },
591 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
592 & ifmt_add3, { 0xa0a00000 }
593 },
594/* ldub $dr,@$sr */
595 {
596 { 0, 0, 0, 0 },
597 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), 0 } },
598 & ifmt_add, { 0x2090 }
599 },
600/* ldub $dr,@($slo16,$sr) */
601 {
602 { 0, 0, 0, 0 },
603 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
604 & ifmt_add3, { 0xa0900000 }
605 },
606/* lduh $dr,@$sr */
607 {
608 { 0, 0, 0, 0 },
609 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), 0 } },
610 & ifmt_add, { 0x20b0 }
611 },
612/* lduh $dr,@($slo16,$sr) */
613 {
614 { 0, 0, 0, 0 },
615 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
616 & ifmt_add3, { 0xa0b00000 }
617 },
618/* ld $dr,@$sr+ */
619 {
620 { 0, 0, 0, 0 },
621 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), '+', 0 } },
622 & ifmt_add, { 0x20e0 }
623 },
624/* ld24 $dr,$uimm24 */
625 {
626 { 0, 0, 0, 0 },
627 { { MNEM, ' ', OP (DR), ',', OP (UIMM24), 0 } },
628 & ifmt_ld24, { 0xe0000000 }
629 },
630/* ldi8 $dr,$simm8 */
631 {
632 { 0, 0, 0, 0 },
633 { { MNEM, ' ', OP (DR), ',', OP (SIMM8), 0 } },
634 & ifmt_addi, { 0x6000 }
635 },
636/* ldi16 $dr,$hash$slo16 */
637 {
638 { 0, 0, 0, 0 },
639 { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (SLO16), 0 } },
640 & ifmt_ldi16, { 0x90f00000 }
641 },
642/* lock $dr,@$sr */
643 {
644 { 0, 0, 0, 0 },
645 { { MNEM, ' ', OP (DR), ',', '@', OP (SR), 0 } },
646 & ifmt_add, { 0x20d0 }
647 },
648/* machi $src1,$src2 */
649 {
650 { 0, 0, 0, 0 },
651 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
652 & ifmt_cmp, { 0x3040 }
653 },
1fa60b5d
DE		 654/* machi $src1,$src2,$acc */
655 {
656 { 0, 0, 0, 0 },
657 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
658 & ifmt_machi_a, { 0x3040 }
659 },
252b5132
RH		 660/* maclo $src1,$src2 */
661 {
662 { 0, 0, 0, 0 },
663 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
664 & ifmt_cmp, { 0x3050 }
665 },
1fa60b5d
DE		 666/* maclo $src1,$src2,$acc */
667 {
668 { 0, 0, 0, 0 },
669 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
670 & ifmt_machi_a, { 0x3050 }
671 },
252b5132
RH		 672/* macwhi $src1,$src2 */
673 {
674 { 0, 0, 0, 0 },
675 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
676 & ifmt_cmp, { 0x3060 }
677 },
1fa60b5d
DE		 678/* macwhi $src1,$src2,$acc */
679 {
680 { 0, 0, 0, 0 },
681 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
682 & ifmt_machi_a, { 0x3060 }
683 },
252b5132
RH		 684/* macwlo $src1,$src2 */
685 {
686 { 0, 0, 0, 0 },
687 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
688 & ifmt_cmp, { 0x3070 }
689 },
1fa60b5d
DE		 690/* macwlo $src1,$src2,$acc */
691 {
692 { 0, 0, 0, 0 },
693 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
694 & ifmt_machi_a, { 0x3070 }
695 },
252b5132
RH		 696/* mul $dr,$sr */
697 {
698 { 0, 0, 0, 0 },
699 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
700 & ifmt_add, { 0x1060 }
701 },
702/* mulhi $src1,$src2 */
703 {
704 { 0, 0, 0, 0 },
705 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
706 & ifmt_cmp, { 0x3000 }
707 },
1fa60b5d
DE		 708/* mulhi $src1,$src2,$acc */
709 {
710 { 0, 0, 0, 0 },
711 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
712 & ifmt_machi_a, { 0x3000 }
713 },
252b5132
RH		 714/* mullo $src1,$src2 */
715 {
716 { 0, 0, 0, 0 },
717 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
718 & ifmt_cmp, { 0x3010 }
719 },
1fa60b5d
DE		 720/* mullo $src1,$src2,$acc */
721 {
722 { 0, 0, 0, 0 },
723 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
724 & ifmt_machi_a, { 0x3010 }
725 },
252b5132
RH		 726/* mulwhi $src1,$src2 */
727 {
728 { 0, 0, 0, 0 },
729 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
730 & ifmt_cmp, { 0x3020 }
731 },
1fa60b5d
DE		 732/* mulwhi $src1,$src2,$acc */
733 {
734 { 0, 0, 0, 0 },
735 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
736 & ifmt_machi_a, { 0x3020 }
737 },
252b5132
RH		 738/* mulwlo $src1,$src2 */
739 {
740 { 0, 0, 0, 0 },
741 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
742 & ifmt_cmp, { 0x3030 }
743 },
1fa60b5d
DE		 744/* mulwlo $src1,$src2,$acc */
745 {
746 { 0, 0, 0, 0 },
747 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (ACC), 0 } },
748 & ifmt_machi_a, { 0x3030 }
749 },
252b5132
RH		 750/* mv $dr,$sr */
751 {
752 { 0, 0, 0, 0 },
753 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
754 & ifmt_add, { 0x1080 }
755 },
756/* mvfachi $dr */
757 {
758 { 0, 0, 0, 0 },
759 { { MNEM, ' ', OP (DR), 0 } },
760 & ifmt_mvfachi, { 0x50f0 }
761 },
1fa60b5d
DE		 762/* mvfachi $dr,$accs */
763 {
764 { 0, 0, 0, 0 },
765 { { MNEM, ' ', OP (DR), ',', OP (ACCS), 0 } },
766 & ifmt_mvfachi_a, { 0x50f0 }
767 },
252b5132
RH		 768/* mvfaclo $dr */
769 {
770 { 0, 0, 0, 0 },
771 { { MNEM, ' ', OP (DR), 0 } },
772 & ifmt_mvfachi, { 0x50f1 }
773 },
1fa60b5d
DE		 774/* mvfaclo $dr,$accs */
775 {
776 { 0, 0, 0, 0 },
777 { { MNEM, ' ', OP (DR), ',', OP (ACCS), 0 } },
778 & ifmt_mvfachi_a, { 0x50f1 }
779 },
252b5132
RH		 780/* mvfacmi $dr */
781 {
782 { 0, 0, 0, 0 },
783 { { MNEM, ' ', OP (DR), 0 } },
784 & ifmt_mvfachi, { 0x50f2 }
785 },
1fa60b5d
DE		 786/* mvfacmi $dr,$accs */
787 {
788 { 0, 0, 0, 0 },
789 { { MNEM, ' ', OP (DR), ',', OP (ACCS), 0 } },
790 & ifmt_mvfachi_a, { 0x50f2 }
791 },
252b5132
RH		 792/* mvfc $dr,$scr */
793 {
794 { 0, 0, 0, 0 },
795 { { MNEM, ' ', OP (DR), ',', OP (SCR), 0 } },
796 & ifmt_mvfc, { 0x1090 }
797 },
798/* mvtachi $src1 */
799 {
800 { 0, 0, 0, 0 },
801 { { MNEM, ' ', OP (SRC1), 0 } },
802 & ifmt_mvtachi, { 0x5070 }
803 },
1fa60b5d
DE		 804/* mvtachi $src1,$accs */
805 {
806 { 0, 0, 0, 0 },
807 { { MNEM, ' ', OP (SRC1), ',', OP (ACCS), 0 } },
808 & ifmt_mvtachi_a, { 0x5070 }
809 },
252b5132
RH		 810/* mvtaclo $src1 */
811 {
812 { 0, 0, 0, 0 },
813 { { MNEM, ' ', OP (SRC1), 0 } },
814 & ifmt_mvtachi, { 0x5071 }
815 },
1fa60b5d
DE		 816/* mvtaclo $src1,$accs */
817 {
818 { 0, 0, 0, 0 },
819 { { MNEM, ' ', OP (SRC1), ',', OP (ACCS), 0 } },
820 & ifmt_mvtachi_a, { 0x5071 }
821 },
252b5132
RH		 822/* mvtc $sr,$dcr */
823 {
824 { 0, 0, 0, 0 },
825 { { MNEM, ' ', OP (SR), ',', OP (DCR), 0 } },
826 & ifmt_mvtc, { 0x10a0 }
827 },
828/* neg $dr,$sr */
829 {
830 { 0, 0, 0, 0 },
831 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
832 & ifmt_add, { 0x30 }
833 },
834/* nop */
835 {
836 { 0, 0, 0, 0 },
837 { { MNEM, 0 } },
838 & ifmt_nop, { 0x7000 }
839 },
840/* not $dr,$sr */
841 {
842 { 0, 0, 0, 0 },
843 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
844 & ifmt_add, { 0xb0 }
845 },
846/* rac */
847 {
848 { 0, 0, 0, 0 },
849 { { MNEM, 0 } },
850 & ifmt_nop, { 0x5090 }
851 },
1fa60b5d
DE		 852/* rac $accd,$accs,$imm1 */
853 {
854 { 0, 0, 0, 0 },
855 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), ',', OP (IMM1), 0 } },
856 & ifmt_rac_dsi, { 0x5090 }
857 },
252b5132
RH		 858/* rach */
859 {
860 { 0, 0, 0, 0 },
861 { { MNEM, 0 } },
862 & ifmt_nop, { 0x5080 }
863 },
1fa60b5d
DE		 864/* rach $accd,$accs,$imm1 */
865 {
866 { 0, 0, 0, 0 },
867 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), ',', OP (IMM1), 0 } },
868 & ifmt_rac_dsi, { 0x5080 }
869 },
252b5132
RH		 870/* rte */
871 {
872 { 0, 0, 0, 0 },
873 { { MNEM, 0 } },
874 & ifmt_nop, { 0x10d6 }
875 },
876/* seth $dr,$hash$hi16 */
877 {
878 { 0, 0, 0, 0 },
879 { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (HI16), 0 } },
880 & ifmt_seth, { 0xd0c00000 }
881 },
882/* sll $dr,$sr */
883 {
884 { 0, 0, 0, 0 },
885 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
886 & ifmt_add, { 0x1040 }
887 },
888/* sll3 $dr,$sr,$simm16 */
889 {
890 { 0, 0, 0, 0 },
891 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (SIMM16), 0 } },
892 & ifmt_addv3, { 0x90c00000 }
893 },
894/* slli $dr,$uimm5 */
895 {
896 { 0, 0, 0, 0 },
897 { { MNEM, ' ', OP (DR), ',', OP (UIMM5), 0 } },
898 & ifmt_slli, { 0x5040 }
899 },
900/* sra $dr,$sr */
901 {
902 { 0, 0, 0, 0 },
903 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
904 & ifmt_add, { 0x1020 }
905 },
906/* sra3 $dr,$sr,$simm16 */
907 {
908 { 0, 0, 0, 0 },
909 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (SIMM16), 0 } },
910 & ifmt_addv3, { 0x90a00000 }
911 },
912/* srai $dr,$uimm5 */
913 {
914 { 0, 0, 0, 0 },
915 { { MNEM, ' ', OP (DR), ',', OP (UIMM5), 0 } },
916 & ifmt_slli, { 0x5020 }
917 },
918/* srl $dr,$sr */
919 {
920 { 0, 0, 0, 0 },
921 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
922 & ifmt_add, { 0x1000 }
923 },
924/* srl3 $dr,$sr,$simm16 */
925 {
926 { 0, 0, 0, 0 },
927 { { MNEM, ' ', OP (DR), ',', OP (SR), ',', OP (SIMM16), 0 } },
928 & ifmt_addv3, { 0x90800000 }
929 },
930/* srli $dr,$uimm5 */
931 {
932 { 0, 0, 0, 0 },
933 { { MNEM, ' ', OP (DR), ',', OP (UIMM5), 0 } },
934 & ifmt_slli, { 0x5000 }
935 },
936/* st $src1,@$src2 */
937 {
938 { 0, 0, 0, 0 },
939 { { MNEM, ' ', OP (SRC1), ',', '@', OP (SRC2), 0 } },
940 & ifmt_cmp, { 0x2040 }
941 },
942/* st $src1,@($slo16,$src2) */
943 {
944 { 0, 0, 0, 0 },
945 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SLO16), ',', OP (SRC2), ')', 0 } },
946 & ifmt_st_d, { 0xa0400000 }
947 },
948/* stb $src1,@$src2 */
949 {
950 { 0, 0, 0, 0 },
951 { { MNEM, ' ', OP (SRC1), ',', '@', OP (SRC2), 0 } },
952 & ifmt_cmp, { 0x2000 }
953 },
954/* stb $src1,@($slo16,$src2) */
955 {
956 { 0, 0, 0, 0 },
957 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SLO16), ',', OP (SRC2), ')', 0 } },
958 & ifmt_st_d, { 0xa0000000 }
959 },
960/* sth $src1,@$src2 */
961 {
962 { 0, 0, 0, 0 },
963 { { MNEM, ' ', OP (SRC1), ',', '@', OP (SRC2), 0 } },
964 & ifmt_cmp, { 0x2020 }
965 },
966/* sth $src1,@($slo16,$src2) */
967 {
968 { 0, 0, 0, 0 },
969 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SLO16), ',', OP (SRC2), ')', 0 } },
970 & ifmt_st_d, { 0xa0200000 }
971 },
972/* st $src1,@+$src2 */
973 {
974 { 0, 0, 0, 0 },
975 { { MNEM, ' ', OP (SRC1), ',', '@', '+', OP (SRC2), 0 } },
976 & ifmt_cmp, { 0x2060 }
977 },
88845958
NC		 978/* sth $src1,@$src2+ */
979 {
980 { 0, 0, 0, 0 },
981 { { MNEM, ' ', OP (SRC1), ',', '@', OP (SRC2), '+', 0 } },
982 & ifmt_cmp, { 0x2030 }
983 },
984/* stb $src1,@$src2+ */
985 {
986 { 0, 0, 0, 0 },
987 { { MNEM, ' ', OP (SRC1), ',', '@', OP (SRC2), '+', 0 } },
988 & ifmt_cmp, { 0x2010 }
989 },
252b5132
RH		 990/* st $src1,@-$src2 */
991 {
992 { 0, 0, 0, 0 },
993 { { MNEM, ' ', OP (SRC1), ',', '@', '-', OP (SRC2), 0 } },
994 & ifmt_cmp, { 0x2070 }
995 },
996/* sub $dr,$sr */
997 {
998 { 0, 0, 0, 0 },
999 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
1000 & ifmt_add, { 0x20 }
1001 },
1002/* subv $dr,$sr */
1003 {
1004 { 0, 0, 0, 0 },
1005 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
1006 & ifmt_add, { 0x0 }
1007 },
1008/* subx $dr,$sr */
1009 {
1010 { 0, 0, 0, 0 },
1011 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
1012 & ifmt_add, { 0x10 }
1013 },
1014/* trap $uimm4 */
1015 {
1016 { 0, 0, 0, 0 },
1017 { { MNEM, ' ', OP (UIMM4), 0 } },
1018 & ifmt_trap, { 0x10f0 }
1019 },
1020/* unlock $src1,@$src2 */
1021 {
1022 { 0, 0, 0, 0 },
1023 { { MNEM, ' ', OP (SRC1), ',', '@', OP (SRC2), 0 } },
1024 & ifmt_cmp, { 0x2050 }
1025 },
1fa60b5d
DE		 1026/* satb $dr,$sr */
1027 {
1028 { 0, 0, 0, 0 },
1029 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
1030 & ifmt_satb, { 0x80600300 }
1031 },
1032/* sath $dr,$sr */
1033 {
1034 { 0, 0, 0, 0 },
1035 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
1036 & ifmt_satb, { 0x80600200 }
1037 },
1038/* sat $dr,$sr */
1039 {
1040 { 0, 0, 0, 0 },
1041 { { MNEM, ' ', OP (DR), ',', OP (SR), 0 } },
1042 & ifmt_satb, { 0x80600000 }
1043 },
1044/* pcmpbz $src2 */
1045 {
1046 { 0, 0, 0, 0 },
1047 { { MNEM, ' ', OP (SRC2), 0 } },
1048 & ifmt_cmpz, { 0x370 }
1049 },
1050/* sadd */
1051 {
1052 { 0, 0, 0, 0 },
1053 { { MNEM, 0 } },
1054 & ifmt_nop, { 0x50e4 }
1055 },
1056/* macwu1 $src1,$src2 */
1057 {
1058 { 0, 0, 0, 0 },
1059 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
1060 & ifmt_cmp, { 0x50b0 }
1061 },
1062/* msblo $src1,$src2 */
1063 {
1064 { 0, 0, 0, 0 },
1065 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
1066 & ifmt_cmp, { 0x50d0 }
1067 },
1068/* mulwu1 $src1,$src2 */
1069 {
1070 { 0, 0, 0, 0 },
1071 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
1072 & ifmt_cmp, { 0x50a0 }
1073 },
1074/* maclh1 $src1,$src2 */
1075 {
1076 { 0, 0, 0, 0 },
1077 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
1078 & ifmt_cmp, { 0x50c0 }
1079 },
1080/* sc */
1081 {
1082 { 0, 0, 0, 0 },
1083 { { MNEM, 0 } },
1084 & ifmt_nop, { 0x7401 }
1085 },
1086/* snc */
1087 {
1088 { 0, 0, 0, 0 },
1089 { { MNEM, 0 } },
1090 & ifmt_nop, { 0x7501 }
1091 },
88845958
NC		 1092/* clrpsw $uimm8 */
1093 {
1094 { 0, 0, 0, 0 },
1095 { { MNEM, ' ', OP (UIMM8), 0 } },
1096 & ifmt_clrpsw, { 0x7200 }
1097 },
1098/* setpsw $uimm8 */
1099 {
1100 { 0, 0, 0, 0 },
1101 { { MNEM, ' ', OP (UIMM8), 0 } },
1102 & ifmt_clrpsw, { 0x7100 }
1103 },
1104/* bset $uimm3,@($slo16,$sr) */
1105 {
1106 { 0, 0, 0, 0 },
1107 { { MNEM, ' ', OP (UIMM3), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
1108 & ifmt_bset, { 0xa0600000 }
1109 },
1110/* bclr $uimm3,@($slo16,$sr) */
1111 {
1112 { 0, 0, 0, 0 },
1113 { { MNEM, ' ', OP (UIMM3), ',', '@', '(', OP (SLO16), ',', OP (SR), ')', 0 } },
1114 & ifmt_bset, { 0xa0700000 }
1115 },
1116/* btst $uimm3,$sr */
1117 {
1118 { 0, 0, 0, 0 },
1119 { { MNEM, ' ', OP (UIMM3), ',', OP (SR), 0 } },
1120 & ifmt_btst, { 0xf0 }
1121 },
252b5132
RH		 1122};
1123
1124#undef A
252b5132 1125#undef OPERAND
b3466c39 1126#undef MNEM
252b5132
RH		 1127#undef OP
1128
1129/* Formats for ALIAS macro-insns. */
1130
b3466c39
DB		 1131#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1132#define F(f) & m32r_cgen_ifld_table[M32R_##f]
1133#else
1134#define F(f) & m32r_cgen_ifld_table[M32R_/**/f]
1135#endif
bf143b25 1136static const CGEN_IFMT ifmt_bc8r ATTRIBUTE_UNUSED = {
6bb95a0f 1137 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
252b5132
RH		 1138};
1139
bf143b25 1140static const CGEN_IFMT ifmt_bc24r ATTRIBUTE_UNUSED = {
6bb95a0f 1141 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
252b5132
RH		 1142};
1143
bf143b25 1144static const CGEN_IFMT ifmt_bl8r ATTRIBUTE_UNUSED = {
6bb95a0f 1145 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
252b5132
RH		 1146};
1147
bf143b25 1148static const CGEN_IFMT ifmt_bl24r ATTRIBUTE_UNUSED = {
6bb95a0f 1149 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
252b5132
RH		 1150};
1151
bf143b25 1152static const CGEN_IFMT ifmt_bcl8r ATTRIBUTE_UNUSED = {
6bb95a0f 1153 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
1fa60b5d
DE		 1154};
1155
bf143b25 1156static const CGEN_IFMT ifmt_bcl24r ATTRIBUTE_UNUSED = {
6bb95a0f 1157 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
1fa60b5d
DE		 1158};
1159
bf143b25 1160static const CGEN_IFMT ifmt_bnc8r ATTRIBUTE_UNUSED = {
6bb95a0f 1161 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
252b5132
RH		 1162};
1163
bf143b25 1164static const CGEN_IFMT ifmt_bnc24r ATTRIBUTE_UNUSED = {
6bb95a0f 1165 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
252b5132
RH		 1166};
1167
bf143b25 1168static const CGEN_IFMT ifmt_bra8r ATTRIBUTE_UNUSED = {
6bb95a0f 1169 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
252b5132
RH		 1170};
1171
bf143b25 1172static const CGEN_IFMT ifmt_bra24r ATTRIBUTE_UNUSED = {
6bb95a0f 1173 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
252b5132
RH		 1174};
1175
bf143b25 1176static const CGEN_IFMT ifmt_bncl8r ATTRIBUTE_UNUSED = {
6bb95a0f 1177 16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
1fa60b5d
DE		 1178};
1179
bf143b25 1180static const CGEN_IFMT ifmt_bncl24r ATTRIBUTE_UNUSED = {
6bb95a0f 1181 32, 32, 0xff000000, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP24) }, { 0 } }
1fa60b5d
DE		 1182};
1183
bf143b25 1184static const CGEN_IFMT ifmt_ld_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1185 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1186};
1187
bf143b25 1188static const CGEN_IFMT ifmt_ld_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1189 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1190};
1191
bf143b25 1192static const CGEN_IFMT ifmt_ldb_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1193 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1194};
1195
bf143b25 1196static const CGEN_IFMT ifmt_ldb_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1197 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1198};
1199
bf143b25 1200static const CGEN_IFMT ifmt_ldh_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1201 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1202};
1203
bf143b25 1204static const CGEN_IFMT ifmt_ldh_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1205 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1206};
1207
bf143b25 1208static const CGEN_IFMT ifmt_ldub_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1209 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1210};
1211
bf143b25 1212static const CGEN_IFMT ifmt_ldub_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1213 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1214};
1215
bf143b25 1216static const CGEN_IFMT ifmt_lduh_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1217 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1218};
1219
bf143b25 1220static const CGEN_IFMT ifmt_lduh_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1221 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1222};
1223
bf143b25 1224static const CGEN_IFMT ifmt_pop ATTRIBUTE_UNUSED = {
6bb95a0f 1225 16, 16, 0xf0ff, { { F (F_OP1) }, { F (F_R1) }, { F (F_OP2) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1226};
1227
bf143b25 1228static const CGEN_IFMT ifmt_ldi8a ATTRIBUTE_UNUSED = {
6bb95a0f 1229 16, 16, 0xf000, { { F (F_OP1) }, { F (F_R1) }, { F (F_SIMM8) }, { 0 } }
252b5132
RH		 1230};
1231
bf143b25 1232static const CGEN_IFMT ifmt_ldi16a ATTRIBUTE_UNUSED = {
6bb95a0f 1233 32, 32, 0xf0ff0000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R2) }, { F (F_R1) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1234};
1235
bf143b25 1236static const CGEN_IFMT ifmt_rac_d ATTRIBUTE_UNUSED = {
6bb95a0f 1237 16, 16, 0xf3ff, { { F (F_OP1) }, { F (F_ACCD) }, { F (F_BITS67) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_BIT14) }, { F (F_IMM1) }, { 0 } }
1fa60b5d
DE		 1238};
1239
bf143b25 1240static const CGEN_IFMT ifmt_rac_ds ATTRIBUTE_UNUSED = {
6bb95a0f 1241 16, 16, 0xf3f3, { { F (F_OP1) }, { F (F_ACCD) }, { F (F_BITS67) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_BIT14) }, { F (F_IMM1) }, { 0 } }
1fa60b5d
DE		 1242};
1243
bf143b25 1244static const CGEN_IFMT ifmt_rach_d ATTRIBUTE_UNUSED = {
6bb95a0f 1245 16, 16, 0xf3ff, { { F (F_OP1) }, { F (F_ACCD) }, { F (F_BITS67) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_BIT14) }, { F (F_IMM1) }, { 0 } }
1fa60b5d
DE		 1246};
1247
bf143b25 1248static const CGEN_IFMT ifmt_rach_ds ATTRIBUTE_UNUSED = {
6bb95a0f 1249 16, 16, 0xf3f3, { { F (F_OP1) }, { F (F_ACCD) }, { F (F_BITS67) }, { F (F_OP2) }, { F (F_ACCS) }, { F (F_BIT14) }, { F (F_IMM1) }, { 0 } }
1fa60b5d
DE		 1250};
1251
bf143b25 1252static const CGEN_IFMT ifmt_st_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1253 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1254};
1255
bf143b25 1256static const CGEN_IFMT ifmt_st_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1257 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1258};
1259
bf143b25 1260static const CGEN_IFMT ifmt_stb_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1261 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1262};
1263
bf143b25 1264static const CGEN_IFMT ifmt_stb_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1265 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1266};
1267
bf143b25 1268static const CGEN_IFMT ifmt_sth_2 ATTRIBUTE_UNUSED = {
6bb95a0f 1269 16, 16, 0xf0f0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1270};
1271
bf143b25 1272static const CGEN_IFMT ifmt_sth_d2 ATTRIBUTE_UNUSED = {
6bb95a0f 1273 32, 32, 0xf0f00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
252b5132
RH		 1274};
1275
bf143b25 1276static const CGEN_IFMT ifmt_push ATTRIBUTE_UNUSED = {
6bb95a0f 1277 16, 16, 0xf0ff, { { F (F_OP1) }, { F (F_OP2) }, { F (F_R1) }, { F (F_R2) }, { 0 } }
252b5132
RH		 1278};
1279
1280#undef F
1281
1282/* Each non-simple macro entry points to an array of expansion possibilities. */
1283
b3466c39
DB		 1284#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1285#define A(a) (1 << CGEN_INSN_##a)
1286#else
1287#define A(a) (1 << CGEN_INSN_/**/a)
1288#endif
1289#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1290#define OPERAND(op) M32R_OPERAND_##op
1291#else
1292#define OPERAND(op) M32R_OPERAND_/**/op
1293#endif
252b5132 1294#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
252b5132
RH		 1295#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1296
1297/* The macro instruction table. */
1298
1299static const CGEN_IBASE m32r_cgen_macro_insn_table[] =
1300{
1301/* bc $disp8 */
1302 {
1303 -1, "bc8r", "bc", 16,
fb53f5a8 1304 { 0|A(RELAXABLE)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1305 },
1306/* bc $disp24 */
1307 {
1308 -1, "bc24r", "bc", 32,
fb53f5a8 1309 { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1310 },
1311/* bl $disp8 */
1312 {
1313 -1, "bl8r", "bl", 16,
fb53f5a8 1314 { 0|A(RELAXABLE)|A(FILL_SLOT)|A(UNCOND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1315 },
1316/* bl $disp24 */
1317 {
1318 -1, "bl24r", "bl", 32,
fb53f5a8 1319 { 0|A(RELAXED)|A(UNCOND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
1fa60b5d
DE		 1320 },
1321/* bcl $disp8 */
1322 {
1323 -1, "bcl8r", "bcl", 16,
fb53f5a8 1324 { 0|A(RELAXABLE)|A(FILL_SLOT)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_O, 0 } } } }
1fa60b5d
DE		 1325 },
1326/* bcl $disp24 */
1327 {
1328 -1, "bcl24r", "bcl", 32,
fb53f5a8 1329 { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1330 },
1331/* bnc $disp8 */
1332 {
1333 -1, "bnc8r", "bnc", 16,
fb53f5a8 1334 { 0|A(RELAXABLE)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1335 },
1336/* bnc $disp24 */
1337 {
1338 -1, "bnc24r", "bnc", 32,
fb53f5a8 1339 { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1340 },
1341/* bra $disp8 */
1342 {
1343 -1, "bra8r", "bra", 16,
fb53f5a8 1344 { 0|A(RELAXABLE)|A(FILL_SLOT)|A(UNCOND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1345 },
1346/* bra $disp24 */
1347 {
1348 -1, "bra24r", "bra", 32,
fb53f5a8 1349 { 0|A(RELAXED)|A(UNCOND_CTI)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
1fa60b5d
DE		 1350 },
1351/* bncl $disp8 */
1352 {
1353 -1, "bncl8r", "bncl", 16,
fb53f5a8 1354 { 0|A(RELAXABLE)|A(FILL_SLOT)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_O, 0 } } } }
1fa60b5d
DE		 1355 },
1356/* bncl $disp24 */
1357 {
1358 -1, "bncl24r", "bncl", 32,
fb53f5a8 1359 { 0|A(RELAXED)|A(COND_CTI)|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1360 },
1361/* ld $dr,@($sr) */
1362 {
1363 -1, "ld-2", "ld", 16,
fb53f5a8 1364 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1365 },
1366/* ld $dr,@($sr,$slo16) */
1367 {
1368 -1, "ld-d2", "ld", 32,
fb53f5a8 1369 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1370 },
1371/* ldb $dr,@($sr) */
1372 {
1373 -1, "ldb-2", "ldb", 16,
fb53f5a8 1374 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1375 },
1376/* ldb $dr,@($sr,$slo16) */
1377 {
1378 -1, "ldb-d2", "ldb", 32,
fb53f5a8 1379 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1380 },
1381/* ldh $dr,@($sr) */
1382 {
1383 -1, "ldh-2", "ldh", 16,
fb53f5a8 1384 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1385 },
1386/* ldh $dr,@($sr,$slo16) */
1387 {
1388 -1, "ldh-d2", "ldh", 32,
fb53f5a8 1389 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1390 },
1391/* ldub $dr,@($sr) */
1392 {
1393 -1, "ldub-2", "ldub", 16,
fb53f5a8 1394 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1395 },
1396/* ldub $dr,@($sr,$slo16) */
1397 {
1398 -1, "ldub-d2", "ldub", 32,
fb53f5a8 1399 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1400 },
1401/* lduh $dr,@($sr) */
1402 {
1403 -1, "lduh-2", "lduh", 16,
fb53f5a8 1404 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1405 },
1406/* lduh $dr,@($sr,$slo16) */
1407 {
1408 -1, "lduh-d2", "lduh", 32,
fb53f5a8 1409 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1410 },
1411/* pop $dr */
1412 {
1413 -1, "pop", "pop", 16,
fb53f5a8 1414 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1415 },
1416/* ldi $dr,$simm8 */
1417 {
1418 -1, "ldi8a", "ldi", 16,
fb53f5a8 1419 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_OS, 0 } } } }
252b5132
RH		 1420 },
1421/* ldi $dr,$hash$slo16 */
1422 {
1423 -1, "ldi16a", "ldi", 32,
fb53f5a8 1424 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
1fa60b5d
DE		 1425 },
1426/* rac $accd */
1427 {
1428 -1, "rac-d", "rac", 16,
fb53f5a8 1429 { 0|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_S, 0 } } } }
1fa60b5d
DE		 1430 },
1431/* rac $accd,$accs */
1432 {
1433 -1, "rac-ds", "rac", 16,
fb53f5a8 1434 { 0|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_S, 0 } } } }
1fa60b5d
DE		 1435 },
1436/* rach $accd */
1437 {
1438 -1, "rach-d", "rach", 16,
fb53f5a8 1439 { 0|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_S, 0 } } } }
1fa60b5d
DE		 1440 },
1441/* rach $accd,$accs */
1442 {
1443 -1, "rach-ds", "rach", 16,
fb53f5a8 1444 { 0|A(ALIAS), { { { (1<<MACH_M32RX)|(1<<MACH_M32R2), 0 } }, { { PIPE_S, 0 } } } }
252b5132
RH		 1445 },
1446/* st $src1,@($src2) */
1447 {
1448 -1, "st-2", "st", 16,
fb53f5a8 1449 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1450 },
1451/* st $src1,@($src2,$slo16) */
1452 {
1453 -1, "st-d2", "st", 32,
fb53f5a8 1454 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1455 },
1456/* stb $src1,@($src2) */
1457 {
1458 -1, "stb-2", "stb", 16,
fb53f5a8 1459 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1460 },
1461/* stb $src1,@($src2,$slo16) */
1462 {
1463 -1, "stb-d2", "stb", 32,
fb53f5a8 1464 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1465 },
1466/* sth $src1,@($src2) */
1467 {
1468 -1, "sth-2", "sth", 16,
fb53f5a8 1469 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1470 },
1471/* sth $src1,@($src2,$slo16) */
1472 {
1473 -1, "sth-d2", "sth", 32,
fb53f5a8 1474 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_NONE, 0 } } } }
252b5132
RH		 1475 },
1476/* push $src1 */
1477 {
1478 -1, "push", "push", 16,
fb53f5a8 1479 { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { PIPE_O, 0 } } } }
252b5132
RH		 1480 },
1481};
1482
1483/* The macro instruction opcode table. */
1484
1485static const CGEN_OPCODE m32r_cgen_macro_insn_opcode_table[] =
1486{
1487/* bc $disp8 */
1488 {
1489 { 0, 0, 0, 0 },
1490 { { MNEM, ' ', OP (DISP8), 0 } },
1491 & ifmt_bc8r, { 0x7c00 }
1492 },
1493/* bc $disp24 */
1494 {
1495 { 0, 0, 0, 0 },
1496 { { MNEM, ' ', OP (DISP24), 0 } },
1497 & ifmt_bc24r, { 0xfc000000 }
1498 },
1499/* bl $disp8 */
1500 {
1501 { 0, 0, 0, 0 },
1502 { { MNEM, ' ', OP (DISP8), 0 } },
1503 & ifmt_bl8r, { 0x7e00 }
1504 },
1505/* bl $disp24 */
1506 {
1507 { 0, 0, 0, 0 },
1508 { { MNEM, ' ', OP (DISP24), 0 } },
1509 & ifmt_bl24r, { 0xfe000000 }
1510 },
1fa60b5d
DE		 1511/* bcl $disp8 */
1512 {
1513 { 0, 0, 0, 0 },
1514 { { MNEM, ' ', OP (DISP8), 0 } },
1515 & ifmt_bcl8r, { 0x7800 }
1516 },
1517/* bcl $disp24 */
1518 {
1519 { 0, 0, 0, 0 },
1520 { { MNEM, ' ', OP (DISP24), 0 } },
1521 & ifmt_bcl24r, { 0xf8000000 }
1522 },
252b5132
RH		 1523/* bnc $disp8 */
1524 {
1525 { 0, 0, 0, 0 },
1526 { { MNEM, ' ', OP (DISP8), 0 } },
1527 & ifmt_bnc8r, { 0x7d00 }
1528 },
1529/* bnc $disp24 */
1530 {
1531 { 0, 0, 0, 0 },
1532 { { MNEM, ' ', OP (DISP24), 0 } },
1533 & ifmt_bnc24r, { 0xfd000000 }
1534 },
1535/* bra $disp8 */
1536 {
1537 { 0, 0, 0, 0 },
1538 { { MNEM, ' ', OP (DISP8), 0 } },
1539 & ifmt_bra8r, { 0x7f00 }
1540 },
1541/* bra $disp24 */
1542 {
1543 { 0, 0, 0, 0 },
1544 { { MNEM, ' ', OP (DISP24), 0 } },
1545 & ifmt_bra24r, { 0xff000000 }
1546 },
1fa60b5d
DE		 1547/* bncl $disp8 */
1548 {
1549 { 0, 0, 0, 0 },
1550 { { MNEM, ' ', OP (DISP8), 0 } },
1551 & ifmt_bncl8r, { 0x7900 }
1552 },
1553/* bncl $disp24 */
1554 {
1555 { 0, 0, 0, 0 },
1556 { { MNEM, ' ', OP (DISP24), 0 } },
1557 & ifmt_bncl24r, { 0xf9000000 }
1558 },
252b5132
RH		 1559/* ld $dr,@($sr) */
1560 {
1561 { 0, 0, 0, 0 },
1562 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ')', 0 } },
1563 & ifmt_ld_2, { 0x20c0 }
1564 },
1565/* ld $dr,@($sr,$slo16) */
1566 {
1567 { 0, 0, 0, 0 },
1568 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ',', OP (SLO16), ')', 0 } },
1569 & ifmt_ld_d2, { 0xa0c00000 }
1570 },
1571/* ldb $dr,@($sr) */
1572 {
1573 { 0, 0, 0, 0 },
1574 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ')', 0 } },
1575 & ifmt_ldb_2, { 0x2080 }
1576 },
1577/* ldb $dr,@($sr,$slo16) */
1578 {
1579 { 0, 0, 0, 0 },
1580 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ',', OP (SLO16), ')', 0 } },
1581 & ifmt_ldb_d2, { 0xa0800000 }
1582 },
1583/* ldh $dr,@($sr) */
1584 {
1585 { 0, 0, 0, 0 },
1586 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ')', 0 } },
1587 & ifmt_ldh_2, { 0x20a0 }
1588 },
1589/* ldh $dr,@($sr,$slo16) */
1590 {
1591 { 0, 0, 0, 0 },
1592 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ',', OP (SLO16), ')', 0 } },
1593 & ifmt_ldh_d2, { 0xa0a00000 }
1594 },
1595/* ldub $dr,@($sr) */
1596 {
1597 { 0, 0, 0, 0 },
1598 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ')', 0 } },
1599 & ifmt_ldub_2, { 0x2090 }
1600 },
1601/* ldub $dr,@($sr,$slo16) */
1602 {
1603 { 0, 0, 0, 0 },
1604 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ',', OP (SLO16), ')', 0 } },
1605 & ifmt_ldub_d2, { 0xa0900000 }
1606 },
1607/* lduh $dr,@($sr) */
1608 {
1609 { 0, 0, 0, 0 },
1610 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ')', 0 } },
1611 & ifmt_lduh_2, { 0x20b0 }
1612 },
1613/* lduh $dr,@($sr,$slo16) */
1614 {
1615 { 0, 0, 0, 0 },
1616 { { MNEM, ' ', OP (DR), ',', '@', '(', OP (SR), ',', OP (SLO16), ')', 0 } },
1617 & ifmt_lduh_d2, { 0xa0b00000 }
1618 },
1619/* pop $dr */
1620 {
1621 { 0, 0, 0, 0 },
1622 { { MNEM, ' ', OP (DR), 0 } },
1623 & ifmt_pop, { 0x20ef }
1624 },
1625/* ldi $dr,$simm8 */
1626 {
1627 { 0, 0, 0, 0 },
1628 { { MNEM, ' ', OP (DR), ',', OP (SIMM8), 0 } },
1629 & ifmt_ldi8a, { 0x6000 }
1630 },
1631/* ldi $dr,$hash$slo16 */
1632 {
1633 { 0, 0, 0, 0 },
1634 { { MNEM, ' ', OP (DR), ',', OP (HASH), OP (SLO16), 0 } },
1635 & ifmt_ldi16a, { 0x90f00000 }
1636 },
1fa60b5d
DE		 1637/* rac $accd */
1638 {
1639 { 0, 0, 0, 0 },
1640 { { MNEM, ' ', OP (ACCD), 0 } },
1641 & ifmt_rac_d, { 0x5090 }
1642 },
1643/* rac $accd,$accs */
1644 {
1645 { 0, 0, 0, 0 },
1646 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), 0 } },
1647 & ifmt_rac_ds, { 0x5090 }
1648 },
1649/* rach $accd */
1650 {
1651 { 0, 0, 0, 0 },
1652 { { MNEM, ' ', OP (ACCD), 0 } },
1653 & ifmt_rach_d, { 0x5080 }
1654 },
1655/* rach $accd,$accs */
1656 {
1657 { 0, 0, 0, 0 },
1658 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), 0 } },
1659 & ifmt_rach_ds, { 0x5080 }
1660 },
252b5132
RH		 1661/* st $src1,@($src2) */
1662 {
1663 { 0, 0, 0, 0 },
1664 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SRC2), ')', 0 } },
1665 & ifmt_st_2, { 0x2040 }
1666 },
1667/* st $src1,@($src2,$slo16) */
1668 {
1669 { 0, 0, 0, 0 },
1670 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SRC2), ',', OP (SLO16), ')', 0 } },
1671 & ifmt_st_d2, { 0xa0400000 }
1672 },
1673/* stb $src1,@($src2) */
1674 {
1675 { 0, 0, 0, 0 },
1676 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SRC2), ')', 0 } },
1677 & ifmt_stb_2, { 0x2000 }
1678 },
1679/* stb $src1,@($src2,$slo16) */
1680 {
1681 { 0, 0, 0, 0 },
1682 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SRC2), ',', OP (SLO16), ')', 0 } },
1683 & ifmt_stb_d2, { 0xa0000000 }
1684 },
1685/* sth $src1,@($src2) */
1686 {
1687 { 0, 0, 0, 0 },
1688 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SRC2), ')', 0 } },
1689 & ifmt_sth_2, { 0x2020 }
1690 },
1691/* sth $src1,@($src2,$slo16) */
1692 {
1693 { 0, 0, 0, 0 },
1694 { { MNEM, ' ', OP (SRC1), ',', '@', '(', OP (SRC2), ',', OP (SLO16), ')', 0 } },
1695 & ifmt_sth_d2, { 0xa0200000 }
1696 },
1697/* push $src1 */
1698 {
1699 { 0, 0, 0, 0 },
1700 { { MNEM, ' ', OP (SRC1), 0 } },
1701 & ifmt_push, { 0x207f }
1702 },
1703};
1704
1705#undef A
252b5132 1706#undef OPERAND
b3466c39 1707#undef MNEM
252b5132
RH		 1708#undef OP
1709
1710#ifndef CGEN_ASM_HASH_P
1711#define CGEN_ASM_HASH_P(insn) 1
1712#endif
1713
1714#ifndef CGEN_DIS_HASH_P
1715#define CGEN_DIS_HASH_P(insn) 1
1716#endif
1717
1718/* Return non-zero if INSN is to be added to the hash table.
1719 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1720
1721static int
1722asm_hash_insn_p (insn)
fc05c67f 1723 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
252b5132
RH		 1724{
1725 return CGEN_ASM_HASH_P (insn);
1726}
1727
1728static int
1729dis_hash_insn_p (insn)
1730 const CGEN_INSN *insn;
1731{
1732 /* If building the hash table and the NO-DIS attribute is present,
1733 ignore. */
1734 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1735 return 0;
1736 return CGEN_DIS_HASH_P (insn);
1737}
1738
1739#ifndef CGEN_ASM_HASH
1740#define CGEN_ASM_HASH_SIZE 127
1741#ifdef CGEN_MNEMONIC_OPERANDS
1742#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1743#else
1744#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1745#endif
1746#endif
1747
1748/* It doesn't make much sense to provide a default here,
1749 but while this is under development we do.
1750 BUFFER is a pointer to the bytes of the insn, target order.
1751 VALUE is the first base_insn_bitsize bits as an int in host order. */
1752
1753#ifndef CGEN_DIS_HASH
1754#define CGEN_DIS_HASH_SIZE 256
1755#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1756#endif
1757
1758/* The result is the hash value of the insn.
1759 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1760
1761static unsigned int
1762asm_hash_insn (mnem)
1763 const char * mnem;
1764{
1765 return CGEN_ASM_HASH (mnem);
1766}
1767
1768/* BUF is a pointer to the bytes of the insn, target order.
1769 VALUE is the first base_insn_bitsize bits as an int in host order. */
1770
1771static unsigned int
1772dis_hash_insn (buf, value)
0e2ee3ca 1773 const char * buf ATTRIBUTE_UNUSED;
fc05c67f 1774 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
252b5132
RH		 1775{
1776 return CGEN_DIS_HASH (buf, value);
1777}
1778
1779/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1780
1781static void
47b0e7ad 1782set_fields_bitsize (CGEN_FIELDS *fields, int size)
252b5132
RH		 1783{
1784 CGEN_FIELDS_BITSIZE (fields) = size;
1785}
1786
1787/* Function to call before using the operand instance table.
1788 This plugs the opcode entries and macro instructions into the cpu table. */
1789
1790void
47b0e7ad 1791m32r_cgen_init_opcode_table (CGEN_CPU_DESC cd)
252b5132
RH		 1792{
1793 int i;
1794 int num_macros = (sizeof (m32r_cgen_macro_insn_table) /
1795 sizeof (m32r_cgen_macro_insn_table[0]));
1796 const CGEN_IBASE *ib = & m32r_cgen_macro_insn_table[0];
1797 const CGEN_OPCODE *oc = & m32r_cgen_macro_insn_opcode_table[0];
47b0e7ad
NC		 1798 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1799
252b5132
RH		 1800 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1801 for (i = 0; i < num_macros; ++i)
1802 {
1803 insns[i].base = &ib[i];
1804 insns[i].opcode = &oc[i];
fc7bc883 1805 m32r_cgen_build_insn_regex (& insns[i]);
252b5132
RH		 1806 }
1807 cd->macro_insn_table.init_entries = insns;
1808 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1809 cd->macro_insn_table.num_init_entries = num_macros;
1810
1811 oc = & m32r_cgen_insn_opcode_table[0];
1812 insns = (CGEN_INSN *) cd->insn_table.init_entries;
1813 for (i = 0; i < MAX_INSNS; ++i)
fc7bc883
RH		 1814 {
1815 insns[i].opcode = &oc[i];
1816 m32r_cgen_build_insn_regex (& insns[i]);
1817 }
252b5132
RH		 1818
1819 cd->sizeof_fields = sizeof (CGEN_FIELDS);
1820 cd->set_fields_bitsize = set_fields_bitsize;
1821
1822 cd->asm_hash_p = asm_hash_insn_p;
1823 cd->asm_hash = asm_hash_insn;
1824 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1825
1826 cd->dis_hash_p = dis_hash_insn_p;
1827 cd->dis_hash = dis_hash_insn;
1828 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
1829}
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