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657e7cec 1/* mips-opc.c -- MIPS opcode list.
1f25f5d3 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
df7b86aa
NC
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
4 Free Software Foundation, Inc.
252b5132
RH
5 Contributed by Ralph Campbell and OSF
6 Commented and modified by Ian Lance Taylor, Cygnus Support
e70f2590 7 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
af7ee8bf
CD
8 MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom
9 Corporation (SiByte).
252b5132 10
9b201bb5 11 This file is part of the GNU opcodes library.
252b5132 12
9b201bb5
NC
13 This library is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 3, or (at your option)
16 any later version.
252b5132 17
9b201bb5
NC
18 It is distributed in the hope that it will be useful, but WITHOUT
19 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
20 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
21 License for more details.
252b5132 22
9b201bb5
NC
23 You should have received a copy of the GNU General Public License
24 along with this file; see the file COPYING. If not, write to the
25 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
26 MA 02110-1301, USA. */
252b5132 27
0d8dfecf 28#include "sysdep.h"
df7b86aa 29#include <stdio.h>
252b5132 30#include "opcode/mips.h"
ab902481
RS
31#include "mips-formats.h"
32
33static unsigned char reg_0_map[] = { 0 };
34
35/* Return the mips_operand structure for the operand at the beginning of P. */
36
37const struct mips_operand *
38decode_mips_operand (const char *p)
39{
40 switch (p[0])
41 {
42 case '+':
43 switch (p[1])
44 {
45 case '1': HINT (5, 6);
46 case '2': HINT (10, 6);
47 case '3': HINT (15, 6);
48 case '4': HINT (20, 6);
49
50 case 'A': BIT (5, 6, 0); /* (0 .. 31) */
51 case 'B': MSB (5, 11, 1, TRUE, 32); /* (1 .. 32), 32-bit op */
52 case 'C': MSB (5, 11, 1, FALSE, 32); /* (1 .. 32), 32-bit op */
53 case 'E': BIT (5, 6, 32); /* (32 .. 63) */
54 case 'F': MSB (5, 11, 33, TRUE, 64); /* (33 .. 64), 64-bit op */
55 case 'G': MSB (5, 11, 33, FALSE, 64); /* (33 .. 64), 64-bit op */
56 case 'H': MSB (5, 11, 1, FALSE, 64); /* (1 .. 32), 64-bit op */
57 case 'J': HINT (10, 11);
58 case 'P': BIT (5, 6, 32); /* (32 .. 63) */
59 case 'Q': SINT (10, 6);
60 case 'S': MSB (5, 11, 0, FALSE, 63); /* (0 .. 31), 64-bit op */
61 case 'X': BIT (5, 16, 32); /* (32 .. 63) */
62 case 'Z': REG (5, 0, FP);
63
64 case 'a': SINT (8, 6);
65 case 'b': SINT (8, 3);
66 case 'c': INT_ADJ (9, 6, 255, 4, FALSE); /* (-256 .. 255) << 4 */
67 case 'i': JALX (26, 0, 2);
68 case 'j': SINT (9, 7);
69 case 'p': BIT (5, 6, 0); /* (0 .. 31), 32-bit op */
70 case 's': MSB (5, 11, 0, FALSE, 31); /* (0 .. 31) */
71 case 't': REG (5, 16, COPRO);
72 case 'x': BIT (5, 16, 0); /* (0 .. 31) */
73 case 'z': REG (5, 0, GP);
74 }
75 break;
76
77 case '<': BIT (5, 6, 0); /* (0 .. 31) */
78 case '>': BIT (5, 6, 32); /* (32 .. 63) */
79 case '%': UINT (3, 21);
80 case ':': SINT (7, 19);
81 case '\'': HINT (6, 16);
82 case '@': SINT (10, 16);
83 case '!': UINT (1, 5);
84 case '$': UINT (1, 4);
85 case '*': REG (2, 18, ACC);
86 case '&': REG (2, 13, ACC);
87 case '~': SINT (12, 0);
88 case '\\': BIT (3, 12, 0); /* (0 .. 7) */
89
90 case '0': SINT (6, 20);
91 case '1': HINT (5, 6);
92 case '2': HINT (2, 11);
93 case '3': HINT (3, 21);
94 case '4': HINT (4, 21);
95 case '5': HINT (8, 16);
96 case '6': HINT (5, 21);
97 case '7': REG (2, 11, ACC);
98 case '8': HINT (6, 11);
99 case '9': REG (2, 21, ACC);
100
101 case 'B': HINT (20, 6);
102 case 'C': HINT (25, 0);
103 case 'D': REG (5, 6, FP);
104 case 'E': REG (5, 16, COPRO);
105 case 'G': REG (5, 11, COPRO);
106 case 'H': UINT (3, 0);
107 case 'J': HINT (19, 6);
108 case 'K': REG (5, 11, HW);
109 case 'M': REG (3, 8, CCC);
110 case 'N': REG (3, 18, CCC);
111 case 'O': UINT (3, 21);
112 case 'P': SPECIAL (5, 1, PERF_REG);
113 case 'Q': SPECIAL (10, 16, MDMX_IMM_REG);
114 case 'R': REG (5, 21, FP);
115 case 'S': REG (5, 11, FP);
116 case 'T': REG (5, 16, FP);
117 case 'U': SPECIAL (10, 11, CLO_CLZ_DEST);
118 case 'V': REG (5, 11, FP);
119 case 'W': REG (5, 16, FP);
120 case 'X': REG (5, 6, VEC);
121 case 'Y': REG (5, 11, VEC);
122 case 'Z': REG (5, 16, VEC);
123
124 case 'a': JUMP (26, 0, 2);
125 case 'b': REG (5, 21, GP);
126 case 'c': HINT (10, 16);
127 case 'd': REG (5, 11, GP);
128 case 'e': UINT (3, 22)
129 case 'g': REG (5, 11, COPRO);
130 case 'h': HINT (5, 11);
131 case 'i': HINT (16, 0);
132 case 'j': SINT (16, 0);
133 case 'k': HINT (5, 16);
134 case 'o': SINT (16, 0);
135 case 'p': BRANCH (16, 0, 2);
136 case 'q': HINT (10, 6);
137 case 'r': REG (5, 21, GP);
138 case 's': REG (5, 21, GP);
139 case 't': REG (5, 16, GP);
140 case 'u': HINT (16, 0);
141 case 'v': REG (5, 21, GP);
142 case 'w': REG (5, 16, GP);
143 case 'x': REG (0, 0, GP);
144 case 'z': MAPPED_REG (0, 0, GP, reg_0_map);
145 }
146 return 0;
147}
252b5132
RH
148
149/* Short hand so the lines aren't too long. */
150
151#define LDD INSN_LOAD_MEMORY_DELAY
152#define LCD INSN_LOAD_COPROC_DELAY
153#define UBD INSN_UNCOND_BRANCH_DELAY
154#define CBD INSN_COND_BRANCH_DELAY
155#define COD INSN_COPROC_MOVE_DELAY
156#define CLD INSN_COPROC_MEMORY_DELAY
157#define CBL INSN_COND_BRANCH_LIKELY
bcd530a7
RS
158#define NODS INSN_NO_DELAY_SLOT
159#define TRAP INSN_NO_DELAY_SLOT
252b5132
RH
160#define SM INSN_STORE_MEMORY
161
fc76e730
RS
162#define WR_1 INSN_WRITE_1
163#define WR_2 INSN_WRITE_2
164#define RD_1 INSN_READ_1
165#define RD_2 INSN_READ_2
166#define RD_3 INSN_READ_3
167#define RD_4 INSN_READ_4
168#define MOD_1 (WR_1|RD_1)
169#define MOD_2 (WR_2|RD_2)
170
e93d7199 171#define WR_31 INSN_WRITE_GPR_31
252b5132
RH
172#define WR_CC INSN_WRITE_COND_CODE
173#define RD_CC INSN_READ_COND_CODE
174#define RD_C0 INSN_COP
175#define RD_C1 INSN_COP
176#define RD_C2 INSN_COP
177#define RD_C3 INSN_COP
178#define WR_C0 INSN_COP
179#define WR_C1 INSN_COP
180#define WR_C2 INSN_COP
181#define WR_C3 INSN_COP
fc76e730 182#define UDI INSN_UDI
c27e721e 183#define CP INSN_COP
252b5132
RH
184
185#define WR_HI INSN_WRITE_HI
186#define RD_HI INSN_READ_HI
187#define MOD_HI WR_HI|RD_HI
188
189#define WR_LO INSN_WRITE_LO
190#define RD_LO INSN_READ_LO
191#define MOD_LO WR_LO|RD_LO
192
193#define WR_HILO WR_HI|WR_LO
194#define RD_HILO RD_HI|RD_LO
195#define MOD_HILO WR_HILO|RD_HILO
196
197#define IS_M INSN_MULT
198
9e836e3d
FF
199#define WR_MACC INSN2_WRITE_MDMX_ACC
200#define RD_MACC INSN2_READ_MDMX_ACC
deec1734 201
252b5132
RH
202#define I1 INSN_ISA1
203#define I2 INSN_ISA2
204#define I3 INSN_ISA3
205#define I4 INSN_ISA4
5fce5ddf 206#define I5 INSN_ISA5
e7af610e 207#define I32 INSN_ISA32
84ea6cf2 208#define I64 INSN_ISA64
af7ee8bf 209#define I33 INSN_ISA32R2
5f74bc13 210#define I65 INSN_ISA64R2
56950294
MS
211#define I3_32 INSN_ISA3_32
212#define I3_33 INSN_ISA3_32R2
213#define I4_32 INSN_ISA4_32
214#define I4_33 INSN_ISA4_32R2
215#define I5_33 INSN_ISA5_32R2
e7af610e 216
44426910 217/* MIPS64 MIPS-3D ASE support. */
d301a56b 218#define M3D ASE_MIPS3D
1f25f5d3 219
39a7806d 220/* MIPS32 SmartMIPS ASE support. */
d301a56b 221#define SMT ASE_SMARTMIPS
39a7806d 222
deec1734 223/* MIPS64 MDMX ASE support. */
d301a56b 224#define MX ASE_MDMX
deec1734 225
350cc38d
MS
226#define IL2E (INSN_LOONGSON_2E)
227#define IL2F (INSN_LOONGSON_2F)
fd503541 228#define IL3A (INSN_LOONGSON_3A)
350cc38d 229
252b5132
RH
230#define P3 INSN_4650
231#define L1 INSN_4010
9752cf1b 232#define V1 (INSN_4100 | INSN_4111 | INSN_4120)
252b5132 233#define T3 INSN_3900
e407c74b
NC
234/* Emotion Engine MIPS r5900. */
235#define EE INSN_5900
99c14723 236#define M1 INSN_10000
2228315b 237#define SB1 INSN_SB1
9752cf1b
RS
238#define N411 INSN_4111
239#define N412 INSN_4120
240#define N5 (INSN_5400 | INSN_5500)
241#define N54 INSN_5400
242#define N55 INSN_5500
432233b3
AP
243#define IOCT (INSN_OCTEON | INSN_OCTEONP | INSN_OCTEON2)
244#define IOCTP (INSN_OCTEONP | INSN_OCTEON2)
245#define IOCT2 INSN_OCTEON2
52b6b6b9 246#define XLR INSN_XLR
d301a56b
RS
247#define IVIRT ASE_VIRT
248#define IVIRT64 ASE_VIRT64
252b5132 249
e93d7199 250#define G1 (T3 \
e407c74b 251 |EE \
252b5132
RH
252 )
253
99c14723 254#define G2 (T3 \
252b5132
RH
255 )
256
99c14723 257#define G3 (I4 \
e407c74b 258 |EE \
99c14723 259 )
252b5132 260
e407c74b
NC
261/* 64 bit CPU with 32 bit FPU (single float). */
262#define SF EE
263
264/* Support for 128 bit MMI instructions. */
265#define MMI EE
266
267/* 64 bit CPU with only 32 bit multiplication/division support. */
268#define M32 EE
269
fd25c5a9
CF
270/* MIPS DSP ASE support.
271 NOTE:
272 1. MIPS DSP ASE includes 4 accumulators ($ac0 - $ac3). $ac0 is the pair
273 of original HI and LO. $ac1, $ac2 and $ac3 are new registers, and have
274 the same structure as $ac0 (HI + LO). For DSP instructions that write or
275 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a
39a7806d 276 (RD_HILO) attributes, such that HILO dependencies are maintained
fd25c5a9
CF
277 conservatively.
278
279 2. For some mul. instructions that use integer registers as destinations
39a7806d 280 but destroy HI+LO as side-effect, we add WR_HILO to their attributes.
fd25c5a9
CF
281
282 3. MIPS DSP ASE includes a new DSP control register, which has 6 fields
283 (ccond, outflag, EFI, c, scount, pos). Many DSP instructions read or write
284 certain fields of the DSP control register. For simplicity, we decide not
39a7806d 285 to track dependencies of these fields.
fd25c5a9
CF
286 However, "bposge32" is a branch instruction that depends on the "pos"
287 field. In order to make sure that GAS does not reorder DSP instructions
bcd530a7
RS
288 that writes the "pos" field and "bposge32", we add DSP_VOLA
289 (INSN_NO_DELAY_SLOT) attribute to those instructions that write the "pos"
290 field. */
fd25c5a9
CF
291
292#define WR_a WR_HILO /* Write dsp accumulators (reuse WR_HILO) */
293#define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) */
294#define MOD_a WR_a|RD_a
bcd530a7 295#define DSP_VOLA INSN_NO_DELAY_SLOT
d301a56b
RS
296#define D32 ASE_DSP
297#define D33 ASE_DSPR2
298#define D64 ASE_DSP64
fd25c5a9 299
61cc0267 300/* MIPS MT ASE support. */
d301a56b 301#define MT32 ASE_MT
61cc0267 302
dec0624d 303/* MIPS MCU (MicroController) ASE support. */
d301a56b 304#define MC ASE_MCU
dec0624d 305
7f3c4072
CM
306/* MIPS Enhanced VA Scheme. */
307#define EVA ASE_EVA
308
309/* TLB invalidate instruction support. */
310#define TLBINV ASE_EVA
311
252b5132
RH
312/* The order of overloaded instructions matters. Label arguments and
313 register arguments look the same. Instructions that can have either
314 for arguments must apear in the correct order in this table for the
315 assembler to pick the right one. In other words, entries with
316 immediate operands must apear after the same instruction with
317 registers.
318
44426910
CD
319 Because of the lookup algorithm used, entries with the same opcode
320 name must be contiguous.
321
252b5132
RH
322 Many instructions are short hand for other instructions (i.e., The
323 jal <register> instruction is short for jalr <register>). */
324
4372b673
NC
325const struct mips_opcode mips_builtin_opcodes[] =
326{
252b5132
RH
327/* These instructions appear first so that the disassembler will find
328 them first. The assemblers uses a hash table based on the
329 instruction name anyhow. */
e7ae278d 330/* name, args, match, mask, pinfo, pinfo2, membership, ase, exclusions */
fc76e730 331{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_3, 0, I4_32|G3, 0, 0 },
e7ae278d 332{"pref", "k,A(b)", 0, (int) M_PREF_AB, INSN_MACRO, 0, I4_32|G3, 0, 0 },
fc76e730 333{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_2|RD_3|FP_S, 0, I4_33, 0, 0 },
e7ae278d
RS
334{"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS, I1, 0, 0 }, /* sll */
335{"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS, I1, 0, 0 }, /* sll */
336{"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS, I1, 0, 0 }, /* sll */
fc76e730
RS
337{"li", "t,j", 0x24000000, 0xffe00000, WR_1, INSN2_ALIAS, I1, 0, 0 }, /* addiu */
338{"li", "t,i", 0x34000000, 0xffe00000, WR_1, INSN2_ALIAS, I1, 0, 0 }, /* ori */
e7ae278d
RS
339{"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1, 0, 0 },
340{"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
341{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_1|RD_2, INSN2_ALIAS, I3, 0, 0 },/* daddu */
342{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_1|RD_2, INSN2_ALIAS, I1, 0, 0 },/* addu */
343{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_1|RD_2, INSN2_ALIAS, I1, 0, 0 },/* or */
e7ae278d
RS
344{"b", "p", 0x10000000, 0xffff0000, UBD, INSN2_ALIAS, I1, 0, 0 },/* beq 0,0 */
345{"b", "p", 0x04010000, 0xffff0000, UBD, INSN2_ALIAS, I1, 0, 0 },/* bgez 0 */
fc76e730 346{"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, INSN2_ALIAS, I1, 0, 0 },/* bgezal 0*/
252b5132 347
98675402
RS
348/* Loongson specific instructions. Loongson 3A redefines the Coprocessor 2
349 instructions. Put them here so that disassembler will find them first.
350 The assemblers uses a hash table based on the instruction name anyhow. */
fc76e730
RS
351{"campi", "d,s", 0x70000075, 0xfc1f07ff, WR_1|RD_2, 0, IL3A, 0, 0 },
352{"campv", "d,s", 0x70000035, 0xfc1f07ff, WR_1|RD_2, 0, IL3A, 0, 0 },
353{"camwi", "d,s,t", 0x700000b5, 0xfc0007ff, RD_1|RD_2|RD_3, 0, IL3A, 0, 0 },
354{"ramri", "d,s", 0x700000f5, 0xfc1f07ff, WR_1|RD_2, 0, IL3A, 0, 0 },
355{"gsle", "s,t", 0x70000026, 0xfc00ffff, RD_1|RD_2, 0, IL3A, 0, 0 },
356{"gsgt", "s,t", 0x70000027, 0xfc00ffff, RD_1|RD_2, 0, IL3A, 0, 0 },
357{"gslble", "t,b,d", 0xc8000010, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
358{"gslbgt", "t,b,d", 0xc8000011, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
359{"gslhle", "t,b,d", 0xc8000012, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
360{"gslhgt", "t,b,d", 0xc8000013, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
361{"gslwle", "t,b,d", 0xc8000014, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
362{"gslwgt", "t,b,d", 0xc8000015, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
363{"gsldle", "t,b,d", 0xc8000016, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
364{"gsldgt", "t,b,d", 0xc8000017, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
365{"gssble", "t,b,d", 0xe8000010, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
366{"gssbgt", "t,b,d", 0xe8000011, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
367{"gsshle", "t,b,d", 0xe8000012, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
368{"gsshgt", "t,b,d", 0xe8000013, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
369{"gsswle", "t,b,d", 0xe8000014, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
370{"gsswgt", "t,b,d", 0xe8000015, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
371{"gssdle", "t,b,d", 0xe8000016, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
372{"gssdgt", "t,b,d", 0xe8000017, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
373{"gslwlec1", "T,b,d", 0xc8000018, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
374{"gslwgtc1", "T,b,d", 0xc8000019, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
375{"gsldlec1", "T,b,d", 0xc800001a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
376{"gsldgtc1", "T,b,d", 0xc800001b, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IL3A, 0, 0 },
377{"gsswlec1", "T,b,d", 0xe800001c, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
378{"gsswgtc1", "T,b,d", 0xe800001d, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
379{"gssdlec1", "T,b,d", 0xe800001e, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
380{"gssdgtc1", "T,b,d", 0xe800001f, 0xfc0007ff, RD_1|RD_2|RD_3|SM, 0, IL3A, 0, 0 },
381{"gslwlc1", "T,+a(b)", 0xc8000004, 0xfc00c03f, WR_1|RD_3|LDD, 0, IL3A, 0, 0 },
382{"gslwrc1", "T,+a(b)", 0xc8000005, 0xfc00c03f, WR_1|RD_3|LDD, 0, IL3A, 0, 0 },
383{"gsldlc1", "T,+a(b)", 0xc8000006, 0xfc00c03f, WR_1|RD_3|LDD, 0, IL3A, 0, 0 },
384{"gsldrc1", "T,+a(b)", 0xc8000007, 0xfc00c03f, WR_1|RD_3|LDD, 0, IL3A, 0, 0 },
385{"gsswlc1", "T,+a(b)", 0xe8000004, 0xfc00c03f, RD_1|RD_3|SM, 0, IL3A, 0, 0 },
386{"gsswrc1", "T,+a(b)", 0xe8000005, 0xfc00c03f, RD_1|RD_3|SM, 0, IL3A, 0, 0 },
387{"gssdlc1", "T,+a(b)", 0xe8000006, 0xfc00c03f, RD_1|RD_3|SM, 0, IL3A, 0, 0 },
388{"gssdrc1", "T,+a(b)", 0xe8000007, 0xfc00c03f, RD_1|RD_3|SM, 0, IL3A, 0, 0 },
389{"gslbx", "t,+b(b,d)", 0xd8000000, 0xfc000007, WR_1|RD_3|RD_4|LDD, 0, IL3A, 0, 0 },
390{"gslhx", "t,+b(b,d)", 0xd8000001, 0xfc000007, WR_1|RD_3|RD_4|LDD, 0, IL3A, 0, 0 },
391{"gslwx", "t,+b(b,d)", 0xd8000002, 0xfc000007, WR_1|RD_3|RD_4|LDD, 0, IL3A, 0, 0 },
392{"gsldx", "t,+b(b,d)", 0xd8000003, 0xfc000007, WR_1|RD_3|RD_4|LDD, 0, IL3A, 0, 0 },
393{"gssbx", "t,+b(b,d)", 0xf8000000, 0xfc000007, RD_1|RD_3|RD_4|SM, 0, IL3A, 0, 0 },
394{"gsshx", "t,+b(b,d)", 0xf8000001, 0xfc000007, RD_1|RD_3|RD_4|SM, 0, IL3A, 0, 0 },
395{"gsswx", "t,+b(b,d)", 0xf8000002, 0xfc000007, RD_1|RD_3|RD_4|SM, 0, IL3A, 0, 0 },
396{"gssdx", "t,+b(b,d)", 0xf8000003, 0xfc000007, RD_1|RD_3|RD_4|SM, 0, IL3A, 0, 0 },
397{"gslwxc1", "T,+b(b,d)", 0xd8000006, 0xfc000007, WR_1|RD_3|RD_4|LDD, 0, IL3A, 0, 0 },
398{"gsldxc1", "T,+b(b,d)", 0xd8000007, 0xfc000007, WR_1|RD_3|RD_4|LDD, 0, IL3A, 0, 0 },
399{"gsswxc1", "T,+b(b,d)", 0xf8000006, 0xfc000007, RD_1|RD_3|RD_4|SM, 0, IL3A, 0, 0 },
400{"gssdxc1", "T,+b(b,d)", 0xf8000007, 0xfc000007, RD_1|RD_3|RD_4|SM, 0, IL3A, 0, 0 },
401{"gslq", "+z,t,+c(b)", 0xc8000020, 0xfc008020, WR_1|WR_2|RD_4|LDD, 0, IL3A, 0, 0 },
402{"gssq", "+z,t,+c(b)", 0xe8000020, 0xfc008020, RD_1|RD_2|RD_4|SM, 0, IL3A, 0, 0 },
403{"gslqc1", "+Z,T,+c(b)", 0xc8008020, 0xfc008020, WR_1|WR_2|RD_4|LDD, 0, IL3A, 0, 0 },
404{"gssqc1", "+Z,T,+c(b)", 0xe8008020, 0xfc008020, RD_1|RD_2|RD_4|SM, 0, IL3A, 0, 0 },
98675402 405
e7ae278d 406{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
407{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_1|RD_2|FP_S, 0, I1, 0, 0 },
408{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_1|RD_2|FP_D, 0, I1, 0, SF },
409{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_1|RD_2|FP_D, 0, I5_33|IL2F, 0, 0 },
410{"abs.ps", "D,V", 0x45600005, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2E, 0, 0 },
411{"aclr", "\\,~(b)", 0x04070000, 0xfc1f8000, RD_3|SM|NODS, 0, 0, MC, 0 },
e7ae278d 412{"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, 0, MC, 0 },
fc76e730 413{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 414{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
415{"add", "D,S,T", 0x45c00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
416{"add", "D,S,T", 0x4b40000c, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F|IL3A, 0, 0 },
417{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 },
418{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, SF },
419{"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
420{"add.ob", "D,S,Q", 0x4800000b, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
421{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33|IL2F, 0, 0 },
422{"add.ps", "D,V,T", 0x45600000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
423{"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
424{"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
425{"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
426{"adda.s", "S,T", 0x46000018, 0xffe007ff, RD_1|RD_2|FP_S, 0, EE, 0, 0 },
427{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
428{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
429{"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
430{"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
431{"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, M3D, 0 },
432{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 433{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
434{"addu", "D,S,T", 0x45800000, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
435{"addu", "D,S,T", 0x4b00000c, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F|IL3A, 0, 0 },
436{"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
437{"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
438{"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
439{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I5_33, 0, 0 },
440{"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, SB1, MX, 0 },
441{"alnv.qh", "X,Y,Z,s", 0x7800001b, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, 0, MX, 0 },
442{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 443{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
444{"and", "D,S,T", 0x47c00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
445{"and", "D,S,T", 0x4bc00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
446{"and.ob", "X,Y,Q", 0x7800000c, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
447{"and.ob", "D,S,Q", 0x4800000c, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
448{"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
449{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
450{"aset", "\\,~(b)", 0x04078000, 0xfc1f8000, RD_3|SM|NODS, 0, 0, MC, 0 },
e7ae278d 451{"aset", "\\,A(b)", 0, (int) M_ASET_AB, INSN_MACRO, 0, 0, MC, 0 },
fc76e730 452{"baddu", "d,v,t", 0x70000028, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IOCT, 0, 0 },
252b5132
RH
453/* b is at the top of the table. */
454/* bal is at the top of the table. */
fc76e730
RS
455{"bbit032", "s,+x,p", 0xd8000000, 0xfc000000, RD_1|CBD, 0, IOCT, 0, 0 },
456{"bbit0", "s,+X,p", 0xd8000000, 0xfc000000, RD_1|CBD, 0, IOCT, 0, 0 }, /* bbit032 */
457{"bbit0", "s,+x,p", 0xc8000000, 0xfc000000, RD_1|CBD, 0, IOCT, 0, 0 },
458{"bbit132", "s,+x,p", 0xf8000000, 0xfc000000, RD_1|CBD, 0, IOCT, 0, 0 },
459{"bbit1", "s,+X,p", 0xf8000000, 0xfc000000, RD_1|CBD, 0, IOCT, 0, 0 }, /* bbit132 */
460{"bbit1", "s,+x,p", 0xe8000000, 0xfc000000, RD_1|CBD, 0, IOCT, 0, 0 },
61cc0267 461/* bc0[tf]l? are at the bottom of the table. */
fc76e730
RS
462{"bc1any2f", "N,p", 0x45200000, 0xffe30000, RD_CC|CBD|FP_S, 0, 0, M3D, 0 },
463{"bc1any2t", "N,p", 0x45210000, 0xffe30000, RD_CC|CBD|FP_S, 0, 0, M3D, 0 },
464{"bc1any4f", "N,p", 0x45400000, 0xffe30000, RD_CC|CBD|FP_S, 0, 0, M3D, 0 },
465{"bc1any4t", "N,p", 0x45410000, 0xffe30000, RD_CC|CBD|FP_S, 0, 0, M3D, 0 },
466{"bc1f", "p", 0x45000000, 0xffff0000, RD_CC|CBD|FP_S, 0, I1, 0, 0 },
467{"bc1f", "N,p", 0x45000000, 0xffe30000, RD_CC|CBD|FP_S, 0, I4_32, 0, 0 },
468{"bc1fl", "p", 0x45020000, 0xffff0000, RD_CC|CBL|FP_S, 0, I2|T3, 0, 0 },
469{"bc1fl", "N,p", 0x45020000, 0xffe30000, RD_CC|CBL|FP_S, 0, I4_32, 0, 0 },
470{"bc1t", "p", 0x45010000, 0xffff0000, RD_CC|CBD|FP_S, 0, I1, 0, 0 },
471{"bc1t", "N,p", 0x45010000, 0xffe30000, RD_CC|CBD|FP_S, 0, I4_32, 0, 0 },
472{"bc1tl", "p", 0x45030000, 0xffff0000, RD_CC|CBL|FP_S, 0, I2|T3, 0, 0 },
473{"bc1tl", "N,p", 0x45030000, 0xffe30000, RD_CC|CBL|FP_S, 0, I4_32, 0, 0 },
6f14957b 474/* bc2* are at the bottom of the table. */
39a7806d 475/* bc3* are at the bottom of the table. */
fc76e730
RS
476{"beqz", "s,p", 0x10000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
477{"beqzl", "s,p", 0x50000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, 0 },
478{"beq", "s,t,p", 0x10000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 },
e7ae278d 479{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 480{"beql", "s,t,p", 0x50000000, 0xfc000000, RD_1|RD_2|CBL, 0, I2|T3, 0, 0 },
e7ae278d
RS
481{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
482{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, 0, I1, 0, 0 },
483{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, 0, I1, 0, 0 },
484{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, 0, I2|T3, 0, 0 },
485{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
486{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, 0, I1, 0, 0 },
487{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, 0, I1, 0, 0 },
488{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, 0, I2|T3, 0, 0 },
489{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
fc76e730
RS
490{"bgez", "s,p", 0x04010000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
491{"bgezl", "s,p", 0x04030000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, 0 },
492{"bgezal", "s,p", 0x04110000, 0xfc1f0000, RD_1|WR_31|CBD, 0, I1, 0, 0 },
493{"bgezall", "s,p", 0x04130000, 0xfc1f0000, RD_1|WR_31|CBL, 0, I2|T3, 0, 0 },
e7ae278d
RS
494{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, 0, I1, 0, 0 },
495{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, 0, I1, 0, 0 },
496{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, 0, I2|T3, 0, 0 },
497{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
498{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, 0, I1, 0, 0 },
499{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, 0, I1, 0, 0 },
500{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, 0, I2|T3, 0, 0 },
501{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
fc76e730
RS
502{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
503{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, 0 },
e7ae278d
RS
504{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, 0, I1, 0, 0 },
505{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, 0, I1, 0, 0 },
506{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, 0, I2|T3, 0, 0 },
507{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
508{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, 0, I1, 0, 0 },
509{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, 0, I1, 0, 0 },
510{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, 0, I2|T3, 0, 0 },
511{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
fc76e730
RS
512{"blez", "s,p", 0x18000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
513{"blezl", "s,p", 0x58000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, 0 },
e7ae278d
RS
514{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, 0, I1, 0, 0 },
515{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, 0, I1, 0, 0 },
516{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, 0, I2|T3, 0, 0 },
517{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
518{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, 0, I1, 0, 0 },
519{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, 0, I1, 0, 0 },
520{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, 0, I2|T3, 0, 0 },
521{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
fc76e730
RS
522{"bltz", "s,p", 0x04000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
523{"bltzl", "s,p", 0x04020000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, 0 },
524{"bltzal", "s,p", 0x04100000, 0xfc1f0000, RD_1|WR_31|CBD, 0, I1, 0, 0 },
525{"bltzall", "s,p", 0x04120000, 0xfc1f0000, RD_1|WR_31|CBL, 0, I2|T3, 0, 0 },
526{"bnez", "s,p", 0x14000000, 0xfc1f0000, RD_1|CBD, 0, I1, 0, 0 },
527{"bnezl", "s,p", 0x54000000, 0xfc1f0000, RD_1|CBL, 0, I2|T3, 0, 0 },
528{"bne", "s,t,p", 0x14000000, 0xfc000000, RD_1|RD_2|CBD, 0, I1, 0, 0 },
e7ae278d 529{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 530{"bnel", "s,t,p", 0x54000000, 0xfc000000, RD_1|RD_2|CBL, 0, I2|T3, 0, 0 },
e7ae278d
RS
531{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, 0, I2|T3, 0, 0 },
532{"break", "", 0x0000000d, 0xffffffff, TRAP, 0, I1, 0, 0 },
533{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, 0, I1, 0, 0 },
534{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, 0, I1, 0, 0 },
fc76e730
RS
535{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
536{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
537{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 },
538{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
539{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
540{"c.f.ps", "S,T", 0x45600030, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
541{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
542{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
543{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
544{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
545{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
546{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
547{"c.un.ps", "S,T", 0x45600031, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
548{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
549{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
550{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
551{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, 0 },
552{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
553{"c.eq.ob", "Y,Q", 0x78000001, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, SB1, MX, 0 },
554{"c.eq.ob", "S,Q", 0x48000001, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, N54, 0, 0 },
555{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
556{"c.eq.ps", "S,T", 0x45600032, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
557{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
558{"c.eq.qh", "Y,Q", 0x78200001, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, 0, MX, 0 },
559{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
560{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
561{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
562{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
563{"c.ueq.ps", "S,T", 0x46c00033, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
564{"c.ueq.ps", "S,T", 0x45600033, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
565{"c.ueq.ps", "M,S,T", 0x46c00033, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
566{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
567{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
568{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
569{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
570{"c.olt.ps", "S,T", 0x46c00034, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
571{"c.olt.ps", "S,T", 0x45600034, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
572{"c.olt.ps", "M,S,T", 0x46c00034, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
573{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
574{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
575{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
576{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
577{"c.ult.ps", "S,T", 0x46c00035, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
578{"c.ult.ps", "S,T", 0x45600035, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
579{"c.ult.ps", "M,S,T", 0x46c00035, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
580{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
581{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
582{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
583{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
584{"c.ole.ps", "S,T", 0x46c00036, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
585{"c.ole.ps", "S,T", 0x45600036, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
586{"c.ole.ps", "M,S,T", 0x46c00036, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
587{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
588{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
589{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
590{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
591{"c.ule.ps", "S,T", 0x46c00037, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
592{"c.ule.ps", "S,T", 0x45600037, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
593{"c.ule.ps", "M,S,T", 0x46c00037, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
594{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
595{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
596{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
597{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
598{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
599{"c.sf.ps", "S,T", 0x45600038, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
600{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
601{"c.ngle.d", "S,T", 0x46200039, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
602{"c.ngle.d", "M,S,T", 0x46200039, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
603{"c.ngle.s", "S,T", 0x46000039, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
604{"c.ngle.s", "M,S,T", 0x46000039, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
605{"c.ngle.ps", "S,T", 0x46c00039, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
606{"c.ngle.ps", "S,T", 0x45600039, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
607{"c.ngle.ps", "M,S,T", 0x46c00039, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
608{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
609{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
610{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
611{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
612{"c.seq.ps", "S,T", 0x46c0003a, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
613{"c.seq.ps", "S,T", 0x4560003a, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
614{"c.seq.ps", "M,S,T", 0x46c0003a, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
615{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
616{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
617{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
618{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
619{"c.ngl.ps", "S,T", 0x46c0003b, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
620{"c.ngl.ps", "S,T", 0x4560003b, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
621{"c.ngl.ps", "M,S,T", 0x46c0003b, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
622{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
623{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
624{"c.lt.s", "S,T", 0x46000034, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, EE, 0, 0 },
625{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
626{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
627{"c.lt.ob", "Y,Q", 0x78000004, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, SB1, MX, 0 },
628{"c.lt.ob", "S,Q", 0x48000004, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, N54, 0, 0 },
629{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
630{"c.lt.ps", "S,T", 0x4560003c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
631{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
632{"c.lt.qh", "Y,Q", 0x78200004, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, 0, MX, 0 },
633{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
634{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
635{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
636{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
637{"c.nge.ps", "S,T", 0x46c0003d, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
638{"c.nge.ps", "S,T", 0x4560003d, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
639{"c.nge.ps", "M,S,T", 0x46c0003d, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
640{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
641{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
642{"c.le.s", "S,T", 0x46000036, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, EE, 0, 0 },
643{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
644{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
645{"c.le.ob", "Y,Q", 0x78000005, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, SB1, MX, 0 },
646{"c.le.ob", "S,Q", 0x48000005, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, N54, 0, 0 },
647{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
648{"c.le.ps", "S,T", 0x4560003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
649{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
650{"c.le.qh", "Y,Q", 0x78200005, 0xfc2007ff, RD_1|RD_2|WR_CC|FP_D, 0, 0, MX, 0 },
651{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I1, 0, SF },
652{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I4_32, 0, 0 },
653{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_1|RD_2|WR_CC|FP_S, 0, I1, 0, EE },
654{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, I4_32, 0, 0 },
655{"c.ngt.ps", "S,T", 0x46c0003f, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, I5_33|IL2F, 0, 0 },
656{"c.ngt.ps", "S,T", 0x4560003f, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
657{"c.ngt.ps", "M,S,T", 0x46c0003f, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, I5_33, 0, 0 },
658{"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
659{"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
660{"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
661{"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
662{"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
663{"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
664{"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
665{"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
666{"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
667{"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
668{"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
669{"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
670{"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
671{"cabs.nge.ps", "M,S,T", 0x46c0007d, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
672{"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
673{"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
674{"cabs.ngl.ps", "M,S,T", 0x46c0007b, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
675{"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
676{"cabs.ngle.d", "M,S,T", 0x46200079, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
677{"cabs.ngle.ps", "M,S,T", 0x46c00079, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
678{"cabs.ngle.s", "M,S,T", 0x46000079, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
679{"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
680{"cabs.ngt.ps", "M,S,T", 0x46c0007f, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
681{"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
682{"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
683{"cabs.ole.ps", "M,S,T", 0x46c00076, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
684{"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
685{"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
686{"cabs.olt.ps", "M,S,T", 0x46c00074, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
687{"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
688{"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
689{"cabs.seq.ps", "M,S,T", 0x46c0007a, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
690{"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
691{"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
692{"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
693{"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
694{"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
695{"cabs.ueq.ps", "M,S,T", 0x46c00073, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
696{"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
697{"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
698{"cabs.ule.ps", "M,S,T", 0x46c00077, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
699{"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
700{"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
701{"cabs.ult.ps", "M,S,T", 0x46c00075, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
702{"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
703{"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
704{"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_2|RD_3|WR_CC|FP_D, 0, 0, M3D, 0 },
705{"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_2|RD_3|WR_CC|FP_S, 0, 0, M3D, 0 },
39a7806d 706/* CW4010 instructions which are aliases for the cache instruction. */
e7ae278d
RS
707{"flushi", "", 0xbc010000, 0xffffffff, 0, 0, L1, 0, 0 },
708{"flushd", "", 0xbc020000, 0xffffffff, 0, 0, L1, 0, 0 },
709{"flushid", "", 0xbc030000, 0xffffffff, 0, 0, L1, 0, 0 },
fc76e730
RS
710{"wb", "o(b)", 0xbc040000, 0xfc1f0000, RD_2|SM, 0, L1, 0, 0 },
711{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_3, 0, I3_32|T3, 0, 0},
e7ae278d 712{"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I3_32|T3, 0, 0},
fc76e730
RS
713{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_1|RD_2|FP_D, 0, I3_33, 0, 0 },
714{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I3_33, 0, 0 },
715{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I2, 0, SF },
716{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_1|RD_2|FP_S, 0, I2, 0, EE },
717{"cfc0", "t,G", 0x40400000, 0xffe007ff, WR_1|RD_C0|LCD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
718{"cfc1", "t,G", 0x44400000, 0xffe007ff, WR_1|RD_C1|LCD|FP_S, 0, I1, 0, 0 },
719{"cfc1", "t,S", 0x44400000, 0xffe007ff, WR_1|RD_C1|LCD|FP_S, 0, I1, 0, 0 },
6f14957b 720/* cfc2 is at the bottom of the table. */
39a7806d 721/* cfc3 is at the bottom of the table. */
fc76e730
RS
722{"cftc1", "d,E", 0x41000023, 0xffe007ff, WR_1|RD_C1|TRAP|LCD|FP_S, 0, 0, MT32, 0 },
723{"cftc1", "d,T", 0x41000023, 0xffe007ff, WR_1|RD_C1|TRAP|LCD|FP_S, 0, 0, MT32, 0 },
724{"cftc2", "d,E", 0x41000025, 0xffe007ff, WR_1|RD_C2|TRAP|LCD, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
725{"cins32", "t,r,+p,+s", 0x70000033, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
726{"cins", "t,r,+P,+S", 0x70000033, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 }, /* cins32 */
727{"cins", "t,r,+p,+S", 0x70000032, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
728{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_1|RD_2, 0, I32|N55, 0, 0 },
729{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_1|RD_2, 0, I32|N55, 0, 0 },
730{"ctc0", "t,G", 0x40c00000, 0xffe007ff, RD_1|WR_CC|COD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
731{"ctc1", "t,G", 0x44c00000, 0xffe007ff, RD_1|WR_CC|COD|FP_S, 0, I1, 0, 0 },
732{"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1|WR_CC|COD|FP_S, 0, I1, 0, 0 },
6f14957b 733/* ctc2 is at the bottom of the table. */
39a7806d 734/* ctc3 is at the bottom of the table. */
fc76e730
RS
735{"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|COD|FP_S, 0, 0, MT32, 0 },
736{"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|COD|FP_S, 0, 0, MT32, 0 },
737{"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1|WR_CC|TRAP|COD, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
738{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_1|RD_2|FP_D, 0, I3_33, 0, 0 },
739{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, SF },
740{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, SF },
741{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_1|RD_2|FP_D, 0, I3_33, 0, 0 },
742{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I3_33, 0, 0 },
743{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I3_33, 0, 0 },
744{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, SF },
745{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_1|RD_2|FP_S, 0, I1, 0, 0 },
746{"cvt.s.pl", "D,S", 0x46c00028, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I5_33, 0, 0 },
747{"cvt.s.pu", "D,S", 0x46c00020, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I5_33, 0, 0 },
748{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I1, 0, SF },
749{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_1|RD_2|FP_S, 0, I1, 0, EE },
750{"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, 0, M3D, 0 },
751{"cvt.ps.s", "D,V,T", 0x46000026, 0xffe0003f, WR_1|RD_2|RD_3|FP_S|FP_D, 0, I5_33, 0, 0 },
752{"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, 0, M3D, 0 },
e7ae278d 753{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3, 0, 0 },
fc76e730 754{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
e7ae278d 755{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
756{"dadd", "D,S,T", 0x45e00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
757{"dadd", "D,S,T", 0x4b60000c, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
758{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_1|RD_2, 0, I3, 0, 0 },
759{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_1|RD_2, 0, I3, 0, 0 },
760{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
e7ae278d 761{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, 0, I3, 0, 0 },
fc76e730 762{"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_1|RD_2|RD_3|WR_C0|RD_C0, 0, XLR, 0, 0 },
e7ae278d 763{"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5, 0, 0 },
fc76e730
RS
764{"dclo", "U,s", 0x70000025, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, 0 },
765{"dclz", "U,s", 0x70000024, 0xfc0007ff, WR_1|RD_2, 0, I64|N55, 0, 0 },
252b5132 766/* dctr and dctw are used on the r5000. */
fc76e730
RS
767{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_2, 0, I3, 0, 0 },
768{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_2, 0, I3, 0, 0 },
e7ae278d
RS
769{"deret", "", 0x4200001f, 0xffffffff, NODS, 0, I32|G2, 0, 0 },
770{"dext", "t,r,I,+I", 0, (int) M_DEXT, INSN_MACRO, 0, I65, 0, 0 },
fc76e730
RS
771{"dext", "t,r,+A,+C", 0x7c000003, 0xfc00003f, WR_1|RD_2, 0, I65, 0, 0 },
772{"dextm", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_1|RD_2, 0, I65, 0, 0 },
773{"dextu", "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_1|RD_2, 0, I65, 0, 0 },
252b5132 774/* For ddiv, see the comments about div. */
fc76e730 775{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, M32 },
e7ae278d
RS
776{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, 0, I3, 0, M32 },
777{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, 0, I3, 0, M32 },
252b5132 778/* For ddivu, see the comments about div. */
fc76e730 779{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, M32 },
e7ae278d
RS
780{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, 0, I3, 0, M32 },
781{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, 0, I3, 0, M32 },
782{"di", "", 0x42000039, 0xffffffff, WR_C0, 0, EE, 0, 0 },
6a819047 783{"di", "", 0x41606000, 0xffffffff, WR_C0, 0, I33, 0, 0 },
fc76e730 784{"di", "t", 0x41606000, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
e7ae278d 785{"dins", "t,r,I,+I", 0, (int) M_DINS, INSN_MACRO, 0, I65, 0, 0 },
fc76e730
RS
786{"dins", "t,r,+A,+B", 0x7c000007, 0xfc00003f, WR_1|RD_2, 0, I65, 0, 0 },
787{"dinsm", "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_1|RD_2, 0, I65, 0, 0 },
788{"dinsu", "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_1|RD_2, 0, I65, 0, 0 },
252b5132
RH
789/* The MIPS assembler treats the div opcode with two operands as
790 though the first operand appeared twice (the first operand is both
791 a source and a destination). To get the div machine instruction,
792 you must use an explicit destination of $0. */
fc76e730
RS
793{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 },
794{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_2|WR_HILO, 0, I1, 0, 0 },
e7ae278d
RS
795{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, 0, I1, 0, 0 },
796{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
797{"div1", "z,s,t", 0x7000001a, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, EE, 0, 0 },
798{"div1", "z,t", 0x7000001a, 0xffe0ffff, RD_2|WR_HILO, 0, EE, 0, 0 },
799{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, SF },
800{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 },
801{"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, 0, 0 },
252b5132 802/* For divu, see the comments about div. */
fc76e730
RS
803{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 },
804{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_2|WR_HILO, 0, I1, 0, 0 },
e7ae278d
RS
805{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, 0, I1, 0, 0 },
806{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
807{"divu1", "z,s,t", 0x7000001b, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, EE, 0, 0 },
808{"divu1", "z,t", 0x7000001b, 0xffe0ffff, RD_2|WR_HILO, 0, EE, 0, 0 },
e7ae278d
RS
809{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, 0, I3, 0, 0 },
810{"dlca", "t,A(b)", 0, (int) M_DLCA_AB, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
811{"dli", "t,j", 0x24000000, 0xffe00000, WR_1, 0, I3, 0, 0 }, /* addiu */
812{"dli", "t,i", 0x34000000, 0xffe00000, WR_1, 0, I3, 0, 0 }, /* ori */
e7ae278d 813{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
814{"dmacc", "d,s,t", 0x00000029, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
815{"dmacchi", "d,s,t", 0x00000229, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
816{"dmacchis", "d,s,t", 0x00000629, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
817{"dmacchiu", "d,s,t", 0x00000269, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
818{"dmacchius", "d,s,t", 0x00000669, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
819{"dmaccs", "d,s,t", 0x00000429, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
820{"dmaccu", "d,s,t", 0x00000069, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
821{"dmaccus", "d,s,t", 0x00000469, 0xfc0007ff, WR_1|RD_2|RD_3|WR_LO, 0, N412, 0, 0 },
822{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_1|RD_2|MOD_LO, 0, N411, 0, 0 },
823{"dmfc0", "t,G", 0x40200000, 0xffe007ff, WR_1|RD_C0|LCD, 0, I3, 0, EE },
824{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, WR_1|RD_C0|LCD, 0, I64, 0, 0 },
825{"dmfgc0", "t,G", 0x40600100, 0xffe007ff, WR_1|RD_C0|LCD, 0, 0, IVIRT64, 0 },
826{"dmfgc0", "t,G,H", 0x40600100, 0xffe007f8, WR_1|RD_C0|LCD, 0, 0, IVIRT64, 0 },
e7ae278d 827{"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
fc76e730
RS
828{"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
829{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|COD, 0, I3, 0, EE },
830{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|COD, 0, I64, 0, 0 },
831{"dmtgc0", "t,G", 0x40600300, 0xffe007ff, RD_1|WR_C0|WR_CC|COD, 0, 0, IVIRT64, 0 },
832{"dmtgc0", "t,G,H", 0x40600300, 0xffe007f8, RD_1|WR_C0|WR_CC|COD, 0, 0, IVIRT64, 0 },
833{"dmfc1", "t,S", 0x44200000, 0xffe007ff, WR_1|RD_2|LCD|FP_D, 0, I3, 0, SF },
834{"dmfc1", "t,G", 0x44200000, 0xffe007ff, WR_1|RD_2|LCD|FP_D, 0, I3, 0, SF },
835{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1|WR_2|COD|FP_D, 0, I3, 0, SF },
836{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1|WR_2|COD|FP_D, 0, I3, 0, SF },
6f14957b
MR
837/* dmfc2 is at the bottom of the table. */
838/* dmtc2 is at the bottom of the table. */
39a7806d
TS
839/* dmfc3 is at the bottom of the table. */
840/* dmtc3 is at the bottom of the table. */
fc76e730 841{"dmul", "d,v,t", 0x70000003, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, IOCT, 0, 0 },
e7ae278d
RS
842{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, 0, I3, 0, M32 },
843{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, 0, I3, 0, M32 },
844{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, 0, I3, 0, M32 },
845{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, 0, I3, 0, M32 },
846{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, 0, I3, 0, M32 },
847{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, 0, I3, 0, M32 },
fc76e730
RS
848{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, I3, 0, M32 },
849{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, I3, 0, M32 },
850{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsub 0 */
851{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_1|RD_2, 0, I3, 0, 0 }, /* dsubu 0*/
852{"dpop", "d,v", 0x7000002d, 0xfc1f07ff, WR_1|RD_2, 0, IOCT, 0, 0 },
853{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, M32 },
e7ae278d
RS
854{"drem", "d,v,t", 0, (int) M_DREM_3, INSN_MACRO, 0, I3, 0, M32 },
855{"drem", "d,v,I", 0, (int) M_DREM_3I, INSN_MACRO, 0, I3, 0, M32 },
fc76e730 856{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I3, 0, M32 },
e7ae278d
RS
857{"dremu", "d,v,t", 0, (int) M_DREMU_3, INSN_MACRO, 0, I3, 0, M32 },
858{"dremu", "d,v,I", 0, (int) M_DREMU_3I, INSN_MACRO, 0, I3, 0, M32 },
859{"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5, 0, 0 },
860{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3, 0, 0 },
861{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3, 0, 0 },
862{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I3, 0, 0 },
863{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
864{"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_1|RD_2, 0, N5|I65, 0, 0 },
865{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, WR_1|RD_2|RD_3, 0, N5|I65, 0, 0 },
866{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_1|RD_2, 0, N5|I65, 0, 0 },
e7ae278d
RS
867{"drotl", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I65, 0, 0 },
868{"drotl", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I65, 0, 0 },
869{"drotr", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I65, 0, 0 },
870{"drotr", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, 0, I65, 0, 0 },
fc76e730
RS
871{"drotrv", "d,t,s", 0x00000056, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I65, 0, 0 },
872{"drotr32", "d,w,<", 0x0020003e, 0xffe0003f, WR_1|RD_2, 0, I65, 0, 0 },
873{"dsbh", "d,w", 0x7c0000a4, 0xffe007ff, WR_1|RD_2, 0, I65, 0, 0 },
874{"dshd", "d,w", 0x7c000164, 0xffe007ff, WR_1|RD_2, 0, I65, 0, 0 },
875{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
876{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 },
877{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, /* dsllv */
878{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dsll32 */
879{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 },
880{"dsll", "D,S,T", 0x45a00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
881{"dsll", "D,S,T", 0x4b20000e, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
882{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
883{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 },
884{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, /* dsrav */
885{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dsra32 */
886{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 },
887{"dsra", "D,S,T", 0x45e00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
888{"dsra", "D,S,T", 0x4b60000f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
889{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
890{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 },
891{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 }, /* dsrlv */
892{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 }, /* dsrl32 */
893{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_1|RD_2, 0, I3, 0, 0 },
894{"dsrl", "D,S,T", 0x45a00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
895{"dsrl", "D,S,T", 0x4b20000f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
896{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
e7ae278d 897{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
898{"dsub", "D,S,T", 0x45e00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
899{"dsub", "D,S,T", 0x4b60000d, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
900{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I3, 0, 0 },
e7ae278d
RS
901{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, 0, I3, 0, 0 },
902{"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
fc76e730 903{"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
e7ae278d 904{"ei", "", 0x42000038, 0xffffffff, WR_C0, 0, EE, 0, 0 },
6a819047 905{"ei", "", 0x41606020, 0xffffffff, WR_C0, 0, I33, 0, 0 },
fc76e730 906{"ei", "t", 0x41606020, 0xffe0ffff, WR_1|WR_C0, 0, I33, 0, 0 },
e7ae278d 907{"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
fc76e730 908{"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
e7ae278d
RS
909{"eret", "", 0x42000018, 0xffffffff, NODS, 0, I3_32, 0, 0 },
910{"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
fc76e730
RS
911{"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
912{"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_1|RD_2, 0, I33, 0, 0 },
913{"exts32", "t,r,+p,+s", 0x7000003b, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
914{"exts", "t,r,+P,+S", 0x7000003b, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 }, /* exts32 */
915{"exts", "t,r,+p,+S", 0x7000003a, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
916{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_1|RD_2|FP_D, 0, I3_33, 0, 0 },
917{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I3_33, 0, 0 },
918{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I2, 0, SF },
919{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_1|RD_2|FP_S, 0, I2, 0, 0 },
e7ae278d
RS
920{"hibernate", "", 0x42000023, 0xffffffff, 0, 0, V1, 0, 0 },
921{"hypcall", "", 0x42000028, 0xffffffff, TRAP, 0, 0, IVIRT, 0 },
922{"hypcall", "+J", 0x42000028, 0xffe007ff, TRAP, 0, 0, IVIRT, 0 },
fc76e730 923{"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_1|RD_2, 0, I33, 0, 0 },
e7ae278d 924{"iret", "", 0x42000038, 0xffffffff, NODS, 0, 0, MC, 0 },
fc76e730 925{"jr", "s", 0x00000008, 0xfc1fffff, RD_1|UBD, 0, I1, 0, 0 },
39a7806d
TS
926/* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with
927 the same hazard barrier effect. */
fc76e730
RS
928{"jr.hb", "s", 0x00000408, 0xfc1fffff, RD_1|UBD, 0, I32, 0, 0 },
929{"j", "s", 0x00000008, 0xfc1fffff, RD_1|UBD, 0, I1, 0, 0 }, /* jr */
252b5132
RH
930/* SVR4 PIC code requires special handling for j, so it must be a
931 macro. */
e7ae278d 932{"j", "a", 0, (int) M_J_A, INSN_MACRO, 0, I1, 0, 0 },
252b5132
RH
933/* This form of j is used by the disassembler and internally by the
934 assembler, but will never match user input (because the line above
935 will match first). */
e7ae278d 936{"j", "a", 0x08000000, 0xfc000000, UBD, 0, I1, 0, 0 },
fc76e730
RS
937{"jalr", "s", 0x0000f809, 0xfc1fffff, RD_1|WR_31|UBD, 0, I1, 0, 0 },
938{"jalr", "d,s", 0x00000009, 0xfc1f07ff, WR_1|RD_2|UBD, 0, I1, 0, 0 },
39a7806d
TS
939/* jalr.hb is officially MIPS{32,64}R2, but it works on R1 as jalr
940 with the same hazard barrier effect. */
fc76e730
RS
941{"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, RD_1|WR_31|UBD, 0, I32, 0, 0 },
942{"jalr.hb", "d,s", 0x00000409, 0xfc1f07ff, WR_1|RD_2|UBD, 0, I32, 0, 0 },
252b5132
RH
943/* SVR4 PIC code requires special handling for jal, so it must be a
944 macro. */
e7ae278d
RS
945{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, 0, I1, 0, 0 },
946{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, 0, I1, 0, 0 },
947{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, 0, I1, 0, 0 },
252b5132
RH
948/* This form of jal is used by the disassembler and internally by the
949 assembler, but will never match user input (because the line above
950 will match first). */
fc76e730
RS
951{"jal", "a", 0x0c000000, 0xfc000000, WR_31|UBD, 0, I1, 0, 0 },
952{"jalx", "+i", 0x74000000, 0xfc000000, WR_31|UBD, 0, I1, 0, 0 },
e7ae278d 953{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
954{"laa", "d,(b),t", 0x7000049f, 0xfc0007ff, WR_1|RD_2|RD_3|LDD|SM, 0, IOCT2, 0, 0 },
955{"laad", "d,(b),t", 0x700004df, 0xfc0007ff, WR_1|RD_2|RD_3|LDD|SM, 0, IOCT2, 0, 0 },
956{"lac", "d,(b)", 0x7000039f, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
957{"lacd", "d,(b)", 0x700003df, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
958{"lad", "d,(b)", 0x7000019f, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
959{"ladd", "d,(b)", 0x700001df, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
960{"lai", "d,(b)", 0x7000009f, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
961{"laid", "d,(b)", 0x700000df, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
962{"las", "d,(b)", 0x7000029f, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
963{"lasd", "d,(b)", 0x700002df, 0xfc1f07ff, WR_1|RD_2|LDD|SM, 0, IOCT2, 0, 0 },
964{"law", "d,(b),t", 0x7000059f, 0xfc0007ff, WR_1|RD_2|RD_3|LDD|SM, 0, IOCT2, 0, 0 },
965{"lawd", "d,(b),t", 0x700005df, 0xfc0007ff, WR_1|RD_2|RD_3|LDD|SM, 0, IOCT2, 0, 0 },
966{"lb", "t,o(b)", 0x80000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 967{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 968{"lbu", "t,o(b)", 0x90000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 969{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
970{"lbx", "d,t(b)", 0x7c00058a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, 0, 0 },
971{"lbux", "d,t(b)", 0x7c00018a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, D32, 0},
972{"ldx", "d,t(b)", 0x7c00020a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, D64, 0},
973{"lhx", "d,t(b)", 0x7c00010a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, D32, 0},
974{"lhux", "d,t(b)", 0x7c00050a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, 0, 0 },
975{"lwx", "d,t(b)", 0x7c00000a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, D32, 0},
976{"lwux", "d,t(b)", 0x7c00040a, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, IOCT2, 0, 0 },
e7ae278d 977{"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, 0, I1, 0, 0 },
704897fb 978/* The macro has to be first to handle o32 correctly. */
e7ae278d 979{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
980{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_1|RD_3, 0, I3, 0, 0 },
981{"ldaddw", "t,b", 0x70000010, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
982{"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
983{"ldaddd", "t,b", 0x70000012, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
984{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D, 0, I2, 0, SF },
985{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D, 0, I2, 0, SF },
e7ae278d
RS
986{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF },
987{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF },
fc76e730 988{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D, 0, I2, 0, SF }, /* ldc1 */
e7ae278d 989{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 },
fc76e730 990{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, RD_3|WR_CC|CLD, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 991{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 992{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, RD_3|WR_CC|CLD, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 993{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 994{"ldl", "t,o(b)", 0x68000000, 0xfc000000, WR_1|RD_3|LDD, 0, I3, 0, 0 },
e7ae278d 995{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, 0, I3, 0, 0 },
fc76e730 996{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, WR_1|RD_3|LDD, 0, I3, 0, 0 },
e7ae278d 997{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
998{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, WR_1|RD_2|RD_3|LDD|FP_D, 0, I4_33, 0, 0 },
999{"lh", "t,o(b)", 0x84000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 1000{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1001{"lhu", "t,o(b)", 0x94000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 1002{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, 0, I1, 0, 0 },
252b5132 1003/* li is at the start of the table. */
e7ae278d
RS
1004{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, INSN2_M_FP_D, I1, 0, SF },
1005{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, INSN2_M_FP_D, I1, 0, SF },
1006{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
1007{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
fc76e730 1008{"ll", "t,o(b)", 0xc0000000, 0xfc000000, WR_1|RD_3|LDD, 0, I2, 0, EE },
e7ae278d 1009{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, 0, I2, 0, EE },
fc76e730 1010{"lld", "t,o(b)", 0xd0000000, 0xfc000000, WR_1|RD_3|LDD, 0, I3, 0, EE },
e7ae278d 1011{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, 0, I3, 0, EE },
fc76e730 1012{"lq", "t,o(b)", 0x78000000, 0xfc000000, WR_1|RD_3, 0, MMI, 0, 0 },
e7ae278d 1013{"lq", "t,A(b)", 0, (int) M_LQ_AB, INSN_MACRO, 0, MMI, 0, 0 },
fc76e730 1014{"lqc2", "E,o(b)", 0xd8000000, 0xfc000000, RD_3|WR_C2, 0, EE, 0, 0 },
e7ae278d 1015{"lqc2", "E,A(b)", 0, (int) M_LQC2_AB, INSN_MACRO, 0, EE, 0, 0 },
fc76e730
RS
1016{"lui", "t,u", 0x3c000000, 0xffe00000, WR_1, 0, I1, 0, 0 },
1017{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, WR_1|RD_2|RD_3|LDD|FP_D, 0, I5_33|N55, 0, 0},
1018{"lw", "t,o(b)", 0x8c000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 1019{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1020{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, RD_3|WR_CC|CLD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
e7ae278d 1021{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 },
fc76e730
RS
1022{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, WR_1|RD_3|CLD|FP_S, 0, I1, 0, 0 },
1023{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, WR_1|RD_3|CLD|FP_S, 0, I1, 0, 0 },
e7ae278d
RS
1024{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
1025{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
fc76e730 1026{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, WR_1|RD_3|CLD|FP_S, 0, I1, 0, 0 }, /* lwc1 */
e7ae278d 1027{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
fc76e730 1028{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, RD_3|WR_CC|CLD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 1029{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 1030{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, RD_3|WR_CC|CLD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 1031{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 1032{"lwl", "t,o(b)", 0x88000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 1033{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1034{"lcache", "t,o(b)", 0x88000000, 0xfc000000, WR_1|RD_3|LDD, 0, I2, 0, 0 }, /* same */
e7ae278d 1035{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I2, 0, 0 }, /* as lwl */
fc76e730 1036{"lwr", "t,o(b)", 0x98000000, 0xfc000000, WR_1|RD_3|LDD, 0, I1, 0, 0 },
e7ae278d 1037{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1038{"flush", "t,o(b)", 0x98000000, 0xfc000000, WR_1|RD_3|LDD, 0, I2, 0, 0 }, /* same */
e7ae278d 1039{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I2, 0, 0 }, /* as lwr */
fc76e730
RS
1040{"fork", "d,s,t", 0x7c000008, 0xfc0007ff, WR_1|RD_2|RD_3|TRAP, 0, 0, MT32, 0 },
1041{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, WR_1|RD_3|LDD, 0, I3, 0, 0 },
e7ae278d 1042{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
1043{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, WR_1|RD_2|RD_3|LDD|FP_S, 0, I4_33, 0, 0 },
1044{"lwxs", "d,t(b)", 0x70000088, 0xfc0007ff, WR_1|RD_2|RD_3|LDD, 0, 0, SMT, 0 },
1045{"macc", "d,s,t", 0x00000028, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1046{"macc", "d,s,t", 0x00000158, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1047{"maccs", "d,s,t", 0x00000428, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1048{"macchi", "d,s,t", 0x00000228, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1049{"macchi", "d,s,t", 0x00000358, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1050{"macchis", "d,s,t", 0x00000628, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1051{"macchiu", "d,s,t", 0x00000268, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1052{"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1053{"macchius", "d,s,t", 0x00000668, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1054{"maccu", "d,s,t", 0x00000068, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1055{"maccu", "d,s,t", 0x00000159, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1056{"maccus", "d,s,t", 0x00000468, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N412, 0, 0 },
1057{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, P3, 0, 0 },
1058{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, P3, 0, 0 },
1059{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I4_33, 0, 0 },
1060{"madd.d", "D,S,T", 0x46200018, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1061{"madd.d", "D,S,T", 0x72200018, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1062{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I4_33, 0, 0 },
1063{"madd.s", "D,S,T", 0x46000018, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
1064{"madd.s", "D,S,T", 0x72000018, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F, 0, 0 },
1065{"madd.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, EE, 0, 0 },
1066{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I5_33, 0, 0 },
1067{"madd.ps", "D,S,T", 0x45600018, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1068{"madd.ps", "D,S,T", 0x72c00018, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1069{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, L1, 0, 0 },
1070{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I32|N55, 0, 0 },
1071{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, G1, 0, 0 },
1072{"madd", "7,s,t", 0x70000000, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1073{"madd", "d,s,t", 0x70000000, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, G1, 0, 0 },
1074{"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, EE, 0, 0 },
1075{"madd1", "d,s,t", 0x70000020, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, EE, 0, 0 },
1076{"madda.s", "S,T", 0x4600001e, 0xffe007ff, RD_1|RD_2|FP_S, 0, EE, 0, 0 },
1077{"maddp", "s,t", 0x70000441, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, 0, SMT, 0 },
1078{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, L1, 0, 0 },
1079{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I32|N55, 0, 0 },
1080{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, G1, 0, 0 },
1081{"maddu", "7,s,t", 0x70000001, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1082{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, G1, 0, 0 },
1083{"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, EE, 0, 0 },
1084{"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, EE, 0, 0 },
1085{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, N411, 0, 0 },
1086{"max.ob", "X,Y,Q", 0x78000007, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1087{"max.ob", "D,S,Q", 0x48000007, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1088{"max.qh", "X,Y,Q", 0x78200007, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1089{"max.s", "D,S,T", 0x46000028, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, EE, 0, 0 },
1090{"mfbpc", "t", 0x4000c000, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1091{"mfdab", "t", 0x4000c004, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1092{"mfdabm", "t", 0x4000c005, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1093{"mfdvb", "t", 0x4000c006, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1094{"mfdvbm", "t", 0x4000c007, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1095{"mfiab", "t", 0x4000c002, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1096{"mfiabm", "t", 0x4000c003, 0xffe0ffff, WR_1|RD_C0|LCD, 0, EE, 0, 0 },
1097{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, WR_1|RD_C0|LCD, 0, M1|N5|EE, 0, 0 },
1098{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, WR_1|RD_C0|LCD, 0, M1|N5|EE, 0, 0 },
1099{"mftacx", "d", 0x41020021, 0xffff07ff, WR_1|RD_a|TRAP, 0, 0, MT32, 0 },
1100{"mftacx", "d,*", 0x41020021, 0xfff307ff, WR_1|RD_a|TRAP, 0, 0, MT32, 0 },
1101{"mftc0", "d,+t", 0x41000000, 0xffe007ff, WR_1|RD_C0|TRAP|LCD, 0, 0, MT32, 0 },
1102{"mftc0", "d,E,H", 0x41000000, 0xffe007f8, WR_1|RD_C0|TRAP|LCD, 0, 0, MT32, 0 },
1103{"mftc1", "d,T", 0x41000022, 0xffe007ff, WR_1|RD_2|TRAP|LCD|FP_S, 0, 0, MT32, 0 },
1104{"mftc1", "d,E", 0x41000022, 0xffe007ff, WR_1|RD_2|TRAP|LCD|FP_S, 0, 0, MT32, 0 },
1105{"mftc2", "d,E", 0x41000024, 0xffe007ff, WR_1|RD_C2|TRAP|LCD, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
1106{"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
1107{"mftgpr", "d,t", 0x41000020, 0xffe007ff, WR_1|RD_2|TRAP, 0, 0, MT32, 0 },
1108{"mfthc1", "d,T", 0x41000032, 0xffe007ff, WR_1|RD_2|TRAP|LCD|FP_D, 0, 0, MT32, 0 },
1109{"mfthc1", "d,E", 0x41000032, 0xffe007ff, WR_1|RD_2|TRAP|LCD|FP_D, 0, 0, MT32, 0 },
1110{"mfthc2", "d,E", 0x41000034, 0xffe007ff, WR_1|RD_C2|TRAP|LCD, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
1111{"mfthi", "d", 0x41010021, 0xffff07ff, WR_1|RD_a|TRAP, 0, 0, MT32, 0 },
1112{"mfthi", "d,*", 0x41010021, 0xfff307ff, WR_1|RD_a|TRAP, 0, 0, MT32, 0 },
1113{"mftlo", "d", 0x41000021, 0xffff07ff, WR_1|RD_a|TRAP, 0, 0, MT32, 0 },
1114{"mftlo", "d,*", 0x41000021, 0xfff307ff, WR_1|RD_a|TRAP, 0, 0, MT32, 0 },
1115{"mftr", "d,t,!,H,$", 0x41000000, 0xffe007c8, WR_1|TRAP, 0, 0, MT32, 0 },
1116{"mfc0", "t,G", 0x40000000, 0xffe007ff, WR_1|RD_C0|LCD, 0, I1, 0, 0 },
1117{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, WR_1|RD_C0|LCD, 0, I32, 0, 0 },
1118{"mfgc0", "t,G", 0x40600000, 0xffe007ff, WR_1|RD_C0|LCD, 0, 0, IVIRT, 0 },
1119{"mfgc0", "t,G,H", 0x40600000, 0xffe007f8, WR_1|RD_C0|LCD, 0, 0, IVIRT, 0 },
1120{"mfc1", "t,S", 0x44000000, 0xffe007ff, WR_1|RD_2|LCD|FP_S, 0, I1, 0, 0 },
1121{"mfc1", "t,G", 0x44000000, 0xffe007ff, WR_1|RD_2|LCD|FP_S, 0, I1, 0, 0 },
1122{"mfhc1", "t,S", 0x44600000, 0xffe007ff, WR_1|RD_2|LCD|FP_D, 0, I33, 0, 0 },
1123{"mfhc1", "t,G", 0x44600000, 0xffe007ff, WR_1|RD_2|LCD|FP_D, 0, I33, 0, 0 },
6f14957b
MR
1124/* mfc2 is at the bottom of the table. */
1125/* mfhc2 is at the bottom of the table. */
39a7806d 1126/* mfc3 is at the bottom of the table. */
fc76e730
RS
1127{"mfdr", "t,G", 0x7000003d, 0xffe007ff, WR_1|RD_C0|LCD, 0, N5, 0, 0 },
1128{"mfhi", "d", 0x00000010, 0xffff07ff, WR_1|RD_HI, 0, I1, 0, 0 },
1129{"mfhi", "d,9", 0x00000010, 0xff9f07ff, WR_1|RD_HI, 0, 0, D32, 0 },
1130{"mfhi1", "d", 0x70000010, 0xffff07ff, WR_1|RD_HI, 0, EE, 0, 0 },
1131{"mflo", "d", 0x00000012, 0xffff07ff, WR_1|RD_LO, 0, I1, 0, 0 },
1132{"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_1|RD_LO, 0, 0, D32, 0 },
1133{"mflo1", "d", 0x70000012, 0xffff07ff, WR_1|RD_LO, 0, EE, 0, 0 },
1134{"mflhxu", "d", 0x00000052, 0xffff07ff, WR_1|MOD_HILO, 0, 0, SMT, 0 },
1135{"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_1, 0, XLR, 0, 0 },
1136{"mfsa", "d", 0x00000028, 0xffff07ff, WR_1, 0, EE, 0, 0 },
1137{"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1138{"min.ob", "D,S,Q", 0x48000006, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1139{"min.qh", "X,Y,Q", 0x78200006, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1140{"min.s", "D,S,T", 0x46000029, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, EE, 0, 0 },
1141{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_1|RD_2|FP_D, 0, I1, 0, SF },
1142{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_1|RD_2|FP_S, 0, I1, 0, 0 },
1143{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_1|RD_2|FP_D, 0, I5_33|IL2F, 0, 0 },
1144{"mov.ps", "D,S", 0x45600006, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2E, 0, 0 },
1145{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_1|RD_2|RD_CC|FP_S|FP_D, 0, I4_32, 0, 0 },
1146{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, I4_32, 0, 0 },
1147{"movf.l", "D,S,N", 0x46a00011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, SB1, MX, 0 },
1148{"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, SB1, MX, 0 },
1149{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_S, 0, I4_32, 0, 0 },
1150{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, I5_33, 0, 0 },
1151{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I4_32|IL2E|IL2F|EE, 0, 0 },
1152{"movnz", "d,v,t", 0x0000000b, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E|IL2F|IL3A, 0, 0 },
1153{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_1|RD_2, 0, L1, 0, 0 },
1154{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I4_32, 0, 0 },
1155{"movn.l", "D,S,t", 0x46a00013, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1156{"movn.l", "X,Y,t", 0x46a00013, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1157{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I4_32, 0, 0 },
1158{"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33, 0, 0 },
1159{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_1|RD_2|RD_CC|FP_S|FP_D, 0, I4_32, 0, 0 },
1160{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, I4_32, 0, 0 },
1161{"movt.l", "D,S,N", 0x46a10011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, SB1, MX, 0 },
1162{"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, SB1, MX, 0 },
1163{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_S, 0, I4_32, 0, 0 },
1164{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_1|RD_2|RD_CC|FP_D, 0, I5_33, 0, 0 },
1165{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I4_32|IL2E|IL2F|EE, 0, 0 },
1166{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_1|RD_2, 0, L1, 0, 0 },
1167{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I4_32, 0, 0 },
1168{"movz.l", "D,S,t", 0x46a00012, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1169{"movz.l", "X,Y,t", 0x46a00012, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1170{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I4_32, 0, 0 },
1171{"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33, 0, 0 },
1172{"msac", "d,s,t", 0x000001d8, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1173{"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1174{"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1175{"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
252b5132 1176/* move is at the top of the table. */
fc76e730 1177{"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
e7ae278d
RS
1178{"msgsnd", "t", 0, (int) M_MSGSND, INSN_MACRO, 0, XLR, 0, 0 },
1179{"msgld", "", 0, (int) M_MSGLD, INSN_MACRO, 0, XLR, 0, 0 },
1180{"msgld", "t", 0, (int) M_MSGLD_T, INSN_MACRO, 0, XLR, 0, 0 },
1181{"msgwait", "", 0, (int) M_MSGWAIT, INSN_MACRO, 0, XLR, 0, 0 },
1182{"msgwait", "t", 0, (int) M_MSGWAIT_T,INSN_MACRO, 0, XLR, 0, 0 },
fc76e730
RS
1183{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I4_33, 0, 0 },
1184{"msub.d", "D,S,T", 0x46200019, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1185{"msub.d", "D,S,T", 0x72200019, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1186{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I4_33, 0, 0 },
1187{"msub.s", "D,S,T", 0x46000019, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
1188{"msub.s", "D,S,T", 0x72000019, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F, 0, 0 },
1189{"msub.s", "D,S,T", 0x4600001d, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, EE, 0, 0 },
1190{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I5_33, 0, 0 },
1191{"msub.ps", "D,S,T", 0x45600019, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1192{"msub.ps", "D,S,T", 0x72c00019, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1193{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, L1, 0, 0 },
1194{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I32|N55, 0, 0 },
1195{"msub", "7,s,t", 0x70000004, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1196{"msuba.s", "S,T", 0x4600001f, 0xffe007ff, RD_1|RD_2|FP_S, 0, EE, 0, 0 },
1197{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, L1, 0, 0 },
1198{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, I32|N55, 0, 0 },
1199{"msubu", "7,s,t", 0x70000005, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1200{"mtbpc", "t", 0x4080c000, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1201{"mtdab", "t", 0x4080c004, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1202{"mtdabm", "t", 0x4080c005, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1203{"mtdvb", "t", 0x4080c006, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1204{"mtdvbm", "t", 0x4080c007, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1205{"mtiab", "t", 0x4080c002, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1206{"mtiabm", "t", 0x4080c003, 0xffe0ffff, RD_1|WR_C0|COD, 0, EE, 0, 0 },
1207{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, RD_1|WR_C0|COD, 0, M1|N5|EE, 0, 0 },
1208{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, RD_1|WR_C0|COD, 0, M1|N5|EE, 0, 0 },
1209{"mtc0", "t,G", 0x40800000, 0xffe007ff, RD_1|WR_C0|WR_CC|COD, 0, I1, 0, 0 },
1210{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, RD_1|WR_C0|WR_CC|COD, 0, I32, 0, 0 },
1211{"mtgc0", "t,G", 0x40600200, 0xffe007ff, RD_1|WR_C0|WR_CC|COD, 0, 0, IVIRT, 0 },
1212{"mtgc0", "t,G,H", 0x40600200, 0xffe007f8, RD_1|WR_C0|WR_CC|COD, 0, 0, IVIRT, 0 },
1213{"mtc1", "t,S", 0x44800000, 0xffe007ff, RD_1|WR_2|COD|FP_S, 0, I1, 0, 0 },
1214{"mtc1", "t,G", 0x44800000, 0xffe007ff, RD_1|WR_2|COD|FP_S, 0, I1, 0, 0 },
1215{"mthc1", "t,S", 0x44e00000, 0xffe007ff, RD_1|WR_2|COD|FP_D, 0, I33, 0, 0 },
1216{"mthc1", "t,G", 0x44e00000, 0xffe007ff, RD_1|WR_2|COD|FP_D, 0, I33, 0, 0 },
6f14957b
MR
1217/* mtc2 is at the bottom of the table. */
1218/* mthc2 is at the bottom of the table. */
39a7806d 1219/* mtc3 is at the bottom of the table. */
fc76e730
RS
1220{"mtdr", "t,G", 0x7080003d, 0xffe007ff, RD_1|WR_C0|COD, 0, N5, 0, 0 },
1221{"mthi", "s", 0x00000011, 0xfc1fffff, RD_1|WR_HI, 0, I1, 0, 0 },
1222{"mthi", "s,7", 0x00000011, 0xfc1fe7ff, RD_1|WR_HI, 0, 0, D32, 0 },
1223{"mthi1", "s", 0x70000011, 0xfc1fffff, RD_1|WR_HI, 0, EE, 0, 0 },
1224{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_1|WR_LO, 0, I1, 0, 0 },
1225{"mtlo", "s,7", 0x00000013, 0xfc1fe7ff, RD_1|WR_LO, 0, 0, D32, 0 },
1226{"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_1|WR_LO, 0, EE, 0, 0 },
1227{"mtlhx", "s", 0x00000053, 0xfc1fffff, RD_1|MOD_HILO, 0, 0, SMT, 0 },
1228{"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_1, 0, XLR, 0, 0 },
1229{"mtm0", "s", 0x70000008, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
1230{"mtm1", "s", 0x7000000c, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
1231{"mtm2", "s", 0x7000000d, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
1232{"mtp0", "s", 0x70000009, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
1233{"mtp1", "s", 0x7000000a, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
1234{"mtp2", "s", 0x7000000b, 0xfc1fffff, RD_1, 0, IOCT, 0, 0 },
1235{"mtsa", "s", 0x00000029, 0xfc1fffff, RD_1, 0, EE, 0, 0 },
1236{"mtsab", "s,j", 0x04180000, 0xfc1f0000, RD_1, 0, EE, 0, 0 },
1237{"mtsah", "s,j", 0x04190000, 0xfc1f0000, RD_1, 0, EE, 0, 0 },
1238{"mttc0", "t,G", 0x41800000, 0xffe007ff, RD_1|WR_C0|WR_CC|TRAP|COD, 0, 0, MT32, 0 },
1239{"mttc0", "t,G,H", 0x41800000, 0xffe007f8, RD_1|WR_C0|WR_CC|TRAP|COD, 0, 0, MT32, 0 },
1240{"mttc1", "t,S", 0x41800022, 0xffe007ff, RD_1|WR_2|TRAP|COD|FP_S, 0, 0, MT32, 0 },
1241{"mttc1", "t,G", 0x41800022, 0xffe007ff, RD_1|WR_2|TRAP|COD|FP_S, 0, 0, MT32, 0 },
1242{"mttc2", "t,g", 0x41800024, 0xffe007ff, RD_1|WR_C2|WR_CC|TRAP|COD, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
1243{"mttacx", "t", 0x41801021, 0xffe0ffff, RD_1|WR_a|TRAP, 0, 0, MT32, 0 },
1244{"mttacx", "t,&", 0x41801021, 0xffe09fff, RD_1|WR_a|TRAP, 0, 0, MT32, 0 },
1245{"mttdsp", "t", 0x41808021, 0xffe0ffff, RD_1|TRAP, 0, 0, MT32, 0 },
1246{"mttgpr", "t,d", 0x41800020, 0xffe007ff, RD_1|WR_2|TRAP, 0, 0, MT32, 0 },
1247{"mtthc1", "t,S", 0x41800032, 0xffe007ff, RD_1|WR_2|TRAP|COD|FP_D, 0, 0, MT32, 0 },
1248{"mtthc1", "t,G", 0x41800032, 0xffe007ff, RD_1|WR_2|TRAP|COD|FP_D, 0, 0, MT32, 0 },
1249{"mtthc2", "t,g", 0x41800034, 0xffe007ff, RD_1|WR_C2|WR_CC|TRAP|COD, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
1250{"mtthi", "t", 0x41800821, 0xffe0ffff, RD_1|WR_a|TRAP, 0, 0, MT32, 0 },
1251{"mtthi", "t,&", 0x41800821, 0xffe09fff, RD_1|WR_a|TRAP, 0, 0, MT32, 0 },
1252{"mttlo", "t", 0x41800021, 0xffe0ffff, RD_1|WR_a|TRAP, 0, 0, MT32, 0 },
1253{"mttlo", "t,&", 0x41800021, 0xffe09fff, RD_1|WR_a|TRAP, 0, 0, MT32, 0 },
1254{"mttr", "t,d,!,H,$", 0x41800000, 0xffe007c8, RD_1|TRAP, 0, 0, MT32, 0 },
1255{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, SF },
1256{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 },
1257{"mul.ob", "X,Y,Q", 0x78000030, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1258{"mul.ob", "D,S,Q", 0x48000030, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1259{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33|IL2F, 0, 0 },
1260{"mul.ps", "D,V,T", 0x45600002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1261{"mul.qh", "X,Y,Q", 0x78200030, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1262{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, I32|P3|N55, 0, 0},
1263{"mul", "d,s,t", 0x00000058, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N54, 0, 0 },
e7ae278d
RS
1264{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, 0, I1, 0, 0 },
1265{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1266{"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1267{"mula.ob", "S,Q", 0x48000033, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, N54, 0, 0 },
1268{"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
1269{"mula.s", "S,T", 0x4600001a, 0xffe007ff, RD_1|RD_2|FP_S, 0, EE, 0, 0 },
1270{"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1271{"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1272{"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1273{"mull.ob", "S,Q", 0x48000433, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, N54, 0, 0 },
1274{"mull.qh", "Y,Q", 0x78200433, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
e7ae278d
RS
1275{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, 0, I1, 0, 0 },
1276{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, 0, I1, 0, 0 },
1277{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, 0, I1, 0, 0 },
1278{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1279{"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, M3D, 0 },
1280{"muls", "d,s,t", 0x000000d8, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1281{"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1282{"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1283{"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1284{"muls.ob", "Y,Q", 0x78000032, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1285{"muls.ob", "S,Q", 0x48000032, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, N54, 0, 0 },
1286{"muls.qh", "Y,Q", 0x78200032, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
1287{"mulsl.ob", "Y,Q", 0x78000432, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1288{"mulsl.ob", "S,Q", 0x48000432, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, N54, 0, 0 },
1289{"mulsl.qh", "Y,Q", 0x78200432, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
1290{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, I1, 0, 0 },
1291{"mult", "7,s,t", 0x00000018, 0xfc00e7ff, RD_2|RD_3|WR_a, 0, 0, D32, 0 },
1292{"mult", "d,s,t", 0x00000018, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, G1, 0, 0 },
1293{"mult1", "s,t", 0x70000018, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, EE, 0, 0 },
1294{"mult1", "d,s,t", 0x70000018, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, EE, 0, 0 },
1295{"multp", "s,t", 0x00000459, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, 0, SMT, 0 },
1296{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, I1, 0, 0 },
1297{"multu", "7,s,t", 0x00000019, 0xfc00e7ff, RD_2|RD_3|WR_a, 0, 0, D32, 0 },
1298{"multu", "d,s,t", 0x00000019, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, G1, 0, 0 },
1299{"multu1", "s,t", 0x70000019, 0xfc00ffff, RD_1|RD_2|WR_HILO|IS_M, 0, EE, 0, 0 },
1300{"multu1", "d,s,t", 0x70000019, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO|IS_M, 0, EE, 0, 0 },
1301{"mulu", "d,s,t", 0x00000059, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, N5, 0, 0 },
1302{"neg", "d,w", 0x00000022, 0xffe007ff, WR_1|RD_2, 0, I1, 0, 0 }, /* sub 0 */
1303{"negu", "d,w", 0x00000023, 0xffe007ff, WR_1|RD_2, 0, I1, 0, 0 }, /* subu 0 */
1304{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_1|RD_2|FP_D, 0, I1, 0, SF },
1305{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_1|RD_2|FP_S, 0, I1, 0, 0 },
1306{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_1|RD_2|FP_D, 0, I5_33|IL2F, 0, 0 },
1307{"neg.ps", "D,V", 0x45600007, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2E, 0, 0 },
1308{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I4_33, 0, 0 },
1309{"nmadd.d", "D,S,T", 0x4620001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1310{"nmadd.d", "D,S,T", 0x7220001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1311{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I4_33, 0, 0 },
1312{"nmadd.s", "D,S,T", 0x4600001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
1313{"nmadd.s", "D,S,T", 0x7200001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F, 0, 0 },
1314{"nmadd.ps", "D,R,S,T", 0x4c000036, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I5_33, 0, 0 },
1315{"nmadd.ps", "D,S,T", 0x4560001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1316{"nmadd.ps", "D,S,T", 0x72c0001a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1317{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I4_33, 0, 0 },
1318{"nmsub.d", "D,S,T", 0x4620001b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1319{"nmsub.d", "D,S,T", 0x7220001b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
1320{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_S, 0, I4_33, 0, 0 },
1321{"nmsub.s", "D,S,T", 0x4600001b, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
1322{"nmsub.s", "D,S,T", 0x7200001b, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F, 0, 0 },
1323{"nmsub.ps", "D,R,S,T", 0x4c00003e, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0, I5_33, 0, 0 },
1324{"nmsub.ps", "D,S,T", 0x4560001b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1325{"nmsub.ps", "D,S,T", 0x72c0001b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F, 0, 0 },
252b5132 1326/* nop is at the start of the table. */
fc76e730 1327{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1328{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1329{"nor", "D,S,T", 0x47a00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1330{"nor", "D,S,T", 0x4ba00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
1331{"nor.ob", "X,Y,Q", 0x7800000f, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1332{"nor.ob", "D,S,Q", 0x4800000f, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1333{"nor.qh", "X,Y,Q", 0x7820000f, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1334{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_1|RD_2, 0, I1, 0, 0 },/*nor d,s,0*/
1335{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1336{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1337{"or", "D,S,T", 0x45a00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1338{"or", "D,S,T", 0x4b20000c, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
1339{"or.ob", "X,Y,Q", 0x7800000e, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1340{"or.ob", "D,S,Q", 0x4800000e, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1341{"or.qh", "X,Y,Q", 0x7820000e, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1342{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
1343{"pabsdiff.ob", "X,Y,Q", 0x78000009, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, 0, 0 },
1344{"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, 0, 0 },
e7ae278d 1345{"pause", "", 0x00000140, 0xffffffff, TRAP, 0, I33, 0, 0 },
fc76e730
RS
1346{"pavg.ob", "X,Y,Q", 0x78000008, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, 0, 0 },
1347{"pabsh", "d,t", 0x70000168, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1348{"pabsw", "d,t", 0x70000068, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1349{"paddsw", "d,s,t", 0x70000408, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1350{"paddub", "d,s,t", 0x70000628, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1351{"padduh", "d,s,t", 0x70000528, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1352{"padduw", "d,s,t", 0x70000428, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1353{"padsbh", "d,s,t", 0x70000128, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1354{"pand", "d,s,t", 0x70000489, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1355{"pceqb", "d,s,t", 0x700002a8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1356{"pceqh", "d,s,t", 0x700001a8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1357{"pceqw", "d,s,t", 0x700000a8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1358{"pcgtb", "d,s,t", 0x70000288, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1359{"pcgth", "d,s,t", 0x70000188, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1360{"pcgtw", "d,s,t", 0x70000088, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1361{"pcpyh", "d,t", 0x700006e9, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1362{"pcpyld", "d,s,t", 0x70000389, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1363{"pcpyud", "d,s,t", 0x700003a9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1364{"pdivbw", "s,t", 0x70000749, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, MMI, 0, 0 },
1365{"pdivuw", "s,t", 0x70000369, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, MMI, 0, 0 },
1366{"pdivw", "s,t", 0x70000349, 0xfc00ffff, RD_1|RD_2|WR_HILO, 0, MMI, 0, 0 },
1367{"pexch", "d,t", 0x700006a9, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1368{"pexcw", "d,t", 0x700007a9, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1369{"pexeh", "d,t", 0x70000689, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1370{"pexew", "d,t", 0x70000789, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1371{"pext5", "d,t", 0x70000788, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1372{"pextlb", "d,s,t", 0x70000688, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1373{"pextlh", "d,s,t", 0x70000588, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1374{"pextlw", "d,s,t", 0x70000488, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1375{"pextub", "d,s,t", 0x700006a8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1376{"pextuh", "d,s,t", 0x700005a8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1377{"pextuw", "d,s,t", 0x700004a8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1378{"phmadh", "d,s,t", 0x70000449, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, MMI, 0, 0 },
1379{"phmsbh", "d,s,t", 0x70000549, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, MMI, 0, 0 },
1380{"pickf.ob", "X,Y,Q", 0x78000002, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1381{"pickf.ob", "D,S,Q", 0x48000002, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1382{"pickf.qh", "X,Y,Q", 0x78200002, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1383{"pickt.ob", "X,Y,Q", 0x78000003, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1384{"pickt.ob", "D,S,Q", 0x48000003, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1385{"pickt.qh", "X,Y,Q", 0x78200003, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1386{"pinteh", "d,s,t", 0x700002a9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1387{"pinth", "d,s,t", 0x70000289, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1388{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33, 0, 0 },
1389{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33, 0, 0 },
1390{"plzcw", "d,s", 0x70000004, 0xfc1f07ff, WR_1|RD_2, 0, MMI, 0, 0 },
1391{"pmaddh", "d,s,t", 0x70000409, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, MMI, 0, 0 },
1392{"pmadduw", "d,s,t", 0x70000029, 0xfc0007ff, WR_1|RD_2|RD_3|MOD_HILO, 0, MMI, 0, 0 },
1393{"pmaddw", "d,s,t", 0x70000009, 0xfc0007ff, WR_1|RD_2|RD_3|MOD_HILO, 0, MMI, 0, 0 },
1394{"pmaxh", "d,s,t", 0x700001c8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1395{"pmaxw", "d,s,t", 0x700000c8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1396{"pmfhi", "d", 0x70000209, 0xffff07ff, WR_1|RD_HI, 0, MMI, 0, 0 },
1397{"pmfhl.lh", "d", 0x700000f0, 0xffff07ff, WR_1|RD_HILO, 0, MMI, 0, 0 },
1398{"pmfhl.lw", "d", 0x70000030, 0xffff07ff, WR_1|RD_HILO, 0, MMI, 0, 0 },
1399{"pmfhl.sh", "d", 0x70000130, 0xffff07ff, WR_1|RD_HILO, 0, MMI, 0, 0 },
1400{"pmfhl.slw", "d", 0x700000b0, 0xffff07ff, WR_1|RD_HILO, 0, MMI, 0, 0 },
1401{"pmfhl.uw", "d", 0x70000070, 0xffff07ff, WR_1|RD_HILO, 0, MMI, 0, 0 },
1402{"pmflo", "d", 0x70000249, 0xffff07ff, WR_1|RD_LO, 0, MMI, 0, 0 },
1403{"pminh", "d,s,t", 0x700001e8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1404{"pminw", "d,s,t", 0x700000e8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1405{"pmsubh", "d,s,t", 0x70000509, 0xfc0007ff, WR_1|RD_2|RD_3|MOD_HILO, 0, MMI, 0, 0 },
1406{"pmsubw", "d,s,t", 0x70000109, 0xfc0007ff, WR_1|RD_2|RD_3|MOD_HILO, 0, MMI, 0, 0 },
1407{"pmthi", "s", 0x70000229, 0xfc1fffff, RD_1|WR_HI, 0, MMI, 0, 0 },
1408{"pmthl.lw", "s", 0x70000031, 0xfc1fffff, RD_1|MOD_HILO, 0, MMI, 0, 0 },
1409{"pmtlo", "s", 0x70000269, 0xfc1fffff, RD_1|WR_LO, 0, MMI, 0, 0 },
1410{"pmulth", "d,s,t", 0x70000709, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, MMI, 0, 0 },
1411{"pmultuw", "d,s,t", 0x70000329, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, MMI, 0, 0 },
1412{"pmultw", "d,s,t", 0x70000309, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, MMI, 0, 0 },
1413{"pnor", "d,s,t", 0x700004e9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1414{"pop", "d,v", 0x7000002c, 0xfc1f07ff, WR_1|RD_2, 0, IOCT, 0, 0 },
1415{"por", "d,s,t", 0x700004a9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1416{"ppac5", "d,t", 0x700007c8, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1417{"ppacb", "d,s,t", 0x700006c8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1418{"ppach", "d,s,t", 0x700005c8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1419{"ppacw", "d,s,t", 0x700004c8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1420{"prevh", "d,t", 0x700006c9, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1421{"prot3w", "d,t", 0x700007c9, 0xffe007ff, WR_1|RD_2, 0, MMI, 0, 0 },
1422{"psllvw", "d,t,s", 0x70000089, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1423{"psravw", "d,t,s", 0x700000e9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1424{"psrlvw", "d,t,s", 0x700000c9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1425{"psubsw", "d,s,t", 0x70000448, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1426{"psubub", "d,s,t", 0x70000668, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1427{"psubuh", "d,s,t", 0x70000568, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1428{"psubuw", "d,s,t", 0x70000468, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1429{"pxor", "d,s,t", 0x700004c9, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
564e8ad9 1430 /* pref and prefx are at the start of the table. */
fc76e730
RS
1431{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33, 0, 0 },
1432{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33, 0, 0 },
1433{"pperm", "s,t", 0x70000481, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, 0, SMT, 0 },
1434{"qfsrv", "d,s,t", 0x700006e8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
1435{"qmac.00", "s,t", 0x70000412, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1436{"qmac.01", "s,t", 0x70000452, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1437{"qmac.02", "s,t", 0x70000492, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1438{"qmac.03", "s,t", 0x700004d2, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1439{"qmacs.00", "s,t", 0x70000012, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1440{"qmacs.01", "s,t", 0x70000052, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1441{"qmacs.02", "s,t", 0x70000092, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1442{"qmacs.03", "s,t", 0x700000d2, 0xfc00ffff, RD_1|RD_2|MOD_HILO, 0, IOCT2, 0, 0 },
1443{"rach.ob", "X", 0x7a00003f, 0xfffff83f, WR_1|FP_D, RD_MACC, SB1, MX, 0 },
1444{"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_1|FP_D, RD_MACC, N54, 0, 0 },
1445{"rach.qh", "X", 0x7a20003f, 0xfffff83f, WR_1|FP_D, RD_MACC, 0, MX, 0 },
1446{"racl.ob", "X", 0x7800003f, 0xfffff83f, WR_1|FP_D, RD_MACC, SB1, MX, 0 },
1447{"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_1|FP_D, RD_MACC, N54, 0, 0 },
1448{"racl.qh", "X", 0x7820003f, 0xfffff83f, WR_1|FP_D, RD_MACC, 0, MX, 0 },
1449{"racm.ob", "X", 0x7900003f, 0xfffff83f, WR_1|FP_D, RD_MACC, SB1, MX, 0 },
1450{"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_1|FP_D, RD_MACC, N54, 0, 0 },
1451{"racm.qh", "X", 0x7920003f, 0xfffff83f, WR_1|FP_D, RD_MACC, 0, MX, 0 },
1452{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_1|RD_2|FP_D, 0, I4_33, 0, 0 },
1453{"recip.ps", "D,S", 0x46c00015, 0xffff003f, WR_1|RD_2|FP_D, 0, SB1, 0, 0 },
1454{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_1|RD_2|FP_S, 0, I4_33, 0, 0 },
1455{"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_1|RD_2|FP_D, 0, 0, M3D, 0 },
1456{"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_1|RD_2|FP_S, 0, 0, M3D, 0 },
1457{"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_1|RD_2|FP_S, 0, 0, M3D, 0 },
1458{"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, M3D, 0 },
1459{"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, 0, M3D, 0 },
1460{"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, 0, M3D, 0 },
1461{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 },
e7ae278d
RS
1462{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, 0, I1, 0, 0 },
1463{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1464{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_2|RD_3|WR_HILO, 0, I1, 0, 0 },
e7ae278d
RS
1465{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, 0, I1, 0, 0 },
1466{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1467{"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_1, 0, I33, 0, 0 },
1468{"rdpgpr", "d,w", 0x41400000, 0xffe007ff, WR_1, 0, I33, 0, 0 },
b015e599 1469/* rfe is moved below as it now conflicts with tlbgp */
fc76e730
RS
1470{"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, 0, MX, 0 },
1471{"rnau.ob", "X,Q", 0x78000021, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, SB1, MX, 0 },
1472{"rnau.qh", "X,Q", 0x78200021, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, 0, MX, 0 },
1473{"rnes.qh", "X,Q", 0x78200026, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, 0, MX, 0 },
1474{"rneu.ob", "X,Q", 0x78000022, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, SB1, MX, 0 },
1475{"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, 0, MX, 0 },
e7ae278d
RS
1476{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I1, 0, 0 },
1477{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I1, 0, 0 },
1478{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I1, 0, 0 },
1479{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1480{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_1|RD_2, 0, N5|I33, SMT, 0 },
1481{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, WR_1|RD_2|RD_3, 0, N5|I33, SMT, 0 },
e7ae278d
RS
1482{"rotl", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I33, SMT, 0 },
1483{"rotl", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I33, SMT, 0 },
1484{"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I33, SMT, 0 },
1485{"rotr", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I33, SMT, 0 },
fc76e730
RS
1486{"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I33, SMT, 0 },
1487{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_1|RD_2|FP_D, 0, I3_33, 0, 0 },
1488{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I3_33, 0, 0 },
1489{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I2, 0, SF },
1490{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_1|RD_2|FP_S, 0, I2, 0, 0 },
1491{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_1|RD_2|FP_D, 0, I4_33, 0, 0 },
1492{"rsqrt.ps", "D,S", 0x46c00016, 0xffff003f, WR_1|RD_2|FP_D, 0, SB1, 0, 0 },
1493{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_1|RD_2|FP_S, 0, I4_33, 0, 0 },
1494{"rsqrt.s", "D,S,T", 0x46000016, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, EE, 0, 0 },
1495{"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_1|RD_2|FP_D, 0, 0, M3D, 0 },
1496{"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_1|RD_2|FP_S, 0, 0, M3D, 0 },
1497{"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_1|RD_2|FP_S, 0, 0, M3D, 0 },
1498{"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, M3D, 0 },
1499{"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, 0, M3D, 0 },
1500{"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, 0, M3D, 0 },
1501{"rzs.qh", "X,Q", 0x78200024, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, 0, MX, 0 },
1502{"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, SB1, MX, 0 },
1503{"rzu.ob", "D,Q", 0x48000020, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, N54, 0, 0 },
1504{"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_1|RD_2|FP_D, RD_MACC, 0, MX, 0 },
e7ae278d 1505{"saa", "t,A(b)", 0, (int) M_SAA_AB, INSN_MACRO, 0, IOCTP, 0, 0 },
fc76e730 1506{"saa", "t,(b)", 0x70000018, 0xfc00ffff, RD_1|RD_2|SM, 0, IOCTP, 0, 0 },
e7ae278d 1507{"saad", "t,A(b)", 0, (int) M_SAAD_AB, INSN_MACRO, 0, IOCTP, 0, 0 },
fc76e730
RS
1508{"saad", "t,(b)", 0x70000019, 0xfc00ffff, RD_1|RD_2|SM, 0, IOCTP, 0, 0 },
1509{"sb", "t,o(b)", 0xa0000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 },
e7ae278d 1510{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1511{"sc", "t,o(b)", 0xe0000000, 0xfc000000, MOD_1|RD_3|SM, 0, I2, 0, EE },
e7ae278d 1512{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, 0, I2, 0, EE },
fc76e730 1513{"scd", "t,o(b)", 0xf0000000, 0xfc000000, MOD_1|RD_3|SM, 0, I3, 0, EE },
e7ae278d 1514{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, 0, I3, 0, EE },
704897fb 1515/* The macro has to be first to handle o32 correctly. */
e7ae278d 1516{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1517{"sd", "t,o(b)", 0xfc000000, 0xfc000000, RD_1|RD_3|SM, 0, I3, 0, 0 },
e7ae278d
RS
1518{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, 0, G2, 0, 0 },
1519{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, 0, G2, 0, 0 },
1520{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, 0, G2, 0, 0 },
1521{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, 0, I32, 0, 0 },
1522{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, 0, I32, 0, 0 },
fc76e730
RS
1523{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, RD_1|RD_3|SM|FP_D, 0, I2, 0, SF },
1524{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, RD_1|RD_3|SM|FP_D, 0, I2, 0, SF },
e7ae278d
RS
1525{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF },
1526{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF },
fc76e730 1527{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, RD_3|RD_C2|SM, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 1528{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 1529{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, RD_3|RD_C3|SM, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 1530{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, 0, I2, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 1531{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, RD_1|RD_3|SM|FP_D, 0, I2, 0, SF },
e7ae278d 1532{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, INSN2_M_FP_D, I1, 0, 0 },
fc76e730 1533{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, RD_1|RD_3|SM, 0, I3, 0, 0 },
e7ae278d 1534{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3, 0, 0 },
fc76e730 1535{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, RD_1|RD_3|SM, 0, I3, 0, 0 },
e7ae278d 1536{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, 0, I3, 0, 0 },
fc76e730
RS
1537{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_D, 0, I4_33, 0, 0 },
1538{"seb", "d,w", 0x7c000420, 0xffe007ff, WR_1|RD_2, 0, I33, 0, 0 },
1539{"seh", "d,w", 0x7c000620, 0xffe007ff, WR_1|RD_2, 0, I33, 0, 0 },
1540{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_1|RD_2|RD_3, 0, L1, 0, 0 },
1541{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_1|RD_2|RD_3, 0, L1, 0, 0 },
1542{"seq", "d,v,t", 0x7000002a, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IOCT, 0, 0 },
e7ae278d
RS
1543{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, 0, I1, 0, 0 },
1544{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1545{"seq", "S,T", 0x46a00032, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
1546{"seq", "S,T", 0x4ba0000c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2F|IL3A, 0, 0 },
1547{"seqi", "t,r,+Q", 0x7000002e, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
e7ae278d
RS
1548{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, 0, I1, 0, 0 },
1549{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, 0, I1, 0, 0 },
1550{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, 0, I1, 0, 0 },
1551{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, 0, I1, 0, 0 },
1552{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, 0, I1, 0, 0 },
1553{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, 0, I1, 0, 0 },
1554{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, 0, I1, 0, 0 },
1555{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1556{"sh", "t,o(b)", 0xa4000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 },
e7ae278d 1557{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1558{"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1559{"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1560{"shfl.mixh.ob", "D,S,T", 0x4980001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1561{"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1562{"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1563{"shfl.mixl.ob", "D,S,T", 0x49c0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1564{"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1565{"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1566{"shfl.pach.ob", "D,S,T", 0x4900001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1567{"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1568{"shfl.pacl.ob", "D,S,T", 0x4940001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1569{"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1570{"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1571{"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
e7ae278d
RS
1572{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, 0, I1, 0, 0 },
1573{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1574{"sle", "S,T", 0x46a0003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
1575{"sle", "S,T", 0x4ba0000e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2F|IL3A, 0, 0 },
e7ae278d
RS
1576{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, 0, I1, 0, 0 },
1577{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1578{"sleu", "S,T", 0x4680003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
1579{"sleu", "S,T", 0x4b80000e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2F|IL3A, 0, 0 },
1580{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
1581{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, /* sllv */
1582{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_1|RD_2, 0, I1, 0, 0 },
1583{"sll", "D,S,T", 0x45800002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1584{"sll", "D,S,T", 0x4b00000e, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
1585{"sll.ob", "X,Y,Q", 0x78000010, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1586{"sll.ob", "D,S,Q", 0x48000010, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1587{"sll.qh", "X,Y,Q", 0x78200010, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1588{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1589{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1590{"slt", "S,T", 0x46a0003c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
1591{"slt", "S,T", 0x4ba0000d, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2F|IL3A, 0, 0 },
1592{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
1593{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
1594{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1595{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1596{"sltu", "S,T", 0x4680003c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
1597{"sltu", "S,T", 0x4b80000d, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2F|IL3A, 0, 0 },
1598{"sne", "d,v,t", 0x7000002b, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IOCT, 0, 0 },
e7ae278d
RS
1599{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, 0, I1, 0, 0 },
1600{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1601{"snei", "t,r,+Q", 0x7000002f, 0xfc00003f, WR_1|RD_2, 0, IOCT, 0, 0 },
1602{"sq", "t,o(b)", 0x7c000000, 0xfc000000, RD_1|RD_3|SM, 0, MMI, 0, 0 },
e7ae278d 1603{"sq", "t,A(b)", 0, (int) M_SQ_AB, INSN_MACRO, 0, MMI, 0, 0 },
fc76e730 1604{"sqc2", "E,o(b)", 0xf8000000, 0xfc000000, RD_3|RD_C2|SM, 0, EE, 0, 0 },
e7ae278d 1605{"sqc2", "E,A(b)", 0, (int) M_SQC2_AB, INSN_MACRO, 0, EE, 0, 0 },
fc76e730
RS
1606{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_1|RD_2|FP_D, 0, I2, 0, SF },
1607{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_1|RD_2|FP_S, 0, I2, 0, 0 },
1608{"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_1|RD_2|FP_D, 0, SB1, 0, 0 },
1609{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
1610{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, /* srav */
1611{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_1|RD_2, 0, I1, 0, 0 },
1612{"sra", "D,S,T", 0x45c00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1613{"sra", "D,S,T", 0x4b40000f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
1614{"sra.qh", "X,Y,Q", 0x78200013, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1615{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
1616{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 }, /* srlv */
1617{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_1|RD_2, 0, I1, 0, 0 },
1618{"srl", "D,S,T", 0x45800003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1619{"srl", "D,S,T", 0x4b00000f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
1620{"srl.ob", "X,Y,Q", 0x78000012, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1621{"srl.ob", "D,S,Q", 0x48000012, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1622{"srl.qh", "X,Y,Q", 0x78200012, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
4372b673 1623/* ssnop is at the start of the table. */
e7ae278d 1624{"standby", "", 0x42000021, 0xffffffff, 0, 0, V1, 0, 0 },
fc76e730 1625{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1626{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1627{"sub", "D,S,T", 0x45c00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
1628{"sub", "D,S,T", 0x4b40000d, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F|IL3A, 0, 0 },
1629{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I1, 0, SF },
1630{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, I1, 0, 0 },
1631{"sub.ob", "X,Y,Q", 0x7800000a, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1632{"sub.ob", "D,S,Q", 0x4800000a, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1633{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, I5_33|IL2F, 0, 0 },
1634{"sub.ps", "D,V,T", 0x45600001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1635{"sub.qh", "X,Y,Q", 0x7820000a, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1636{"suba.ob", "Y,Q", 0x78000036, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1637{"suba.qh", "Y,Q", 0x78200036, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
1638{"subl.ob", "Y,Q", 0x78000436, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1639{"subl.qh", "Y,Q", 0x78200436, 0xfc2007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
1640{"suba.s", "S,T", 0x46000019, 0xffe007ff, RD_1|RD_2|FP_S, 0, EE, 0, 0 },
1641{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1642{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1643{"subu", "D,S,T", 0x45800001, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2E, 0, 0 },
1644{"subu", "D,S,T", 0x4b00000d, 0xffe0003f, WR_1|RD_2|RD_3|FP_S, 0, IL2F|IL3A, 0, 0 },
e7ae278d 1645{"suspend", "", 0x42000022, 0xffffffff, 0, 0, V1, 0, 0 },
fc76e730
RS
1646{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_D, 0, I5_33|N55, 0, 0},
1647{"sw", "t,o(b)", 0xac000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 },
e7ae278d 1648{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1649{"swapw", "t,b", 0x70000014, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
1650{"swapwu", "t,b", 0x70000015, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
1651{"swapd", "t,b", 0x70000016, 0xfc00ffff, MOD_1|RD_2|SM, 0, XLR, 0, 0 },
1652{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_3|RD_C0|SM, 0, I1, 0, IOCT|IOCTP|IOCT2 },
e7ae278d 1653{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 },
fc76e730
RS
1654{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 },
1655{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 },
e7ae278d
RS
1656{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
1657{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
fc76e730 1658{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 }, /* swc1 */
e7ae278d 1659{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
fc76e730 1660{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, RD_3|RD_C2|SM, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 1661{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 1662{"swc3", "E,o(b)", 0xec000000, 0xfc000000, RD_3|RD_C3|SM, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
e7ae278d 1663{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
fc76e730 1664{"swl", "t,o(b)", 0xa8000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 },
e7ae278d 1665{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1666{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_1|RD_3, 0, I2, 0, 0 }, /* same */
e7ae278d 1667{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I2, 0, 0 }, /* as swl */
fc76e730 1668{"swr", "t,o(b)", 0xb8000000, 0xfc000000, RD_1|RD_3|SM, 0, I1, 0, 0 },
e7ae278d 1669{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730 1670{"invalidate", "t,o(b)", 0xb8000000, 0xfc000000, RD_1|RD_3, 0, I2, 0, 0 }, /* same */
e7ae278d 1671{"invalidate", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I2, 0, 0 }, /* as swr */
fc76e730 1672{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_S, 0, I4_33, 0, 0 },
e7ae278d
RS
1673{"synciobdma", "", 0x0000008f, 0xffffffff, NODS, 0, IOCT, 0, 0 },
1674{"syncs", "", 0x0000018f, 0xffffffff, NODS, 0, IOCT, 0, 0 },
1675{"syncw", "", 0x0000010f, 0xffffffff, NODS, 0, IOCT, 0, 0 },
1676{"syncws", "", 0x0000014f, 0xffffffff, NODS, 0, IOCT, 0, 0 },
1677{"sync_acquire", "", 0x0000044f, 0xffffffff, NODS, 0, I33, 0, 0 },
1678{"sync_mb", "", 0x0000040f, 0xffffffff, NODS, 0, I33, 0, 0 },
1679{"sync_release", "", 0x0000048f, 0xffffffff, NODS, 0, I33, 0, 0 },
1680{"sync_rmb", "", 0x000004cf, 0xffffffff, NODS, 0, I33, 0, 0 },
1681{"sync_wmb", "", 0x0000010f, 0xffffffff, NODS, 0, I33, 0, 0 },
1682{"sync", "", 0x0000000f, 0xffffffff, NODS, 0, I2|G1, 0, 0 },
1683{"sync", "1", 0x0000000f, 0xfffff83f, NODS, 0, I32, 0, 0 },
1684{"sync.p", "", 0x0000040f, 0xffffffff, NODS, 0, I2, 0, 0 },
1685{"sync.l", "", 0x0000000f, 0xffffffff, NODS, 0, I2, 0, 0 },
fc76e730 1686{"synci", "o(b)", 0x041f0000, 0xfc1f0000, RD_2|SM, 0, I33, 0, 0 },
e7ae278d
RS
1687{"syscall", "", 0x0000000c, 0xffffffff, TRAP, 0, I1, 0, 0 },
1688{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, 0, I1, 0, 0 },
fc76e730
RS
1689{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 },
1690{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1691{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1692{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 }, /* teqi */
e7ae278d 1693{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, 0, I2, 0, 0 },
fc76e730
RS
1694{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 },
1695{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1696{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1697{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 }, /* tgei */
e7ae278d 1698{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, 0, I2, 0, 0 },
fc76e730
RS
1699{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 },
1700{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1701{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1702{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 }, /* tgeiu */
e7ae278d
RS
1703{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, 0, I2, 0, 0 },
1704{"tlbinv", "", 0x42000003, 0xffffffff, INSN_TLB, 0, 0, TLBINV, 0 },
1705{"tlbinvf", "", 0x42000004, 0xffffffff, INSN_TLB, 0, 0, TLBINV, 0 },
1706{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, 0, I1, 0, 0 },
1707{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, 0, I1, 0, 0 },
1708{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, 0, I1, 0, 0 },
1709{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, 0, I1, 0, 0 },
1710{"tlbgr", "", 0x42000009, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 },
1711{"tlbgwi", "", 0x4200000a, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 },
1712{"tlbginv", "", 0x4200000b, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 },
1713{"tlbginvf", "", 0x4200000c, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 },
1714{"tlbgwr", "", 0x4200000e, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 },
1715{"tlbgp", "", 0x42000010, 0xffffffff, INSN_TLB, 0, 0, IVIRT, 0 },
fc76e730
RS
1716{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 },
1717{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1718{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1719{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 }, /* tlti */
e7ae278d 1720{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, 0, I2, 0, 0 },
fc76e730
RS
1721{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 },
1722{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1723{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1724{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 }, /* tltiu */
e7ae278d 1725{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, 0, I2, 0, 0 },
fc76e730
RS
1726{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 },
1727{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1728{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_1|RD_2|TRAP, 0, I2, 0, 0 },
1729{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_1|TRAP, 0, I2, 0, 0 }, /* tnei */
e7ae278d 1730{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, 0, I2, 0, 0 },
fc76e730
RS
1731{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_1|RD_2|FP_D, 0, I3_33, 0, 0 },
1732{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I3_33, 0, 0 },
1733{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I2, 0, SF },
1734{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_1|RD_2|FP_S|FP_D, 0, I2, 0, SF },
e7ae278d 1735{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, INSN2_M_FP_S|INSN2_M_FP_D, I1, 0, SF },
fc76e730
RS
1736{"trunc.w.s", "D,S", 0x46000024, 0xffff003f, WR_1|RD_2|FP_S, 0, EE, 0, 0 },
1737{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_1|RD_2|FP_S, 0, I2, 0, EE },
1738{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_1|RD_2|FP_S, 0, I2, 0, EE },
e7ae278d
RS
1739{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, INSN2_M_FP_S, I1, 0, EE },
1740{"uld", "t,A(b)", 0, (int) M_ULD_AB, INSN_MACRO, 0, I3, 0, 0 },
1741{"ulh", "t,A(b)", 0, (int) M_ULH_AB, INSN_MACRO, 0, I1, 0, 0 },
1742{"ulhu", "t,A(b)", 0, (int) M_ULHU_AB, INSN_MACRO, 0, I1, 0, 0 },
1743{"ulw", "t,A(b)", 0, (int) M_ULW_AB, INSN_MACRO, 0, I1, 0, 0 },
1744{"usd", "t,A(b)", 0, (int) M_USD_AB, INSN_MACRO, 0, I3, 0, 0 },
1745{"ush", "t,A(b)", 0, (int) M_USH_AB, INSN_MACRO, 0, I1, 0, 0 },
1746{"usw", "t,A(b)", 0, (int) M_USW_AB, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1747{"v3mulu", "d,v,t", 0x70000011, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IOCT, 0, 0 },
1748{"vmm0", "d,v,t", 0x70000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IOCT, 0, 0 },
1749{"vmulu", "d,v,t", 0x7000000f, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IOCT, 0, 0 },
1750{"wach.ob", "Y", 0x7a00003e, 0xffff07ff, RD_1|FP_D, WR_MACC, SB1, MX, 0 },
1751{"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_1|FP_D, WR_MACC, N54, 0, 0 },
1752{"wach.qh", "Y", 0x7a20003e, 0xffff07ff, RD_1|FP_D, WR_MACC, 0, MX, 0 },
1753{"wacl.ob", "Y,Z", 0x7800003e, 0xffe007ff, RD_1|RD_2|FP_D, WR_MACC, SB1, MX, 0 },
1754{"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_1|RD_2|FP_D, WR_MACC, N54, 0, 0 },
1755{"wacl.qh", "Y,Z", 0x7820003e, 0xffe007ff, RD_1|RD_2|FP_D, WR_MACC, 0, MX, 0 },
e7ae278d
RS
1756{"wait", "", 0x42000020, 0xffffffff, NODS, 0, I3_32, 0, 0 },
1757{"wait", "J", 0x42000020, 0xfe00003f, NODS, 0, I32|N55, 0, 0 },
1758{"waiti", "", 0x42000020, 0xffffffff, NODS, 0, L1, 0, 0 },
fc76e730
RS
1759{"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_2, 0, I33, 0, 0 },
1760{"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_1|RD_2, 0, I33, 0, 0 },
1761{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_1|RD_2|RD_3, 0, I1, 0, 0 },
e7ae278d 1762{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, 0, I1, 0, 0 },
fc76e730
RS
1763{"xor", "D,S,T", 0x47800002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
1764{"xor", "D,S,T", 0x4b800002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
1765{"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
1766{"xor.ob", "D,S,Q", 0x4800000d, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, N54, 0, 0 },
1767{"xor.qh", "X,Y,Q", 0x7820000d, 0xfc20003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
1768{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_1|RD_2, 0, I1, 0, 0 },
1769{"yield", "s", 0x7c000009, 0xfc1fffff, RD_1|NODS, 0, 0, MT32, 0 },
1770{"yield", "d,s", 0x7c000009, 0xfc1f07ff, WR_1|RD_2|NODS, 0, 0, MT32, 0 },
1771{"zcb", "(b)", 0x7000071f, 0xfc1fffff, RD_1|SM, 0, IOCT2, 0, 0 },
1772{"zcbt", "(b)", 0x7000075f, 0xfc1fffff, RD_1|SM, 0, IOCT2, 0, 0 },
deec1734 1773
9bcd4f99 1774/* User Defined Instruction. */
fc76e730
RS
1775{"udi0", "s,t,d,+1", 0x70000010, 0xfc00003f, UDI, 0, I33, 0, 0 },
1776{"udi0", "s,t,+2", 0x70000010, 0xfc00003f, UDI, 0, I33, 0, 0 },
1777{"udi0", "s,+3", 0x70000010, 0xfc00003f, UDI, 0, I33, 0, 0 },
1778{"udi0", "+4", 0x70000010, 0xfc00003f, UDI, 0, I33, 0, 0 },
1779{"udi1", "s,t,d,+1", 0x70000011, 0xfc00003f, UDI, 0, I33, 0, 0 },
1780{"udi1", "s,t,+2", 0x70000011, 0xfc00003f, UDI, 0, I33, 0, 0 },
1781{"udi1", "s,+3", 0x70000011, 0xfc00003f, UDI, 0, I33, 0, 0 },
1782{"udi1", "+4", 0x70000011, 0xfc00003f, UDI, 0, I33, 0, 0 },
1783{"udi2", "s,t,d,+1", 0x70000012, 0xfc00003f, UDI, 0, I33, 0, 0 },
1784{"udi2", "s,t,+2", 0x70000012, 0xfc00003f, UDI, 0, I33, 0, 0 },
1785{"udi2", "s,+3", 0x70000012, 0xfc00003f, UDI, 0, I33, 0, 0 },
1786{"udi2", "+4", 0x70000012, 0xfc00003f, UDI, 0, I33, 0, 0 },
1787{"udi3", "s,t,d,+1", 0x70000013, 0xfc00003f, UDI, 0, I33, 0, 0 },
1788{"udi3", "s,t,+2", 0x70000013, 0xfc00003f, UDI, 0, I33, 0, 0 },
1789{"udi3", "s,+3", 0x70000013, 0xfc00003f, UDI, 0, I33, 0, 0 },
1790{"udi3", "+4", 0x70000013, 0xfc00003f, UDI, 0, I33, 0, 0 },
1791{"udi4", "s,t,d,+1", 0x70000014, 0xfc00003f, UDI, 0, I33, 0, 0 },
1792{"udi4", "s,t,+2", 0x70000014, 0xfc00003f, UDI, 0, I33, 0, 0 },
1793{"udi4", "s,+3", 0x70000014, 0xfc00003f, UDI, 0, I33, 0, 0 },
1794{"udi4", "+4", 0x70000014, 0xfc00003f, UDI, 0, I33, 0, 0 },
1795{"udi5", "s,t,d,+1", 0x70000015, 0xfc00003f, UDI, 0, I33, 0, 0 },
1796{"udi5", "s,t,+2", 0x70000015, 0xfc00003f, UDI, 0, I33, 0, 0 },
1797{"udi5", "s,+3", 0x70000015, 0xfc00003f, UDI, 0, I33, 0, 0 },
1798{"udi5", "+4", 0x70000015, 0xfc00003f, UDI, 0, I33, 0, 0 },
1799{"udi6", "s,t,d,+1", 0x70000016, 0xfc00003f, UDI, 0, I33, 0, 0 },
1800{"udi6", "s,t,+2", 0x70000016, 0xfc00003f, UDI, 0, I33, 0, 0 },
1801{"udi6", "s,+3", 0x70000016, 0xfc00003f, UDI, 0, I33, 0, 0 },
1802{"udi6", "+4", 0x70000016, 0xfc00003f, UDI, 0, I33, 0, 0 },
1803{"udi7", "s,t,d,+1", 0x70000017, 0xfc00003f, UDI, 0, I33, 0, 0 },
1804{"udi7", "s,t,+2", 0x70000017, 0xfc00003f, UDI, 0, I33, 0, 0 },
1805{"udi7", "s,+3", 0x70000017, 0xfc00003f, UDI, 0, I33, 0, 0 },
1806{"udi7", "+4", 0x70000017, 0xfc00003f, UDI, 0, I33, 0, 0 },
1807{"udi8", "s,t,d,+1", 0x70000018, 0xfc00003f, UDI, 0, I33, 0, 0 },
1808{"udi8", "s,t,+2", 0x70000018, 0xfc00003f, UDI, 0, I33, 0, 0 },
1809{"udi8", "s,+3", 0x70000018, 0xfc00003f, UDI, 0, I33, 0, 0 },
1810{"udi8", "+4", 0x70000018, 0xfc00003f, UDI, 0, I33, 0, 0 },
1811{"udi9", "s,t,d,+1", 0x70000019, 0xfc00003f, UDI, 0, I33, 0, 0 },
1812{"udi9", "s,t,+2", 0x70000019, 0xfc00003f, UDI, 0, I33, 0, 0 },
1813{"udi9", "s,+3", 0x70000019, 0xfc00003f, UDI, 0, I33, 0, 0 },
1814{"udi9", "+4", 0x70000019, 0xfc00003f, UDI, 0, I33, 0, 0 },
1815{"udi10", "s,t,d,+1", 0x7000001a, 0xfc00003f, UDI, 0, I33, 0, 0 },
1816{"udi10", "s,t,+2", 0x7000001a, 0xfc00003f, UDI, 0, I33, 0, 0 },
1817{"udi10", "s,+3", 0x7000001a, 0xfc00003f, UDI, 0, I33, 0, 0 },
1818{"udi10", "+4", 0x7000001a, 0xfc00003f, UDI, 0, I33, 0, 0 },
1819{"udi11", "s,t,d,+1", 0x7000001b, 0xfc00003f, UDI, 0, I33, 0, 0 },
1820{"udi11", "s,t,+2", 0x7000001b, 0xfc00003f, UDI, 0, I33, 0, 0 },
1821{"udi11", "s,+3", 0x7000001b, 0xfc00003f, UDI, 0, I33, 0, 0 },
1822{"udi11", "+4", 0x7000001b, 0xfc00003f, UDI, 0, I33, 0, 0 },
1823{"udi12", "s,t,d,+1", 0x7000001c, 0xfc00003f, UDI, 0, I33, 0, 0 },
1824{"udi12", "s,t,+2", 0x7000001c, 0xfc00003f, UDI, 0, I33, 0, 0 },
1825{"udi12", "s,+3", 0x7000001c, 0xfc00003f, UDI, 0, I33, 0, 0 },
1826{"udi12", "+4", 0x7000001c, 0xfc00003f, UDI, 0, I33, 0, 0 },
1827{"udi13", "s,t,d,+1", 0x7000001d, 0xfc00003f, UDI, 0, I33, 0, 0 },
1828{"udi13", "s,t,+2", 0x7000001d, 0xfc00003f, UDI, 0, I33, 0, 0 },
1829{"udi13", "s,+3", 0x7000001d, 0xfc00003f, UDI, 0, I33, 0, 0 },
1830{"udi13", "+4", 0x7000001d, 0xfc00003f, UDI, 0, I33, 0, 0 },
1831{"udi14", "s,t,d,+1", 0x7000001e, 0xfc00003f, UDI, 0, I33, 0, 0 },
1832{"udi14", "s,t,+2", 0x7000001e, 0xfc00003f, UDI, 0, I33, 0, 0 },
1833{"udi14", "s,+3", 0x7000001e, 0xfc00003f, UDI, 0, I33, 0, 0 },
1834{"udi14", "+4", 0x7000001e, 0xfc00003f, UDI, 0, I33, 0, 0 },
1835{"udi15", "s,t,d,+1", 0x7000001f, 0xfc00003f, UDI, 0, I33, 0, 0 },
1836{"udi15", "s,t,+2", 0x7000001f, 0xfc00003f, UDI, 0, I33, 0, 0 },
1837{"udi15", "s,+3", 0x7000001f, 0xfc00003f, UDI, 0, I33, 0, 0 },
1838{"udi15", "+4", 0x7000001f, 0xfc00003f, UDI, 0, I33, 0, 0 },
9bcd4f99 1839
6f14957b
MR
1840/* Coprocessor 2 move/branch operations overlap with VR5400 .ob format
1841 instructions so they are here for the latters to take precedence. */
fc76e730
RS
1842{"bc2f", "p", 0x49000000, 0xffff0000, RD_CC|CBD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
1843{"bc2f", "N,p", 0x49000000, 0xffe30000, RD_CC|CBD, 0, I32, 0, IOCT|IOCTP|IOCT2 },
1844{"bc2fl", "p", 0x49020000, 0xffff0000, RD_CC|CBL, 0, I2|T3, 0, IOCT|IOCTP|IOCT2 },
1845{"bc2fl", "N,p", 0x49020000, 0xffe30000, RD_CC|CBL, 0, I32, 0, IOCT|IOCTP|IOCT2 },
1846{"bc2t", "p", 0x49010000, 0xffff0000, RD_CC|CBD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
1847{"bc2t", "N,p", 0x49010000, 0xffe30000, RD_CC|CBD, 0, I32, 0, IOCT|IOCTP|IOCT2 },
1848{"bc2tl", "p", 0x49030000, 0xffff0000, RD_CC|CBL, 0, I2|T3, 0, IOCT|IOCTP|IOCT2 },
1849{"bc2tl", "N,p", 0x49030000, 0xffe30000, RD_CC|CBL, 0, I32, 0, IOCT|IOCTP|IOCT2 },
1850{"cfc2", "t,G", 0x48400000, 0xffe007ff, WR_1|RD_C2|LCD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
1851{"cfc2.i", "t,G", 0x48400001, 0xffe007ff, WR_1|RD_C2|LCD, 0, EE, 0, 0 },
1852{"cfc2.ni", "t,G", 0x48400000, 0xffe007ff, WR_1|RD_C2|LCD, 0, EE, 0, 0 },
1853{"ctc2", "t,G", 0x48c00000, 0xffe007ff, RD_1|WR_CC|COD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
1854{"ctc2.i", "t,G", 0x48c00001, 0xffe007ff, RD_1|WR_CC|COD, 0, EE, 0, 0 },
1855{"ctc2.ni", "t,G", 0x48c00000, 0xffe007ff, RD_1|WR_CC|COD, 0, EE, 0, 0 },
1856{"dmfc2", "t,i", 0x48200000, 0xffe00000, WR_1|RD_C2|LCD, 0, IOCT, 0, 0 },
1857{"dmfc2", "t,G", 0x48200000, 0xffe007ff, WR_1|RD_C2|LCD, 0, I3, 0, IOCT|IOCTP|IOCT2|EE },
1858{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, WR_1|RD_C2|LCD, 0, I64, 0, IOCT|IOCTP|IOCT2 },
1859{"dmtc2", "t,i", 0x48a00000, 0xffe00000, RD_1|WR_C2|WR_CC|COD, 0, IOCT, 0, 0 },
1860{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, RD_1|WR_C2|WR_CC|COD, 0, I3, 0, IOCT|IOCTP|IOCT2|EE },
1861{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, RD_1|WR_C2|WR_CC|COD, 0, I64, 0, IOCT|IOCTP|IOCT2 },
1862{"mfc2", "t,G", 0x48000000, 0xffe007ff, WR_1|RD_C2|LCD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1863{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, WR_1|RD_C2|LCD, 0, I32, 0, IOCT|IOCTP|IOCT2 },
1864{"mfhc2", "t,G", 0x48600000, 0xffe007ff, WR_1|RD_C2|LCD, 0, I33, 0, IOCT|IOCTP|IOCT2 },
1865{"mfhc2", "t,G,H", 0x48600000, 0xffe007f8, WR_1|RD_C2|LCD, 0, I33, 0, IOCT|IOCTP|IOCT2 },
1866{"mfhc2", "t,i", 0x48600000, 0xffe00000, WR_1|RD_C2|LCD, 0, I33, 0, IOCT|IOCTP|IOCT2 },
1867{"mtc2", "t,G", 0x48800000, 0xffe007ff, RD_1|WR_C2|WR_CC|COD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1868{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, RD_1|WR_C2|WR_CC|COD, 0, I32, 0, IOCT|IOCTP|IOCT2 },
1869{"mthc2", "t,G", 0x48e00000, 0xffe007ff, RD_1|WR_C2|WR_CC|COD, 0, I33, 0, IOCT|IOCTP|IOCT2 },
1870{"mthc2", "t,G,H", 0x48e00000, 0xffe007f8, RD_1|WR_C2|WR_CC|COD, 0, I33, 0, IOCT|IOCTP|IOCT2 },
1871{"mthc2", "t,i", 0x48e00000, 0xffe00000, RD_1|WR_C2|WR_CC|COD, 0, I33, 0, IOCT|IOCTP|IOCT2 },
1872{"qmfc2", "t,G", 0x48200000, 0xffe007ff, WR_1|RD_C2, 0, EE, 0, 0 },
1873{"qmfc2.i", "t,G", 0x48200001, 0xffe007ff, WR_1|RD_C2, 0, EE, 0, 0 },
1874{"qmfc2.ni", "t,G", 0x48200000, 0xffe007ff, WR_1|RD_C2, 0, EE, 0, 0 },
1875{"qmtc2", "t,G", 0x48a00000, 0xffe007ff, RD_1|WR_C2, 0, EE, 0, 0 },
1876{"qmtc2.i", "t,G", 0x48a00001, 0xffe007ff, RD_1|WR_C2, 0, EE, 0, 0 },
1877{"qmtc2.ni", "t,G", 0x48a00000, 0xffe007ff, RD_1|WR_C2, 0, EE, 0, 0 },
39a7806d
TS
1878/* Coprocessor 3 move/branch operations overlap with MIPS IV COP1X
1879 instructions, so they are here for the latters to take precedence. */
fc76e730
RS
1880{"bc3f", "p", 0x4d000000, 0xffff0000, RD_CC|CBD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1881{"bc3fl", "p", 0x4d020000, 0xffff0000, RD_CC|CBL, 0, I2|T3, 0, IOCT|IOCTP|IOCT2|EE },
1882{"bc3t", "p", 0x4d010000, 0xffff0000, RD_CC|CBD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1883{"bc3tl", "p", 0x4d030000, 0xffff0000, RD_CC|CBL, 0, I2|T3, 0, IOCT|IOCTP|IOCT2|EE },
1884{"cfc3", "t,G", 0x4c400000, 0xffe007ff, WR_1|RD_C3|LCD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1885{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, RD_1|WR_CC|COD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1886{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, WR_1|RD_C3|LCD, 0, I3, 0, IOCT|IOCTP|IOCT2|EE },
1887{"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, RD_1|WR_C3|WR_CC|COD, 0, I3, 0, IOCT|IOCTP|IOCT2|EE },
1888{"mfc3", "t,G", 0x4c000000, 0xffe007ff, WR_1|RD_C3|LCD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1889{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, WR_1|RD_C3|LCD, 0, I32, 0, IOCT|IOCTP|IOCT2|EE },
1890{"mtc3", "t,G", 0x4c800000, 0xffe007ff, RD_1|WR_C3|WR_CC|COD, 0, I1, 0, IOCT|IOCTP|IOCT2|EE },
1891{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, RD_1|WR_C3|WR_CC|COD, 0, I32, 0, IOCT|IOCTP|IOCT2|EE },
39a7806d 1892
252b5132
RH
1893 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
1894 4010 any more, so move this insn out of the way. If the object
1895 format gave us more info, we could do this right. */
fc76e730 1896{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_1|RD_2, 0, L1, 0, 0 },
fd25c5a9 1897/* MIPS DSP ASE */
fc76e730
RS
1898{"absq_s.ph", "d,t", 0x7c000252, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
1899{"absq_s.pw", "d,t", 0x7c000456, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
1900{"absq_s.qh", "d,t", 0x7c000256, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
1901{"absq_s.w", "d,t", 0x7c000452, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
1902{"addq.ph", "d,s,t", 0x7c000290, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1903{"addq.pw", "d,s,t", 0x7c000494, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1904{"addq.qh", "d,s,t", 0x7c000294, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1905{"addq_s.ph", "d,s,t", 0x7c000390, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1906{"addq_s.pw", "d,s,t", 0x7c000594, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1907{"addq_s.qh", "d,s,t", 0x7c000394, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1908{"addq_s.w", "d,s,t", 0x7c000590, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1909{"addsc", "d,s,t", 0x7c000410, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1910{"addu.ob", "d,s,t", 0x7c000014, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1911{"addu.qb", "d,s,t", 0x7c000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1912{"addu_s.ob", "d,s,t", 0x7c000114, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1913{"addu_s.qb", "d,s,t", 0x7c000110, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1914{"addwc", "d,s,t", 0x7c000450, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1915{"bitrev", "d,t", 0x7c0006d2, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
e7ae278d
RS
1916{"bposge32", "p", 0x041c0000, 0xffff0000, CBD, 0, 0, D32, 0 },
1917{"bposge64", "p", 0x041d0000, 0xffff0000, CBD, 0, 0, D64, 0 },
fc76e730
RS
1918{"cmp.eq.ph", "s,t", 0x7c000211, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 },
1919{"cmp.eq.pw", "s,t", 0x7c000415, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1920{"cmp.eq.qh", "s,t", 0x7c000215, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1921{"cmpgu.eq.ob", "d,s,t", 0x7c000115, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1922{"cmpgu.eq.qb", "d,s,t", 0x7c000111, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1923{"cmpgu.le.ob", "d,s,t", 0x7c000195, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1924{"cmpgu.le.qb", "d,s,t", 0x7c000191, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1925{"cmpgu.lt.ob", "d,s,t", 0x7c000155, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
1926{"cmpgu.lt.qb", "d,s,t", 0x7c000151, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
1927{"cmp.le.ph", "s,t", 0x7c000291, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 },
1928{"cmp.le.pw", "s,t", 0x7c000495, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1929{"cmp.le.qh", "s,t", 0x7c000295, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1930{"cmp.lt.ph", "s,t", 0x7c000251, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 },
1931{"cmp.lt.pw", "s,t", 0x7c000455, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1932{"cmp.lt.qh", "s,t", 0x7c000255, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1933{"cmpu.eq.ob", "s,t", 0x7c000015, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1934{"cmpu.eq.qb", "s,t", 0x7c000011, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 },
1935{"cmpu.le.ob", "s,t", 0x7c000095, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1936{"cmpu.le.qb", "s,t", 0x7c000091, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 },
1937{"cmpu.lt.ob", "s,t", 0x7c000055, 0xfc00ffff, RD_1|RD_2, 0, 0, D64, 0 },
1938{"cmpu.lt.qb", "s,t", 0x7c000051, 0xfc00ffff, RD_1|RD_2, 0, 0, D32, 0 },
1939{"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_1|RD_a|DSP_VOLA, 0, 0, D64, 0 },
1940{"dextpdpv", "t,7,s", 0x7c0002fc, 0xfc00e7ff, WR_1|RD_3|RD_a|DSP_VOLA, 0, 0, D64, 0 },
1941{"dextp", "t,7,6", 0x7c0000bc, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1942{"dextpv", "t,7,s", 0x7c0000fc, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1943{"dextr.l", "t,7,6", 0x7c00043c, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1944{"dextr_r.l", "t,7,6", 0x7c00053c, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1945{"dextr_rs.l", "t,7,6", 0x7c0005bc, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1946{"dextr_rs.w", "t,7,6", 0x7c0001bc, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1947{"dextr_r.w", "t,7,6", 0x7c00013c, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1948{"dextr_s.h", "t,7,6", 0x7c0003bc, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1949{"dextrv.l", "t,7,s", 0x7c00047c, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1950{"dextrv_r.l", "t,7,s", 0x7c00057c, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1951{"dextrv_rs.l", "t,7,s", 0x7c0005fc, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1952{"dextrv_rs.w", "t,7,s", 0x7c0001fc, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1953{"dextrv_r.w", "t,7,s", 0x7c00017c, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1954{"dextrv_s.h", "t,7,s", 0x7c0003fc, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1955{"dextrv.w", "t,7,s", 0x7c00007c, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D64, 0 },
1956{"dextr.w", "t,7,6", 0x7c00003c, 0xfc00e7ff, WR_1|RD_a, 0, 0, D64, 0 },
1957{"dinsv", "t,s", 0x7c00000d, 0xfc00ffff, WR_1|RD_2, 0, 0, D64, 0 },
1958{"dmadd", "7,s,t", 0x7c000674, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1959{"dmaddu", "7,s,t", 0x7c000774, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1960{"dmsub", "7,s,t", 0x7c0006f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1961{"dmsubu", "7,s,t", 0x7c0007f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1962{"dmthlip", "s,7", 0x7c0007fc, 0xfc1fe7ff, RD_1|MOD_a|DSP_VOLA, 0, 0, D64, 0 },
1963{"dpaq_sa.l.pw", "7,s,t", 0x7c000334, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1964{"dpaq_sa.l.w", "7,s,t", 0x7c000330, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1965{"dpaq_s.w.ph", "7,s,t", 0x7c000130, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1966{"dpaq_s.w.qh", "7,s,t", 0x7c000134, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1967{"dpau.h.obl", "7,s,t", 0x7c0000f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1968{"dpau.h.obr", "7,s,t", 0x7c0001f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1969{"dpau.h.qbl", "7,s,t", 0x7c0000f0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1970{"dpau.h.qbr", "7,s,t", 0x7c0001f0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1971{"dpsq_sa.l.pw", "7,s,t", 0x7c000374, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1972{"dpsq_sa.l.w", "7,s,t", 0x7c000370, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1973{"dpsq_s.w.ph", "7,s,t", 0x7c000170, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1974{"dpsq_s.w.qh", "7,s,t", 0x7c000174, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1975{"dpsu.h.obl", "7,s,t", 0x7c0002f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1976{"dpsu.h.obr", "7,s,t", 0x7c0003f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1977{"dpsu.h.qbl", "7,s,t", 0x7c0002f0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1978{"dpsu.h.qbr", "7,s,t", 0x7c0003f0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
e7ae278d 1979{"dshilo", "7,:", 0x7c0006bc, 0xfc07e7ff, MOD_a, 0, 0, D64, 0 },
fc76e730
RS
1980{"dshilov", "7,s", 0x7c0006fc, 0xfc1fe7ff, RD_2|MOD_a, 0, 0, D64, 0 },
1981{"extpdp", "t,7,6", 0x7c0002b8, 0xfc00e7ff, WR_1|RD_a|DSP_VOLA, 0, 0, D32, 0 },
1982{"extpdpv", "t,7,s", 0x7c0002f8, 0xfc00e7ff, WR_1|RD_3|RD_a|DSP_VOLA, 0, 0, D32, 0 },
1983{"extp", "t,7,6", 0x7c0000b8, 0xfc00e7ff, WR_1|RD_a, 0, 0, D32, 0 },
1984{"extpv", "t,7,s", 0x7c0000f8, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D32, 0 },
1985{"extr_rs.w", "t,7,6", 0x7c0001b8, 0xfc00e7ff, WR_1|RD_a, 0, 0, D32, 0 },
1986{"extr_r.w", "t,7,6", 0x7c000138, 0xfc00e7ff, WR_1|RD_a, 0, 0, D32, 0 },
1987{"extr_s.h", "t,7,6", 0x7c0003b8, 0xfc00e7ff, WR_1|RD_a, 0, 0, D32, 0 },
1988{"extrv_rs.w", "t,7,s", 0x7c0001f8, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D32, 0 },
1989{"extrv_r.w", "t,7,s", 0x7c000178, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D32, 0 },
1990{"extrv_s.h", "t,7,s", 0x7c0003f8, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D32, 0 },
1991{"extrv.w", "t,7,s", 0x7c000078, 0xfc00e7ff, WR_1|RD_3|RD_a, 0, 0, D32, 0 },
1992{"extr.w", "t,7,6", 0x7c000038, 0xfc00e7ff, WR_1|RD_a, 0, 0, D32, 0 },
1993{"insv", "t,s", 0x7c00000c, 0xfc00ffff, WR_1|RD_2, 0, 0, D32, 0 },
432233b3 1994/* lbux, ldx, lhx and lwx are the basic instruction section. */
fc76e730
RS
1995{"maq_sa.w.phl", "7,s,t", 0x7c000430, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1996{"maq_sa.w.phr", "7,s,t", 0x7c0004b0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
1997{"maq_sa.w.qhll", "7,s,t", 0x7c000434, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1998{"maq_sa.w.qhlr", "7,s,t", 0x7c000474, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
1999{"maq_sa.w.qhrl", "7,s,t", 0x7c0004b4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2000{"maq_sa.w.qhrr", "7,s,t", 0x7c0004f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2001{"maq_s.l.pwl", "7,s,t", 0x7c000734, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2002{"maq_s.l.pwr", "7,s,t", 0x7c0007b4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2003{"maq_s.w.phl", "7,s,t", 0x7c000530, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
2004{"maq_s.w.phr", "7,s,t", 0x7c0005b0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
2005{"maq_s.w.qhll", "7,s,t", 0x7c000534, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2006{"maq_s.w.qhlr", "7,s,t", 0x7c000574, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2007{"maq_s.w.qhrl", "7,s,t", 0x7c0005b4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2008{"maq_s.w.qhrr", "7,s,t", 0x7c0005f4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2009{"modsub", "d,s,t", 0x7c000490, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2010{"mthlip", "s,7", 0x7c0007f8, 0xfc1fe7ff, RD_1|MOD_a|DSP_VOLA, 0, 0, D32, 0 },
2011{"muleq_s.pw.qhl", "d,s,t", 0x7c000714, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D64, 0 },
2012{"muleq_s.pw.qhr", "d,s,t", 0x7c000754, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D64, 0 },
2013{"muleq_s.w.phl", "d,s,t", 0x7c000710, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 },
2014{"muleq_s.w.phr", "d,s,t", 0x7c000750, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 },
2015{"muleu_s.ph.qbl", "d,s,t", 0x7c000190, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 },
2016{"muleu_s.ph.qbr", "d,s,t", 0x7c0001d0, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 },
2017{"muleu_s.qh.obl", "d,s,t", 0x7c000194, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D64, 0 },
2018{"muleu_s.qh.obr", "d,s,t", 0x7c0001d4, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D64, 0 },
2019{"mulq_rs.ph", "d,s,t", 0x7c0007d0, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D32, 0 },
2020{"mulq_rs.qh", "d,s,t", 0x7c0007d4, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D64, 0 },
2021{"mulsaq_s.l.pw", "7,s,t", 0x7c0003b4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2022{"mulsaq_s.w.ph", "7,s,t", 0x7c0001b0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D32, 0 },
2023{"mulsaq_s.w.qh", "7,s,t", 0x7c0001b4, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D64, 0 },
2024{"packrl.ph", "d,s,t", 0x7c000391, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2025{"packrl.pw", "d,s,t", 0x7c000395, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2026{"pick.ob", "d,s,t", 0x7c0000d5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2027{"pick.ph", "d,s,t", 0x7c0002d1, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2028{"pick.pw", "d,s,t", 0x7c0004d5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2029{"pick.qb", "d,s,t", 0x7c0000d1, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2030{"pick.qh", "d,s,t", 0x7c0002d5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2031{"preceq.pw.qhla", "d,t", 0x7c000396, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2032{"preceq.pw.qhl", "d,t", 0x7c000316, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2033{"preceq.pw.qhra", "d,t", 0x7c0003d6, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2034{"preceq.pw.qhr", "d,t", 0x7c000356, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2035{"preceq.s.l.pwl", "d,t", 0x7c000516, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2036{"preceq.s.l.pwr", "d,t", 0x7c000556, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2037{"precequ.ph.qbla", "d,t", 0x7c000192, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2038{"precequ.ph.qbl", "d,t", 0x7c000112, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2039{"precequ.ph.qbra", "d,t", 0x7c0001d2, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2040{"precequ.ph.qbr", "d,t", 0x7c000152, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2041{"precequ.pw.qhla", "d,t", 0x7c000196, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2042{"precequ.pw.qhl", "d,t", 0x7c000116, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2043{"precequ.pw.qhra", "d,t", 0x7c0001d6, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2044{"precequ.pw.qhr", "d,t", 0x7c000156, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2045{"preceq.w.phl", "d,t", 0x7c000312, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2046{"preceq.w.phr", "d,t", 0x7c000352, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2047{"preceu.ph.qbla", "d,t", 0x7c000792, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2048{"preceu.ph.qbl", "d,t", 0x7c000712, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2049{"preceu.ph.qbra", "d,t", 0x7c0007d2, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2050{"preceu.ph.qbr", "d,t", 0x7c000752, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2051{"preceu.qh.obla", "d,t", 0x7c000796, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2052{"preceu.qh.obl", "d,t", 0x7c000716, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2053{"preceu.qh.obra", "d,t", 0x7c0007d6, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2054{"preceu.qh.obr", "d,t", 0x7c000756, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2055{"precrq.ob.qh", "d,s,t", 0x7c000315, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2056{"precrq.ph.w", "d,s,t", 0x7c000511, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2057{"precrq.pw.l", "d,s,t", 0x7c000715, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2058{"precrq.qb.ph", "d,s,t", 0x7c000311, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2059{"precrq.qh.pw", "d,s,t", 0x7c000515, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2060{"precrq_rs.ph.w", "d,s,t", 0x7c000551, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2061{"precrq_rs.qh.pw", "d,s,t", 0x7c000555, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2062{"precrqu_s.ob.qh", "d,s,t", 0x7c0003d5, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2063{"precrqu_s.qb.ph", "d,s,t", 0x7c0003d1, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2064{"raddu.l.ob", "d,s", 0x7c000514, 0xfc1f07ff, WR_1|RD_2, 0, 0, D64, 0 },
2065{"raddu.w.qb", "d,s", 0x7c000510, 0xfc1f07ff, WR_1|RD_2, 0, 0, D32, 0 },
2066{"rddsp", "d", 0x7fff04b8, 0xffff07ff, WR_1, 0, 0, D32, 0 },
2067{"rddsp", "d,'", 0x7c0004b8, 0xffc007ff, WR_1, 0, 0, D32, 0 },
2068{"repl.ob", "d,5", 0x7c000096, 0xff0007ff, WR_1, 0, 0, D64, 0 },
2069{"repl.ph", "d,@", 0x7c000292, 0xfc0007ff, WR_1, 0, 0, D32, 0 },
2070{"repl.pw", "d,@", 0x7c000496, 0xfc0007ff, WR_1, 0, 0, D64, 0 },
2071{"repl.qb", "d,5", 0x7c000092, 0xff0007ff, WR_1, 0, 0, D32, 0 },
2072{"repl.qh", "d,@", 0x7c000296, 0xfc0007ff, WR_1, 0, 0, D64, 0 },
2073{"replv.ob", "d,t", 0x7c0000d6, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2074{"replv.ph", "d,t", 0x7c0002d2, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2075{"replv.pw", "d,t", 0x7c0004d6, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
2076{"replv.qb", "d,t", 0x7c0000d2, 0xffe007ff, WR_1|RD_2, 0, 0, D32, 0 },
2077{"replv.qh", "d,t", 0x7c0002d6, 0xffe007ff, WR_1|RD_2, 0, 0, D64, 0 },
e7ae278d 2078{"shilo", "7,0", 0x7c0006b8, 0xfc0fe7ff, MOD_a, 0, 0, D32, 0 },
fc76e730
RS
2079{"shilov", "7,s", 0x7c0006f8, 0xfc1fe7ff, RD_2|MOD_a, 0, 0, D32, 0 },
2080{"shll.ob", "d,t,3", 0x7c000017, 0xff0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2081{"shll.ph", "d,t,4", 0x7c000213, 0xfe0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2082{"shll.pw", "d,t,6", 0x7c000417, 0xfc0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2083{"shll.qb", "d,t,3", 0x7c000013, 0xff0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2084{"shll.qh", "d,t,4", 0x7c000217, 0xfe0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2085{"shll_s.ph", "d,t,4", 0x7c000313, 0xfe0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2086{"shll_s.pw", "d,t,6", 0x7c000517, 0xfc0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2087{"shll_s.qh", "d,t,4", 0x7c000317, 0xfe0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2088{"shll_s.w", "d,t,6", 0x7c000513, 0xfc0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2089{"shllv.ob", "d,t,s", 0x7c000097, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2090{"shllv.ph", "d,t,s", 0x7c000293, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2091{"shllv.pw", "d,t,s", 0x7c000497, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2092{"shllv.qb", "d,t,s", 0x7c000093, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2093{"shllv.qh", "d,t,s", 0x7c000297, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2094{"shllv_s.ph", "d,t,s", 0x7c000393, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2095{"shllv_s.pw", "d,t,s", 0x7c000597, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2096{"shllv_s.qh", "d,t,s", 0x7c000397, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2097{"shllv_s.w", "d,t,s", 0x7c000593, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2098{"shra.ph", "d,t,4", 0x7c000253, 0xfe0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2099{"shra.pw", "d,t,6", 0x7c000457, 0xfc0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2100{"shra.qh", "d,t,4", 0x7c000257, 0xfe0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2101{"shra_r.ph", "d,t,4", 0x7c000353, 0xfe0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2102{"shra_r.pw", "d,t,6", 0x7c000557, 0xfc0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2103{"shra_r.qh", "d,t,4", 0x7c000357, 0xfe0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2104{"shra_r.w", "d,t,6", 0x7c000553, 0xfc0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2105{"shrav.ph", "d,t,s", 0x7c0002d3, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2106{"shrav.pw", "d,t,s", 0x7c0004d7, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2107{"shrav.qh", "d,t,s", 0x7c0002d7, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2108{"shrav_r.ph", "d,t,s", 0x7c0003d3, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2109{"shrav_r.pw", "d,t,s", 0x7c0005d7, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2110{"shrav_r.qh", "d,t,s", 0x7c0003d7, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2111{"shrav_r.w", "d,t,s", 0x7c0005d3, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2112{"shrl.ob", "d,t,3", 0x7c000057, 0xff0007ff, WR_1|RD_2, 0, 0, D64, 0 },
2113{"shrl.qb", "d,t,3", 0x7c000053, 0xff0007ff, WR_1|RD_2, 0, 0, D32, 0 },
2114{"shrlv.ob", "d,t,s", 0x7c0000d7, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2115{"shrlv.qb", "d,t,s", 0x7c0000d3, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2116{"subq.ph", "d,s,t", 0x7c0002d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2117{"subq.pw", "d,s,t", 0x7c0004d4, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2118{"subq.qh", "d,s,t", 0x7c0002d4, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2119{"subq_s.ph", "d,s,t", 0x7c0003d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2120{"subq_s.pw", "d,s,t", 0x7c0005d4, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2121{"subq_s.qh", "d,s,t", 0x7c0003d4, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2122{"subq_s.w", "d,s,t", 0x7c0005d0, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2123{"subu.ob", "d,s,t", 0x7c000054, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2124{"subu.qb", "d,s,t", 0x7c000050, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2125{"subu_s.ob", "d,s,t", 0x7c000154, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D64, 0 },
2126{"subu_s.qb", "d,s,t", 0x7c000150, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D32, 0 },
2127{"wrdsp", "s", 0x7c1ffcf8, 0xfc1fffff, RD_1|DSP_VOLA, 0, 0, D32, 0 },
2128{"wrdsp", "s,8", 0x7c0004f8, 0xfc1e07ff, RD_1|DSP_VOLA, 0, 0, D32, 0 },
8b082fb1 2129/* MIPS DSP ASE Rev2 */
fc76e730
RS
2130{"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_1|RD_2, 0, 0, D33, 0 },
2131{"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2132{"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2133{"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2134{"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2135{"append", "t,s,h", 0x7c000031, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 },
e7ae278d 2136{"balign", "t,s,I", 0, (int) M_BALIGN, INSN_MACRO, 0, 0, D33, 0 },
fc76e730
RS
2137{"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, MOD_1|RD_2, 0, 0, D33, 0 },
2138{"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2139{"cmpgdu.lt.qb", "d,s,t", 0x7c000651, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2140{"cmpgdu.le.qb", "d,s,t", 0x7c000691, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2141{"dpa.w.ph", "7,s,t", 0x7c000030, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2142{"dps.w.ph", "7,s,t", 0x7c000070, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2143{"mul.ph", "d,s,t", 0x7c000318, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 },
2144{"mul_s.ph", "d,s,t", 0x7c000398, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 },
2145{"mulq_rs.w", "d,s,t", 0x7c0005d8, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 },
2146{"mulq_s.ph", "d,s,t", 0x7c000790, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 },
2147{"mulq_s.w", "d,s,t", 0x7c000598, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO, 0, 0, D33, 0 },
2148{"mulsa.w.ph", "7,s,t", 0x7c0000b0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2149{"precr.qb.ph", "d,s,t", 0x7c000351, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2150{"precr_sra.ph.w", "t,s,h", 0x7c000791, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 },
2151{"precr_sra_r.ph.w", "t,s,h", 0x7c0007d1, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 },
2152{"prepend", "t,s,h", 0x7c000071, 0xfc0007ff, MOD_1|RD_2, 0, 0, D33, 0 },
2153{"shra.qb", "d,t,3", 0x7c000113, 0xff0007ff, WR_1|RD_2, 0, 0, D33, 0 },
2154{"shra_r.qb", "d,t,3", 0x7c000153, 0xff0007ff, WR_1|RD_2, 0, 0, D33, 0 },
2155{"shrav.qb", "d,t,s", 0x7c000193, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2156{"shrav_r.qb", "d,t,s", 0x7c0001d3, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2157{"shrl.ph", "d,t,4", 0x7c000653, 0xfe0007ff, WR_1|RD_2, 0, 0, D33, 0 },
2158{"shrlv.ph", "d,t,s", 0x7c0006d3, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2159{"subu.ph", "d,s,t", 0x7c000250, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2160{"subu_s.ph", "d,s,t", 0x7c000350, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2161{"subuh.qb", "d,s,t", 0x7c000058, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2162{"subuh_r.qb", "d,s,t", 0x7c0000d8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2163{"addqh.ph", "d,s,t", 0x7c000218, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2164{"addqh_r.ph", "d,s,t", 0x7c000298, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2165{"addqh.w", "d,s,t", 0x7c000418, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2166{"addqh_r.w", "d,s,t", 0x7c000498, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2167{"subqh.ph", "d,s,t", 0x7c000258, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2168{"subqh_r.ph", "d,s,t", 0x7c0002d8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2169{"subqh.w", "d,s,t", 0x7c000458, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2170{"subqh_r.w", "d,s,t", 0x7c0004d8, 0xfc0007ff, WR_1|RD_2|RD_3, 0, 0, D33, 0 },
2171{"dpax.w.ph", "7,s,t", 0x7c000230, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2172{"dpsx.w.ph", "7,s,t", 0x7c000270, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2173{"dpaqx_s.w.ph", "7,s,t", 0x7c000630, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2174{"dpaqx_sa.w.ph", "7,s,t", 0x7c0006b0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2175{"dpsqx_s.w.ph", "7,s,t", 0x7c000670, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
2176{"dpsqx_sa.w.ph", "7,s,t", 0x7c0006f0, 0xfc00e7ff, RD_2|RD_3|MOD_a, 0, 0, D33, 0 },
61cc0267 2177/* Move bc0* after mftr and mttr to avoid opcode collision. */
fc76e730
RS
2178{"bc0f", "p", 0x41000000, 0xffff0000, RD_CC|CBD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2179{"bc0fl", "p", 0x41020000, 0xffff0000, RD_CC|CBL, 0, I2|T3, 0, IOCT|IOCTP|IOCT2 },
2180{"bc0t", "p", 0x41010000, 0xffff0000, RD_CC|CBD, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2181{"bc0tl", "p", 0x41030000, 0xffff0000, RD_CC|CBL, 0, I2|T3, 0, IOCT|IOCTP|IOCT2 },
350cc38d 2182/* ST Microelectronics Loongson-2E and -2F. */
fc76e730
RS
2183{"mult.g", "d,s,t", 0x7c000018, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2184{"mult.g", "d,s,t", 0x70000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2185{"gsmult", "d,s,t", 0x70000010, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2186{"multu.g", "d,s,t", 0x7c000019, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2187{"multu.g", "d,s,t", 0x70000012, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2188{"gsmultu", "d,s,t", 0x70000012, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2189{"dmult.g", "d,s,t", 0x7c00001c, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2190{"dmult.g", "d,s,t", 0x70000011, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2191{"gsdmult", "d,s,t", 0x70000011, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2192{"dmultu.g", "d,s,t", 0x7c00001d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2193{"dmultu.g", "d,s,t", 0x70000013, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2194{"gsdmultu", "d,s,t", 0x70000013, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2195{"div.g", "d,s,t", 0x7c00001a, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2196{"div.g", "d,s,t", 0x70000014, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2197{"gsdiv", "d,s,t", 0x70000014, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2198{"divu.g", "d,s,t", 0x7c00001b, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2199{"divu.g", "d,s,t", 0x70000016, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2200{"gsdivu", "d,s,t", 0x70000016, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2201{"ddiv.g", "d,s,t", 0x7c00001e, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2202{"ddiv.g", "d,s,t", 0x70000015, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2203{"gsddiv", "d,s,t", 0x70000015, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2204{"ddivu.g", "d,s,t", 0x7c00001f, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2205{"ddivu.g", "d,s,t", 0x70000017, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2206{"gsddivu", "d,s,t", 0x70000017, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2207{"mod.g", "d,s,t", 0x7c000022, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2208{"mod.g", "d,s,t", 0x7000001c, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2209{"gsmod", "d,s,t", 0x7000001c, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2210{"modu.g", "d,s,t", 0x7c000023, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2211{"modu.g", "d,s,t", 0x7000001e, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2212{"gsmodu", "d,s,t", 0x7000001e, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2213{"dmod.g", "d,s,t", 0x7c000026, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2214{"dmod.g", "d,s,t", 0x7000001d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2215{"gsdmod", "d,s,t", 0x7000001d, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2216{"dmodu.g", "d,s,t", 0x7c000027, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2E, 0, 0 },
2217{"dmodu.g", "d,s,t", 0x7000001f, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL2F, 0, 0 },
2218{"gsdmodu", "d,s,t", 0x7000001f, 0xfc0007ff, WR_1|RD_2|RD_3, 0, IL3A, 0, 0 },
2219{"packsshb", "D,S,T", 0x47400002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2220{"packsshb", "D,S,T", 0x4b400002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2221{"packsswh", "D,S,T", 0x47200002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2222{"packsswh", "D,S,T", 0x4b200002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2223{"packushb", "D,S,T", 0x47600002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2224{"packushb", "D,S,T", 0x4b600002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2225{"paddb", "D,S,T", 0x47c00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2226{"paddb", "D,S,T", 0x4bc00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2227{"paddb", "d,s,t", 0x70000208, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2228{"paddh", "D,S,T", 0x47400000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2229{"paddh", "d,s,t", 0x70000108, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2230{"paddh", "D,S,T", 0x4b400000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2231{"paddw", "D,S,T", 0x47600000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2232{"paddw", "D,S,T", 0x4b600000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2233{"paddw", "d,s,t", 0x70000008, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2234{"paddd", "D,S,T", 0x47e00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2235{"paddd", "D,S,T", 0x4be00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2236{"paddsb", "D,S,T", 0x47800000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2237{"paddsb", "D,S,T", 0x4b800000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2238{"paddsb", "d,s,t", 0x70000608, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2239{"paddsh", "D,S,T", 0x47000000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2240{"paddsh", "D,S,T", 0x4b000000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2241{"paddsh", "d,s,t", 0x70000508, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2242{"paddusb", "D,S,T", 0x47a00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2243{"paddusb", "D,S,T", 0x4ba00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2244{"paddush", "D,S,T", 0x47200000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2245{"paddush", "D,S,T", 0x4b200000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2246{"pandn", "D,S,T", 0x47e00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2247{"pandn", "D,S,T", 0x4be00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2248{"pavgb", "D,S,T", 0x46600000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2249{"pavgb", "D,S,T", 0x4b200008, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2250{"pavgh", "D,S,T", 0x46400000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2251{"pavgh", "D,S,T", 0x4b000008, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2252{"pcmpeqb", "D,S,T", 0x46c00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2253{"pcmpeqb", "D,S,T", 0x4b800009, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2254{"pcmpeqh", "D,S,T", 0x46800001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2255{"pcmpeqh", "D,S,T", 0x4b400009, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2256{"pcmpeqw", "D,S,T", 0x46400001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2257{"pcmpeqw", "D,S,T", 0x4b000009, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2258{"pcmpgtb", "D,S,T", 0x46e00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2259{"pcmpgtb", "D,S,T", 0x4ba00009, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2260{"pcmpgth", "D,S,T", 0x46a00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2261{"pcmpgth", "D,S,T", 0x4b600009, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2262{"pcmpgtw", "D,S,T", 0x46600001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2263{"pcmpgtw", "D,S,T", 0x4b200009, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2264{"pextrh", "D,S,T", 0x45c00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2265{"pextrh", "D,S,T", 0x4b40000e, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2266{"pinsrh_0", "D,S,T", 0x47800003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2267{"pinsrh_0", "D,S,T", 0x4b800003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2268{"pinsrh_1", "D,S,T", 0x47a00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2269{"pinsrh_1", "D,S,T", 0x4ba00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2270{"pinsrh_2", "D,S,T", 0x47c00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2271{"pinsrh_2", "D,S,T", 0x4bc00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2272{"pinsrh_3", "D,S,T", 0x47e00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2273{"pinsrh_3", "D,S,T", 0x4be00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2274{"pmaddhw", "D,S,T", 0x45e00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2275{"pmaddhw", "D,S,T", 0x4b60000e, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2276{"pmaxsh", "D,S,T", 0x46800000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2277{"pmaxsh", "D,S,T", 0x4b400008, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2278{"pmaxub", "D,S,T", 0x46c00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2279{"pmaxub", "D,S,T", 0x4b800008, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2280{"pminsh", "D,S,T", 0x46a00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2281{"pminsh", "D,S,T", 0x4b600008, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2282{"pminub", "D,S,T", 0x46e00000, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2283{"pminub", "D,S,T", 0x4ba00008, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2284{"pmovmskb", "D,S", 0x46a00005, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2E, 0, 0 },
2285{"pmovmskb", "D,S", 0x4ba0000f, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2F|IL3A, 0, 0 },
2286{"pmulhuh", "D,S,T", 0x46e00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2287{"pmulhuh", "D,S,T", 0x4ba0000a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2288{"pmulhh", "D,S,T", 0x46a00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2289{"pmulhh", "D,S,T", 0x4b60000a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2290{"pmullh", "D,S,T", 0x46800002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2291{"pmullh", "D,S,T", 0x4b40000a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2292{"pmuluw", "D,S,T", 0x46c00002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2293{"pmuluw", "D,S,T", 0x4b80000a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2294{"pasubub", "D,S,T", 0x45a00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2295{"pasubub", "D,S,T", 0x4b20000d, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2296{"biadd", "D,S", 0x46800005, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2E, 0, 0 },
2297{"biadd", "D,S", 0x4b80000f, 0xffff003f, WR_1|RD_2|FP_D, 0, IL2F|IL3A, 0, 0 },
2298{"pshufh", "D,S,T", 0x47000002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2299{"pshufh", "D,S,T", 0x4b000002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2300{"psllh", "D,S,T", 0x46600002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2301{"psllh", "D,S,T", 0x4b20000a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2302{"psllh", "d,t,<", 0x70000034, 0xffe0003f, WR_1|RD_2, 0, MMI, 0, 0 },
2303{"psllw", "D,S,T", 0x46400002, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2304{"psllw", "D,S,T", 0x4b00000a, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2305{"psllw", "d,t,<", 0x7000003c, 0xffe0003f, WR_1|RD_2, 0, MMI, 0, 0 },
2306{"psrah", "D,S,T", 0x46a00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2307{"psrah", "D,S,T", 0x4b60000b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2308{"psrah", "d,t,<", 0x70000037, 0xffe0003f, WR_1|RD_2, 0, MMI, 0, 0 },
2309{"psraw", "D,S,T", 0x46800003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2310{"psraw", "D,S,T", 0x4b40000b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2311{"psraw", "d,t,<", 0x7000003f, 0xffe0003f, WR_1|RD_2, 0, MMI, 0, 0 },
2312{"psrlh", "D,S,T", 0x46600003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2313{"psrlh", "D,S,T", 0x4b20000b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2314{"psrlh", "d,t,<", 0x70000036, 0xffe0003f, WR_1|RD_2, 0, MMI, 0, 0 },
2315{"psrlw", "D,S,T", 0x46400003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2316{"psrlw", "D,S,T", 0x4b00000b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2317{"psrlw", "d,t,<", 0x7000003e, 0xffe0003f, WR_1|RD_2, 0, MMI, 0, 0 },
2318{"psubb", "D,S,T", 0x47c00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2319{"psubb", "D,S,T", 0x4bc00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2320{"psubb", "d,s,t", 0x70000248, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2321{"psubh", "D,S,T", 0x47400001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2322{"psubh", "D,S,T", 0x4b400001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2323{"psubh", "d,s,t", 0x70000148, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2324{"psubw", "D,S,T", 0x47600001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2325{"psubw", "D,S,T", 0x4b600001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2326{"psubw", "d,s,t", 0x70000048, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2327{"psubd", "D,S,T", 0x47e00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2328{"psubd", "D,S,T", 0x4be00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2329{"psubsb", "D,S,T", 0x47800001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2330{"psubsb", "D,S,T", 0x4b800001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2331{"psubsb", "d,s,t", 0x70000648, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2332{"psubsh", "D,S,T", 0x47000001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2333{"psubsh", "D,S,T", 0x4b000001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2334{"psubsh", "d,s,t", 0x70000548, 0xfc0007ff, WR_1|RD_2|RD_3, 0, MMI, 0, 0 },
2335{"psubusb", "D,S,T", 0x47a00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2336{"psubusb", "D,S,T", 0x4ba00001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2337{"psubush", "D,S,T", 0x47200001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2338{"psubush", "D,S,T", 0x4b200001, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2339{"punpckhbh", "D,S,T", 0x47600003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2340{"punpckhbh", "D,S,T", 0x4b600003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2341{"punpckhhw", "D,S,T", 0x47200003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2342{"punpckhhw", "D,S,T", 0x4b200003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2343{"punpckhwd", "D,S,T", 0x46e00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2344{"punpckhwd", "D,S,T", 0x4ba0000b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2345{"punpcklbh", "D,S,T", 0x47400003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2346{"punpcklbh", "D,S,T", 0x4b400003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2347{"punpcklhw", "D,S,T", 0x47000003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2348{"punpcklhw", "D,S,T", 0x4b000003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2349{"punpcklwd", "D,S,T", 0x46c00003, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2E, 0, 0 },
2350{"punpcklwd", "D,S,T", 0x4b80000b, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, IL2F|IL3A, 0, 0 },
2351{"sequ", "S,T", 0x46800032, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },
2352{"sequ", "S,T", 0x4b80000c, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2F|IL3A, 0, 0 },
7f3c4072 2353/* MIPS Enhanced VA Scheme */
fc76e730 2354{"lbue", "t,+j(b)", 0x7c000028, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2355{"lbue", "t,A(b)", 0, (int) M_LBUE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2356{"lhue", "t,+j(b)", 0x7c000029, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2357{"lhue", "t,A(b)", 0, (int) M_LHUE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2358{"lbe", "t,+j(b)", 0x7c00002c, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2359{"lbe", "t,A(b)", 0, (int) M_LBE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2360{"lhe", "t,+j(b)", 0x7c00002d, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2361{"lhe", "t,A(b)", 0, (int) M_LHE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2362{"lle", "t,+j(b)", 0x7c00002e, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2363{"lle", "t,A(b)", 0, (int) M_LLE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2364{"lwe", "t,+j(b)", 0x7c00002f, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2365{"lwe", "t,A(b)", 0, (int) M_LWE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2366{"lwle", "t,+j(b)", 0x7c000019, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2367{"lwle", "t,A(b)", 0, (int) M_LWLE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2368{"lwre", "t,+j(b)", 0x7c00001a, 0xfc00007f, WR_1|RD_3|LDD, 0, 0, EVA, 0 },
e7ae278d 2369{"lwre", "t,A(b)", 0, (int) M_LWRE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2370{"sbe", "t,+j(b)", 0x7c00001c, 0xfc00007f, RD_1|RD_3|SM, 0, 0, EVA, 0 },
e7ae278d 2371{"sbe", "t,A(b)", 0, (int) M_SBE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2372{"sce", "t,+j(b)", 0x7c00001e, 0xfc00007f, MOD_1|RD_3|SM, 0, 0, EVA, 0 },
e7ae278d 2373{"sce", "t,A(b)", 0, (int) M_SCE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2374{"she", "t,+j(b)", 0x7c00001d, 0xfc00007f, RD_1|RD_3|SM, 0, 0, EVA, 0 },
e7ae278d 2375{"she", "t,A(b)", 0, (int) M_SHE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2376{"swe", "t,+j(b)", 0x7c00001f, 0xfc00007f, RD_1|RD_3|SM, 0, 0, EVA, 0 },
e7ae278d 2377{"swe", "t,A(b)", 0, (int) M_SWE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2378{"swle", "t,+j(b)", 0x7c000021, 0xfc00007f, RD_1|RD_3|SM, 0, 0, EVA, 0 },
e7ae278d 2379{"swle", "t,A(b)", 0, (int) M_SWLE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2380{"swre", "t,+j(b)", 0x7c000022, 0xfc00007f, RD_1|RD_3|SM, 0, 0, EVA, 0 },
e7ae278d 2381{"swre", "t,A(b)", 0, (int) M_SWRE_AB, INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2382{"cachee", "k,+j(b)", 0x7c00001b, 0xfc00007f, RD_3, 0, 0, EVA, 0 },
e7ae278d 2383{"cachee", "k,A(b)", 0, (int) M_CACHEE_AB,INSN_MACRO, 0, 0, EVA, 0 },
fc76e730 2384{"prefe", "k,+j(b)", 0x7c000023, 0xfc00007f, RD_3, 0, 0, EVA, 0 },
e7ae278d 2385{"prefe", "k,A(b)", 0, (int) M_PREFE_AB, INSN_MACRO, 0, 0, EVA, 0 },
350cc38d
MS
2386/* No hazard protection on coprocessor instructions--they shouldn't
2387 change the state of the processor and if they do it's up to the
2388 user to put in nops as necessary. These are at the end so that the
2389 disassembler recognizes more specific versions first. */
e7ae278d
RS
2390{"c0", "C", 0x42000000, 0xfe000000, CP, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2391{"c1", "C", 0x46000000, 0xfe000000, FP_S, 0, I1, 0, 0 },
2392{"c2", "C", 0x4a000000, 0xfe000000, CP, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2393{"c3", "C", 0x4e000000, 0xfe000000, CP, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2394{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2395{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 },
2396{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 },
2397{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 },
b015e599 2398/* RFE conflicts with the new Virt spec instruction tlbgp. */
e7ae278d 2399{"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1|T3, 0, 0 },
252b5132
RH
2400};
2401
2402#define MIPS_NUM_OPCODES \
2403 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
2404const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
2405
564e8ad9 2406/* const removed from the following to allow for dynamic extensions to the
252b5132
RH
2407 * built-in instruction set. */
2408struct mips_opcode *mips_opcodes =
2409 (struct mips_opcode *) mips_builtin_opcodes;
2410int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
2411#undef MIPS_NUM_OPCODES