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sim: modules.c: fix generation after recent refactors
[thirdparty/binutils-gdb.git] / sim / Makefile.in
CommitLineData
6bddc3e8
MF		 1# Makefile.in generated by automake 1.15.1 from Makefile.am.
2# @configure_input@
3
0d9d77e5 4# Copyright (C) 1994-2017 Free Software Foundation, Inc.
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MF		 5
6# This Makefile.in is free software; the Free Software Foundation
7# gives unlimited permission to copy and/or distribute it,
8# with or without modifications, as long as this notice is preserved.
9
10# This program is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
12# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
13# PARTICULAR PURPOSE.
14
15@SET_MAKE@
16
0d9d77e5 17# Copyright (C) 1993-2023 Free Software Foundation, Inc.
6bddc3e8 18#
c906108c
SS		 19# This program is free software; you can redistribute it and/or modify
20# it under the terms of the GNU General Public License as published by
4744ac1b 21# the Free Software Foundation; either version 3 of the License, or
c906108c 22# (at your option) any later version.
4744ac1b 23#
c906108c
SS		 24# This program is distributed in the hope that it will be useful,
25# but WITHOUT ANY WARRANTY; without even the implied warranty of
26# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27# GNU General Public License for more details.
4744ac1b 28#
c906108c 29# You should have received a copy of the GNU General Public License
4744ac1b 30# along with this program. If not, see <http://www.gnu.org/licenses/>.
6c57b87f 31
92bc001e 32
ed939535 33
c0c25232 34
c906108c 35VPATH = @srcdir@
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MF		 36am__is_gnu_make = { \
37 if test -z '$(MAKELEVEL)'; then \
38 false; \
39 elif test -n '$(MAKE_HOST)'; then \
40 true; \
41 elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \
42 true; \
43 else \
44 false; \
45 fi; \
46}
47am__make_running_with_option = \
48 case $${target_option-} in \
49 ?) ;; \
50 *) echo "am__make_running_with_option: internal error: invalid" \
51 "target option '$${target_option-}' specified" >&2; \
52 exit 1;; \
53 esac; \
54 has_opt=no; \
55 sane_makeflags=$$MAKEFLAGS; \
56 if $(am__is_gnu_make); then \
57 sane_makeflags=$$MFLAGS; \
58 else \
59 case $$MAKEFLAGS in \
60 *\\[\ \ ]*) \
61 bs=\\; \
62 sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \
63 | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \
64 esac; \
65 fi; \
66 skip_next=no; \
67 strip_trailopt () \
68 { \
69 flg=`printf '%s\n' "$$flg" | sed "s/$$1.*$$//"`; \
70 }; \
71 for flg in $$sane_makeflags; do \
72 test $$skip_next = yes && { skip_next=no; continue; }; \
73 case $$flg in \
74 *=*|--*) continue;; \
75 -*I) strip_trailopt 'I'; skip_next=yes;; \
76 -*I?*) strip_trailopt 'I';; \
77 -*O) strip_trailopt 'O'; skip_next=yes;; \
78 -*O?*) strip_trailopt 'O';; \
79 -*l) strip_trailopt 'l'; skip_next=yes;; \
80 -*l?*) strip_trailopt 'l';; \
81 -[dEDm]) skip_next=yes;; \
82 -[JT]) skip_next=yes;; \
83 esac; \
84 case $$flg in \
85 *$$target_option*) has_opt=yes; break;; \
86 esac; \
87 done; \
88 test $$has_opt = yes
89am__make_dryrun = (target_option=n; $(am__make_running_with_option))
90am__make_keepgoing = (target_option=k; $(am__make_running_with_option))
91pkgdatadir = $(datadir)/@PACKAGE@
92pkgincludedir = $(includedir)/@PACKAGE@
93pkglibdir = $(libdir)/@PACKAGE@
94pkglibexecdir = $(libexecdir)/@PACKAGE@
95am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd
96install_sh_DATA = $(install_sh) -c -m 644
97install_sh_PROGRAM = $(install_sh) -c
98install_sh_SCRIPT = $(install_sh) -c
99INSTALL_HEADER = $(INSTALL_DATA)
100transform = $(program_transform_name)
101NORMAL_INSTALL = :
102PRE_INSTALL = :
103POST_INSTALL = :
104NORMAL_UNINSTALL = :
105PRE_UNINSTALL = :
106POST_UNINSTALL = :
107build_triplet = @build@
108host_triplet = @host@
109target_triplet = @target@
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MF		 110check_PROGRAMS = $(am__EXEEXT_7) $(am__EXEEXT_8)
111noinst_PROGRAMS = $(am__EXEEXT_9) $(am__EXEEXT_10) $(am__EXEEXT_11) \
112 $(am__EXEEXT_12) $(am__EXEEXT_13) $(am__EXEEXT_14) \
113 $(am__EXEEXT_15) $(am__EXEEXT_16) $(am__EXEEXT_17) \
114 $(am__EXEEXT_18) $(am__EXEEXT_19) $(am__EXEEXT_20) \
115 $(am__EXEEXT_21) $(am__EXEEXT_22) $(am__EXEEXT_23) \
116 $(am__EXEEXT_24) $(am__EXEEXT_25) $(am__EXEEXT_26) \
117 $(am__EXEEXT_27) $(am__EXEEXT_28) $(am__EXEEXT_29) \
118 $(am__EXEEXT_30) $(am__EXEEXT_31) $(am__EXEEXT_32) \
119 $(am__EXEEXT_33) $(am__EXEEXT_34) $(am__EXEEXT_35) \
120 $(am__EXEEXT_36) $(am__EXEEXT_37) $(am__EXEEXT_38) \
121 $(am__EXEEXT_39) $(am__EXEEXT_40)
122EXTRA_PROGRAMS = $(am__EXEEXT_1) testsuite/common/bits-gen$(EXEEXT) \
123 testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_2) \
124 $(am__EXEEXT_3) $(am__EXEEXT_4) $(am__EXEEXT_5) \
125 $(am__EXEEXT_6)
fb2c495f
MF		 126@ENABLE_SIM_TRUE@am__append_1 = \
127@ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \
128@ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h
129
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MF		 130@SIM_ENABLE_HW_TRUE@am__append_2 = \
131@SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \
132@SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER)
133
a389375f
MF		 134TESTS = testsuite/common/bits32m0$(EXEEXT) \
135 testsuite/common/bits32m31$(EXEEXT) \
136 testsuite/common/bits64m0$(EXEEXT) \
137 testsuite/common/bits64m63$(EXEEXT) \
138 testsuite/common/alu-tst$(EXEEXT)
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MF		 139@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_3 = aarch64/libsim.a
140@SIM_ENABLE_ARCH_aarch64_TRUE@am__append_4 = aarch64/run
141@SIM_ENABLE_ARCH_arm_TRUE@am__append_5 = arm/libsim.a
142@SIM_ENABLE_ARCH_arm_TRUE@am__append_6 = arm/run
143@SIM_ENABLE_ARCH_avr_TRUE@am__append_7 = avr/libsim.a
144@SIM_ENABLE_ARCH_avr_TRUE@am__append_8 = avr/run
145@SIM_ENABLE_ARCH_bfin_TRUE@am__append_9 = bfin/libsim.a
146@SIM_ENABLE_ARCH_bfin_TRUE@am__append_10 = bfin/run
147@SIM_ENABLE_ARCH_bpf_TRUE@am__append_11 = bpf/libsim.a
148@SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = bpf/run
149@SIM_ENABLE_ARCH_bpf_TRUE@am__append_13 = \
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MF		 150@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \
151@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h
152
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MF		 153@SIM_ENABLE_ARCH_bpf_TRUE@am__append_14 = $(bpf_BUILD_OUTPUTS)
154@SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/libsim.a
155@SIM_ENABLE_ARCH_cr16_TRUE@am__append_16 = cr16/run
156@SIM_ENABLE_ARCH_cr16_TRUE@am__append_17 = cr16/simops.h
157@SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = cr16/gencode
158@SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = $(cr16_BUILD_OUTPUTS)
159@SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = cris/libsim.a
160@SIM_ENABLE_ARCH_cris_TRUE@am__append_21 = cris/run
161@SIM_ENABLE_ARCH_cris_TRUE@am__append_22 = cris/rvdummy
162@SIM_ENABLE_ARCH_cris_TRUE@am__append_23 = \
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MF		 163@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \
164@SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h
165
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MF		 166@SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = $(cris_BUILD_OUTPUTS)
167@SIM_ENABLE_ARCH_d10v_TRUE@am__append_25 = d10v/libsim.a
168@SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = d10v/run
169@SIM_ENABLE_ARCH_d10v_TRUE@am__append_27 = d10v/simops.h
170@SIM_ENABLE_ARCH_d10v_TRUE@am__append_28 = d10v/gencode
171@SIM_ENABLE_ARCH_d10v_TRUE@am__append_29 = $(d10v_BUILD_OUTPUTS)
172@SIM_ENABLE_ARCH_erc32_TRUE@am__append_30 = erc32/libsim.a
173@SIM_ENABLE_ARCH_erc32_TRUE@am__append_31 = erc32/run erc32/sis
174@SIM_ENABLE_ARCH_erc32_TRUE@am__append_32 = sim-%D-install-exec-local
175@SIM_ENABLE_ARCH_erc32_TRUE@am__append_33 = sim-erc32-uninstall-local
176@SIM_ENABLE_ARCH_examples_TRUE@am__append_34 = example-synacor/libsim.a
177@SIM_ENABLE_ARCH_examples_TRUE@am__append_35 = example-synacor/run
178@SIM_ENABLE_ARCH_frv_TRUE@am__append_36 = frv/libsim.a
179@SIM_ENABLE_ARCH_frv_TRUE@am__append_37 = frv/run
180@SIM_ENABLE_ARCH_frv_TRUE@am__append_38 = frv/eng.h
181@SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = $(frv_BUILD_OUTPUTS)
182@SIM_ENABLE_ARCH_ft32_TRUE@am__append_40 = ft32/libsim.a
183@SIM_ENABLE_ARCH_ft32_TRUE@am__append_41 = ft32/run
184@SIM_ENABLE_ARCH_h8300_TRUE@am__append_42 = h8300/libsim.a
185@SIM_ENABLE_ARCH_h8300_TRUE@am__append_43 = h8300/run
186@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_44 = iq2000/libsim.a
187@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_45 = iq2000/run
188@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_46 = iq2000/eng.h
189@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = $(iq2000_BUILD_OUTPUTS)
190@SIM_ENABLE_ARCH_lm32_TRUE@am__append_48 = lm32/libsim.a
191@SIM_ENABLE_ARCH_lm32_TRUE@am__append_49 = lm32/run
192@SIM_ENABLE_ARCH_lm32_TRUE@am__append_50 = lm32/eng.h
193@SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = $(lm32_BUILD_OUTPUTS)
194@SIM_ENABLE_ARCH_m32c_TRUE@am__append_52 = m32c/libsim.a
195@SIM_ENABLE_ARCH_m32c_TRUE@am__append_53 = m32c/run
196@SIM_ENABLE_ARCH_m32c_TRUE@am__append_54 = m32c/opc2c
197@SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = \
70ab6bdd
MF		 198@SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \
199@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \
200@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log
201
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MF		 202@SIM_ENABLE_ARCH_m32r_TRUE@am__append_56 = m32r/libsim.a
203@SIM_ENABLE_ARCH_m32r_TRUE@am__append_57 = m32r/run
204@SIM_ENABLE_ARCH_m32r_TRUE@am__append_58 = \
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MF		 205@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \
206@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \
207@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h
208
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MF		 209@SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = $(m32r_BUILD_OUTPUTS)
210@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_60 = m68hc11/libsim.a
211@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_61 = m68hc11/run
212@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_62 = m68hc11/gencode
213@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = $(m68hc11_BUILD_OUTPUTS)
214@SIM_ENABLE_ARCH_mcore_TRUE@am__append_64 = mcore/libsim.a
215@SIM_ENABLE_ARCH_mcore_TRUE@am__append_65 = mcore/run
216@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_66 = microblaze/libsim.a
217@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_67 = microblaze/run
218@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_68 = \
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MF		 219@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/support.o \
220@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/itable.o \
221@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/semantics.o \
222@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/idecode.o \
223@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/icache.o \
224@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/engine.o \
225@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/irun.o
226
9a7472d7 227@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_69 = \
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MF		 228@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \
229@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \
230@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \
231@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \
232@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
233@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \
234@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \
235@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \
236@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \
237@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \
238@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \
239@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o
240
9a7472d7 241@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_70 = \
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MF		 242@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_OBJ) \
243@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \
244@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o
245
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MF		 246@SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips/libsim.a
247@SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips/run
248@SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/itable.h \
ddfc4317 249@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC)
9a7472d7 250@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_74 = \
3a31051b
MF		 251@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
252@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single
253
9a7472d7 254@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_75 = \
f6d58d40
MF		 255@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
256@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
257@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \
258@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32
259
9a7472d7 260@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_76 = \
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MF		 261@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \
262@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \
263@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run
264
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MF		 265@SIM_ENABLE_ARCH_mips_TRUE@am__append_77 = $(mips_BUILD_OUTPUTS)
266@SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = mips/multi-include.h mips/multi-run.c
267@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79 = mn10300/libsim.a
268@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = mn10300/run
269@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = \
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MF		 270@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
271@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
272@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
273@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
274@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
275@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
276@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
277
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MF		 278@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = $(mn10300_BUILD_OUTPUTS)
279@SIM_ENABLE_ARCH_moxie_TRUE@am__append_83 = moxie/libsim.a
280@SIM_ENABLE_ARCH_moxie_TRUE@am__append_84 = moxie/run
281@SIM_ENABLE_ARCH_msp430_TRUE@am__append_85 = msp430/libsim.a
282@SIM_ENABLE_ARCH_msp430_TRUE@am__append_86 = msp430/run
283@SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/libsim.a
284@SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = or1k/run
285@SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/eng.h
286@SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = $(or1k_BUILD_OUTPUTS)
287@SIM_ENABLE_ARCH_ppc_TRUE@am__append_91 = common/libcommon.a
288@SIM_ENABLE_ARCH_ppc_TRUE@am__append_92 = ppc/run ppc/psim
289@SIM_ENABLE_ARCH_pru_TRUE@am__append_93 = pru/libsim.a
290@SIM_ENABLE_ARCH_pru_TRUE@am__append_94 = pru/run
291@SIM_ENABLE_ARCH_riscv_TRUE@am__append_95 = riscv/libsim.a
292@SIM_ENABLE_ARCH_riscv_TRUE@am__append_96 = riscv/run
293@SIM_ENABLE_ARCH_rl78_TRUE@am__append_97 = rl78/libsim.a
294@SIM_ENABLE_ARCH_rl78_TRUE@am__append_98 = rl78/run
295@SIM_ENABLE_ARCH_rx_TRUE@am__append_99 = rx/libsim.a
296@SIM_ENABLE_ARCH_rx_TRUE@am__append_100 = rx/run
297@SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = sh/libsim.a
298@SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = sh/run
299@SIM_ENABLE_ARCH_sh_TRUE@am__append_103 = \
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MF		 300@SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \
301@SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c
302
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MF		 303@SIM_ENABLE_ARCH_sh_TRUE@am__append_104 = sh/gencode
304@SIM_ENABLE_ARCH_sh_TRUE@am__append_105 = $(sh_BUILD_OUTPUTS)
305@SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = v850/libsim.a
306@SIM_ENABLE_ARCH_v850_TRUE@am__append_107 = v850/run
307@SIM_ENABLE_ARCH_v850_TRUE@am__append_108 = \
80636a54
MF		 308@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
309@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
310@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
311@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
312@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
313@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
314@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h
315
9a7472d7 316@SIM_ENABLE_ARCH_v850_TRUE@am__append_109 = $(v850_BUILD_OUTPUTS)
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MF		 317subdir = .
318ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
6dd65fc0
MF		 319am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
320 $(top_srcdir)/../config/depstand.m4 \
6bddc3e8 321 $(top_srcdir)/../config/lead-dot.m4 \
c2783492 322 $(top_srcdir)/../config/override.m4 \
89cf99a9 323 $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \
b5689863
MF		 324 $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
325 $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
ba307cdd 326 $(top_srcdir)/m4/sim_ac_option_alignment.m4 \
dba333c1 327 $(top_srcdir)/m4/sim_ac_option_assert.m4 \
1bf5c342 328 $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \
04381273 329 $(top_srcdir)/m4/sim_ac_option_debug.m4 \
f9a4d543 330 $(top_srcdir)/m4/sim_ac_option_endian.m4 \
5ea45474 331 $(top_srcdir)/m4/sim_ac_option_environment.m4 \
456ef1c1 332 $(top_srcdir)/m4/sim_ac_option_hardware.m4 \
d73f39ee 333 $(top_srcdir)/m4/sim_ac_option_inline.m4 \
04381273 334 $(top_srcdir)/m4/sim_ac_option_profile.m4 \
7eb1f99a 335 $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \
b79efe26 336 $(top_srcdir)/m4/sim_ac_option_scache.m4 \
20b579ba 337 $(top_srcdir)/m4/sim_ac_option_smp.m4 \
04381273
MF		 338 $(top_srcdir)/m4/sim_ac_option_stdio.m4 \
339 $(top_srcdir)/m4/sim_ac_option_trace.m4 \
47ce766a 340 $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
b15c5d7a 341 $(top_srcdir)/m4/sim_ac_platform.m4 \
c2783492 342 $(top_srcdir)/m4/sim_ac_toolchain.m4 \
23ddbd2f 343 $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \
1787fcc4 344 $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
408a44aa 345 $(top_srcdir)/configure.ac
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MF		 346am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
347 $(ACLOCAL_M4)
348DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \
fb2c495f 349 $(am__configure_deps) $(am__pkginclude_HEADERS_DIST)
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MF		 350am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \
351 configure.lineno config.status.lineno
352mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs
b15c5d7a 353CONFIG_HEADER = config.h
fd95c73e
MF		 354CONFIG_CLEAN_FILES = aarch64/.gdbinit arm/.gdbinit avr/.gdbinit \
355 bfin/.gdbinit bpf/.gdbinit cr16/.gdbinit cris/.gdbinit \
356 d10v/.gdbinit frv/.gdbinit ft32/.gdbinit h8300/.gdbinit \
357 iq2000/.gdbinit lm32/.gdbinit m32c/.gdbinit m32r/.gdbinit \
358 m68hc11/.gdbinit mcore/.gdbinit microblaze/.gdbinit \
359 mips/.gdbinit mn10300/.gdbinit moxie/.gdbinit msp430/.gdbinit \
360 or1k/.gdbinit ppc/.gdbinit pru/.gdbinit riscv/.gdbinit \
361 rl78/.gdbinit rx/.gdbinit sh/.gdbinit erc32/.gdbinit \
362 v850/.gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit
6bddc3e8 363CONFIG_CLEAN_VPATH_FILES =
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MF		 364LIBRARIES = $(noinst_LIBRARIES)
365ARFLAGS = cru
366AM_V_AR = $(am__v_AR_@AM_V@)
367am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@)
368am__v_AR_0 = @echo " AR " $@;
369am__v_AR_1 =
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MF		 370aarch64_libsim_a_AR = $(AR) $(ARFLAGS)
371@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES = \
372@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
373@SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
374@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \
375@SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
376@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
377@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
378@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
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MF		 379@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
380@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
c58353b7 381am__dirstamp = $(am__leading_dot)dirstamp
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MF		 382am__objects_1 = common/callback.$(OBJEXT) common/portability.$(OBJEXT) \
383 common/sim-load.$(OBJEXT) common/syscall.$(OBJEXT) \
384 common/target-newlib-errno.$(OBJEXT) \
385 common/target-newlib-open.$(OBJEXT) \
386 common/target-newlib-signal.$(OBJEXT) \
387 common/target-newlib-syscall.$(OBJEXT) \
388 common/version.$(OBJEXT)
389@SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS = \
390@SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__objects_1)
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MF		 391@SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_OBJECTS = \
392@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.$(OBJEXT)
393aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS) \
394 $(nodist_aarch64_libsim_a_OBJECTS)
6a8e18f0
MF		 395arm_libsim_a_AR = $(AR) $(ARFLAGS)
396@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \
397@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
398@SIM_ENABLE_ARCH_arm_TRUE@ %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
399@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \
400@SIM_ENABLE_ARCH_arm_TRUE@ %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
401@SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o arm/armemu32.o \
402@SIM_ENABLE_ARCH_arm_TRUE@ arm/arminit.o arm/armos.o \
403@SIM_ENABLE_ARCH_arm_TRUE@ arm/armsupp.o arm/armvirt.o \
404@SIM_ENABLE_ARCH_arm_TRUE@ arm/thumbemu.o arm/armcopro.o \
72be276f 405@SIM_ENABLE_ARCH_arm_TRUE@ arm/maverick.o arm/iwmmxt.o
eac2fbdc 406@SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS = $(am__objects_1)
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MF		 407@SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_OBJECTS = \
408@SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.$(OBJEXT)
409arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS) \
410 $(nodist_arm_libsim_a_OBJECTS)
c65b31b8
MF		 411avr_libsim_a_AR = $(AR) $(ARFLAGS)
412@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \
413@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
414@SIM_ENABLE_ARCH_avr_TRUE@ %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
415@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \
416@SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 417@SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o
eac2fbdc 418@SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS = $(am__objects_1)
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MF		 419@SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_OBJECTS = \
420@SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.$(OBJEXT)
421avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS) \
422 $(nodist_avr_libsim_a_OBJECTS)
bc1dd618
MF		 423bfin_libsim_a_AR = $(AR) $(ARFLAGS)
424@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \
425@SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
426@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
427@SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
428@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \
429@SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
430@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o bfin/devices.o \
431@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o bfin/interp.o \
72be276f 432@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o bfin/sim-resume.o
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MF		 433@SIM_ENABLE_ARCH_bfin_TRUE@am_bfin_libsim_a_OBJECTS = \
434@SIM_ENABLE_ARCH_bfin_TRUE@ $(am__objects_1)
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MF		 435@SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_OBJECTS = \
436@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.$(OBJEXT)
437bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS) \
438 $(nodist_bfin_libsim_a_OBJECTS)
cdbb77e4
MF		 439bpf_libsim_a_AR = $(AR) $(ARFLAGS)
440@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \
441@SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
442@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst \
443@SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
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MF		 444@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o bpf/cgen-scache.o \
445@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o bpf/cgen-utils.o \
446@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o bpf/cpu.o bpf/decode-le.o \
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MF		 447@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o bpf/sem-le.o \
448@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o bpf/mloop-le.o \
449@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \
450@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \
451@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
eac2fbdc 452@SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS = $(am__objects_1)
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MF		 453@SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_OBJECTS = \
454@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.$(OBJEXT)
455bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS) \
456 $(nodist_bpf_libsim_a_OBJECTS)
5bea0c32
MF		 457common_libcommon_a_AR = $(AR) $(ARFLAGS)
458common_libcommon_a_LIBADD =
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MF		 459am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \
460 common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \
461 common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \
462 common/target-newlib-open.$(OBJEXT) \
463 common/target-newlib-signal.$(OBJEXT) \
464 common/target-newlib-syscall.$(OBJEXT) \
465 common/version.$(OBJEXT)
5bea0c32 466common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS)
2cbdcc34 467cr16_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 468@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = $(patsubst \
2cbdcc34
MF		 469@SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
470@SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \
471@SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
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MF		 472@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o cr16/sim-resume.o \
473@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o cr16/table.o
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MF		 474@SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS = \
475@SIM_ENABLE_ARCH_cr16_TRUE@ $(am__objects_1)
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MF		 476@SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_OBJECTS = \
477@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.$(OBJEXT)
478cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS) \
479 $(nodist_cr16_libsim_a_OBJECTS)
eaa678ec 480cris_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 481@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = $(patsubst \
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MF		 482@SIM_ENABLE_ARCH_cris_TRUE@ %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
483@SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
484@SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
485@SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \
486@SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
72be276f 487@SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o cris/cgen-scache.o \
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MF		 488@SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o cris/cgen-utils.o \
489@SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o cris/crisv10f.o \
490@SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o cris/decodev10.o \
491@SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o cris/mloopv10f.o \
492@SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o cris/cpuv32.o \
493@SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o cris/modelv32.o \
494@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o cris/sim-if.o \
495@SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
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MF		 496@SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS = \
497@SIM_ENABLE_ARCH_cris_TRUE@ $(am__objects_1)
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MF		 498@SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_OBJECTS = \
499@SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.$(OBJEXT)
500cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS) \
501 $(nodist_cris_libsim_a_OBJECTS)
faf177df 502d10v_libsim_a_AR = $(AR) $(ARFLAGS)
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MF		 503@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = d10v/interp.o \
504@SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \
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MF		 505@SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
506@SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \
507@SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
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MF		 508@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o d10v/sim-resume.o \
509@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o d10v/table.o
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MF		 510@SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS = \
511@SIM_ENABLE_ARCH_d10v_TRUE@ $(am__objects_1)
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MF		 512@SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_OBJECTS = \
513@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.$(OBJEXT)
514d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS) \
515 $(nodist_d10v_libsim_a_OBJECTS)
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MF		 516erc32_libsim_a_AR = $(AR) $(ARFLAGS)
517@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES = \
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MF		 518@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o erc32/exec.o \
519@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o erc32/func.o \
72be276f 520@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o erc32/interf.o
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MF		 521@SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS = \
522@SIM_ENABLE_ARCH_erc32_TRUE@ $(am__objects_1)
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MF		 523@SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_OBJECTS = \
524@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.$(OBJEXT)
525erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS) \
526 $(nodist_erc32_libsim_a_OBJECTS)
16a6d542
MF		 527example_synacor_libsim_a_AR = $(AR) $(ARFLAGS)
528@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES = \
16a6d542
MF		 529@SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
530@SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
531@SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \
532@SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
533@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
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MF		 534@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
535@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
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MF		 536@SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS = \
537@SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1)
72be276f 538@SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_OBJECTS = example-synacor/modules.$(OBJEXT)
16a6d542 539example_synacor_libsim_a_OBJECTS = \
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MF		 540 $(am_example_synacor_libsim_a_OBJECTS) \
541 $(nodist_example_synacor_libsim_a_OBJECTS)
c26946a4 542frv_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 543@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = $(patsubst \
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MF		 544@SIM_ENABLE_ARCH_frv_TRUE@ %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
545@SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \
546@SIM_ENABLE_ARCH_frv_TRUE@ %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
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MF		 547@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o frv/cgen-fpu.o \
548@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o frv/cgen-scache.o \
549@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o frv/cgen-utils.o \
550@SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o frv/cgen-par.o frv/cpu.o \
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MF		 551@SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o frv/frv.o frv/mloop.o \
552@SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o frv/sem.o frv/cache.o \
553@SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o frv/memory.o \
554@SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o frv/pipeline.o \
555@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o frv/profile-fr400.o \
556@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
557@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
558@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o frv/registers.o \
559@SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o frv/sim-if.o frv/traps.o
eac2fbdc 560@SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS = $(am__objects_1)
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MF		 561@SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_OBJECTS = \
562@SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.$(OBJEXT)
563frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS) \
564 $(nodist_frv_libsim_a_OBJECTS)
6fe4bd8c 565ft32_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 566@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = $(patsubst \
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MF		 567@SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
568@SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \
569@SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 570@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o ft32/sim-resume.o
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MF		 571@SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS = \
572@SIM_ENABLE_ARCH_ft32_TRUE@ $(am__objects_1)
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MF		 573@SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_OBJECTS = \
574@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.$(OBJEXT)
575ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS) \
576 $(nodist_ft32_libsim_a_OBJECTS)
3e9c9407
MF		 577h8300_libsim_a_AR = $(AR) $(ARFLAGS)
578@SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES = \
3e9c9407
MF		 579@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o $(patsubst \
580@SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
581@SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst \
582@SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 583@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o
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MF		 584@SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS = \
585@SIM_ENABLE_ARCH_h8300_TRUE@ $(am__objects_1)
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MF		 586@SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_OBJECTS = \
587@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.$(OBJEXT)
588h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS) \
589 $(nodist_h8300_libsim_a_OBJECTS)
b6b1c790
MF		 590igen_libigen_a_AR = $(AR) $(ARFLAGS)
591igen_libigen_a_LIBADD =
9a7472d7
MF		 592am_igen_libigen_a_OBJECTS = igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \
593 igen/misc.$(OBJEXT) igen/filter_host.$(OBJEXT) \
594 igen/ld-decode.$(OBJEXT) igen/ld-cache.$(OBJEXT) \
595 igen/filter.$(OBJEXT) igen/ld-insn.$(OBJEXT) \
596 igen/gen-model.$(OBJEXT) igen/gen-itable.$(OBJEXT) \
597 igen/gen-icache.$(OBJEXT) igen/gen-semantics.$(OBJEXT) \
598 igen/gen-idecode.$(OBJEXT) igen/gen-support.$(OBJEXT) \
599 igen/gen-engine.$(OBJEXT) igen/gen.$(OBJEXT)
b6b1c790 600igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS)
1486f22b
MF		 601iq2000_libsim_a_AR = $(AR) $(ARFLAGS)
602@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES = \
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MF		 603@SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \
604@SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
605@SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \
606@SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
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MF		 607@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
608@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
609@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
610@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o iq2000/arch.o \
611@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o iq2000/decode.o \
612@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o iq2000/sem.o \
613@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o iq2000/model.o \
614@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
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MF		 615@SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS = \
616@SIM_ENABLE_ARCH_iq2000_TRUE@ $(am__objects_1)
72be276f
MF		 617@SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_OBJECTS = \
618@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.$(OBJEXT)
619iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS) \
620 $(nodist_iq2000_libsim_a_OBJECTS)
000f7bee 621lm32_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 622@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = $(patsubst \
000f7bee
MF		 623@SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
624@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
625@SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
626@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \
627@SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
72be276f 628@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o lm32/cgen-scache.o \
000f7bee
MF		 629@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o lm32/cgen-utils.o \
630@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o lm32/cpu.o \
631@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o lm32/sem.o \
632@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o lm32/model.o \
633@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o lm32/sim-if.o \
634@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o lm32/user.o
eac2fbdc
MF		 635@SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS = \
636@SIM_ENABLE_ARCH_lm32_TRUE@ $(am__objects_1)
72be276f
MF		 637@SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_OBJECTS = \
638@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.$(OBJEXT)
639lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS) \
640 $(nodist_lm32_libsim_a_OBJECTS)
ba3a8498 641m32c_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc
MF		 642@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = m32c/gdb-if.o \
643@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o m32c/load.o m32c/m32c.o \
72be276f 644@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o m32c/misc.o m32c/r8c.o \
eac2fbdc
MF		 645@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o m32c/srcdest.o \
646@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o m32c/trace.o
647@SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS = \
648@SIM_ENABLE_ARCH_m32c_TRUE@ $(am__objects_1)
72be276f
MF		 649@SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_OBJECTS = \
650@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.$(OBJEXT)
651m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS) \
652 $(nodist_m32c_libsim_a_OBJECTS)
8136f057 653m32r_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 654@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = $(patsubst \
8136f057
MF		 655@SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
656@SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
657@SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
658@SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \
659@SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
72be276f 660@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o m32r/cgen-scache.o \
8136f057
MF		 661@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o m32r/cgen-utils.o \
662@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o m32r/m32r.o m32r/cpu.o \
663@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o m32r/sem.o \
664@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o m32r/mloop.o \
665@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o m32r/cpux.o \
666@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o m32r/modelx.o \
667@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o m32r/m32r2.o \
668@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o m32r/decode2.o \
669@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o m32r/mloop2.o \
670@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o
eac2fbdc
MF		 671@SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS = \
672@SIM_ENABLE_ARCH_m32r_TRUE@ $(am__objects_1)
72be276f
MF		 673@SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_OBJECTS = \
674@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.$(OBJEXT)
675m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS) \
676 $(nodist_m32r_libsim_a_OBJECTS)
ccb68071
MF		 677m68hc11_libsim_a_AR = $(AR) $(ARFLAGS)
678@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES = \
ccb68071
MF		 679@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
680@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
681@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
682@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
683@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
684@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o $(patsubst \
685@SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
686@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
687@SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
688@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \
689@SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
ccb68071 690@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
eac2fbdc
MF		 691@SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS = \
692@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__objects_1)
72be276f
MF		 693@SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_OBJECTS = \
694@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.$(OBJEXT)
695m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS) \
696 $(nodist_m68hc11_libsim_a_OBJECTS)
dfceaa0d
MF		 697mcore_libsim_a_AR = $(AR) $(ARFLAGS)
698@SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES = \
dfceaa0d
MF		 699@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o $(patsubst \
700@SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
701@SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst \
702@SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 703@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/sim-resume.o
eac2fbdc
MF		 704@SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS = \
705@SIM_ENABLE_ARCH_mcore_TRUE@ $(am__objects_1)
72be276f
MF		 706@SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_OBJECTS = \
707@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.$(OBJEXT)
708mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS) \
709 $(nodist_mcore_libsim_a_OBJECTS)
a6ead840 710microblaze_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 711@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES = \
a6ead840
MF		 712@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \
713@SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \
714@SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
715@SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \
716@SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
a6ead840 717@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o
eac2fbdc
MF		 718@SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS = \
719@SIM_ENABLE_ARCH_microblaze_TRUE@ $(am__objects_1)
72be276f
MF		 720@SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_OBJECTS = \
721@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.$(OBJEXT)
722microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS) \
723 $(nodist_microblaze_libsim_a_OBJECTS)
1f1afa43
MF		 724mips_libsim_a_AR = $(AR) $(ARFLAGS)
725am__DEPENDENCIES_1 =
726@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \
727@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \
728@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o
9a7472d7
MF		 729@SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_68) \
730@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_69) \
1f1afa43 731@SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_2)
eac2fbdc
MF		 732@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \
733@SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_3) $(patsubst \
1f1afa43
MF		 734@SIM_ENABLE_ARCH_mips_TRUE@ %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
735@SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \
736@SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
737@SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \
738@SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
739@SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o mips/dsp.o mips/mdmx.o \
72be276f 740@SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-main.o mips/sim-resume.o
eac2fbdc
MF		 741@SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS = \
742@SIM_ENABLE_ARCH_mips_TRUE@ $(am__objects_1)
72be276f
MF		 743@SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_OBJECTS = \
744@SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.$(OBJEXT)
745mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS) \
746 $(nodist_mips_libsim_a_OBJECTS)
4c54f341
MF		 747mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
748@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES = \
4c54f341
MF		 749@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \
750@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \
751@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \
752@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \
753@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o mn10300/irun.o \
754@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o $(patsubst \
755@SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
756@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \
757@SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
758@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \
759@SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
760@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \
4c54f341
MF		 761@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \
762@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o
eac2fbdc
MF		 763@SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS = \
764@SIM_ENABLE_ARCH_mn10300_TRUE@ $(am__objects_1)
72be276f
MF		 765@SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_OBJECTS = \
766@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.$(OBJEXT)
767mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS) \
768 $(nodist_mn10300_libsim_a_OBJECTS)
0754b625 769moxie_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 770@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = $(patsubst \
0754b625
MF		 771@SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
772@SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst \
773@SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 774@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o moxie/sim-resume.o
eac2fbdc
MF		 775@SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS = \
776@SIM_ENABLE_ARCH_moxie_TRUE@ $(am__objects_1)
72be276f
MF		 777@SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_OBJECTS = \
778@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/modules.$(OBJEXT)
779moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS) \
780 $(nodist_moxie_libsim_a_OBJECTS)
bff048f5
MF		 781msp430_libsim_a_AR = $(AR) $(ARFLAGS)
782@SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES = \
bff048f5
MF		 783@SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \
784@SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
785@SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \
786@SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
787@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \
bff048f5 788@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o
eac2fbdc
MF		 789@SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS = \
790@SIM_ENABLE_ARCH_msp430_TRUE@ $(am__objects_1)
72be276f
MF		 791@SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_OBJECTS = \
792@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.$(OBJEXT)
793msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS) \
794 $(nodist_msp430_libsim_a_OBJECTS)
4d998e15 795or1k_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 796@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = $(patsubst \
4d998e15
MF		 797@SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
798@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \
799@SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f
MF		 800@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-accfp.o or1k/cgen-fpu.o \
801@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-run.o or1k/cgen-scache.o \
4d998e15
MF		 802@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o or1k/cgen-utils.o \
803@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o or1k/cpu.o \
804@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o or1k/mloop.o \
805@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o or1k/sem.o or1k/or1k.o \
806@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o or1k/traps.o
eac2fbdc
MF		 807@SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS = \
808@SIM_ENABLE_ARCH_or1k_TRUE@ $(am__objects_1)
72be276f
MF		 809@SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_OBJECTS = \
810@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.$(OBJEXT)
811or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS) \
812 $(nodist_or1k_libsim_a_OBJECTS)
3373e27f 813pru_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 814@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = $(patsubst \
3373e27f
MF		 815@SIM_ENABLE_ARCH_pru_TRUE@ %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
816@SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst \
817@SIM_ENABLE_ARCH_pru_TRUE@ %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 818@SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o pru/sim-resume.o
eac2fbdc 819@SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS = $(am__objects_1)
72be276f
MF		 820@SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_OBJECTS = \
821@SIM_ENABLE_ARCH_pru_TRUE@ pru/modules.$(OBJEXT)
822pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS) \
823 $(nodist_pru_libsim_a_OBJECTS)
91344291 824riscv_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 825@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = $(patsubst \
91344291
MF		 826@SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
827@SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst \
828@SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
829@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o riscv/machs.o \
72be276f 830@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-main.o \
91344291 831@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o
eac2fbdc
MF		 832@SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS = \
833@SIM_ENABLE_ARCH_riscv_TRUE@ $(am__objects_1)
72be276f
MF		 834@SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_OBJECTS = \
835@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.$(OBJEXT)
836riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS) \
837 $(nodist_riscv_libsim_a_OBJECTS)
91a335f9 838rl78_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc
MF		 839@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = rl78/load.o \
840@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o rl78/cpu.o rl78/rl78.o \
72be276f 841@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o rl78/trace.o
eac2fbdc
MF		 842@SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS = \
843@SIM_ENABLE_ARCH_rl78_TRUE@ $(am__objects_1)
72be276f
MF		 844@SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_OBJECTS = \
845@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.$(OBJEXT)
846rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS) \
847 $(nodist_rl78_libsim_a_OBJECTS)
15538f65 848rx_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc
MF		 849@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = rx/fpu.o rx/load.o \
850@SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o rx/misc.o rx/reg.o rx/rx.o \
851@SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o rx/trace.o rx/gdb-if.o \
72be276f 852@SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o
eac2fbdc 853@SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS = $(am__objects_1)
72be276f
MF		 854@SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_OBJECTS = \
855@SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.$(OBJEXT)
856rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS) \
857 $(nodist_rx_libsim_a_OBJECTS)
dd719fa6 858sh_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc
MF		 859@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = sh/interp.o \
860@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \
dd719fa6
MF		 861@SIM_ENABLE_ARCH_sh_TRUE@ %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
862@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \
863@SIM_ENABLE_ARCH_sh_TRUE@ %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
72be276f 864@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o
eac2fbdc 865@SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS = $(am__objects_1)
72be276f
MF		 866@SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_OBJECTS = \
867@SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.$(OBJEXT)
868sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS) \
869 $(nodist_sh_libsim_a_OBJECTS)
7a59a0b9 870v850_libsim_a_AR = $(AR) $(ARFLAGS)
eac2fbdc 871@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = $(patsubst \
7a59a0b9
MF		 872@SIM_ENABLE_ARCH_v850_TRUE@ %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
873@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \
874@SIM_ENABLE_ARCH_v850_TRUE@ %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
875@SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o v850/interp.o \
876@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o v850/semantics.o \
877@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o v850/icache.o \
878@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o v850/irun.o \
72be276f 879@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o v850/sim-resume.o
eac2fbdc
MF		 880@SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS = \
881@SIM_ENABLE_ARCH_v850_TRUE@ $(am__objects_1)
72be276f
MF		 882@SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_OBJECTS = \
883@SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.$(OBJEXT)
884v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS) \
885 $(nodist_v850_libsim_a_OBJECTS)
9a7472d7
MF		 886am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) igen/gen$(EXEEXT) \
887 igen/ld-cache$(EXEEXT) igen/ld-decode$(EXEEXT) \
888 igen/ld-insn$(EXEEXT) igen/table$(EXEEXT)
889@SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_2 = cr16/gencode$(EXEEXT)
890@SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_3 = d10v/gencode$(EXEEXT)
891@SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_4 = m32c/opc2c$(EXEEXT)
892@SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_5 = m68hc11/gencode$(EXEEXT)
893@SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_6 = sh/gencode$(EXEEXT)
894am__EXEEXT_7 = testsuite/common/bits32m0$(EXEEXT) \
a389375f
MF		 895 testsuite/common/bits32m31$(EXEEXT) \
896 testsuite/common/bits64m0$(EXEEXT) \
897 testsuite/common/bits64m63$(EXEEXT) \
898 testsuite/common/alu-tst$(EXEEXT)
9a7472d7
MF		 899@SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_8 = cris/rvdummy$(EXEEXT)
900@SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_9 = aarch64/run$(EXEEXT)
901@SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_10 = arm/run$(EXEEXT)
902@SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_11 = avr/run$(EXEEXT)
903@SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_12 = bfin/run$(EXEEXT)
904@SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_13 = bpf/run$(EXEEXT)
905@SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_14 = cr16/run$(EXEEXT)
906@SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_15 = cris/run$(EXEEXT)
907@SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_16 = d10v/run$(EXEEXT)
908@SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_17 = erc32/run$(EXEEXT) \
c0c25232 909@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis$(EXEEXT)
9a7472d7 910@SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_18 = \
c0c25232 911@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT)
9a7472d7
MF		 912@SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_19 = frv/run$(EXEEXT)
913@SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_20 = ft32/run$(EXEEXT)
914@SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_21 = h8300/run$(EXEEXT)
915@SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_22 = iq2000/run$(EXEEXT)
916@SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_23 = lm32/run$(EXEEXT)
917@SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_24 = m32c/run$(EXEEXT)
918@SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_25 = m32r/run$(EXEEXT)
919@SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_26 = m68hc11/run$(EXEEXT)
920@SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_27 = mcore/run$(EXEEXT)
921@SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_28 = \
c0c25232 922@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/run$(EXEEXT)
9a7472d7
MF		 923@SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_29 = mips/run$(EXEEXT)
924@SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_30 = mn10300/run$(EXEEXT)
925@SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_31 = moxie/run$(EXEEXT)
926@SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_32 = msp430/run$(EXEEXT)
927@SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_33 = or1k/run$(EXEEXT)
928@SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_34 = ppc/run$(EXEEXT) \
c0c25232 929@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/psim$(EXEEXT)
9a7472d7
MF		 930@SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_35 = pru/run$(EXEEXT)
931@SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_36 = riscv/run$(EXEEXT)
932@SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_37 = rl78/run$(EXEEXT)
933@SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_38 = rx/run$(EXEEXT)
934@SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_39 = sh/run$(EXEEXT)
935@SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_40 = v850/run$(EXEEXT)
c0c25232
MF		 936PROGRAMS = $(noinst_PROGRAMS)
937am_aarch64_run_OBJECTS =
938aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS)
1f1afa43 939am__DEPENDENCIES_4 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB)
c0c25232
MF		 940@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES = \
941@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o aarch64/libsim.a \
1f1afa43 942@SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 943AM_V_lt = $(am__v_lt_@AM_V@)
944am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@)
945am__v_lt_0 = --silent
946am__v_lt_1 =
947am_arm_run_OBJECTS =
948arm_run_OBJECTS = $(am_arm_run_OBJECTS)
949@SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \
1f1afa43 950@SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 951am_avr_run_OBJECTS =
952avr_run_OBJECTS = $(am_avr_run_OBJECTS)
953@SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \
1f1afa43 954@SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 955am_bfin_run_OBJECTS =
956bfin_run_OBJECTS = $(am_bfin_run_OBJECTS)
957@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \
1f1afa43 958@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 959am_bpf_run_OBJECTS =
960bpf_run_OBJECTS = $(am_bpf_run_OBJECTS)
961@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \
1f1afa43 962@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a $(am__DEPENDENCIES_4)
70ab6bdd
MF		 963@SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS = \
964@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode.$(OBJEXT)
965cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS)
966@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES = \
967@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/cr16-opc.o
c0c25232
MF		 968am_cr16_run_OBJECTS =
969cr16_run_OBJECTS = $(am_cr16_run_OBJECTS)
970@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES = cr16/nrun.o \
1f1afa43 971@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 972am_cris_run_OBJECTS =
973cris_run_OBJECTS = $(am_cris_run_OBJECTS)
974@SIM_ENABLE_ARCH_cris_TRUE@cris_run_DEPENDENCIES = cris/nrun.o \
1f1afa43 975@SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a $(am__DEPENDENCIES_4)
cb9bdc02
MF		 976@SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS = \
977@SIM_ENABLE_ARCH_cris_TRUE@ cris/rvdummy.$(OBJEXT)
978cris_rvdummy_OBJECTS = $(am_cris_rvdummy_OBJECTS)
c0c25232
MF		 979@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES = \
980@SIM_ENABLE_ARCH_cris_TRUE@ $(LIBIBERTY_LIB)
70ab6bdd
MF		 981@SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS = \
982@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode.$(OBJEXT)
983d10v_gencode_OBJECTS = $(am_d10v_gencode_OBJECTS)
984@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES = \
985@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/d10v-opc.o
c0c25232
MF		 986am_d10v_run_OBJECTS =
987d10v_run_OBJECTS = $(am_d10v_run_OBJECTS)
988@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_DEPENDENCIES = d10v/nrun.o \
1f1afa43 989@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 990am_erc32_run_OBJECTS =
991erc32_run_OBJECTS = $(am_erc32_run_OBJECTS)
c0c25232
MF		 992@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_DEPENDENCIES = erc32/sis.o \
993@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
1f1afa43 994@SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_4) \
c0c25232 995@SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_1) \
1f1afa43 996@SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_1)
c0c25232
MF		 997erc32_sis_SOURCES = erc32/sis.c
998erc32_sis_OBJECTS = erc32/sis.$(OBJEXT)
999erc32_sis_LDADD = $(LDADD)
1000am_example_synacor_run_OBJECTS =
1001example_synacor_run_OBJECTS = $(am_example_synacor_run_OBJECTS)
1002@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES = \
1003@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
1004@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
1f1afa43 1005@SIM_ENABLE_ARCH_examples_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1006am_frv_run_OBJECTS =
1007frv_run_OBJECTS = $(am_frv_run_OBJECTS)
1008@SIM_ENABLE_ARCH_frv_TRUE@frv_run_DEPENDENCIES = frv/nrun.o \
1f1afa43 1009@SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1010am_ft32_run_OBJECTS =
1011ft32_run_OBJECTS = $(am_ft32_run_OBJECTS)
1012@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_DEPENDENCIES = ft32/nrun.o \
1f1afa43 1013@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1014am_h8300_run_OBJECTS =
1015h8300_run_OBJECTS = $(am_h8300_run_OBJECTS)
1016@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES = h8300/nrun.o \
1017@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
1f1afa43 1018@SIM_ENABLE_ARCH_h8300_TRUE@ $(am__DEPENDENCIES_4)
70ab6bdd
MF		 1019am_igen_filter_OBJECTS =
1020igen_filter_OBJECTS = $(am_igen_filter_OBJECTS)
9a7472d7 1021igen_filter_DEPENDENCIES = igen/filter-main.o igen/libigen.a
b6b1c790
MF		 1022am_igen_gen_OBJECTS =
1023igen_gen_OBJECTS = $(am_igen_gen_OBJECTS)
9a7472d7
MF		 1024igen_gen_DEPENDENCIES = igen/gen-main.o igen/libigen.a
1025am_igen_igen_OBJECTS = igen/igen.$(OBJEXT)
b6b1c790 1026igen_igen_OBJECTS = $(am_igen_igen_OBJECTS)
9a7472d7 1027igen_igen_DEPENDENCIES = igen/libigen.a
b6b1c790
MF		 1028am_igen_ld_cache_OBJECTS =
1029igen_ld_cache_OBJECTS = $(am_igen_ld_cache_OBJECTS)
9a7472d7 1030igen_ld_cache_DEPENDENCIES = igen/ld-cache-main.o igen/libigen.a
b6b1c790
MF		 1031am_igen_ld_decode_OBJECTS =
1032igen_ld_decode_OBJECTS = $(am_igen_ld_decode_OBJECTS)
9a7472d7 1033igen_ld_decode_DEPENDENCIES = igen/ld-decode-main.o igen/libigen.a
b6b1c790
MF		 1034am_igen_ld_insn_OBJECTS =
1035igen_ld_insn_OBJECTS = $(am_igen_ld_insn_OBJECTS)
9a7472d7 1036igen_ld_insn_DEPENDENCIES = igen/ld-insn-main.o igen/libigen.a
b6b1c790
MF		 1037am_igen_table_OBJECTS =
1038igen_table_OBJECTS = $(am_igen_table_OBJECTS)
9a7472d7 1039igen_table_DEPENDENCIES = igen/table-main.o igen/libigen.a
c0c25232
MF		 1040am_iq2000_run_OBJECTS =
1041iq2000_run_OBJECTS = $(am_iq2000_run_OBJECTS)
1042@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES = iq2000/nrun.o \
1043@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
1f1afa43 1044@SIM_ENABLE_ARCH_iq2000_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1045am_lm32_run_OBJECTS =
1046lm32_run_OBJECTS = $(am_lm32_run_OBJECTS)
1047@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_DEPENDENCIES = lm32/nrun.o \
1f1afa43 1048@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a $(am__DEPENDENCIES_4)
70ab6bdd
MF		 1049@SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS = \
1050@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c.$(OBJEXT)
1051m32c_opc2c_OBJECTS = $(am_m32c_opc2c_OBJECTS)
1052m32c_opc2c_LDADD = $(LDADD)
c0c25232
MF		 1053am_m32c_run_OBJECTS =
1054m32c_run_OBJECTS = $(am_m32c_run_OBJECTS)
1055@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_DEPENDENCIES = m32c/main.o \
1f1afa43 1056@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1057am_m32r_run_OBJECTS =
1058m32r_run_OBJECTS = $(am_m32r_run_OBJECTS)
1059@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_DEPENDENCIES = m32r/nrun.o \
1f1afa43 1060@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a $(am__DEPENDENCIES_4)
70ab6bdd
MF		 1061@SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS = \
1062@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode.$(OBJEXT)
1063m68hc11_gencode_OBJECTS = $(am_m68hc11_gencode_OBJECTS)
1064m68hc11_gencode_LDADD = $(LDADD)
c0c25232
MF		 1065am_m68hc11_run_OBJECTS =
1066m68hc11_run_OBJECTS = $(am_m68hc11_run_OBJECTS)
1067@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_DEPENDENCIES = \
1068@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o m68hc11/libsim.a \
1f1afa43 1069@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1070am_mcore_run_OBJECTS =
1071mcore_run_OBJECTS = $(am_mcore_run_OBJECTS)
1072@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES = mcore/nrun.o \
1073@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
1f1afa43 1074@SIM_ENABLE_ARCH_mcore_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1075am_microblaze_run_OBJECTS =
1076microblaze_run_OBJECTS = $(am_microblaze_run_OBJECTS)
1077@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_DEPENDENCIES = \
1078@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
1079@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
1f1afa43 1080@SIM_ENABLE_ARCH_microblaze_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1081am_mips_run_OBJECTS =
1082mips_run_OBJECTS = $(am_mips_run_OBJECTS)
1083@SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES = mips/nrun.o \
1f1afa43 1084@SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1085am_mn10300_run_OBJECTS =
1086mn10300_run_OBJECTS = $(am_mn10300_run_OBJECTS)
1087@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES = \
1088@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o mn10300/libsim.a \
1f1afa43 1089@SIM_ENABLE_ARCH_mn10300_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1090am_moxie_run_OBJECTS =
1091moxie_run_OBJECTS = $(am_moxie_run_OBJECTS)
1092@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES = moxie/nrun.o \
1093@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
1f1afa43 1094@SIM_ENABLE_ARCH_moxie_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1095am_msp430_run_OBJECTS =
1096msp430_run_OBJECTS = $(am_msp430_run_OBJECTS)
1097@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES = msp430/nrun.o \
1098@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
1f1afa43 1099@SIM_ENABLE_ARCH_msp430_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1100am_or1k_run_OBJECTS =
1101or1k_run_OBJECTS = $(am_or1k_run_OBJECTS)
1102@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_DEPENDENCIES = or1k/nrun.o \
1f1afa43 1103@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1104ppc_psim_SOURCES = ppc/psim.c
1105ppc_psim_OBJECTS = ppc/psim.$(OBJEXT)
1106ppc_psim_LDADD = $(LDADD)
1107am_ppc_run_OBJECTS =
1108ppc_run_OBJECTS = $(am_ppc_run_OBJECTS)
1109@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES = ppc/main.o \
1f1afa43 1110@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1111am_pru_run_OBJECTS =
1112pru_run_OBJECTS = $(am_pru_run_OBJECTS)
1113@SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES = pru/nrun.o \
1f1afa43 1114@SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1115am_riscv_run_OBJECTS =
1116riscv_run_OBJECTS = $(am_riscv_run_OBJECTS)
1117@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_DEPENDENCIES = riscv/nrun.o \
1118@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
1f1afa43 1119@SIM_ENABLE_ARCH_riscv_TRUE@ $(am__DEPENDENCIES_4)
c0c25232
MF		 1120am_rl78_run_OBJECTS =
1121rl78_run_OBJECTS = $(am_rl78_run_OBJECTS)
1122@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES = rl78/main.o \
1f1afa43 1123@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a $(am__DEPENDENCIES_4)
c0c25232
MF		 1124am_rx_run_OBJECTS =
1125rx_run_OBJECTS = $(am_rx_run_OBJECTS)
1126@SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES = rx/main.o rx/libsim.a \
1f1afa43 1127@SIM_ENABLE_ARCH_rx_TRUE@ $(am__DEPENDENCIES_4)
70ab6bdd
MF		 1128@SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS = sh/gencode.$(OBJEXT)
1129sh_gencode_OBJECTS = $(am_sh_gencode_OBJECTS)
1130sh_gencode_LDADD = $(LDADD)
c0c25232
MF		 1131am_sh_run_OBJECTS =
1132sh_run_OBJECTS = $(am_sh_run_OBJECTS)
1133@SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES = sh/nrun.o sh/libsim.a \
1f1afa43 1134@SIM_ENABLE_ARCH_sh_TRUE@ $(am__DEPENDENCIES_4)
a389375f
MF		 1135testsuite_common_alu_tst_SOURCES = testsuite/common/alu-tst.c
1136testsuite_common_alu_tst_OBJECTS = testsuite/common/alu-tst.$(OBJEXT)
1137testsuite_common_alu_tst_LDADD = $(LDADD)
1138testsuite_common_bits_gen_SOURCES = testsuite/common/bits-gen.c
1139testsuite_common_bits_gen_OBJECTS = \
1140 testsuite/common/bits-gen.$(OBJEXT)
1141testsuite_common_bits_gen_LDADD = $(LDADD)
1142testsuite_common_bits32m0_SOURCES = testsuite/common/bits32m0.c
1143testsuite_common_bits32m0_OBJECTS = \
1144 testsuite/common/bits32m0.$(OBJEXT)
1145testsuite_common_bits32m0_LDADD = $(LDADD)
1146testsuite_common_bits32m31_SOURCES = testsuite/common/bits32m31.c
1147testsuite_common_bits32m31_OBJECTS = \
1148 testsuite/common/bits32m31.$(OBJEXT)
1149testsuite_common_bits32m31_LDADD = $(LDADD)
1150testsuite_common_bits64m0_SOURCES = testsuite/common/bits64m0.c
1151testsuite_common_bits64m0_OBJECTS = \
1152 testsuite/common/bits64m0.$(OBJEXT)
1153testsuite_common_bits64m0_LDADD = $(LDADD)
1154testsuite_common_bits64m63_SOURCES = testsuite/common/bits64m63.c
1155testsuite_common_bits64m63_OBJECTS = \
1156 testsuite/common/bits64m63.$(OBJEXT)
1157testsuite_common_bits64m63_LDADD = $(LDADD)
1158testsuite_common_fpu_tst_SOURCES = testsuite/common/fpu-tst.c
1159testsuite_common_fpu_tst_OBJECTS = testsuite/common/fpu-tst.$(OBJEXT)
1160testsuite_common_fpu_tst_LDADD = $(LDADD)
c0c25232
MF		 1161am_v850_run_OBJECTS =
1162v850_run_OBJECTS = $(am_v850_run_OBJECTS)
1163@SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES = v850/nrun.o \
1f1afa43 1164@SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a $(am__DEPENDENCIES_4)
6bddc3e8
MF		 1165AM_V_P = $(am__v_P_@AM_V@)
1166am__v_P_ = $(am__v_P_@AM_DEFAULT_V@)
1167am__v_P_0 = false
1168am__v_P_1 = :
1169AM_V_GEN = $(am__v_GEN_@AM_V@)
1170am__v_GEN_ = $(am__v_GEN_@AM_DEFAULT_V@)
1171am__v_GEN_0 = @echo " GEN " $@;
1172am__v_GEN_1 =
1173AM_V_at = $(am__v_at_@AM_V@)
1174am__v_at_ = $(am__v_at_@AM_DEFAULT_V@)
1175am__v_at_0 = @
1176am__v_at_1 =
b6b1c790
MF		 1177DEFAULT_INCLUDES = -I.@am__isrc@
1178depcomp = $(SHELL) $(top_srcdir)/../depcomp
1179am__depfiles_maybe = depfiles
1180am__mv = mv -f
1181COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \
1182 $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
b5689863
MF		 1183LTCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
1184 $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) \
1185 $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \
1186 $(AM_CFLAGS) $(CFLAGS)
b6b1c790
MF		 1187AM_V_CC = $(am__v_CC_@AM_V@)
1188am__v_CC_ = $(am__v_CC_@AM_DEFAULT_V@)
1189am__v_CC_0 = @echo " CC " $@;
1190am__v_CC_1 =
1191CCLD = $(CC)
b5689863
MF		 1192LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \
1193 $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \
1194 $(AM_LDFLAGS) $(LDFLAGS) -o $@
b6b1c790
MF		 1195AM_V_CCLD = $(am__v_CCLD_@AM_V@)
1196am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@)
1197am__v_CCLD_0 = @echo " CCLD " $@;
1198am__v_CCLD_1 =
72be276f
MF		 1199SOURCES = $(aarch64_libsim_a_SOURCES) \
1200 $(nodist_aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
1201 $(nodist_arm_libsim_a_SOURCES) $(avr_libsim_a_SOURCES) \
1202 $(nodist_avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \
1203 $(nodist_bfin_libsim_a_SOURCES) $(bpf_libsim_a_SOURCES) \
1204 $(nodist_bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \
1205 $(cr16_libsim_a_SOURCES) $(nodist_cr16_libsim_a_SOURCES) \
1206 $(cris_libsim_a_SOURCES) $(nodist_cris_libsim_a_SOURCES) \
1207 $(d10v_libsim_a_SOURCES) $(nodist_d10v_libsim_a_SOURCES) \
1208 $(erc32_libsim_a_SOURCES) $(nodist_erc32_libsim_a_SOURCES) \
1209 $(example_synacor_libsim_a_SOURCES) \
1210 $(nodist_example_synacor_libsim_a_SOURCES) \
1211 $(frv_libsim_a_SOURCES) $(nodist_frv_libsim_a_SOURCES) \
1212 $(ft32_libsim_a_SOURCES) $(nodist_ft32_libsim_a_SOURCES) \
1213 $(h8300_libsim_a_SOURCES) $(nodist_h8300_libsim_a_SOURCES) \
1486f22b 1214 $(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \
72be276f
MF		 1215 $(nodist_iq2000_libsim_a_SOURCES) $(lm32_libsim_a_SOURCES) \
1216 $(nodist_lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \
1217 $(nodist_m32c_libsim_a_SOURCES) $(m32r_libsim_a_SOURCES) \
1218 $(nodist_m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \
1219 $(nodist_m68hc11_libsim_a_SOURCES) $(mcore_libsim_a_SOURCES) \
1220 $(nodist_mcore_libsim_a_SOURCES) \
1221 $(microblaze_libsim_a_SOURCES) \
1222 $(nodist_microblaze_libsim_a_SOURCES) $(mips_libsim_a_SOURCES) \
1223 $(nodist_mips_libsim_a_SOURCES) $(mn10300_libsim_a_SOURCES) \
1224 $(nodist_mn10300_libsim_a_SOURCES) $(moxie_libsim_a_SOURCES) \
1225 $(nodist_moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \
1226 $(nodist_msp430_libsim_a_SOURCES) $(or1k_libsim_a_SOURCES) \
1227 $(nodist_or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \
1228 $(nodist_pru_libsim_a_SOURCES) $(riscv_libsim_a_SOURCES) \
1229 $(nodist_riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \
1230 $(nodist_rl78_libsim_a_SOURCES) $(rx_libsim_a_SOURCES) \
1231 $(nodist_rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \
1232 $(nodist_sh_libsim_a_SOURCES) $(v850_libsim_a_SOURCES) \
1233 $(nodist_v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
7a59a0b9
MF		 1234 $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
1235 $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
1236 $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
1237 $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
1238 $(erc32_run_SOURCES) erc32/sis.c \
c0c25232
MF		 1239 $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
1240 $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
1241 $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
1242 $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \
1243 $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \
1244 $(igen_table_SOURCES) $(iq2000_run_SOURCES) \
1245 $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \
1246 $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \
1247 $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \
1248 $(microblaze_run_SOURCES) $(mips_run_SOURCES) \
1249 $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \
1250 $(msp430_run_SOURCES) $(or1k_run_SOURCES) ppc/psim.c \
1251 $(ppc_run_SOURCES) $(pru_run_SOURCES) $(riscv_run_SOURCES) \
1252 $(rl78_run_SOURCES) $(rx_run_SOURCES) $(sh_gencode_SOURCES) \
1253 $(sh_run_SOURCES) testsuite/common/alu-tst.c \
cb9bdc02
MF		 1254 testsuite/common/bits-gen.c testsuite/common/bits32m0.c \
1255 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
c0c25232
MF		 1256 testsuite/common/bits64m63.c testsuite/common/fpu-tst.c \
1257 $(v850_run_SOURCES)
6bddc3e8
MF		 1258RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \
1259 ctags-recursive dvi-recursive html-recursive info-recursive \
1260 install-data-recursive install-dvi-recursive \
1261 install-exec-recursive install-html-recursive \
1262 install-info-recursive install-pdf-recursive \
1263 install-ps-recursive install-recursive installcheck-recursive \
1264 installdirs-recursive pdf-recursive ps-recursive \
1265 tags-recursive uninstall-recursive
1266am__can_run_installinfo = \
1267 case $$AM_UPDATE_INFO_DIR in \
1268 n|no|NO) false;; \
1269 *) (install-info --version) >/dev/null 2>&1;; \
1270 esac
92bc001e
MF		 1271am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`;
1272am__vpath_adj = case $$p in \
1273 $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \
1274 *) f=$$p;; \
1275 esac;
1276am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`;
1277am__install_max = 40
1278am__nobase_strip_setup = \
1279 srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`
1280am__nobase_strip = \
1281 for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||"
1282am__nobase_list = $(am__nobase_strip_setup); \
1283 for p in $$list; do echo "$$p $$p"; done | \
1284 sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \
1285 $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \
1286 if (++n[$$2] == $(am__install_max)) \
1287 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
1288 END { for (dir in files) print dir, files[dir] }'
1289am__base_list = \
1290 sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \
1291 sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g'
1292am__uninstall_files_from_dir = { \
1293 test -z "$$files" \
1294 || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \
1295 || { echo " ( cd '$$dir' && rm -f" $$files ")"; \
1296 $(am__cd) "$$dir" && rm -f $$files; }; \
1297 }
94f5dfed
MF		 1298am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \
1299 "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \
1300 "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \
1301 "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"
1302DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \
1303 $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA)
ed939535
MF		 1304am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \
1305 $(srcroot)/include/sim/sim.h
92bc001e 1306HEADERS = $(pkginclude_HEADERS)
6bddc3e8
MF		 1307RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
1308 distclean-recursive maintainer-clean-recursive
1309am__recursive_targets = \
1310 $(RECURSIVE_TARGETS) \
1311 $(RECURSIVE_CLEAN_TARGETS) \
1312 $(am__extra_recursive_targets)
1313AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \
a389375f 1314 cscope check recheck
b15c5d7a
MF		 1315am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \
1316 $(LISP)config.h.in
6bddc3e8
MF		 1317# Read a list of newline-separated strings from the standard input,
1318# and print each of them once, without duplicates. Input order is
1319# *not* preserved.
1320am__uniquify_input = $(AWK) '\
1321 BEGIN { nonempty = 0; } \
1322 { items[$$0] = 1; nonempty = 1; } \
1323 END { if (nonempty) { for (i in items) print i; }; } \
1324'
1325# Make sure the list of sources is unique. This is necessary because,
1326# e.g., the same source file might be shared among _SOURCES variables
1327# for different programs/libraries.
1328am__define_uniq_tagged_files = \
1329 list='$(am__tagged_files)'; \
1330 unique=`for i in $$list; do \
1331 if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \
1332 done | $(am__uniquify_input)`
1333ETAGS = etags
1334CTAGS = ctags
1335CSCOPE = cscope
6c57b87f
MF		 1336DEJATOOL = $(PACKAGE)
1337RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir
1338EXPECT = expect
1339RUNTEST = runtest
a389375f
MF		 1340am__tty_colors_dummy = \
1341 mgn= red= grn= lgn= blu= brg= std=; \
1342 am__color_tests=no
1343am__tty_colors = { \
1344 $(am__tty_colors_dummy); \
1345 if test "X$(AM_COLOR_TESTS)" = Xno; then \
1346 am__color_tests=no; \
1347 elif test "X$(AM_COLOR_TESTS)" = Xalways; then \
1348 am__color_tests=yes; \
1349 elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \
1350 am__color_tests=yes; \
1351 fi; \
1352 if test $$am__color_tests = yes; then \
1353 red='\e[0;31m'; \
1354 grn='\e[0;32m'; \
1355 lgn='\e[1;32m'; \
1356 blu='\e[1;34m'; \
1357 mgn='\e[0;35m'; \
1358 brg='\e[1m'; \
1359 std='\e[m'; \
1360 fi; \
1361}
a389375f
MF		 1362am__recheck_rx = ^[ ]*:recheck:[ ]*
1363am__global_test_result_rx = ^[ ]*:global-test-result:[ ]*
1364am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]*
1365# A command that, given a newline-separated list of test names on the
1366# standard input, print the name of the tests that are to be re-run
1367# upon "make recheck".
1368am__list_recheck_tests = $(AWK) '{ \
1369 recheck = 1; \
1370 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1371 { \
1372 if (rc < 0) \
1373 { \
1374 if ((getline line2 < ($$0 ".log")) < 0) \
1375 recheck = 0; \
1376 break; \
1377 } \
1378 else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \
1379 { \
1380 recheck = 0; \
1381 break; \
1382 } \
1383 else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \
1384 { \
1385 break; \
1386 } \
1387 }; \
1388 if (recheck) \
1389 print $$0; \
1390 close ($$0 ".trs"); \
1391 close ($$0 ".log"); \
1392}'
1393# A command that, given a newline-separated list of test names on the
1394# standard input, create the global log from their .trs and .log files.
1395am__create_global_log = $(AWK) ' \
1396function fatal(msg) \
1397{ \
1398 print "fatal: making $@: " msg | "cat >&2"; \
1399 exit 1; \
1400} \
1401function rst_section(header) \
1402{ \
1403 print header; \
1404 len = length(header); \
1405 for (i = 1; i <= len; i = i + 1) \
1406 printf "="; \
1407 printf "\n\n"; \
1408} \
1409{ \
1410 copy_in_global_log = 1; \
1411 global_test_result = "RUN"; \
1412 while ((rc = (getline line < ($$0 ".trs"))) != 0) \
1413 { \
1414 if (rc < 0) \
1415 fatal("failed to read from " $$0 ".trs"); \
1416 if (line ~ /$(am__global_test_result_rx)/) \
1417 { \
1418 sub("$(am__global_test_result_rx)", "", line); \
1419 sub("[ ]*$$", "", line); \
1420 global_test_result = line; \
1421 } \
1422 else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \
1423 copy_in_global_log = 0; \
1424 }; \
1425 if (copy_in_global_log) \
1426 { \
1427 rst_section(global_test_result ": " $$0); \
1428 while ((rc = (getline line < ($$0 ".log"))) != 0) \
1429 { \
1430 if (rc < 0) \
1431 fatal("failed to read from " $$0 ".log"); \
1432 print line; \
1433 }; \
1434 printf "\n"; \
1435 }; \
1436 close ($$0 ".trs"); \
1437 close ($$0 ".log"); \
1438}'
1439# Restructured Text title.
1440am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; }
1441# Solaris 10 'make', and several other traditional 'make' implementations,
1442# pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it
1443# by disabling -e (using the XSI extension "set +e") if it's set.
1444am__sh_e_setup = case $$- in *e*) set +e;; esac
1445# Default flags passed to test drivers.
1446am__common_driver_flags = \
1447 --color-tests "$$am__color_tests" \
1448 --enable-hard-errors "$$am__enable_hard_errors" \
1449 --expect-failure "$$am__expect_failure"
1450# To be inserted before the command running the test. Creates the
1451# directory for the log if needed. Stores in $dir the directory
1452# containing $f, in $tst the test, in $log the log. Executes the
1453# developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and
1454# passes TESTS_ENVIRONMENT. Set up options for the wrapper that
1455# will run the test scripts (or their associated LOG_COMPILER, if
1456# thy have one).
1457am__check_pre = \
1458$(am__sh_e_setup); \
1459$(am__vpath_adj_setup) $(am__vpath_adj) \
1460$(am__tty_colors); \
1461srcdir=$(srcdir); export srcdir; \
1462case "$@" in \
1463 */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \
1464 *) am__odir=.;; \
1465esac; \
1466test "x$$am__odir" = x"." || test -d "$$am__odir" \
1467 || $(MKDIR_P) "$$am__odir" || exit $$?; \
1468if test -f "./$$f"; then dir=./; \
1469elif test -f "$$f"; then dir=; \
1470else dir="$(srcdir)/"; fi; \
1471tst=$$dir$$f; log='$@'; \
1472if test -n '$(DISABLE_HARD_ERRORS)'; then \
1473 am__enable_hard_errors=no; \
1474else \
1475 am__enable_hard_errors=yes; \
1476fi; \
1477case " $(XFAIL_TESTS) " in \
1478 *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \
1479 am__expect_failure=yes;; \
1480 *) \
1481 am__expect_failure=no;; \
1482esac; \
1483$(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT)
1484# A shell command to get the names of the tests scripts with any registered
1485# extension removed (i.e., equivalently, the names of the test logs, with
1486# the '.log' extension removed). The result is saved in the shell variable
1487# '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly,
1488# we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)",
1489# since that might cause problem with VPATH rewrites for suffix-less tests.
1490# See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'.
1491am__set_TESTS_bases = \
1492 bases='$(TEST_LOGS)'; \
1493 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
1494 bases=`echo $$bases`
1495RECHECK_LOGS = $(TEST_LOGS)
1496TEST_SUITE_LOG = test-suite.log
1497TEST_EXTENSIONS = @EXEEXT@ .test
1498LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1499LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS)
1500am__set_b = \
1501 case '$@' in \
1502 */*) \
1503 case '$*' in \
1504 */*) b='$*';; \
1505 *) b=`echo '$@' | sed 's/\.log$$//'`; \
1506 esac;; \
1507 *) \
1508 b='$*';; \
1509 esac
1510am__test_logs1 = $(TESTS:=.log)
1511am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log)
1512TEST_LOGS = $(am__test_logs2:.test.log=.log)
1513TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver
1514TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \
1515 $(TEST_LOG_FLAGS)
6bddc3e8
MF		 1516DIST_SUBDIRS = $(SUBDIRS)
1517ACLOCAL = @ACLOCAL@
1518AMTAR = @AMTAR@
1519AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@
1520AR = @AR@
aa0fca16 1521AR_FOR_BUILD = @AR_FOR_BUILD@
dc4e1fde 1522AS_FOR_TARGET = @AS_FOR_TARGET@
8996c210
MF		 1523AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@
1524AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@
1525AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@
1526AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@
1527AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@
1528AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@
1529AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@
1530AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@
1531AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@
1532AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@
1533AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@
1534AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@
1535AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@
1536AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@
1537AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@
1538AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@
1539AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@
1540AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@
1541AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@
1542AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@
1543AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@
1544AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@
1545AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@
1546AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@
1547AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@
1548AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@
1549AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@
1550AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@
1551AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@
1552AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@
1553AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@
1554AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@
6bddc3e8
MF		 1555AUTOCONF = @AUTOCONF@
1556AUTOHEADER = @AUTOHEADER@
1557AUTOMAKE = @AUTOMAKE@
1558AWK = @AWK@
1559CC = @CC@
1560CCDEPMODE = @CCDEPMODE@
1561CC_FOR_BUILD = @CC_FOR_BUILD@
dc4e1fde 1562CC_FOR_TARGET = @CC_FOR_TARGET@
8996c210
MF		 1563CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@
1564CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@
1565CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@
1566CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@
1567CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@
1568CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@
1569CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@
1570CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@
1571CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@
1572CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@
1573CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@
1574CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@
1575CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@
1576CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@
1577CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@
1578CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@
1579CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@
1580CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@
1581CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@
1582CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@
1583CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@
1584CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@
1585CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@
1586CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@
1587CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@
1588CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@
1589CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@
1590CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@
1591CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@
1592CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@
1593CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@
1594CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@
6bddc3e8
MF		 1595CFLAGS = @CFLAGS@
1596CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
1bf5c342 1597CGEN_MAINT = @CGEN_MAINT@
6bddc3e8
MF		 1598CPP = @CPP@
1599CPPFLAGS = @CPPFLAGS@
fde7c6bf 1600CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
6bddc3e8 1601CYGPATH_W = @CYGPATH_W@
c2783492 1602C_DIALECT = @C_DIALECT@
6bddc3e8
MF		 1603DEFS = @DEFS@
1604DEPDIR = @DEPDIR@
b5689863 1605DSYMUTIL = @DSYMUTIL@
a979f2a0 1606DTC = @DTC@
b5689863 1607DUMPBIN = @DUMPBIN@
6bddc3e8
MF		 1608ECHO_C = @ECHO_C@
1609ECHO_N = @ECHO_N@
1610ECHO_T = @ECHO_T@
c2783492 1611EGREP = @EGREP@
6bddc3e8 1612EXEEXT = @EXEEXT@
b5689863 1613FGREP = @FGREP@
c2783492 1614GREP = @GREP@
111b1cf9 1615IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@
6bddc3e8
MF		 1616INSTALL = @INSTALL@
1617INSTALL_DATA = @INSTALL_DATA@
1618INSTALL_PROGRAM = @INSTALL_PROGRAM@
1619INSTALL_SCRIPT = @INSTALL_SCRIPT@
1620INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@
b5689863 1621LD = @LD@
6bddc3e8 1622LDFLAGS = @LDFLAGS@
c2783492 1623LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
dc4e1fde 1624LD_FOR_TARGET = @LD_FOR_TARGET@
8996c210
MF		 1625LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@
1626LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@
1627LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@
1628LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@
1629LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@
1630LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@
1631LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@
1632LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@
1633LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@
1634LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@
1635LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@
1636LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@
1637LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@
1638LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@
1639LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@
1640LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@
1641LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@
1642LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@
1643LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@
1644LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@
1645LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@
1646LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@
1647LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@
1648LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@
1649LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@
1650LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@
1651LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@
1652LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@
1653LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@
1654LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@
1655LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@
1656LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@
6bddc3e8
MF		 1657LIBOBJS = @LIBOBJS@
1658LIBS = @LIBS@
b5689863
MF		 1659LIBTOOL = @LIBTOOL@
1660LIPO = @LIPO@
1661LN_S = @LN_S@
6bddc3e8 1662LTLIBOBJS = @LTLIBOBJS@
8c379db2 1663MAINT = @MAINT@
6bddc3e8
MF		 1664MAKEINFO = @MAKEINFO@
1665MKDIR_P = @MKDIR_P@
b5689863
MF		 1666NM = @NM@
1667NMEDIT = @NMEDIT@
1668OBJDUMP = @OBJDUMP@
6bddc3e8 1669OBJEXT = @OBJEXT@
b5689863
MF		 1670OTOOL = @OTOOL@
1671OTOOL64 = @OTOOL64@
6bddc3e8
MF		 1672PACKAGE = @PACKAGE@
1673PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@
1674PACKAGE_NAME = @PACKAGE_NAME@
1675PACKAGE_STRING = @PACKAGE_STRING@
1676PACKAGE_TARNAME = @PACKAGE_TARNAME@
1677PACKAGE_URL = @PACKAGE_URL@
1678PACKAGE_VERSION = @PACKAGE_VERSION@
1679PATH_SEPARATOR = @PATH_SEPARATOR@
6dd65fc0 1680PKGVERSION = @PKGVERSION@
d57b6533
MF		 1681PKG_CONFIG = @PKG_CONFIG@
1682PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@
1683PKG_CONFIG_PATH = @PKG_CONFIG_PATH@
6bddc3e8 1684RANLIB = @RANLIB@
aa0fca16 1685RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
5d0b3088
MF		 1686READLINE_CFLAGS = @READLINE_CFLAGS@
1687READLINE_LIB = @READLINE_LIB@
6dd65fc0
MF		 1688REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@
1689REPORT_BUGS_TO = @REPORT_BUGS_TO@
d57b6533
MF		 1690SDL_CFLAGS = @SDL_CFLAGS@
1691SDL_LIBS = @SDL_LIBS@
b5689863 1692SED = @SED@
6bddc3e8
MF		 1693SET_MAKE = @SET_MAKE@
1694SHELL = @SHELL@
2ba09f42 1695SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@
408a44aa 1696SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@
682a2a82
MF		 1697SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
1698SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
d73f39ee 1699SIM_INLINE = @SIM_INLINE@
19b11256 1700SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@
d455df98 1701SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@
abc494c6 1702SIM_MIPS_GEN = @SIM_MIPS_GEN@
4c45662c 1703SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@
abc494c6 1704SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
abc494c6
MF		 1705SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
1706SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
1707SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
07f60ed8 1708SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
2d5700ad 1709SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@
a0e674c1 1710SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
1787fcc4 1711SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
e173c80f 1712SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
8996c210 1713SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
6bddc3e8 1714STRIP = @STRIP@
5d0b3088 1715TERMCAP_LIB = @TERMCAP_LIB@
6bddc3e8 1716VERSION = @VERSION@
47ce766a
MF		 1717WARN_CFLAGS = @WARN_CFLAGS@
1718WERROR_CFLAGS = @WERROR_CFLAGS@
6bddc3e8 1719abs_builddir = @abs_builddir@
5e25901f 1720abs_srcdir = @abs_srcdir@
6bddc3e8
MF		 1721abs_top_builddir = @abs_top_builddir@
1722abs_top_srcdir = @abs_top_srcdir@
1723ac_ct_CC = @ac_ct_CC@
b5689863 1724ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
6bddc3e8
MF		 1725am__include = @am__include@
1726am__leading_dot = @am__leading_dot@
1727am__quote = @am__quote@
1728am__tar = @am__tar@
1729am__untar = @am__untar@
1730bindir = @bindir@
1731build = @build@
1732build_alias = @build_alias@
1733build_cpu = @build_cpu@
1734build_os = @build_os@
1735build_vendor = @build_vendor@
1736builddir = @builddir@
1bf5c342
MF		 1737cgen = @cgen@
1738cgendir = @cgendir@
6bddc3e8
MF		 1739datadir = @datadir@
1740datarootdir = @datarootdir@
1741docdir = @docdir@
1742dvidir = @dvidir@
c906108c 1743exec_prefix = @exec_prefix@
6bddc3e8 1744host = @host@
c906108c 1745host_alias = @host_alias@
6bddc3e8
MF		 1746host_cpu = @host_cpu@
1747host_os = @host_os@
1748host_vendor = @host_vendor@
1749htmldir = @htmldir@
1750includedir = @includedir@
1751infodir = @infodir@
1752install_sh = @install_sh@
c906108c 1753libdir = @libdir@
6bddc3e8
MF		 1754libexecdir = @libexecdir@
1755localedir = @localedir@
1756localstatedir = @localstatedir@
c906108c 1757mandir = @mandir@
6bddc3e8
MF		 1758mkdir_p = @mkdir_p@
1759oldincludedir = @oldincludedir@
1760pdfdir = @pdfdir@
1761prefix = @prefix@
1762program_transform_name = @program_transform_name@
1763psdir = @psdir@
1764sbindir = @sbindir@
1765sharedstatedir = @sharedstatedir@
1766srcdir = @srcdir@
1767subdirs = @subdirs@
1768sysconfdir = @sysconfdir@
1769target = @target@
1770target_alias = @target_alias@
1771target_cpu = @target_cpu@
1772target_os = @target_os@
1773target_vendor = @target_vendor@
1774top_build_prefix = @top_build_prefix@
1775top_builddir = @top_builddir@
1776top_srcdir = @top_srcdir@
6c57b87f 1777AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
c2783492 1778ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
46a1e1f2 1779GNULIB_PARENT_DIR = ..
0a129eb1 1780srccom = $(srcdir)/common
6bddc3e8 1781srcroot = $(srcdir)/..
fd95c73e 1782SUBDIRS = @subdirs@
fb2c495f 1783pkginclude_HEADERS = $(am__append_1)
9a7472d7
MF		 1784EXTRA_LIBRARIES = igen/libigen.a
1785noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_5) \
1786 $(am__append_7) $(am__append_9) $(am__append_11) \
1787 $(am__append_15) $(am__append_20) $(am__append_25) \
1788 $(am__append_30) $(am__append_34) $(am__append_36) \
1789 $(am__append_40) $(am__append_42) $(am__append_44) \
1790 $(am__append_48) $(am__append_52) $(am__append_56) \
1791 $(am__append_60) $(am__append_64) $(am__append_66) \
1792 $(am__append_71) $(am__append_79) $(am__append_83) \
1793 $(am__append_85) $(am__append_87) $(am__append_93) \
1794 $(am__append_95) $(am__append_97) $(am__append_99) \
1795 $(am__append_101) $(am__append_106)
1796BUILT_SOURCES = $(am__append_13) $(am__append_17) $(am__append_23) \
1797 $(am__append_27) $(am__append_38) $(am__append_46) \
1798 $(am__append_50) $(am__append_58) $(am__append_73) \
1799 $(am__append_81) $(am__append_89) $(am__append_103) \
1800 $(am__append_108)
015f7b74
MF		 1801CLEANFILES = common/version.c common/version.c-stamp \
1802 testsuite/common/bits-gen testsuite/common/bits32m0.c \
a389375f
MF		 1803 testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
1804 testsuite/common/bits64m63.c
9a7472d7 1805DISTCLEANFILES = $(am__append_78)
bc438b3e 1806MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \
49444fea
MF		 1807 $(SIM_ENABLED_ARCHES:%=%/hw-config.h) \
1808 $(SIM_ENABLED_ARCHES:%=%/stamp-hw) \
1b907fc0 1809 $(SIM_ENABLED_ARCHES:%=%/modules.c) \
9a7472d7
MF		 1810 $(SIM_ENABLED_ARCHES:%=%/stamp-modules) $(igen_IGEN_TOOLS) \
1811 site-sim-config.exp testrun.log testrun.sum $(am__append_14) \
1812 $(am__append_19) $(am__append_24) $(am__append_29) \
1813 $(am__append_39) $(am__append_47) $(am__append_51) \
1814 $(am__append_55) $(am__append_59) $(am__append_63) \
1815 $(am__append_77) $(am__append_82) $(am__append_90) \
1816 $(am__append_105) $(am__append_109)
bc438b3e
MF		 1817AM_CFLAGS = \
1818 $(WERROR_CFLAGS) \
1819 $(WARN_CFLAGS) \
1820 $(AM_CFLAGS_$(subst -,_,$(@D))) \
1821 $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F)))
1822
1823AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \
1824 -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \
1825 $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \
1826 -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD
bfc96c10
MF		 1827AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \
1828 $(SIM_INLINE) -I$(srcdir)/common
fde7c6bf 1829COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD)
c2783492 1830LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
9a7472d7 1831SIM_ALL_RECURSIVE_DEPS = $(am__append_91)
63bf33ff 1832SIM_INSTALL_DATA_LOCAL_DEPS =
9a7472d7
MF		 1833SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_32)
1834SIM_UNINSTALL_LOCAL_DEPS = $(am__append_33)
b36a89d1
MF		 1835SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=)
1836SIM_COMPILE = \
1837 $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \
1838 $(am__mv) $(SIM_DEPBASE).Tpo $(SIM_DEPBASE).Po
1839
bc438b3e 1840AM_CPPFLAGS_common = -DSIM_COMMON_BUILD
5bea0c32 1841common_libcommon_a_SOURCES = \
cd3ee89d 1842 common/callback.c \
ad9cc209 1843 common/portability.c \
dd8e16ea 1844 common/sim-load.c \
66882204 1845 common/syscall.c \
a7e40a99 1846 common/target-newlib-errno.c \
670817b9 1847 common/target-newlib-open.c \
88c8370b 1848 common/target-newlib-signal.c \
64ae70dd 1849 common/target-newlib-syscall.c \
5bea0c32
MF		 1850 common/version.c
1851
d47ea1b9
MF		 1852SIM_COMMON_HW_OBJS = \
1853 hw-alloc.o \
1854 hw-base.o \
1855 hw-device.o \
1856 hw-events.o \
1857 hw-handles.o \
1858 hw-instances.o \
1859 hw-ports.o \
1860 hw-properties.o \
1861 hw-tree.o \
1862 sim-hw.o
1863
1864SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \
1865 sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \
1866 sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \
1867 sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \
1868 sim-options.o sim-profile.o sim-reason.o sim-reg.o \
1869 sim-signal.o sim-stop.o sim-syscall.o sim-trace.o sim-utils.o \
1870 sim-watch.o $(am__append_2)
1871SIM_HW_DEVICES = cfi core pal glue
437eeee9
MF		 1872am_arch_d = $(subst -,_,$(@D))
1873GEN_MODULES_C_SRCS = \
1874 $(wildcard \
54e26255
MF		 1875 $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \
1876 $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \
1877 $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD))))
437eeee9 1878
c0c25232
MF		 1879LIBIBERTY_LIB = ../libiberty/libiberty.a
1880BFD_LIB = ../bfd/libbfd.la
1881OPCODES_LIB = ../opcodes/libopcodes.la
1882SIM_COMMON_LIBS = \
c0c25232
MF		 1883 $(BFD_LIB) \
1884 $(OPCODES_LIB) \
1885 $(LIBIBERTY_LIB) \
1886 $(LIBGNU) \
1887 $(LIBGNU_EXTRA_LIBS)
1888
93b937c9
MF		 1889GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
1890CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
1891CGENFLAGS = -v
1892CGEN_CPU_DIR = $(cgendir)/cpu
1893CPU_DIR = $(srcroot)/cpu
1894CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
1895CGEN_READ_SCM = $(cgendir)/sim.scm
1896CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
1897CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
1898CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
1899CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
1900CGEN_CPU_EXTR = /extr/
1901CGEN_CPU_READ = /read/
1902CGEN_CPU_WRITE = /write/
1903CGEN_CPU_SEM = /sem/
1904CGEN_CPU_SEMSW = /semsw/
1905CGEN_WRAPPER = $(srccom)/cgen.sh
1906CGEN_GEN_ARCH = \
1907 $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
1908 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1909 $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
1910 $(CGEN_ARCHFILE) ignored
1911
1912CGEN_GEN_CPU = \
1913 $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
1914 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1915 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1916 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1917
1918CGEN_GEN_DEFS = \
1919 $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
1920 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1921 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1922 $(CGEN_ARCHFILE) ignored
1923
1924CGEN_GEN_DECODE = \
1925 $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
1926 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1927 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1928 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1929
1930CGEN_GEN_CPU_DECODE = \
1931 $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
1932 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1933 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1934 $(CGEN_ARCHFILE) "$$EXTRAFILES"
1935
1936CGEN_GEN_CPU_DESC = \
1937 $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
1938 $(CGEN) $(cgendir) "$(CGENFLAGS)" \
1939 $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
1940 $(CGEN_ARCHFILE) ignored $$opcfile
1941
d2a5dbc7
MF		 1942
1943# igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable
1944# leak detection while running it.
9a7472d7
MF		 1945IGEN = igen/igen$(EXEEXT)
1946IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP)
1947igen_libigen_a_SOURCES = \
1948 igen/table.c \
1949 igen/lf.c \
1950 igen/misc.c \
1951 igen/filter_host.c \
1952 igen/ld-decode.c \
1953 igen/ld-cache.c \
1954 igen/filter.c \
1955 igen/ld-insn.c \
1956 igen/gen-model.c \
1957 igen/gen-itable.c \
1958 igen/gen-icache.c \
1959 igen/gen-semantics.c \
1960 igen/gen-idecode.c \
1961 igen/gen-support.c \
1962 igen/gen-engine.c \
1963 igen/gen.c
1964
1965igen_igen_SOURCES = igen/igen.c
1966igen_igen_LDADD = igen/libigen.a
1967igen_filter_SOURCES =
1968igen_filter_LDADD = igen/filter-main.o igen/libigen.a
1969igen_gen_SOURCES =
1970igen_gen_LDADD = igen/gen-main.o igen/libigen.a
1971igen_ld_cache_SOURCES =
1972igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a
1973igen_ld_decode_SOURCES =
1974igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a
1975igen_ld_insn_SOURCES =
1976igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a
1977igen_table_SOURCES =
1978igen_table_LDADD = igen/table-main.o igen/libigen.a
1979igen_IGEN_TOOLS = \
1980 $(IGEN) \
1981 igen/filter \
1982 igen/gen \
1983 igen/ld-cache \
1984 igen/ld-decode \
1985 igen/ld-insn \
1986 igen/table
b6b1c790 1987
e1e1ae6e 1988EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp
5ec501b5
MF		 1989
1990# Custom verbose test variables that automake doesn't provide (yet?).
1991AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@)
1992AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@)
804de1fa 1993AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*";
5ec501b5 1994AM_V_RUNTEST_1 =
804de1fa
MF		 1995DO_RUNTEST = \
1996 LC_ALL=C; export LC_ALL; \
1997 EXPECT=${EXPECT} ; export EXPECT ; \
1998 runtest=$(RUNTEST); \
1999 $$runtest $(RUNTESTFLAGS)
2000
a389375f
MF		 2001testsuite_common_CPPFLAGS = \
2002 -I$(srcdir)/common \
0d315c88
DD		 2003 -I$(srcroot)/include \
2004 -I../bfd
a389375f 2005
72be276f
MF		 2006@SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_SOURCES = \
2007@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.c
2008
eac2fbdc
MF		 2009@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES = \
2010@SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_SOURCES)
2011
c58353b7 2012@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \
c58353b7
MF		 2013@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \
2014@SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \
2015@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \
2016@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \
2017@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \
c58353b7
MF		 2018@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \
2019@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o
2020
c0c25232
MF		 2021@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES =
2022@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \
2023@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \
2024@SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \
2025@SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS)
2026
688fba23 2027@SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET
72be276f
MF		 2028@SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_SOURCES = \
2029@SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.c
2030
eac2fbdc
MF		 2031@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES = \
2032@SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_SOURCES)
2033
6a8e18f0 2034@SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \
6a8e18f0
MF		 2035@SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \
2036@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \
2037@SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \
2038@SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o \
2039@SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \
2040@SIM_ENABLE_ARCH_arm_TRUE@ arm/armvirt.o arm/thumbemu.o \
72be276f 2041@SIM_ENABLE_ARCH_arm_TRUE@ arm/armcopro.o arm/maverick.o arm/iwmmxt.o
6a8e18f0 2042
c0c25232
MF		 2043@SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES =
2044@SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \
2045@SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \
2046@SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \
2047@SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS)
2048
ed939535
MF		 2049@SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm
2050@SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README
72be276f
MF		 2051@SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_SOURCES = \
2052@SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.c
2053
eac2fbdc
MF		 2054@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = \
2055@SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_SOURCES)
2056
c65b31b8 2057@SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \
c65b31b8
MF		 2058@SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \
2059@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \
2060@SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \
c65b31b8
MF		 2061@SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o
2062
c0c25232
MF		 2063@SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES =
2064@SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \
2065@SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \
2066@SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \
2067@SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS)
2068
a8e175e5 2069@SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS)
72be276f
MF		 2070@SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_SOURCES = \
2071@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.c
2072
eac2fbdc
MF		 2073@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES = \
2074@SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_SOURCES)
2075
bc1dd618 2076@SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \
bc1dd618
MF		 2077@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \
2078@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \
2079@SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \
2080@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o \
2081@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/devices.o \
2082@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o \
2083@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/interp.o \
2084@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o \
bc1dd618
MF		 2085@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o
2086
c0c25232
MF		 2087@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES =
2088@SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \
2089@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \
2090@SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \
2091@SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS)
2092
3d042117
MF		 2093@SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \
2094@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \
2095@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \
2096@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \
2097@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \
2098@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \
2099@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \
2100@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \
2101@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \
2102@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \
2103@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \
2104@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \
2105@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \
2106@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \
2107@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \
2108@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \
2109@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \
2110@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \
2111@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \
2112@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \
2113@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \
2114@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \
2115@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \
2116@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \
2117@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \
2118@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \
2119@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \
2120@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \
2121@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \
2122@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \
2123@SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \
2124@SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy
2125
75015a12
MF		 2126@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64
2127@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE
2128@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE
2129@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE
2130@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE
2131@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE
2132@SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE
72be276f
MF		 2133@SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_SOURCES = \
2134@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.c
2135
eac2fbdc
MF		 2136@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = \
2137@SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_SOURCES)
2138
cdbb77e4 2139@SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \
cdbb77e4
MF		 2140@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \
2141@SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \
cdbb77e4
MF		 2142@SIM_ENABLE_ARCH_bpf_TRUE@ \
2143@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \
2144@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \
2145@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \
2146@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \
2147@SIM_ENABLE_ARCH_bpf_TRUE@ \
2148@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \
2149@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \
2150@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \
2151@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \
2152@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \
2153@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \
2154@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \
2155@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \
2156@SIM_ENABLE_ARCH_bpf_TRUE@ \
2157@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \
2158@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \
2159@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \
2160@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o
2161
c0c25232
MF		 2162@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES =
2163@SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \
2164@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \
2165@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \
2166@SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS)
2167
0a129eb1 2168@SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
0a129eb1
MF		 2169@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \
2170@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \
0a129eb1
MF		 2171@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \
2172@SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be
2173
72be276f
MF		 2174@SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_SOURCES = \
2175@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.c
2176
eac2fbdc
MF		 2177@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES = \
2178@SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_SOURCES)
2179
2cbdcc34 2180@SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \
2cbdcc34
MF		 2181@SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \
2182@SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \
2183@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o \
2cbdcc34
MF		 2184@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o \
2185@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o \
2186@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o
2187
c0c25232
MF		 2188@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES =
2189@SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \
2190@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \
2191@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \
2192@SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS)
2193
70ab6bdd
MF		 2194@SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
2195@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \
70ab6bdd
MF		 2196@SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c
2197
2198@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
2199@SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
72be276f
MF		 2200@SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_SOURCES = \
2201@SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.c
2202
eac2fbdc
MF		 2203@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES = \
2204@SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_SOURCES)
2205
eaa678ec 2206@SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \
eaa678ec
MF		 2207@SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \
2208@SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \
2209@SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \
eaa678ec
MF		 2210@SIM_ENABLE_ARCH_cris_TRUE@ \
2211@SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o \
2212@SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \
2213@SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o \
2214@SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-utils.o \
2215@SIM_ENABLE_ARCH_cris_TRUE@ \
2216@SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o \
2217@SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv10f.o \
2218@SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o \
2219@SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev10.o \
2220@SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o \
2221@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.o \
2222@SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o \
2223@SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv32.o \
2224@SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o \
2225@SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv32.o \
2226@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o \
2227@SIM_ENABLE_ARCH_cris_TRUE@ \
2228@SIM_ENABLE_ARCH_cris_TRUE@ cris/sim-if.o \
2229@SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o
2230
c0c25232
MF		 2231@SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES =
2232@SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \
2233@SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \
2234@SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \
2235@SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS)
2236
3d042117 2237@SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx
cb9bdc02
MF		 2238@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c
2239@SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB)
0a129eb1 2240@SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
0a129eb1
MF		 2241@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \
2242@SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \
0a129eb1
MF		 2243@SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \
2244@SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f
2245
72be276f
MF		 2246@SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_SOURCES = \
2247@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.c
2248
eac2fbdc
MF		 2249@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES = \
2250@SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_SOURCES)
2251
faf177df 2252@SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \
faf177df
MF		 2253@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o \
2254@SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \
2255@SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \
2256@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o \
faf177df
MF		 2257@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o \
2258@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o \
2259@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o
2260
c0c25232
MF		 2261@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES =
2262@SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \
2263@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \
2264@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \
2265@SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS)
2266
70ab6bdd
MF		 2267@SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
2268@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \
70ab6bdd
MF		 2269@SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c
2270
2271@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
2272@SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
304195bc
MF		 2273@SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline
2274@SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \
2275@SIM_ENABLE_ARCH_erc32_TRUE@ -DFAST_UART
72be276f
MF		 2276@SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_SOURCES = \
2277@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.c
2278
eac2fbdc
MF		 2279@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES = \
2280@SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_SOURCES)
2281
3f6c63ac 2282@SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \
3f6c63ac
MF		 2283@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o \
2284@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/exec.o \
2285@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o \
2286@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/func.o \
2287@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o \
72be276f 2288@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/interf.o
3f6c63ac 2289
c0c25232
MF		 2290@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES =
2291@SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \
2292@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \
2293@SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \
2294@SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB)
2295
ed939535
MF		 2296@SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32
2297@SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis
72be276f
MF		 2298@SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_SOURCES = \
2299@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.c
2300
eac2fbdc
MF		 2301@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES = \
2302@SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES)
2303
16a6d542 2304@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \
16a6d542
MF		 2305@SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \
2306@SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \
2307@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \
16a6d542
MF		 2308@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \
2309@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o
2310
c0c25232
MF		 2311@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES =
2312@SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \
2313@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \
2314@SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \
2315@SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS)
2316
5ea1eaea
MF		 2317@SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS)
2318@SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error
2319@SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error
72be276f
MF		 2320@SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES = \
2321@SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.c
2322
eac2fbdc
MF		 2323@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES = \
2324@SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_SOURCES)
2325
c26946a4 2326@SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \
c26946a4
MF		 2327@SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \
2328@SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \
c26946a4
MF		 2329@SIM_ENABLE_ARCH_frv_TRUE@ \
2330@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o \
2331@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o \
2332@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o \
2333@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o \
2334@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o \
2335@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o \
2336@SIM_ENABLE_ARCH_frv_TRUE@ \
2337@SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o \
2338@SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o \
2339@SIM_ENABLE_ARCH_frv_TRUE@ frv/cpu.o \
2340@SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o \
2341@SIM_ENABLE_ARCH_frv_TRUE@ frv/frv.o \
2342@SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.o \
2343@SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o \
2344@SIM_ENABLE_ARCH_frv_TRUE@ frv/sem.o \
2345@SIM_ENABLE_ARCH_frv_TRUE@ \
2346@SIM_ENABLE_ARCH_frv_TRUE@ frv/cache.o \
2347@SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o \
2348@SIM_ENABLE_ARCH_frv_TRUE@ frv/memory.o \
2349@SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o \
2350@SIM_ENABLE_ARCH_frv_TRUE@ frv/pipeline.o \
2351@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o \
2352@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr400.o \
2353@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \
2354@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \
2355@SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o \
2356@SIM_ENABLE_ARCH_frv_TRUE@ frv/registers.o \
2357@SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o \
2358@SIM_ENABLE_ARCH_frv_TRUE@ frv/sim-if.o \
2359@SIM_ENABLE_ARCH_frv_TRUE@ frv/traps.o
2360
c0c25232
MF		 2361@SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES =
2362@SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \
2363@SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \
2364@SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \
2365@SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS)
2366
ed939535
MF		 2367@SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv
2368@SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README
0a129eb1 2369@SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
0a129eb1
MF		 2370@SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \
2371@SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop
2372
72be276f
MF		 2373@SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_SOURCES = \
2374@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.c
2375
eac2fbdc
MF		 2376@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES = \
2377@SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_SOURCES)
2378
6fe4bd8c 2379@SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \
6fe4bd8c
MF		 2380@SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \
2381@SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \
2382@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o \
6fe4bd8c
MF		 2383@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o
2384
c0c25232
MF		 2385@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES =
2386@SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \
2387@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \
2388@SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \
2389@SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS)
2390
72be276f
MF		 2391@SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_SOURCES = \
2392@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.c
2393
eac2fbdc
MF		 2394@SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES = \
2395@SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_SOURCES)
2396
3e9c9407 2397@SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \
3e9c9407
MF		 2398@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o \
2399@SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \
2400@SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \
3e9c9407
MF		 2401@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o
2402
c0c25232
MF		 2403@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES =
2404@SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \
2405@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \
2406@SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \
2407@SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS)
2408
72be276f
MF		 2409@SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_SOURCES = \
2410@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.c
2411
eac2fbdc
MF		 2412@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES = \
2413@SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_SOURCES)
2414
1486f22b 2415@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \
1486f22b
MF		 2416@SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \
2417@SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \
1486f22b
MF		 2418@SIM_ENABLE_ARCH_iq2000_TRUE@ \
2419@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \
2420@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \
2421@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \
2422@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o \
2423@SIM_ENABLE_ARCH_iq2000_TRUE@ \
2424@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/arch.o \
2425@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o \
2426@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/decode.o \
2427@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o \
2428@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sem.o \
2429@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o \
2430@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/model.o \
2431@SIM_ENABLE_ARCH_iq2000_TRUE@ \
2432@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o
2433
c0c25232
MF		 2434@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES =
2435@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \
2436@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \
2437@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \
2438@SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS)
2439
0a129eb1 2440@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
0a129eb1
MF		 2441@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \
2442@SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop
2443
72be276f
MF		 2444@SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_SOURCES = \
2445@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.c
2446
eac2fbdc
MF		 2447@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = \
2448@SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_SOURCES)
2449
000f7bee 2450@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \
000f7bee
MF		 2451@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \
2452@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \
2453@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \
000f7bee
MF		 2454@SIM_ENABLE_ARCH_lm32_TRUE@ \
2455@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o \
2456@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \
2457@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o \
2458@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-utils.o \
2459@SIM_ENABLE_ARCH_lm32_TRUE@ \
2460@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o \
2461@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cpu.o \
2462@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o \
2463@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sem.o \
2464@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o \
2465@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/model.o \
2466@SIM_ENABLE_ARCH_lm32_TRUE@ \
2467@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o \
2468@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sim-if.o \
2469@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o \
2470@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/user.o
2471
c0c25232
MF		 2472@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES =
2473@SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \
2474@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \
2475@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \
2476@SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS)
2477
3d042117 2478@SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart
0a129eb1 2479@SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
0a129eb1
MF		 2480@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \
2481@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop
2482
cd7aa217 2483@SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A
72be276f
MF		 2484@SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_SOURCES = \
2485@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.c
2486
eac2fbdc
MF		 2487@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES = \
2488@SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_SOURCES)
2489
ba3a8498 2490@SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \
ba3a8498
MF		 2491@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o \
2492@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o \
2493@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o \
2494@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.o \
2495@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o \
2496@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o \
ba3a8498
MF		 2497@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o \
2498@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o \
2499@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o \
2500@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o \
2501@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o
2502
c0c25232
MF		 2503@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES =
2504@SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \
2505@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \
2506@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \
2507@SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS)
2508
70ab6bdd
MF		 2509@SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
2510@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \
2511@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \
2512@SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c
2513
2514@SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c
2515
2516# opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable
2517# leak detection while running it.
2518@SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
9b5a17d2
MF		 2519@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error
2520@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error
2521@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error
2522@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error
2523@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error
2524@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error
2525@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error
2526@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error
2527@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error
2528@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error
2529@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error
2530@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error
72be276f
MF		 2531@SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES = \
2532@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.c
2533
eac2fbdc
MF		 2534@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES = \
2535@SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_SOURCES)
2536
8136f057 2537@SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \
8136f057
MF		 2538@SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \
2539@SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \
2540@SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \
8136f057
MF		 2541@SIM_ENABLE_ARCH_m32r_TRUE@ \
2542@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o \
2543@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \
2544@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o \
2545@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-utils.o \
2546@SIM_ENABLE_ARCH_m32r_TRUE@ \
2547@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o \
2548@SIM_ENABLE_ARCH_m32r_TRUE@ \
2549@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r.o \
2550@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu.o \
2551@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o \
2552@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sem.o \
2553@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o \
2554@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.o \
2555@SIM_ENABLE_ARCH_m32r_TRUE@ \
2556@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o \
2557@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpux.o \
2558@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o \
2559@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modelx.o \
2560@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o \
2561@SIM_ENABLE_ARCH_m32r_TRUE@ \
2562@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r2.o \
2563@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o \
2564@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode2.o \
2565@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o \
2566@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.o \
2567@SIM_ENABLE_ARCH_m32r_TRUE@ \
2568@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o \
2569@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/traps.o
2570
c0c25232
MF		 2571@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES =
2572@SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \
2573@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \
2574@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \
2575@SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS)
2576
3d042117 2577@SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
0a129eb1 2578@SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
0a129eb1
MF		 2579@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \
2580@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \
0a129eb1
MF		 2581@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \
2582@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \
0a129eb1
MF		 2583@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \
2584@SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2
2585
5a71cd47
MF		 2586@SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \
2587@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 \
2588@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_CELL_BITSIZE=32 \
2589@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_ADDRESS_BITSIZE=32 \
2590@SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_MSB=31
2591
72be276f
MF		 2592@SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_SOURCES = \
2593@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.c
2594
eac2fbdc
MF		 2595@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES = \
2596@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_SOURCES)
2597
ccb68071 2598@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \
ccb68071
MF		 2599@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \
2600@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \
2601@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \
2602@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \
2603@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \
2604@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o \
2605@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \
2606@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \
2607@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \
ccb68071
MF		 2608@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o
2609
c0c25232
MF		 2610@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES =
2611@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \
2612@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \
2613@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \
2614@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS)
2615
3d042117 2616@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram
70ab6bdd
MF		 2617@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
2618@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \
2619@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \
2620@SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c
2621
2622@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c
72be276f
MF		 2623@SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_SOURCES = \
2624@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.c
2625
eac2fbdc
MF		 2626@SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES = \
2627@SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_SOURCES)
2628
dfceaa0d 2629@SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \
dfceaa0d
MF		 2630@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o \
2631@SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \
2632@SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \
dfceaa0d
MF		 2633@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/sim-resume.o
2634
c0c25232
MF		 2635@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES =
2636@SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \
2637@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \
2638@SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \
2639@SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS)
2640
72be276f
MF		 2641@SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_SOURCES = \
2642@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.c
2643
eac2fbdc
MF		 2644@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES = \
2645@SIM_ENABLE_ARCH_microblaze_TRUE@ $(common_libcommon_a_SOURCES)
2646
a6ead840 2647@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \
a6ead840
MF		 2648@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \
2649@SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \
2650@SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \
a6ead840
MF		 2651@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o
2652
c0c25232
MF		 2653@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES =
2654@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \
2655@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \
2656@SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \
2657@SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS)
2658
1546cb45
MF		 2659@SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \
2660@SIM_ENABLE_ARCH_mips_TRUE@ @SIM_MIPS_SUBTARGET@ \
2661@SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
2662@SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
2663
9a7472d7
MF		 2664@SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_68) \
2665@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_69) $(am__append_70)
72be276f
MF		 2666@SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_SOURCES = \
2667@SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.c
2668
eac2fbdc
MF		 2669@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \
2670@SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_SOURCES)
2671
1f1afa43 2672@SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \
1f1afa43
MF		 2673@SIM_ENABLE_ARCH_mips_TRUE@ mips/interp.o \
2674@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_GEN_OBJ) \
2675@SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \
2676@SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \
2677@SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \
2678@SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o \
2679@SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.o \
2680@SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.o \
1f1afa43
MF		 2681@SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-main.o \
2682@SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-resume.o
2683
2684@SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
c0c25232
MF		 2685@SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES =
2686@SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \
2687@SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \
2688@SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \
2689@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS)
2690
3d042117 2691@SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
49d3ce6c
MF		 2692@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \
2693@SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.h \
2694@SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.c
2695
3a31051b
MF		 2696@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
2697@SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.h \
2698@SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.c \
2699@SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.h \
2700@SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.c \
2701@SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.h \
2702@SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.c \
2703@SIM_ENABLE_ARCH_mips_TRUE@ mips/model.h \
2704@SIM_ENABLE_ARCH_mips_TRUE@ mips/model.c \
2705@SIM_ENABLE_ARCH_mips_TRUE@ mips/support.h \
2706@SIM_ENABLE_ARCH_mips_TRUE@ mips/support.c \
2707@SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.h \
2708@SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.c \
2709@SIM_ENABLE_ARCH_mips_TRUE@ mips/irun.c
2710
f6d58d40
MF		 2711@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
2712@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.h \
2713@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.c \
2714@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.h \
2715@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.c \
2716@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.h \
2717@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.c \
2718@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.h \
2719@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.c \
2720@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.h \
2721@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.c \
2722@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
2723@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.h \
2724@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.c \
2725@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.h \
2726@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.c \
2727@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.h \
2728@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.c \
2729@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.h \
2730@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.c \
2731@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.h \
2732@SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.c
2733
3a31051b 2734@SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \
49d3ce6c 2735@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \
3a31051b 2736@SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \
9a7472d7
MF		 2737@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_74) $(am__append_75) \
2738@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_76)
49d3ce6c
MF		 2739@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
2740@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen
2741@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \
2742@SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.igen \
2743@SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp2.igen \
2744@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16.igen \
2745@SIM_ENABLE_ARCH_mips_TRUE@ mips/m16e.igen \
2746@SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.igen \
2747@SIM_ENABLE_ARCH_mips_TRUE@ mips/micromipsdsp.igen \
2748@SIM_ENABLE_ARCH_mips_TRUE@ mips/micromips.igen \
2749@SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r2.igen \
2750@SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r6.igen \
2751@SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3d.igen \
2752@SIM_ENABLE_ARCH_mips_TRUE@ mips/sb1.igen \
2753@SIM_ENABLE_ARCH_mips_TRUE@ mips/tx.igen \
2754@SIM_ENABLE_ARCH_mips_TRUE@ mips/vr.igen
2755
3a31051b 2756@SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc
f6d58d40 2757@SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
f12c3c63
MF		 2758@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
2759@SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
63a9d59e
MF		 2760@SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \
2761@SIM_ENABLE_ARCH_mn10300_TRUE@ -DPOLL_QUIT_INTERVAL=0x20 \
2762@SIM_ENABLE_ARCH_mn10300_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
2763
72be276f
MF		 2764@SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_SOURCES = \
2765@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.c
2766
eac2fbdc
MF		 2767@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = \
2768@SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_SOURCES)
2769
4c54f341 2770@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
4c54f341
MF		 2771@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \
2772@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \
2773@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \
2774@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \
2775@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o \
2776@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.o \
2777@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o \
2778@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
2779@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
2780@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
2781@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \
4c54f341
MF		 2782@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \
2783@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o
2784
c0c25232
MF		 2785@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES =
2786@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
2787@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
2788@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \
2789@SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS)
2790
3d042117 2791@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop
d2a5dbc7
MF		 2792@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \
2793@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
2794@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \
2795@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
2796@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \
2797@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
2798@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \
2799@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \
2800@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \
2801@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \
2802@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \
2803@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
2804@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \
2805@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \
2806@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \
2807@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c
2808
2809@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \
2810@SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \
2811@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen
2812
2813@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
2814@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
2815@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
2816@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
ae0411a4 2817@SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\""
72be276f
MF		 2818@SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_SOURCES = \
2819@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/modules.c
2820
eac2fbdc
MF		 2821@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES = \
2822@SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_SOURCES)
2823
0754b625 2824@SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \
0754b625
MF		 2825@SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \
2826@SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \
2827@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o \
0754b625
MF		 2828@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/sim-resume.o
2829
c0c25232
MF		 2830@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES =
2831@SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \
2832@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \
2833@SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \
2834@SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS)
2835
94f5dfed
MF		 2836@SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb
2837@SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb
72be276f
MF		 2838@SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_SOURCES = \
2839@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.c
2840
eac2fbdc
MF		 2841@SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES = \
2842@SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_SOURCES)
2843
bff048f5 2844@SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \
bff048f5
MF		 2845@SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \
2846@SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \
2847@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \
bff048f5
MF		 2848@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o
2849
c0c25232
MF		 2850@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES =
2851@SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \
2852@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \
2853@SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \
2854@SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS)
2855
b7bd5fe9 2856@SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
72be276f
MF		 2857@SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_SOURCES = \
2858@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.c
2859
eac2fbdc
MF		 2860@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES = \
2861@SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_SOURCES)
2862
4d998e15 2863@SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \
4d998e15
MF		 2864@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \
2865@SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \
4d998e15
MF		 2866@SIM_ENABLE_ARCH_or1k_TRUE@ \
2867@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-accfp.o \
2868@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-fpu.o \
2869@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-run.o \
2870@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-scache.o \
2871@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o \
2872@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-utils.o \
2873@SIM_ENABLE_ARCH_or1k_TRUE@ \
2874@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o \
2875@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cpu.o \
2876@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o \
2877@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.o \
2878@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o \
2879@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sem.o \
2880@SIM_ENABLE_ARCH_or1k_TRUE@ \
2881@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/or1k.o \
2882@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o \
2883@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/traps.o
2884
c0c25232
MF		 2885@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES =
2886@SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \
2887@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \
2888@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \
2889@SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS)
2890
ed939535
MF		 2891@SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k
2892@SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README
0a129eb1 2893@SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
0a129eb1
MF		 2894@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \
2895@SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop
2896
c0c25232
MF		 2897@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES =
2898@SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \
2899@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \
2900@SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \
2901@SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS)
2902
ed939535
MF		 2903@SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc
2904@SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN
72be276f
MF		 2905@SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_SOURCES = \
2906@SIM_ENABLE_ARCH_pru_TRUE@ pru/modules.c
2907
eac2fbdc
MF		 2908@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES = \
2909@SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_SOURCES)
2910
3373e27f 2911@SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \
3373e27f
MF		 2912@SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \
2913@SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \
2914@SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o \
3373e27f
MF		 2915@SIM_ENABLE_ARCH_pru_TRUE@ pru/sim-resume.o
2916
c0c25232
MF		 2917@SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES =
2918@SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \
2919@SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \
2920@SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \
2921@SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS)
2922
e7699de5 2923@SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv = -DWITH_TARGET_WORD_BITSIZE=$(SIM_RISCV_BITSIZE)
72be276f
MF		 2924@SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_SOURCES = \
2925@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.c
2926
eac2fbdc
MF		 2927@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES = \
2928@SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_SOURCES)
2929
91344291 2930@SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \
91344291
MF		 2931@SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \
2932@SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \
2933@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o \
2934@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/machs.o \
91344291
MF		 2935@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-main.o \
2936@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o
2937
c0c25232
MF		 2938@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES =
2939@SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \
2940@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \
2941@SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \
2942@SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS)
2943
72be276f
MF		 2944@SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_SOURCES = \
2945@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.c
2946
eac2fbdc
MF		 2947@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES = \
2948@SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_SOURCES)
2949
91a335f9 2950@SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \
91a335f9
MF		 2951@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o \
2952@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o \
2953@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/cpu.o \
2954@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o \
2955@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o \
91a335f9
MF		 2956@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/trace.o
2957
c0c25232
MF		 2958@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES =
2959@SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \
2960@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \
2961@SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \
2962@SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS)
2963
3e3e7217 2964@SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx = $(SIM_RX_CYCLE_ACCURATE_FLAGS)
72be276f
MF		 2965@SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_SOURCES = \
2966@SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.c
2967
eac2fbdc
MF		 2968@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES = \
2969@SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_SOURCES)
2970
15538f65 2971@SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \
15538f65
MF		 2972@SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o \
2973@SIM_ENABLE_ARCH_rx_TRUE@ rx/load.o \
2974@SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o \
2975@SIM_ENABLE_ARCH_rx_TRUE@ rx/misc.o \
2976@SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o \
2977@SIM_ENABLE_ARCH_rx_TRUE@ rx/rx.o \
2978@SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o \
2979@SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o \
2980@SIM_ENABLE_ARCH_rx_TRUE@ rx/gdb-if.o \
72be276f 2981@SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o
15538f65 2982
c0c25232
MF		 2983@SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES =
2984@SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \
2985@SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \
2986@SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \
2987@SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS)
2988
ed939535
MF		 2989@SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx
2990@SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt
72be276f
MF		 2991@SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_SOURCES = \
2992@SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.c
2993
eac2fbdc
MF		 2994@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES = \
2995@SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_SOURCES)
2996
dd719fa6 2997@SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \
dd719fa6
MF		 2998@SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o \
2999@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \
3000@SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \
dd719fa6
MF		 3001@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o
3002
c0c25232
MF		 3003@SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES =
3004@SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \
3005@SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \
3006@SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \
3007@SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS)
3008
70ab6bdd
MF		 3009@SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
3010@SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \
70ab6bdd
MF		 3011@SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c
3012
3013@SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c
8f5fc30f 3014@SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31
72be276f
MF		 3015@SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_SOURCES = \
3016@SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.c
3017
eac2fbdc
MF		 3018@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES = \
3019@SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_SOURCES)
3020
7a59a0b9 3021@SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \
7a59a0b9
MF		 3022@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \
3023@SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \
3024@SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o \
3025@SIM_ENABLE_ARCH_v850_TRUE@ v850/interp.o \
3026@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o \
3027@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.o \
3028@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o \
3029@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.o \
3030@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o \
3031@SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.o \
3032@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o \
7a59a0b9
MF		 3033@SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o
3034
c0c25232
MF		 3035@SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES =
3036@SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \
3037@SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \
3038@SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \
3039@SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS)
3040
d2a5dbc7
MF		 3041@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \
3042@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \
3043@SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \
3044@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \
3045@SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \
3046@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \
3047@SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \
3048@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \
3049@SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \
3050@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \
3051@SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \
3052@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \
3053@SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \
3054@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \
3055@SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \
3056@SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c
3057
3058@SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \
3059@SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \
3060@SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen
3061
3062@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
3063@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen
897fc27b 3064@SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc
80636a54 3065all: $(BUILT_SOURCES) config.h
b15c5d7a 3066 $(MAKE) $(AM_MAKEFLAGS) all-recursive
6bddc3e8
MF		 3067
3068.SUFFIXES:
b5689863 3069.SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
6bddc3e8
MF		 3070am--refresh: Makefile
3071 @:
c0c25232 3072$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
6bddc3e8
MF		 3073 @for dep in $?; do \
3074 case '$(am__configure_deps)' in \
3075 *$$dep*) \
3076 echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \
3077 $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \
3078 && exit 0; \
3079 exit 1;; \
3080 esac; \
3081 done; \
3082 echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \
3083 $(am__cd) $(top_srcdir) && \
3084 $(AUTOMAKE) --foreign Makefile
3085Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
3086 @case '$?' in \
3087 *config.status*) \
3088 echo ' $(SHELL) ./config.status'; \
3089 $(SHELL) ./config.status;; \
3090 *) \
3091 echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
3092 cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
3093 esac;
c0c25232 3094$(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
6bddc3e8
MF		 3095
3096$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
3097 $(SHELL) ./config.status --recheck
c906108c 3098
8c379db2 3099$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
6bddc3e8 3100 $(am__cd) $(srcdir) && $(AUTOCONF)
8c379db2 3101$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps)
6bddc3e8
MF		 3102 $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS)
3103$(am__aclocal_m4_deps):
6bddc3e8 3104
b15c5d7a
MF		 3105config.h: stamp-h1
3106 @test -f $@ || rm -f stamp-h1
3107 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1
3108
3109stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status
3110 @rm -f stamp-h1
3111 cd $(top_builddir) && $(SHELL) ./config.status config.h
3112$(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps)
3113 ($(am__cd) $(top_srcdir) && $(AUTOHEADER))
3114 rm -f stamp-h1
3115 touch $@
3116
3117distclean-hdr:
3118 -rm -f config.h stamp-h1
7cd7b064
MF		 3119aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3120 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3121arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3122 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3123avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3124 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3125bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3126 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 3127bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3128 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3129cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3130 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3131cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3132 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3133d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3134 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3135frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3136 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3137ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3138 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3139h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3140 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3141iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3142 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3143lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3144 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3145m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3146 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3147m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3148 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3149m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3150 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3151mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3152 cd $(top_builddir) && $(SHELL) ./config.status $@
7cd7b064
MF		 3153microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3154 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 3155mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
36bb57e4 3156 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 3157mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3158 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 3159moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3160 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 3161msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3162 cd $(top_builddir) && $(SHELL) ./config.status $@
3163or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3164 cd $(top_builddir) && $(SHELL) ./config.status $@
3165ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3166 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 3167pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3168 cd $(top_builddir) && $(SHELL) ./config.status $@
3169riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3170 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 3171rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3172 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 3173rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3174 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd 3175sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3176 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 3177erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3178 cd $(top_builddir) && $(SHELL) ./config.status $@
3179v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
7cd7b064 3180 cd $(top_builddir) && $(SHELL) ./config.status $@
23912acd
MF		 3181example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
3182 cd $(top_builddir) && $(SHELL) ./config.status $@
3f8414df
MF		 3183arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in
3184 cd $(top_builddir) && $(SHELL) ./config.status $@
21672298
MF		 3185.gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in
3186 cd $(top_builddir) && $(SHELL) ./config.status $@
b15c5d7a 3187
b6b1c790
MF		 3188clean-noinstLIBRARIES:
3189 -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES)
eac2fbdc
MF		 3190common/$(am__dirstamp):
3191 @$(MKDIR_P) common
3192 @: > common/$(am__dirstamp)
3193common/$(DEPDIR)/$(am__dirstamp):
3194 @$(MKDIR_P) common/$(DEPDIR)
3195 @: > common/$(DEPDIR)/$(am__dirstamp)
3196common/callback.$(OBJEXT): common/$(am__dirstamp) \
3197 common/$(DEPDIR)/$(am__dirstamp)
3198common/portability.$(OBJEXT): common/$(am__dirstamp) \
3199 common/$(DEPDIR)/$(am__dirstamp)
3200common/sim-load.$(OBJEXT): common/$(am__dirstamp) \
3201 common/$(DEPDIR)/$(am__dirstamp)
3202common/syscall.$(OBJEXT): common/$(am__dirstamp) \
3203 common/$(DEPDIR)/$(am__dirstamp)
3204common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \
3205 common/$(DEPDIR)/$(am__dirstamp)
3206common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \
3207 common/$(DEPDIR)/$(am__dirstamp)
3208common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \
3209 common/$(DEPDIR)/$(am__dirstamp)
3210common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \
3211 common/$(DEPDIR)/$(am__dirstamp)
3212common/version.$(OBJEXT): common/$(am__dirstamp) \
3213 common/$(DEPDIR)/$(am__dirstamp)
c58353b7
MF		 3214aarch64/$(am__dirstamp):
3215 @$(MKDIR_P) aarch64
3216 @: > aarch64/$(am__dirstamp)
72be276f
MF		 3217aarch64/$(DEPDIR)/$(am__dirstamp):
3218 @$(MKDIR_P) aarch64/$(DEPDIR)
3219 @: > aarch64/$(DEPDIR)/$(am__dirstamp)
3220aarch64/modules.$(OBJEXT): aarch64/$(am__dirstamp) \
3221 aarch64/$(DEPDIR)/$(am__dirstamp)
c58353b7
MF		 3222
3223aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp)
3224 $(AM_V_at)-rm -f aarch64/libsim.a
3225 $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD)
3226 $(AM_V_at)$(RANLIB) aarch64/libsim.a
6a8e18f0
MF		 3227arm/$(am__dirstamp):
3228 @$(MKDIR_P) arm
3229 @: > arm/$(am__dirstamp)
72be276f
MF		 3230arm/$(DEPDIR)/$(am__dirstamp):
3231 @$(MKDIR_P) arm/$(DEPDIR)
3232 @: > arm/$(DEPDIR)/$(am__dirstamp)
3233arm/modules.$(OBJEXT): arm/$(am__dirstamp) \
3234 arm/$(DEPDIR)/$(am__dirstamp)
6a8e18f0
MF		 3235
3236arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp)
3237 $(AM_V_at)-rm -f arm/libsim.a
3238 $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD)
3239 $(AM_V_at)$(RANLIB) arm/libsim.a
c65b31b8
MF		 3240avr/$(am__dirstamp):
3241 @$(MKDIR_P) avr
3242 @: > avr/$(am__dirstamp)
72be276f
MF		 3243avr/$(DEPDIR)/$(am__dirstamp):
3244 @$(MKDIR_P) avr/$(DEPDIR)
3245 @: > avr/$(DEPDIR)/$(am__dirstamp)
3246avr/modules.$(OBJEXT): avr/$(am__dirstamp) \
3247 avr/$(DEPDIR)/$(am__dirstamp)
c65b31b8
MF		 3248
3249avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp)
3250 $(AM_V_at)-rm -f avr/libsim.a
3251 $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD)
3252 $(AM_V_at)$(RANLIB) avr/libsim.a
bc1dd618
MF		 3253bfin/$(am__dirstamp):
3254 @$(MKDIR_P) bfin
3255 @: > bfin/$(am__dirstamp)
72be276f
MF		 3256bfin/$(DEPDIR)/$(am__dirstamp):
3257 @$(MKDIR_P) bfin/$(DEPDIR)
3258 @: > bfin/$(DEPDIR)/$(am__dirstamp)
3259bfin/modules.$(OBJEXT): bfin/$(am__dirstamp) \
3260 bfin/$(DEPDIR)/$(am__dirstamp)
bc1dd618
MF		 3261
3262bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp)
3263 $(AM_V_at)-rm -f bfin/libsim.a
3264 $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD)
3265 $(AM_V_at)$(RANLIB) bfin/libsim.a
cdbb77e4
MF		 3266bpf/$(am__dirstamp):
3267 @$(MKDIR_P) bpf
3268 @: > bpf/$(am__dirstamp)
72be276f
MF		 3269bpf/$(DEPDIR)/$(am__dirstamp):
3270 @$(MKDIR_P) bpf/$(DEPDIR)
3271 @: > bpf/$(DEPDIR)/$(am__dirstamp)
3272bpf/modules.$(OBJEXT): bpf/$(am__dirstamp) \
3273 bpf/$(DEPDIR)/$(am__dirstamp)
cdbb77e4
MF		 3274
3275bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp)
3276 $(AM_V_at)-rm -f bpf/libsim.a
3277 $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD)
3278 $(AM_V_at)$(RANLIB) bpf/libsim.a
5bea0c32
MF		 3279
3280common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp)
3281 $(AM_V_at)-rm -f common/libcommon.a
3282 $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD)
3283 $(AM_V_at)$(RANLIB) common/libcommon.a
2cbdcc34
MF		 3284cr16/$(am__dirstamp):
3285 @$(MKDIR_P) cr16
3286 @: > cr16/$(am__dirstamp)
72be276f
MF		 3287cr16/$(DEPDIR)/$(am__dirstamp):
3288 @$(MKDIR_P) cr16/$(DEPDIR)
3289 @: > cr16/$(DEPDIR)/$(am__dirstamp)
3290cr16/modules.$(OBJEXT): cr16/$(am__dirstamp) \
3291 cr16/$(DEPDIR)/$(am__dirstamp)
2cbdcc34
MF		 3292
3293cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp)
3294 $(AM_V_at)-rm -f cr16/libsim.a
3295 $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD)
3296 $(AM_V_at)$(RANLIB) cr16/libsim.a
eaa678ec
MF		 3297cris/$(am__dirstamp):
3298 @$(MKDIR_P) cris
3299 @: > cris/$(am__dirstamp)
72be276f
MF		 3300cris/$(DEPDIR)/$(am__dirstamp):
3301 @$(MKDIR_P) cris/$(DEPDIR)
3302 @: > cris/$(DEPDIR)/$(am__dirstamp)
3303cris/modules.$(OBJEXT): cris/$(am__dirstamp) \
3304 cris/$(DEPDIR)/$(am__dirstamp)
eaa678ec
MF		 3305
3306cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp)
3307 $(AM_V_at)-rm -f cris/libsim.a
3308 $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD)
3309 $(AM_V_at)$(RANLIB) cris/libsim.a
faf177df
MF		 3310d10v/$(am__dirstamp):
3311 @$(MKDIR_P) d10v
3312 @: > d10v/$(am__dirstamp)
72be276f
MF		 3313d10v/$(DEPDIR)/$(am__dirstamp):
3314 @$(MKDIR_P) d10v/$(DEPDIR)
3315 @: > d10v/$(DEPDIR)/$(am__dirstamp)
3316d10v/modules.$(OBJEXT): d10v/$(am__dirstamp) \
3317 d10v/$(DEPDIR)/$(am__dirstamp)
faf177df
MF		 3318
3319d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp)
3320 $(AM_V_at)-rm -f d10v/libsim.a
3321 $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD)
3322 $(AM_V_at)$(RANLIB) d10v/libsim.a
3f6c63ac
MF		 3323erc32/$(am__dirstamp):
3324 @$(MKDIR_P) erc32
3325 @: > erc32/$(am__dirstamp)
72be276f
MF		 3326erc32/$(DEPDIR)/$(am__dirstamp):
3327 @$(MKDIR_P) erc32/$(DEPDIR)
3328 @: > erc32/$(DEPDIR)/$(am__dirstamp)
3329erc32/modules.$(OBJEXT): erc32/$(am__dirstamp) \
3330 erc32/$(DEPDIR)/$(am__dirstamp)
3f6c63ac
MF		 3331
3332erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp)
3333 $(AM_V_at)-rm -f erc32/libsim.a
3334 $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD)
3335 $(AM_V_at)$(RANLIB) erc32/libsim.a
16a6d542
MF		 3336example-synacor/$(am__dirstamp):
3337 @$(MKDIR_P) example-synacor
3338 @: > example-synacor/$(am__dirstamp)
72be276f
MF		 3339example-synacor/$(DEPDIR)/$(am__dirstamp):
3340 @$(MKDIR_P) example-synacor/$(DEPDIR)
3341 @: > example-synacor/$(DEPDIR)/$(am__dirstamp)
3342example-synacor/modules.$(OBJEXT): example-synacor/$(am__dirstamp) \
3343 example-synacor/$(DEPDIR)/$(am__dirstamp)
16a6d542
MF		 3344
3345example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp)
3346 $(AM_V_at)-rm -f example-synacor/libsim.a
3347 $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD)
3348 $(AM_V_at)$(RANLIB) example-synacor/libsim.a
c26946a4
MF		 3349frv/$(am__dirstamp):
3350 @$(MKDIR_P) frv
3351 @: > frv/$(am__dirstamp)
72be276f
MF		 3352frv/$(DEPDIR)/$(am__dirstamp):
3353 @$(MKDIR_P) frv/$(DEPDIR)
3354 @: > frv/$(DEPDIR)/$(am__dirstamp)
3355frv/modules.$(OBJEXT): frv/$(am__dirstamp) \
3356 frv/$(DEPDIR)/$(am__dirstamp)
c26946a4
MF		 3357
3358frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp)
3359 $(AM_V_at)-rm -f frv/libsim.a
3360 $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD)
3361 $(AM_V_at)$(RANLIB) frv/libsim.a
6fe4bd8c
MF		 3362ft32/$(am__dirstamp):
3363 @$(MKDIR_P) ft32
3364 @: > ft32/$(am__dirstamp)
72be276f
MF		 3365ft32/$(DEPDIR)/$(am__dirstamp):
3366 @$(MKDIR_P) ft32/$(DEPDIR)
3367 @: > ft32/$(DEPDIR)/$(am__dirstamp)
3368ft32/modules.$(OBJEXT): ft32/$(am__dirstamp) \
3369 ft32/$(DEPDIR)/$(am__dirstamp)
6fe4bd8c
MF		 3370
3371ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp)
3372 $(AM_V_at)-rm -f ft32/libsim.a
3373 $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD)
3374 $(AM_V_at)$(RANLIB) ft32/libsim.a
3e9c9407
MF		 3375h8300/$(am__dirstamp):
3376 @$(MKDIR_P) h8300
3377 @: > h8300/$(am__dirstamp)
72be276f
MF		 3378h8300/$(DEPDIR)/$(am__dirstamp):
3379 @$(MKDIR_P) h8300/$(DEPDIR)
3380 @: > h8300/$(DEPDIR)/$(am__dirstamp)
3381h8300/modules.$(OBJEXT): h8300/$(am__dirstamp) \
3382 h8300/$(DEPDIR)/$(am__dirstamp)
3e9c9407
MF		 3383
3384h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp)
3385 $(AM_V_at)-rm -f h8300/libsim.a
3386 $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD)
3387 $(AM_V_at)$(RANLIB) h8300/libsim.a
b6b1c790
MF		 3388igen/$(am__dirstamp):
3389 @$(MKDIR_P) igen
3390 @: > igen/$(am__dirstamp)
3391igen/$(DEPDIR)/$(am__dirstamp):
3392 @$(MKDIR_P) igen/$(DEPDIR)
3393 @: > igen/$(DEPDIR)/$(am__dirstamp)
3394igen/table.$(OBJEXT): igen/$(am__dirstamp) \
3395 igen/$(DEPDIR)/$(am__dirstamp)
3396igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp)
3397igen/misc.$(OBJEXT): igen/$(am__dirstamp) \
3398 igen/$(DEPDIR)/$(am__dirstamp)
3399igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \
3400 igen/$(DEPDIR)/$(am__dirstamp)
3401igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \
3402 igen/$(DEPDIR)/$(am__dirstamp)
3403igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \
3404 igen/$(DEPDIR)/$(am__dirstamp)
3405igen/filter.$(OBJEXT): igen/$(am__dirstamp) \
3406 igen/$(DEPDIR)/$(am__dirstamp)
3407igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \
3408 igen/$(DEPDIR)/$(am__dirstamp)
3409igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \
3410 igen/$(DEPDIR)/$(am__dirstamp)
3411igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \
3412 igen/$(DEPDIR)/$(am__dirstamp)
3413igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \
3414 igen/$(DEPDIR)/$(am__dirstamp)
3415igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \
3416 igen/$(DEPDIR)/$(am__dirstamp)
3417igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \
3418 igen/$(DEPDIR)/$(am__dirstamp)
3419igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \
3420 igen/$(DEPDIR)/$(am__dirstamp)
3421igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \
3422 igen/$(DEPDIR)/$(am__dirstamp)
3423igen/gen.$(OBJEXT): igen/$(am__dirstamp) \
3424 igen/$(DEPDIR)/$(am__dirstamp)
1486f22b
MF		 3425iq2000/$(am__dirstamp):
3426 @$(MKDIR_P) iq2000
3427 @: > iq2000/$(am__dirstamp)
72be276f
MF		 3428iq2000/$(DEPDIR)/$(am__dirstamp):
3429 @$(MKDIR_P) iq2000/$(DEPDIR)
3430 @: > iq2000/$(DEPDIR)/$(am__dirstamp)
3431iq2000/modules.$(OBJEXT): iq2000/$(am__dirstamp) \
3432 iq2000/$(DEPDIR)/$(am__dirstamp)
1486f22b
MF		 3433
3434iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp)
3435 $(AM_V_at)-rm -f iq2000/libsim.a
3436 $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD)
3437 $(AM_V_at)$(RANLIB) iq2000/libsim.a
000f7bee
MF		 3438lm32/$(am__dirstamp):
3439 @$(MKDIR_P) lm32
3440 @: > lm32/$(am__dirstamp)
72be276f
MF		 3441lm32/$(DEPDIR)/$(am__dirstamp):
3442 @$(MKDIR_P) lm32/$(DEPDIR)
3443 @: > lm32/$(DEPDIR)/$(am__dirstamp)
3444lm32/modules.$(OBJEXT): lm32/$(am__dirstamp) \
3445 lm32/$(DEPDIR)/$(am__dirstamp)
000f7bee
MF		 3446
3447lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp)
3448 $(AM_V_at)-rm -f lm32/libsim.a
3449 $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD)
3450 $(AM_V_at)$(RANLIB) lm32/libsim.a
ba3a8498
MF		 3451m32c/$(am__dirstamp):
3452 @$(MKDIR_P) m32c
3453 @: > m32c/$(am__dirstamp)
72be276f
MF		 3454m32c/$(DEPDIR)/$(am__dirstamp):
3455 @$(MKDIR_P) m32c/$(DEPDIR)
3456 @: > m32c/$(DEPDIR)/$(am__dirstamp)
3457m32c/modules.$(OBJEXT): m32c/$(am__dirstamp) \
3458 m32c/$(DEPDIR)/$(am__dirstamp)
ba3a8498
MF		 3459
3460m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp)
3461 $(AM_V_at)-rm -f m32c/libsim.a
3462 $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD)
3463 $(AM_V_at)$(RANLIB) m32c/libsim.a
8136f057
MF		 3464m32r/$(am__dirstamp):
3465 @$(MKDIR_P) m32r
3466 @: > m32r/$(am__dirstamp)
72be276f
MF		 3467m32r/$(DEPDIR)/$(am__dirstamp):
3468 @$(MKDIR_P) m32r/$(DEPDIR)
3469 @: > m32r/$(DEPDIR)/$(am__dirstamp)
3470m32r/modules.$(OBJEXT): m32r/$(am__dirstamp) \
3471 m32r/$(DEPDIR)/$(am__dirstamp)
8136f057
MF		 3472
3473m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp)
3474 $(AM_V_at)-rm -f m32r/libsim.a
3475 $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD)
3476 $(AM_V_at)$(RANLIB) m32r/libsim.a
ccb68071
MF		 3477m68hc11/$(am__dirstamp):
3478 @$(MKDIR_P) m68hc11
3479 @: > m68hc11/$(am__dirstamp)
72be276f
MF		 3480m68hc11/$(DEPDIR)/$(am__dirstamp):
3481 @$(MKDIR_P) m68hc11/$(DEPDIR)
3482 @: > m68hc11/$(DEPDIR)/$(am__dirstamp)
3483m68hc11/modules.$(OBJEXT): m68hc11/$(am__dirstamp) \
3484 m68hc11/$(DEPDIR)/$(am__dirstamp)
ccb68071
MF		 3485
3486m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp)
3487 $(AM_V_at)-rm -f m68hc11/libsim.a
3488 $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD)
3489 $(AM_V_at)$(RANLIB) m68hc11/libsim.a
dfceaa0d
MF		 3490mcore/$(am__dirstamp):
3491 @$(MKDIR_P) mcore
3492 @: > mcore/$(am__dirstamp)
72be276f
MF		 3493mcore/$(DEPDIR)/$(am__dirstamp):
3494 @$(MKDIR_P) mcore/$(DEPDIR)
3495 @: > mcore/$(DEPDIR)/$(am__dirstamp)
3496mcore/modules.$(OBJEXT): mcore/$(am__dirstamp) \
3497 mcore/$(DEPDIR)/$(am__dirstamp)
dfceaa0d
MF		 3498
3499mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp)
3500 $(AM_V_at)-rm -f mcore/libsim.a
3501 $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD)
3502 $(AM_V_at)$(RANLIB) mcore/libsim.a
a6ead840
MF		 3503microblaze/$(am__dirstamp):
3504 @$(MKDIR_P) microblaze
3505 @: > microblaze/$(am__dirstamp)
72be276f
MF		 3506microblaze/$(DEPDIR)/$(am__dirstamp):
3507 @$(MKDIR_P) microblaze/$(DEPDIR)
3508 @: > microblaze/$(DEPDIR)/$(am__dirstamp)
3509microblaze/modules.$(OBJEXT): microblaze/$(am__dirstamp) \
3510 microblaze/$(DEPDIR)/$(am__dirstamp)
a6ead840
MF		 3511
3512microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp)
3513 $(AM_V_at)-rm -f microblaze/libsim.a
3514 $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD)
3515 $(AM_V_at)$(RANLIB) microblaze/libsim.a
1f1afa43
MF		 3516mips/$(am__dirstamp):
3517 @$(MKDIR_P) mips
3518 @: > mips/$(am__dirstamp)
72be276f
MF		 3519mips/$(DEPDIR)/$(am__dirstamp):
3520 @$(MKDIR_P) mips/$(DEPDIR)
3521 @: > mips/$(DEPDIR)/$(am__dirstamp)
3522mips/modules.$(OBJEXT): mips/$(am__dirstamp) \
3523 mips/$(DEPDIR)/$(am__dirstamp)
1f1afa43
MF		 3524
3525mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp)
3526 $(AM_V_at)-rm -f mips/libsim.a
3527 $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
3528 $(AM_V_at)$(RANLIB) mips/libsim.a
4c54f341
MF		 3529mn10300/$(am__dirstamp):
3530 @$(MKDIR_P) mn10300
3531 @: > mn10300/$(am__dirstamp)
72be276f
MF		 3532mn10300/$(DEPDIR)/$(am__dirstamp):
3533 @$(MKDIR_P) mn10300/$(DEPDIR)
3534 @: > mn10300/$(DEPDIR)/$(am__dirstamp)
3535mn10300/modules.$(OBJEXT): mn10300/$(am__dirstamp) \
3536 mn10300/$(DEPDIR)/$(am__dirstamp)
4c54f341
MF		 3537
3538mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
3539 $(AM_V_at)-rm -f mn10300/libsim.a
3540 $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
3541 $(AM_V_at)$(RANLIB) mn10300/libsim.a
0754b625
MF		 3542moxie/$(am__dirstamp):
3543 @$(MKDIR_P) moxie
3544 @: > moxie/$(am__dirstamp)
72be276f
MF		 3545moxie/$(DEPDIR)/$(am__dirstamp):
3546 @$(MKDIR_P) moxie/$(DEPDIR)
3547 @: > moxie/$(DEPDIR)/$(am__dirstamp)
3548moxie/modules.$(OBJEXT): moxie/$(am__dirstamp) \
3549 moxie/$(DEPDIR)/$(am__dirstamp)
0754b625
MF		 3550
3551moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp)
3552 $(AM_V_at)-rm -f moxie/libsim.a
3553 $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD)
3554 $(AM_V_at)$(RANLIB) moxie/libsim.a
bff048f5
MF		 3555msp430/$(am__dirstamp):
3556 @$(MKDIR_P) msp430
3557 @: > msp430/$(am__dirstamp)
72be276f
MF		 3558msp430/$(DEPDIR)/$(am__dirstamp):
3559 @$(MKDIR_P) msp430/$(DEPDIR)
3560 @: > msp430/$(DEPDIR)/$(am__dirstamp)
3561msp430/modules.$(OBJEXT): msp430/$(am__dirstamp) \
3562 msp430/$(DEPDIR)/$(am__dirstamp)
bff048f5
MF		 3563
3564msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp)
3565 $(AM_V_at)-rm -f msp430/libsim.a
3566 $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD)
3567 $(AM_V_at)$(RANLIB) msp430/libsim.a
4d998e15
MF		 3568or1k/$(am__dirstamp):
3569 @$(MKDIR_P) or1k
3570 @: > or1k/$(am__dirstamp)
72be276f
MF		 3571or1k/$(DEPDIR)/$(am__dirstamp):
3572 @$(MKDIR_P) or1k/$(DEPDIR)
3573 @: > or1k/$(DEPDIR)/$(am__dirstamp)
3574or1k/modules.$(OBJEXT): or1k/$(am__dirstamp) \
3575 or1k/$(DEPDIR)/$(am__dirstamp)
4d998e15
MF		 3576
3577or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp)
3578 $(AM_V_at)-rm -f or1k/libsim.a
3579 $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD)
3580 $(AM_V_at)$(RANLIB) or1k/libsim.a
3373e27f
MF		 3581pru/$(am__dirstamp):
3582 @$(MKDIR_P) pru
3583 @: > pru/$(am__dirstamp)
72be276f
MF		 3584pru/$(DEPDIR)/$(am__dirstamp):
3585 @$(MKDIR_P) pru/$(DEPDIR)
3586 @: > pru/$(DEPDIR)/$(am__dirstamp)
3587pru/modules.$(OBJEXT): pru/$(am__dirstamp) \
3588 pru/$(DEPDIR)/$(am__dirstamp)
3373e27f
MF		 3589
3590pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp)
3591 $(AM_V_at)-rm -f pru/libsim.a
3592 $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD)
3593 $(AM_V_at)$(RANLIB) pru/libsim.a
91344291
MF		 3594riscv/$(am__dirstamp):
3595 @$(MKDIR_P) riscv
3596 @: > riscv/$(am__dirstamp)
72be276f
MF		 3597riscv/$(DEPDIR)/$(am__dirstamp):
3598 @$(MKDIR_P) riscv/$(DEPDIR)
3599 @: > riscv/$(DEPDIR)/$(am__dirstamp)
3600riscv/modules.$(OBJEXT): riscv/$(am__dirstamp) \
3601 riscv/$(DEPDIR)/$(am__dirstamp)
91344291
MF		 3602
3603riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp)
3604 $(AM_V_at)-rm -f riscv/libsim.a
3605 $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD)
3606 $(AM_V_at)$(RANLIB) riscv/libsim.a
91a335f9
MF		 3607rl78/$(am__dirstamp):
3608 @$(MKDIR_P) rl78
3609 @: > rl78/$(am__dirstamp)
72be276f
MF		 3610rl78/$(DEPDIR)/$(am__dirstamp):
3611 @$(MKDIR_P) rl78/$(DEPDIR)
3612 @: > rl78/$(DEPDIR)/$(am__dirstamp)
3613rl78/modules.$(OBJEXT): rl78/$(am__dirstamp) \
3614 rl78/$(DEPDIR)/$(am__dirstamp)
91a335f9
MF		 3615
3616rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp)
3617 $(AM_V_at)-rm -f rl78/libsim.a
3618 $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD)
3619 $(AM_V_at)$(RANLIB) rl78/libsim.a
15538f65
MF		 3620rx/$(am__dirstamp):
3621 @$(MKDIR_P) rx
3622 @: > rx/$(am__dirstamp)
72be276f
MF		 3623rx/$(DEPDIR)/$(am__dirstamp):
3624 @$(MKDIR_P) rx/$(DEPDIR)
3625 @: > rx/$(DEPDIR)/$(am__dirstamp)
3626rx/modules.$(OBJEXT): rx/$(am__dirstamp) rx/$(DEPDIR)/$(am__dirstamp)
15538f65
MF		 3627
3628rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp)
3629 $(AM_V_at)-rm -f rx/libsim.a
3630 $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD)
3631 $(AM_V_at)$(RANLIB) rx/libsim.a
dd719fa6
MF		 3632sh/$(am__dirstamp):
3633 @$(MKDIR_P) sh
3634 @: > sh/$(am__dirstamp)
72be276f
MF		 3635sh/$(DEPDIR)/$(am__dirstamp):
3636 @$(MKDIR_P) sh/$(DEPDIR)
3637 @: > sh/$(DEPDIR)/$(am__dirstamp)
3638sh/modules.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
dd719fa6
MF		 3639
3640sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp)
3641 $(AM_V_at)-rm -f sh/libsim.a
3642 $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD)
3643 $(AM_V_at)$(RANLIB) sh/libsim.a
7a59a0b9
MF		 3644v850/$(am__dirstamp):
3645 @$(MKDIR_P) v850
3646 @: > v850/$(am__dirstamp)
72be276f
MF		 3647v850/$(DEPDIR)/$(am__dirstamp):
3648 @$(MKDIR_P) v850/$(DEPDIR)
3649 @: > v850/$(DEPDIR)/$(am__dirstamp)
3650v850/modules.$(OBJEXT): v850/$(am__dirstamp) \
3651 v850/$(DEPDIR)/$(am__dirstamp)
7a59a0b9
MF		 3652
3653v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp)
3654 $(AM_V_at)-rm -f v850/libsim.a
3655 $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD)
3656 $(AM_V_at)$(RANLIB) v850/libsim.a
b6b1c790 3657
a389375f 3658clean-checkPROGRAMS:
b5689863
MF		 3659 @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
3660 echo " rm -f" $$list; \
3661 rm -f $$list || exit $$?; \
3662 test -n "$(EXEEXT)" || exit 0; \
3663 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3664 echo " rm -f" $$list; \
3665 rm -f $$list
c0c25232
MF		 3666
3667clean-noinstPROGRAMS:
3668 @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \
3669 echo " rm -f" $$list; \
3670 rm -f $$list || exit $$?; \
3671 test -n "$(EXEEXT)" || exit 0; \
3672 list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \
3673 echo " rm -f" $$list; \
3674 rm -f $$list
c0c25232
MF		 3675
3676aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp)
3677 @rm -f aarch64/run$(EXEEXT)
3678 $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS)
c0c25232
MF		 3679
3680arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp)
3681 @rm -f arm/run$(EXEEXT)
3682 $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS)
c0c25232
MF		 3683
3684avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp)
3685 @rm -f avr/run$(EXEEXT)
3686 $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS)
c0c25232
MF		 3687
3688bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp)
3689 @rm -f bfin/run$(EXEEXT)
3690 $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS)
c0c25232
MF		 3691
3692bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp)
3693 @rm -f bpf/run$(EXEEXT)
3694 $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS)
70ab6bdd
MF		 3695cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \
3696 cr16/$(DEPDIR)/$(am__dirstamp)
3697
3698@SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
3699@SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT)
3700@SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS)
c0c25232
MF		 3701
3702cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp)
3703 @rm -f cr16/run$(EXEEXT)
3704 $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS)
c0c25232
MF		 3705
3706cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp)
3707 @rm -f cris/run$(EXEEXT)
3708 $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS)
cb9bdc02
MF		 3709cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \
3710 cris/$(DEPDIR)/$(am__dirstamp)
3711
3712cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp)
3713 @rm -f cris/rvdummy$(EXEEXT)
3714 $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS)
70ab6bdd
MF		 3715d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \
3716 d10v/$(DEPDIR)/$(am__dirstamp)
3717
3718@SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
3719@SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT)
3720@SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS)
a389375f 3721
c0c25232
MF		 3722d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp)
3723 @rm -f d10v/run$(EXEEXT)
3724 $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS)
c0c25232
MF		 3725
3726erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp)
3727 @rm -f erc32/run$(EXEEXT)
3728 $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS)
c0c25232
MF		 3729erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \
3730 erc32/$(DEPDIR)/$(am__dirstamp)
3731
3732@SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp)
3733@SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT)
3734@SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS)
c0c25232
MF		 3735
3736example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp)
3737 @rm -f example-synacor/run$(EXEEXT)
3738 $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS)
c0c25232
MF		 3739
3740frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp)
3741 @rm -f frv/run$(EXEEXT)
3742 $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS)
c0c25232
MF		 3743
3744ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp)
3745 @rm -f ft32/run$(EXEEXT)
3746 $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS)
c0c25232
MF		 3747
3748h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp)
3749 @rm -f h8300/run$(EXEEXT)
3750 $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS)
3751
b6b1c790
MF		 3752igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp)
3753 @rm -f igen/filter$(EXEEXT)
3754 $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS)
3755
3756igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp)
3757 @rm -f igen/gen$(EXEEXT)
3758 $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS)
3759igen/igen.$(OBJEXT): igen/$(am__dirstamp) \
3760 igen/$(DEPDIR)/$(am__dirstamp)
3761
b6b1c790
MF		 3762igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp)
3763 @rm -f igen/ld-cache$(EXEEXT)
3764 $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS)
3765
3766igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp)
3767 @rm -f igen/ld-decode$(EXEEXT)
3768 $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS)
3769
3770igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp)
3771 @rm -f igen/ld-insn$(EXEEXT)
3772 $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS)
3773
3774igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp)
3775 @rm -f igen/table$(EXEEXT)
3776 $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS)
c0c25232
MF		 3777
3778iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp)
3779 @rm -f iq2000/run$(EXEEXT)
3780 $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS)
c0c25232
MF		 3781
3782lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp)
3783 @rm -f lm32/run$(EXEEXT)
3784 $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS)
70ab6bdd
MF		 3785m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \
3786 m32c/$(DEPDIR)/$(am__dirstamp)
3787
3788@SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
3789@SIM_ENABLE_ARCH_m32c_FALSE@ @rm -f m32c/opc2c$(EXEEXT)
3790@SIM_ENABLE_ARCH_m32c_FALSE@ $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS)
c0c25232
MF		 3791
3792m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp)
3793 @rm -f m32c/run$(EXEEXT)
3794 $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS)
c0c25232
MF		 3795
3796m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp)
3797 @rm -f m32r/run$(EXEEXT)
3798 $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS)
70ab6bdd
MF		 3799m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \
3800 m68hc11/$(DEPDIR)/$(am__dirstamp)
3801
3802@SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
3803@SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT)
3804@SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS)
c0c25232
MF		 3805
3806m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp)
3807 @rm -f m68hc11/run$(EXEEXT)
3808 $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS)
c0c25232
MF		 3809
3810mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp)
3811 @rm -f mcore/run$(EXEEXT)
3812 $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS)
c0c25232
MF		 3813
3814microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp)
3815 @rm -f microblaze/run$(EXEEXT)
3816 $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS)
c0c25232
MF		 3817
3818mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
3819 @rm -f mips/run$(EXEEXT)
3820 $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
c0c25232
MF		 3821
3822mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
3823 @rm -f mn10300/run$(EXEEXT)
3824 $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS)
c0c25232
MF		 3825
3826moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp)
3827 @rm -f moxie/run$(EXEEXT)
3828 $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS)
c0c25232
MF		 3829
3830msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp)
3831 @rm -f msp430/run$(EXEEXT)
3832 $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS)
c0c25232
MF		 3833
3834or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp)
3835 @rm -f or1k/run$(EXEEXT)
3836 $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS)
3837ppc/$(am__dirstamp):
3838 @$(MKDIR_P) ppc
3839 @: > ppc/$(am__dirstamp)
3840ppc/$(DEPDIR)/$(am__dirstamp):
3841 @$(MKDIR_P) ppc/$(DEPDIR)
3842 @: > ppc/$(DEPDIR)/$(am__dirstamp)
3843ppc/psim.$(OBJEXT): ppc/$(am__dirstamp) ppc/$(DEPDIR)/$(am__dirstamp)
3844
3845@SIM_ENABLE_ARCH_ppc_FALSE@ppc/psim$(EXEEXT): $(ppc_psim_OBJECTS) $(ppc_psim_DEPENDENCIES) $(EXTRA_ppc_psim_DEPENDENCIES) ppc/$(am__dirstamp)
3846@SIM_ENABLE_ARCH_ppc_FALSE@ @rm -f ppc/psim$(EXEEXT)
3847@SIM_ENABLE_ARCH_ppc_FALSE@ $(AM_V_CCLD)$(LINK) $(ppc_psim_OBJECTS) $(ppc_psim_LDADD) $(LIBS)
3848
3849ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp)
3850 @rm -f ppc/run$(EXEEXT)
3851 $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS)
c0c25232
MF		 3852
3853pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp)
3854 @rm -f pru/run$(EXEEXT)
3855 $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS)
c0c25232
MF		 3856
3857riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp)
3858 @rm -f riscv/run$(EXEEXT)
3859 $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS)
c0c25232
MF		 3860
3861rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp)
3862 @rm -f rl78/run$(EXEEXT)
3863 $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS)
c0c25232
MF		 3864
3865rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp)
3866 @rm -f rx/run$(EXEEXT)
3867 $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS)
70ab6bdd
MF		 3868sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp)
3869
3870@SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
3871@SIM_ENABLE_ARCH_sh_FALSE@ @rm -f sh/gencode$(EXEEXT)
3872@SIM_ENABLE_ARCH_sh_FALSE@ $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS)
c0c25232
MF		 3873
3874sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp)
3875 @rm -f sh/run$(EXEEXT)
3876 $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS)
a389375f
MF		 3877testsuite/common/$(am__dirstamp):
3878 @$(MKDIR_P) testsuite/common
3879 @: > testsuite/common/$(am__dirstamp)
3880testsuite/common/$(DEPDIR)/$(am__dirstamp):
3881 @$(MKDIR_P) testsuite/common/$(DEPDIR)
3882 @: > testsuite/common/$(DEPDIR)/$(am__dirstamp)
3883testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3884 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3885testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3886 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3887testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3888 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3889testsuite/common/bits32m31.$(OBJEXT): \
3890 testsuite/common/$(am__dirstamp) \
3891 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3892testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3893 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3894testsuite/common/bits64m63.$(OBJEXT): \
3895 testsuite/common/$(am__dirstamp) \
3896 testsuite/common/$(DEPDIR)/$(am__dirstamp)
3897testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \
3898 testsuite/common/$(DEPDIR)/$(am__dirstamp)
c0c25232
MF		 3899
3900v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp)
3901 @rm -f v850/run$(EXEEXT)
3902 $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS)
b6b1c790
MF		 3903
3904mostlyclean-compile:
3905 -rm -f *.$(OBJEXT)
72be276f
MF		 3906 -rm -f aarch64/*.$(OBJEXT)
3907 -rm -f arm/*.$(OBJEXT)
3908 -rm -f avr/*.$(OBJEXT)
3909 -rm -f bfin/*.$(OBJEXT)
3910 -rm -f bpf/*.$(OBJEXT)
5bea0c32 3911 -rm -f common/*.$(OBJEXT)
70ab6bdd 3912 -rm -f cr16/*.$(OBJEXT)
cb9bdc02 3913 -rm -f cris/*.$(OBJEXT)
70ab6bdd 3914 -rm -f d10v/*.$(OBJEXT)
c0c25232 3915 -rm -f erc32/*.$(OBJEXT)
72be276f
MF		 3916 -rm -f example-synacor/*.$(OBJEXT)
3917 -rm -f frv/*.$(OBJEXT)
3918 -rm -f ft32/*.$(OBJEXT)
3919 -rm -f h8300/*.$(OBJEXT)
b6b1c790 3920 -rm -f igen/*.$(OBJEXT)
72be276f
MF		 3921 -rm -f iq2000/*.$(OBJEXT)
3922 -rm -f lm32/*.$(OBJEXT)
70ab6bdd 3923 -rm -f m32c/*.$(OBJEXT)
72be276f 3924 -rm -f m32r/*.$(OBJEXT)
70ab6bdd 3925 -rm -f m68hc11/*.$(OBJEXT)
72be276f
MF		 3926 -rm -f mcore/*.$(OBJEXT)
3927 -rm -f microblaze/*.$(OBJEXT)
3928 -rm -f mips/*.$(OBJEXT)
3929 -rm -f mn10300/*.$(OBJEXT)
3930 -rm -f moxie/*.$(OBJEXT)
3931 -rm -f msp430/*.$(OBJEXT)
3932 -rm -f or1k/*.$(OBJEXT)
c0c25232 3933 -rm -f ppc/*.$(OBJEXT)
72be276f
MF		 3934 -rm -f pru/*.$(OBJEXT)
3935 -rm -f riscv/*.$(OBJEXT)
3936 -rm -f rl78/*.$(OBJEXT)
3937 -rm -f rx/*.$(OBJEXT)
70ab6bdd 3938 -rm -f sh/*.$(OBJEXT)
a389375f 3939 -rm -f testsuite/common/*.$(OBJEXT)
72be276f 3940 -rm -f v850/*.$(OBJEXT)
b6b1c790
MF		 3941
3942distclean-compile:
3943 -rm -f *.tab.c
3944
72be276f
MF		 3945@AMDEP_TRUE@@am__include@ @am__quote@aarch64/$(DEPDIR)/modules.Po@am__quote@
3946@AMDEP_TRUE@@am__include@ @am__quote@arm/$(DEPDIR)/modules.Po@am__quote@
3947@AMDEP_TRUE@@am__include@ @am__quote@avr/$(DEPDIR)/modules.Po@am__quote@
3948@AMDEP_TRUE@@am__include@ @am__quote@bfin/$(DEPDIR)/modules.Po@am__quote@
3949@AMDEP_TRUE@@am__include@ @am__quote@bpf/$(DEPDIR)/modules.Po@am__quote@
a1af8f40
MF		 3950@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/callback.Po@am__quote@
3951@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/portability.Po@am__quote@
3952@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/sim-load.Po@am__quote@
3953@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/syscall.Po@am__quote@
3954@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-errno.Po@am__quote@
3955@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-open.Po@am__quote@
3956@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-signal.Po@am__quote@
3957@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-syscall.Po@am__quote@
3958@AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/version.Po@am__quote@
70ab6bdd 3959@AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/gencode.Po@am__quote@
72be276f
MF		 3960@AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/modules.Po@am__quote@
3961@AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/modules.Po@am__quote@
cb9bdc02 3962@AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/rvdummy.Po@am__quote@
70ab6bdd 3963@AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/gencode.Po@am__quote@
72be276f
MF		 3964@AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/modules.Po@am__quote@
3965@AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/modules.Po@am__quote@
c0c25232 3966@AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/sis.Po@am__quote@
72be276f
MF		 3967@AMDEP_TRUE@@am__include@ @am__quote@example-synacor/$(DEPDIR)/modules.Po@am__quote@
3968@AMDEP_TRUE@@am__include@ @am__quote@frv/$(DEPDIR)/modules.Po@am__quote@
3969@AMDEP_TRUE@@am__include@ @am__quote@ft32/$(DEPDIR)/modules.Po@am__quote@
3970@AMDEP_TRUE@@am__include@ @am__quote@h8300/$(DEPDIR)/modules.Po@am__quote@
b6b1c790
MF		 3971@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter.Po@am__quote@
3972@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter_host.Po@am__quote@
3973@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-engine.Po@am__quote@
3974@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-icache.Po@am__quote@
3975@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-idecode.Po@am__quote@
3976@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-itable.Po@am__quote@
3977@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-model.Po@am__quote@
3978@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-semantics.Po@am__quote@
3979@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-support.Po@am__quote@
3980@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen.Po@am__quote@
3981@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/igen.Po@am__quote@
3982@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-cache.Po@am__quote@
3983@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-decode.Po@am__quote@
3984@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-insn.Po@am__quote@
3985@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/lf.Po@am__quote@
3986@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/misc.Po@am__quote@
3987@AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/table.Po@am__quote@
72be276f
MF		 3988@AMDEP_TRUE@@am__include@ @am__quote@iq2000/$(DEPDIR)/modules.Po@am__quote@
3989@AMDEP_TRUE@@am__include@ @am__quote@lm32/$(DEPDIR)/modules.Po@am__quote@
3990@AMDEP_TRUE@@am__include@ @am__quote@m32c/$(DEPDIR)/modules.Po@am__quote@
70ab6bdd 3991@AMDEP_TRUE@@am__include@ @am__quote@m32c/$(DEPDIR)/opc2c.Po@am__quote@
72be276f 3992@AMDEP_TRUE@@am__include@ @am__quote@m32r/$(DEPDIR)/modules.Po@am__quote@
70ab6bdd 3993@AMDEP_TRUE@@am__include@ @am__quote@m68hc11/$(DEPDIR)/gencode.Po@am__quote@
72be276f
MF		 3994@AMDEP_TRUE@@am__include@ @am__quote@m68hc11/$(DEPDIR)/modules.Po@am__quote@
3995@AMDEP_TRUE@@am__include@ @am__quote@mcore/$(DEPDIR)/modules.Po@am__quote@
3996@AMDEP_TRUE@@am__include@ @am__quote@microblaze/$(DEPDIR)/modules.Po@am__quote@
3997@AMDEP_TRUE@@am__include@ @am__quote@mips/$(DEPDIR)/modules.Po@am__quote@
3998@AMDEP_TRUE@@am__include@ @am__quote@mn10300/$(DEPDIR)/modules.Po@am__quote@
3999@AMDEP_TRUE@@am__include@ @am__quote@moxie/$(DEPDIR)/modules.Po@am__quote@
4000@AMDEP_TRUE@@am__include@ @am__quote@msp430/$(DEPDIR)/modules.Po@am__quote@
4001@AMDEP_TRUE@@am__include@ @am__quote@or1k/$(DEPDIR)/modules.Po@am__quote@
c0c25232 4002@AMDEP_TRUE@@am__include@ @am__quote@ppc/$(DEPDIR)/psim.Po@am__quote@
72be276f
MF		 4003@AMDEP_TRUE@@am__include@ @am__quote@pru/$(DEPDIR)/modules.Po@am__quote@
4004@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/modules.Po@am__quote@
4005@AMDEP_TRUE@@am__include@ @am__quote@rl78/$(DEPDIR)/modules.Po@am__quote@
4006@AMDEP_TRUE@@am__include@ @am__quote@rx/$(DEPDIR)/modules.Po@am__quote@
70ab6bdd 4007@AMDEP_TRUE@@am__include@ @am__quote@sh/$(DEPDIR)/gencode.Po@am__quote@
72be276f 4008@AMDEP_TRUE@@am__include@ @am__quote@sh/$(DEPDIR)/modules.Po@am__quote@
a389375f
MF		 4009@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/alu-tst.Po@am__quote@
4010@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits-gen.Po@am__quote@
4011@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m0.Po@am__quote@
4012@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m31.Po@am__quote@
4013@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m0.Po@am__quote@
4014@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m63.Po@am__quote@
4015@AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/fpu-tst.Po@am__quote@
72be276f 4016@AMDEP_TRUE@@am__include@ @am__quote@v850/$(DEPDIR)/modules.Po@am__quote@
b6b1c790
MF		 4017
4018.c.o:
4019@am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\
4020@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
4021@am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po
4022@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
4023@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
4024@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ $<
4025
4026.c.obj:
4027@am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.obj$$||'`;\
4028@am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ `$(CYGPATH_W) '$<'` &&\
4029@am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po
4030@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
4031@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
4032@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
dd8e16ea 4033
b5689863
MF		 4034.c.lo:
4035@am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.lo$$||'`;\
4036@am__fastdepCC_TRUE@ $(LTCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
4037@am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Plo
4038@AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@
4039@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
4040@am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $<
4041
b5689863
MF		 4042mostlyclean-libtool:
4043 -rm -f *.lo
4044
4045clean-libtool:
4046 -rm -rf .libs _libs
c0c25232
MF		 4047 -rm -rf aarch64/.libs aarch64/_libs
4048 -rm -rf arm/.libs arm/_libs
4049 -rm -rf avr/.libs avr/_libs
4050 -rm -rf bfin/.libs bfin/_libs
4051 -rm -rf bpf/.libs bpf/_libs
70ab6bdd 4052 -rm -rf cr16/.libs cr16/_libs
cb9bdc02 4053 -rm -rf cris/.libs cris/_libs
70ab6bdd 4054 -rm -rf d10v/.libs d10v/_libs
c0c25232
MF		 4055 -rm -rf erc32/.libs erc32/_libs
4056 -rm -rf example-synacor/.libs example-synacor/_libs
4057 -rm -rf frv/.libs frv/_libs
4058 -rm -rf ft32/.libs ft32/_libs
4059 -rm -rf h8300/.libs h8300/_libs
b5689863 4060 -rm -rf igen/.libs igen/_libs
c0c25232
MF		 4061 -rm -rf iq2000/.libs iq2000/_libs
4062 -rm -rf lm32/.libs lm32/_libs
70ab6bdd 4063 -rm -rf m32c/.libs m32c/_libs
c0c25232 4064 -rm -rf m32r/.libs m32r/_libs
70ab6bdd 4065 -rm -rf m68hc11/.libs m68hc11/_libs
c0c25232
MF		 4066 -rm -rf mcore/.libs mcore/_libs
4067 -rm -rf microblaze/.libs microblaze/_libs
4068 -rm -rf mips/.libs mips/_libs
4069 -rm -rf mn10300/.libs mn10300/_libs
4070 -rm -rf moxie/.libs moxie/_libs
4071 -rm -rf msp430/.libs msp430/_libs
4072 -rm -rf or1k/.libs or1k/_libs
4073 -rm -rf ppc/.libs ppc/_libs
4074 -rm -rf pru/.libs pru/_libs
4075 -rm -rf riscv/.libs riscv/_libs
4076 -rm -rf rl78/.libs rl78/_libs
4077 -rm -rf rx/.libs rx/_libs
70ab6bdd 4078 -rm -rf sh/.libs sh/_libs
b5689863 4079 -rm -rf testsuite/common/.libs testsuite/common/_libs
c0c25232 4080 -rm -rf v850/.libs v850/_libs
b5689863
MF		 4081
4082distclean-libtool:
4083 -rm -f libtool config.lt
ed939535
MF		 4084install-armdocDATA: $(armdoc_DATA)
4085 @$(NORMAL_INSTALL)
4086 @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \
4087 if test -n "$$list"; then \
4088 echo " $(MKDIR_P) '$(DESTDIR)$(armdocdir)'"; \
4089 $(MKDIR_P) "$(DESTDIR)$(armdocdir)" || exit 1; \
4090 fi; \
4091 for p in $$list; do \
4092 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4093 echo "$$d$$p"; \
4094 done | $(am__base_list) | \
4095 while read files; do \
4096 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(armdocdir)'"; \
4097 $(INSTALL_DATA) $$files "$(DESTDIR)$(armdocdir)" || exit $$?; \
4098 done
4099
4100uninstall-armdocDATA:
4101 @$(NORMAL_UNINSTALL)
4102 @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \
4103 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4104 dir='$(DESTDIR)$(armdocdir)'; $(am__uninstall_files_from_dir)
94f5dfed
MF		 4105install-dtbDATA: $(dtb_DATA)
4106 @$(NORMAL_INSTALL)
4107 @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
4108 if test -n "$$list"; then \
4109 echo " $(MKDIR_P) '$(DESTDIR)$(dtbdir)'"; \
4110 $(MKDIR_P) "$(DESTDIR)$(dtbdir)" || exit 1; \
4111 fi; \
4112 for p in $$list; do \
4113 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4114 echo "$$d$$p"; \
4115 done | $(am__base_list) | \
4116 while read files; do \
4117 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(dtbdir)'"; \
4118 $(INSTALL_DATA) $$files "$(DESTDIR)$(dtbdir)" || exit $$?; \
4119 done
4120
4121uninstall-dtbDATA:
4122 @$(NORMAL_UNINSTALL)
4123 @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \
4124 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4125 dir='$(DESTDIR)$(dtbdir)'; $(am__uninstall_files_from_dir)
ed939535
MF		 4126install-erc32docDATA: $(erc32doc_DATA)
4127 @$(NORMAL_INSTALL)
4128 @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \
4129 if test -n "$$list"; then \
4130 echo " $(MKDIR_P) '$(DESTDIR)$(erc32docdir)'"; \
4131 $(MKDIR_P) "$(DESTDIR)$(erc32docdir)" || exit 1; \
4132 fi; \
4133 for p in $$list; do \
4134 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4135 echo "$$d$$p"; \
4136 done | $(am__base_list) | \
4137 while read files; do \
4138 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(erc32docdir)'"; \
4139 $(INSTALL_DATA) $$files "$(DESTDIR)$(erc32docdir)" || exit $$?; \
4140 done
4141
4142uninstall-erc32docDATA:
4143 @$(NORMAL_UNINSTALL)
4144 @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \
4145 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4146 dir='$(DESTDIR)$(erc32docdir)'; $(am__uninstall_files_from_dir)
4147install-frvdocDATA: $(frvdoc_DATA)
4148 @$(NORMAL_INSTALL)
4149 @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
4150 if test -n "$$list"; then \
4151 echo " $(MKDIR_P) '$(DESTDIR)$(frvdocdir)'"; \
4152 $(MKDIR_P) "$(DESTDIR)$(frvdocdir)" || exit 1; \
4153 fi; \
4154 for p in $$list; do \
4155 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4156 echo "$$d$$p"; \
4157 done | $(am__base_list) | \
4158 while read files; do \
4159 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(frvdocdir)'"; \
4160 $(INSTALL_DATA) $$files "$(DESTDIR)$(frvdocdir)" || exit $$?; \
4161 done
4162
4163uninstall-frvdocDATA:
4164 @$(NORMAL_UNINSTALL)
4165 @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \
4166 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4167 dir='$(DESTDIR)$(frvdocdir)'; $(am__uninstall_files_from_dir)
4168install-or1kdocDATA: $(or1kdoc_DATA)
4169 @$(NORMAL_INSTALL)
4170 @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
4171 if test -n "$$list"; then \
4172 echo " $(MKDIR_P) '$(DESTDIR)$(or1kdocdir)'"; \
4173 $(MKDIR_P) "$(DESTDIR)$(or1kdocdir)" || exit 1; \
4174 fi; \
4175 for p in $$list; do \
4176 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4177 echo "$$d$$p"; \
4178 done | $(am__base_list) | \
4179 while read files; do \
4180 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(or1kdocdir)'"; \
4181 $(INSTALL_DATA) $$files "$(DESTDIR)$(or1kdocdir)" || exit $$?; \
4182 done
4183
4184uninstall-or1kdocDATA:
4185 @$(NORMAL_UNINSTALL)
4186 @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \
4187 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4188 dir='$(DESTDIR)$(or1kdocdir)'; $(am__uninstall_files_from_dir)
4189install-ppcdocDATA: $(ppcdoc_DATA)
4190 @$(NORMAL_INSTALL)
4191 @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
4192 if test -n "$$list"; then \
4193 echo " $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \
4194 $(MKDIR_P) "$(DESTDIR)$(ppcdocdir)" || exit 1; \
4195 fi; \
4196 for p in $$list; do \
4197 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4198 echo "$$d$$p"; \
4199 done | $(am__base_list) | \
4200 while read files; do \
4201 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(ppcdocdir)'"; \
4202 $(INSTALL_DATA) $$files "$(DESTDIR)$(ppcdocdir)" || exit $$?; \
4203 done
4204
4205uninstall-ppcdocDATA:
4206 @$(NORMAL_UNINSTALL)
4207 @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \
4208 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4209 dir='$(DESTDIR)$(ppcdocdir)'; $(am__uninstall_files_from_dir)
4210install-rxdocDATA: $(rxdoc_DATA)
4211 @$(NORMAL_INSTALL)
4212 @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
4213 if test -n "$$list"; then \
4214 echo " $(MKDIR_P) '$(DESTDIR)$(rxdocdir)'"; \
4215 $(MKDIR_P) "$(DESTDIR)$(rxdocdir)" || exit 1; \
4216 fi; \
4217 for p in $$list; do \
4218 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4219 echo "$$d$$p"; \
4220 done | $(am__base_list) | \
4221 while read files; do \
4222 echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(rxdocdir)'"; \
4223 $(INSTALL_DATA) $$files "$(DESTDIR)$(rxdocdir)" || exit $$?; \
4224 done
4225
4226uninstall-rxdocDATA:
4227 @$(NORMAL_UNINSTALL)
4228 @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \
4229 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4230 dir='$(DESTDIR)$(rxdocdir)'; $(am__uninstall_files_from_dir)
92bc001e
MF		 4231install-pkgincludeHEADERS: $(pkginclude_HEADERS)
4232 @$(NORMAL_INSTALL)
4233 @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
4234 if test -n "$$list"; then \
4235 echo " $(MKDIR_P) '$(DESTDIR)$(pkgincludedir)'"; \
4236 $(MKDIR_P) "$(DESTDIR)$(pkgincludedir)" || exit 1; \
4237 fi; \
4238 for p in $$list; do \
4239 if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \
4240 echo "$$d$$p"; \
4241 done | $(am__base_list) | \
4242 while read files; do \
4243 echo " $(INSTALL_HEADER) $$files '$(DESTDIR)$(pkgincludedir)'"; \
4244 $(INSTALL_HEADER) $$files "$(DESTDIR)$(pkgincludedir)" || exit $$?; \
4245 done
4246
4247uninstall-pkgincludeHEADERS:
4248 @$(NORMAL_UNINSTALL)
4249 @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \
4250 files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \
4251 dir='$(DESTDIR)$(pkgincludedir)'; $(am__uninstall_files_from_dir)
b6b1c790 4252
6bddc3e8
MF		 4253# This directory's subdirectories are mostly independent; you can cd
4254# into them and run 'make' without going through this Makefile.
4255# To change the values of 'make' variables: instead of editing Makefiles,
4256# (1) if the variable is set in 'config.status', edit 'config.status'
4257# (which will cause the Makefiles to be regenerated when you run 'make');
4258# (2) otherwise, pass the desired values on the 'make' command line.
4259$(am__recursive_targets):
4260 @fail=; \
4261 if $(am__make_keepgoing); then \
4262 failcom='fail=yes'; \
4263 else \
4264 failcom='exit 1'; \
4265 fi; \
4266 dot_seen=no; \
4267 target=`echo $@ | sed s/-recursive//`; \
4268 case "$@" in \
4269 distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \
4270 *) list='$(SUBDIRS)' ;; \
4271 esac; \
4272 for subdir in $$list; do \
4273 echo "Making $$target in $$subdir"; \
4274 if test "$$subdir" = "."; then \
4275 dot_seen=yes; \
4276 local_target="$$target-am"; \
4277 else \
4278 local_target="$$target"; \
4279 fi; \
4280 ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
4281 || eval $$failcom; \
4282 done; \
4283 if test "$$dot_seen" = "no"; then \
4284 $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \
4285 fi; test -z "$$fail"
4286
4287ID: $(am__tagged_files)
4288 $(am__define_uniq_tagged_files); mkid -fID $$unique
4289tags: tags-recursive
4290TAGS: tags
4291
4292tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4293 set x; \
4294 here=`pwd`; \
4295 if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \
4296 include_option=--etags-include; \
4297 empty_fix=.; \
4298 else \
4299 include_option=--include; \
4300 empty_fix=; \
4301 fi; \
4302 list='$(SUBDIRS)'; for subdir in $$list; do \
4303 if test "$$subdir" = .; then :; else \
4304 test ! -f $$subdir/TAGS || \
4305 set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \
4306 fi; \
4307 done; \
4308 $(am__define_uniq_tagged_files); \
4309 shift; \
4310 if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \
4311 test -n "$$unique" || unique=$$empty_fix; \
4312 if test $$# -gt 0; then \
4313 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4314 "$$@" $$unique; \
4315 else \
4316 $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \
4317 $$unique; \
4318 fi; \
4319 fi
4320ctags: ctags-recursive
4321
4322CTAGS: ctags
4323ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files)
4324 $(am__define_uniq_tagged_files); \
4325 test -z "$(CTAGS_ARGS)$$unique" \
4326 || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \
4327 $$unique
4328
4329GTAGS:
4330 here=`$(am__cd) $(top_builddir) && pwd` \
4331 && $(am__cd) $(top_srcdir) \
4332 && gtags -i $(GTAGS_ARGS) "$$here"
4333cscope: cscope.files
4334 test ! -s cscope.files \
4335 || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS)
4336clean-cscope:
4337 -rm -f cscope.files
4338cscope.files: clean-cscope cscopelist
4339cscopelist: cscopelist-recursive
4340
4341cscopelist-am: $(am__tagged_files)
4342 list='$(am__tagged_files)'; \
4343 case "$(srcdir)" in \
4344 [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \
4345 *) sdir=$(subdir)/$(srcdir) ;; \
4346 esac; \
4347 for i in $$list; do \
4348 if test -f "$$i"; then \
4349 echo "$(subdir)/$$i"; \
4350 else \
4351 echo "$$sdir/$$i"; \
4352 fi; \
4353 done >> $(top_builddir)/cscope.files
4354
4355distclean-tags:
4356 -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
4357 -rm -f cscope.out cscope.in.out cscope.po.out cscope.files
6c57b87f
MF		 4358site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG)
4359 @echo 'Making a new site.exp file ...'
4360 @echo '## these variables are automatically generated by make ##' >site.tmp
4361 @echo '# Do not edit here. If you wish to override these values' >>site.tmp
4362 @echo '# edit the last section' >>site.tmp
4363 @echo 'set srcdir "$(srcdir)"' >>site.tmp
4364 @echo "set objdir `pwd`" >>site.tmp
4365 @echo 'set build_alias "$(build_alias)"' >>site.tmp
4366 @echo 'set build_triplet $(build_triplet)' >>site.tmp
4367 @echo 'set host_alias "$(host_alias)"' >>site.tmp
4368 @echo 'set host_triplet $(host_triplet)' >>site.tmp
4369 @echo 'set target_alias "$(target_alias)"' >>site.tmp
4370 @echo 'set target_triplet $(target_triplet)' >>site.tmp
4371 @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \
4372 echo "## Begin content included from file $$f. Do not modify. ##" \
4373 && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \
4374 && echo "## End content included from file $$f. ##" \
4375 || exit 1; \
4376 done >> site.tmp
4377 @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp
4378 @if test -f site.exp; then \
4379 sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \
4380 fi
4381 @-rm -f site.bak
4382 @test ! -f site.exp || mv site.exp site.bak
4383 @mv site.tmp site.exp
4384
4385distclean-DEJAGNU:
4386 -rm -f site.exp site.bak
4387 -l='$(DEJATOOL)'; for tool in $$l; do \
4388 rm -f $$tool.sum $$tool.log; \
4389 done
a389375f
MF		 4390
4391# Recover from deleted '.trs' file; this should ensure that
4392# "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create
4393# both 'foo.log' and 'foo.trs'. Break the recipe in two subshells
4394# to avoid problems with "make -n".
4395.log.trs:
4396 rm -f $< $@
4397 $(MAKE) $(AM_MAKEFLAGS) $<
4398
4399# Leading 'am--fnord' is there to ensure the list of targets does not
4400# expand to empty, as could happen e.g. with make check TESTS=''.
4401am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck)
4402am--force-recheck:
4403 @:
4404
4405$(TEST_SUITE_LOG): $(TEST_LOGS)
4406 @$(am__set_TESTS_bases); \
4407 am__f_ok () { test -f "$$1" && test -r "$$1"; }; \
4408 redo_bases=`for i in $$bases; do \
4409 am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \
4410 done`; \
4411 if test -n "$$redo_bases"; then \
4412 redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \
4413 redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \
4414 if $(am__make_dryrun); then :; else \
4415 rm -f $$redo_logs && rm -f $$redo_results || exit 1; \
4416 fi; \
4417 fi; \
4418 if test -n "$$am__remaking_logs"; then \
4419 echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \
4420 "recursion detected" >&2; \
4421 elif test -n "$$redo_logs"; then \
4422 am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \
4423 fi; \
4424 if $(am__make_dryrun); then :; else \
4425 st=0; \
4426 errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \
4427 for i in $$redo_bases; do \
4428 test -f $$i.trs && test -r $$i.trs \
4429 || { echo "$$errmsg $$i.trs" >&2; st=1; }; \
4430 test -f $$i.log && test -r $$i.log \
4431 || { echo "$$errmsg $$i.log" >&2; st=1; }; \
4432 done; \
4433 test $$st -eq 0 || exit 1; \
4434 fi
4435 @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \
4436 ws='[ ]'; \
4437 results=`for b in $$bases; do echo $$b.trs; done`; \
4438 test -n "$$results" || results=/dev/null; \
4439 all=` grep "^$$ws*:test-result:" $$results | wc -l`; \
4440 pass=` grep "^$$ws*:test-result:$$ws*PASS" $$results | wc -l`; \
4441 fail=` grep "^$$ws*:test-result:$$ws*FAIL" $$results | wc -l`; \
4442 skip=` grep "^$$ws*:test-result:$$ws*SKIP" $$results | wc -l`; \
4443 xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \
4444 xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \
4445 error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \
4446 if test `expr $$fail + $$xpass + $$error` -eq 0; then \
4447 success=true; \
4448 else \
4449 success=false; \
4450 fi; \
4451 br='==================='; br=$$br$$br$$br$$br; \
4452 result_count () \
4453 { \
4454 if test x"$$1" = x"--maybe-color"; then \
4455 maybe_colorize=yes; \
4456 elif test x"$$1" = x"--no-color"; then \
4457 maybe_colorize=no; \
4458 else \
4459 echo "$@: invalid 'result_count' usage" >&2; exit 4; \
4460 fi; \
4461 shift; \
4462 desc=$$1 count=$$2; \
4463 if test $$maybe_colorize = yes && test $$count -gt 0; then \
4464 color_start=$$3 color_end=$$std; \
4465 else \
4466 color_start= color_end=; \
4467 fi; \
4468 echo "$${color_start}# $$desc $$count$${color_end}"; \
4469 }; \
4470 create_testsuite_report () \
4471 { \
4472 result_count $$1 "TOTAL:" $$all "$$brg"; \
4473 result_count $$1 "PASS: " $$pass "$$grn"; \
4474 result_count $$1 "SKIP: " $$skip "$$blu"; \
4475 result_count $$1 "XFAIL:" $$xfail "$$lgn"; \
4476 result_count $$1 "FAIL: " $$fail "$$red"; \
4477 result_count $$1 "XPASS:" $$xpass "$$red"; \
4478 result_count $$1 "ERROR:" $$error "$$mgn"; \
4479 }; \
4480 { \
4481 echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \
4482 $(am__rst_title); \
4483 create_testsuite_report --no-color; \
4484 echo; \
4485 echo ".. contents:: :depth: 2"; \
4486 echo; \
4487 for b in $$bases; do echo $$b; done \
4488 | $(am__create_global_log); \
4489 } >$(TEST_SUITE_LOG).tmp || exit 1; \
4490 mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \
4491 if $$success; then \
4492 col="$$grn"; \
4493 else \
4494 col="$$red"; \
4495 test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG); \
4496 fi; \
4497 echo "$${col}$$br$${std}"; \
4498 echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \
4499 echo "$${col}$$br$${std}"; \
4500 create_testsuite_report --maybe-color; \
4501 echo "$$col$$br$$std"; \
4502 if $$success; then :; else \
4503 echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \
4504 if test -n "$(PACKAGE_BUGREPORT)"; then \
4505 echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \
4506 fi; \
4507 echo "$$col$$br$$std"; \
4508 fi; \
4509 $$success || exit 1
4510
4511check-TESTS:
4512 @list='$(RECHECK_LOGS)'; test -z "$$list" || rm -f $$list
4513 @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list
4514 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4515 @set +e; $(am__set_TESTS_bases); \
4516 log_list=`for i in $$bases; do echo $$i.log; done`; \
4517 trs_list=`for i in $$bases; do echo $$i.trs; done`; \
4518 log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \
4519 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \
4520 exit $$?;
4521recheck: all $(check_PROGRAMS)
4522 @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
4523 @set +e; $(am__set_TESTS_bases); \
4524 bases=`for i in $$bases; do echo $$i; done \
4525 | $(am__list_recheck_tests)` || exit 1; \
4526 log_list=`for i in $$bases; do echo $$i.log; done`; \
4527 log_list=`echo $$log_list`; \
4528 $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \
4529 am__force_recheck=am--force-recheck \
4530 TEST_LOGS="$$log_list"; \
4531 exit $$?
4532testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT)
4533 @p='testsuite/common/bits32m0$(EXEEXT)'; \
4534 b='testsuite/common/bits32m0'; \
4535 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4536 --log-file $$b.log --trs-file $$b.trs \
4537 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4538 "$$tst" $(AM_TESTS_FD_REDIRECT)
4539testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT)
4540 @p='testsuite/common/bits32m31$(EXEEXT)'; \
4541 b='testsuite/common/bits32m31'; \
4542 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4543 --log-file $$b.log --trs-file $$b.trs \
4544 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4545 "$$tst" $(AM_TESTS_FD_REDIRECT)
4546testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT)
4547 @p='testsuite/common/bits64m0$(EXEEXT)'; \
4548 b='testsuite/common/bits64m0'; \
4549 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4550 --log-file $$b.log --trs-file $$b.trs \
4551 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4552 "$$tst" $(AM_TESTS_FD_REDIRECT)
4553testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT)
4554 @p='testsuite/common/bits64m63$(EXEEXT)'; \
4555 b='testsuite/common/bits64m63'; \
4556 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4557 --log-file $$b.log --trs-file $$b.trs \
4558 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4559 "$$tst" $(AM_TESTS_FD_REDIRECT)
4560testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT)
4561 @p='testsuite/common/alu-tst$(EXEEXT)'; \
4562 b='testsuite/common/alu-tst'; \
4563 $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \
4564 --log-file $$b.log --trs-file $$b.trs \
4565 $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \
4566 "$$tst" $(AM_TESTS_FD_REDIRECT)
4567.test.log:
4568 @p='$<'; \
4569 $(am__set_b); \
4570 $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4571 --log-file $$b.log --trs-file $$b.trs \
4572 $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4573 "$$tst" $(AM_TESTS_FD_REDIRECT)
4574@am__EXEEXT_TRUE@.test$(EXEEXT).log:
4575@am__EXEEXT_TRUE@ @p='$<'; \
4576@am__EXEEXT_TRUE@ $(am__set_b); \
4577@am__EXEEXT_TRUE@ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \
4578@am__EXEEXT_TRUE@ --log-file $$b.log --trs-file $$b.trs \
4579@am__EXEEXT_TRUE@ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \
4580@am__EXEEXT_TRUE@ "$$tst" $(AM_TESTS_FD_REDIRECT)
6bddc3e8 4581check-am: all-am
a389375f
MF		 4582 $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS)
4583 $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS
80636a54
MF		 4584check: $(BUILT_SOURCES)
4585 $(MAKE) $(AM_MAKEFLAGS) check-recursive
c0c25232 4586all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h
6bddc3e8
MF		 4587installdirs: installdirs-recursive
4588installdirs-am:
94f5dfed 4589 for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \
92bc001e
MF		 4590 test -z "$$dir" || $(MKDIR_P) "$$dir"; \
4591 done
80636a54
MF		 4592install: $(BUILT_SOURCES)
4593 $(MAKE) $(AM_MAKEFLAGS) install-recursive
6bddc3e8
MF		 4594install-exec: install-exec-recursive
4595install-data: install-data-recursive
4596uninstall: uninstall-recursive
4597
4598install-am: all-am
4599 @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am
4600
4601installcheck: installcheck-recursive
4602install-strip:
4603 if test -z '$(STRIP)'; then \
4604 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4605 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4606 install; \
4607 else \
4608 $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \
4609 install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \
4610 "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \
4611 fi
4612mostlyclean-generic:
4613 -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES)
a389375f
MF		 4614 -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS)
4615 -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs)
4616 -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG)
c906108c 4617
6bddc3e8 4618clean-generic:
a389375f 4619 -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES)
c906108c 4620
6bddc3e8
MF		 4621distclean-generic:
4622 -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
4623 -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
72be276f 4624 -rm -f aarch64/$(DEPDIR)/$(am__dirstamp)
c0c25232 4625 -rm -f aarch64/$(am__dirstamp)
72be276f 4626 -rm -f arm/$(DEPDIR)/$(am__dirstamp)
c0c25232 4627 -rm -f arm/$(am__dirstamp)
72be276f 4628 -rm -f avr/$(DEPDIR)/$(am__dirstamp)
c0c25232 4629 -rm -f avr/$(am__dirstamp)
72be276f 4630 -rm -f bfin/$(DEPDIR)/$(am__dirstamp)
c0c25232 4631 -rm -f bfin/$(am__dirstamp)
72be276f 4632 -rm -f bpf/$(DEPDIR)/$(am__dirstamp)
c0c25232 4633 -rm -f bpf/$(am__dirstamp)
5bea0c32
MF		 4634 -rm -f common/$(DEPDIR)/$(am__dirstamp)
4635 -rm -f common/$(am__dirstamp)
70ab6bdd
MF		 4636 -rm -f cr16/$(DEPDIR)/$(am__dirstamp)
4637 -rm -f cr16/$(am__dirstamp)
cb9bdc02
MF		 4638 -rm -f cris/$(DEPDIR)/$(am__dirstamp)
4639 -rm -f cris/$(am__dirstamp)
70ab6bdd
MF		 4640 -rm -f d10v/$(DEPDIR)/$(am__dirstamp)
4641 -rm -f d10v/$(am__dirstamp)
c0c25232
MF		 4642 -rm -f erc32/$(DEPDIR)/$(am__dirstamp)
4643 -rm -f erc32/$(am__dirstamp)
72be276f 4644 -rm -f example-synacor/$(DEPDIR)/$(am__dirstamp)
c0c25232 4645 -rm -f example-synacor/$(am__dirstamp)
72be276f 4646 -rm -f frv/$(DEPDIR)/$(am__dirstamp)
c0c25232 4647 -rm -f frv/$(am__dirstamp)
72be276f 4648 -rm -f ft32/$(DEPDIR)/$(am__dirstamp)
c0c25232 4649 -rm -f ft32/$(am__dirstamp)
72be276f 4650 -rm -f h8300/$(DEPDIR)/$(am__dirstamp)
c0c25232 4651 -rm -f h8300/$(am__dirstamp)
b6b1c790
MF		 4652 -rm -f igen/$(DEPDIR)/$(am__dirstamp)
4653 -rm -f igen/$(am__dirstamp)
72be276f 4654 -rm -f iq2000/$(DEPDIR)/$(am__dirstamp)
c0c25232 4655 -rm -f iq2000/$(am__dirstamp)
72be276f 4656 -rm -f lm32/$(DEPDIR)/$(am__dirstamp)
c0c25232 4657 -rm -f lm32/$(am__dirstamp)
70ab6bdd
MF		 4658 -rm -f m32c/$(DEPDIR)/$(am__dirstamp)
4659 -rm -f m32c/$(am__dirstamp)
72be276f 4660 -rm -f m32r/$(DEPDIR)/$(am__dirstamp)
c0c25232 4661 -rm -f m32r/$(am__dirstamp)
70ab6bdd
MF		 4662 -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp)
4663 -rm -f m68hc11/$(am__dirstamp)
72be276f 4664 -rm -f mcore/$(DEPDIR)/$(am__dirstamp)
c0c25232 4665 -rm -f mcore/$(am__dirstamp)
72be276f 4666 -rm -f microblaze/$(DEPDIR)/$(am__dirstamp)
c0c25232 4667 -rm -f microblaze/$(am__dirstamp)
72be276f 4668 -rm -f mips/$(DEPDIR)/$(am__dirstamp)
c0c25232 4669 -rm -f mips/$(am__dirstamp)
72be276f 4670 -rm -f mn10300/$(DEPDIR)/$(am__dirstamp)
c0c25232 4671 -rm -f mn10300/$(am__dirstamp)
72be276f 4672 -rm -f moxie/$(DEPDIR)/$(am__dirstamp)
c0c25232 4673 -rm -f moxie/$(am__dirstamp)
72be276f 4674 -rm -f msp430/$(DEPDIR)/$(am__dirstamp)
c0c25232 4675 -rm -f msp430/$(am__dirstamp)
72be276f 4676 -rm -f or1k/$(DEPDIR)/$(am__dirstamp)
c0c25232
MF		 4677 -rm -f or1k/$(am__dirstamp)
4678 -rm -f ppc/$(DEPDIR)/$(am__dirstamp)
4679 -rm -f ppc/$(am__dirstamp)
72be276f 4680 -rm -f pru/$(DEPDIR)/$(am__dirstamp)
c0c25232 4681 -rm -f pru/$(am__dirstamp)
72be276f 4682 -rm -f riscv/$(DEPDIR)/$(am__dirstamp)
c0c25232 4683 -rm -f riscv/$(am__dirstamp)
72be276f 4684 -rm -f rl78/$(DEPDIR)/$(am__dirstamp)
c0c25232 4685 -rm -f rl78/$(am__dirstamp)
72be276f 4686 -rm -f rx/$(DEPDIR)/$(am__dirstamp)
c0c25232 4687 -rm -f rx/$(am__dirstamp)
70ab6bdd
MF		 4688 -rm -f sh/$(DEPDIR)/$(am__dirstamp)
4689 -rm -f sh/$(am__dirstamp)
a389375f
MF		 4690 -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp)
4691 -rm -f testsuite/common/$(am__dirstamp)
72be276f 4692 -rm -f v850/$(DEPDIR)/$(am__dirstamp)
c0c25232 4693 -rm -f v850/$(am__dirstamp)
a389375f 4694 -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES)
c906108c 4695
6bddc3e8
MF		 4696maintainer-clean-generic:
4697 @echo "This command is intended for maintainers to use"
4698 @echo "it deletes files that may require special tools to rebuild."
80636a54 4699 -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES)
6bddc3e8 4700clean: clean-recursive
c906108c 4701
b5689863 4702clean-am: clean-checkPROGRAMS clean-generic clean-libtool \
c0c25232 4703 clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am
c906108c 4704
6bddc3e8
MF		 4705distclean: distclean-recursive
4706 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
72be276f 4707 -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) ppc/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
6bddc3e8 4708 -rm -f Makefile
b6b1c790 4709distclean-am: clean-am distclean-DEJAGNU distclean-compile \
b5689863
MF		 4710 distclean-generic distclean-hdr distclean-libtool \
4711 distclean-tags
c906108c 4712
6bddc3e8 4713dvi: dvi-recursive
c906108c 4714
6bddc3e8 4715dvi-am:
c906108c 4716
6bddc3e8 4717html: html-recursive
c906108c 4718
6bddc3e8 4719html-am:
c906108c 4720
6bddc3e8
MF		 4721info: info-recursive
4722
4723info-am:
4724
63bf33ff 4725install-data-am: install-armdocDATA install-data-local install-dtbDATA \
94f5dfed 4726 install-erc32docDATA install-frvdocDATA install-or1kdocDATA \
ed939535 4727 install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA
6bddc3e8
MF		 4728
4729install-dvi: install-dvi-recursive
4730
4731install-dvi-am:
4732
63bf33ff 4733install-exec-am: install-exec-local
6bddc3e8
MF		 4734
4735install-html: install-html-recursive
4736
4737install-html-am:
4738
4739install-info: install-info-recursive
4740
4741install-info-am:
4742
4743install-man:
4744
4745install-pdf: install-pdf-recursive
4746
4747install-pdf-am:
4748
4749install-ps: install-ps-recursive
4750
4751install-ps-am:
4752
4753installcheck-am:
4754
4755maintainer-clean: maintainer-clean-recursive
4756 -rm -f $(am__CONFIG_DISTCLEAN_FILES)
4757 -rm -rf $(top_srcdir)/autom4te.cache
72be276f 4758 -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) ppc/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR)
6bddc3e8
MF		 4759 -rm -f Makefile
4760maintainer-clean-am: distclean-am maintainer-clean-generic
4761
4762mostlyclean: mostlyclean-recursive
4763
b5689863
MF		 4764mostlyclean-am: mostlyclean-compile mostlyclean-generic \
4765 mostlyclean-libtool
6bddc3e8
MF		 4766
4767pdf: pdf-recursive
4768
4769pdf-am:
4770
4771ps: ps-recursive
4772
4773ps-am:
4774
94f5dfed 4775uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \
59d8576e 4776 uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \
94f5dfed
MF		 4777 uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \
4778 uninstall-ppcdocDATA uninstall-rxdocDATA
6bddc3e8 4779
80636a54
MF		 4780.MAKE: $(am__recursive_targets) all check check-am install install-am \
4781 install-strip
6bddc3e8
MF		 4782
4783.PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \
a389375f 4784 am--refresh check check-DEJAGNU check-TESTS check-am clean \
b5689863 4785 clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \
c0c25232
MF		 4786 clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \
4787 cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \
4788 distclean-compile distclean-generic distclean-hdr \
4789 distclean-libtool distclean-tags dvi dvi-am html html-am info \
4790 info-am install install-am install-armdocDATA install-data \
4791 install-data-am install-data-local install-dtbDATA install-dvi \
4792 install-dvi-am install-erc32docDATA install-exec \
4793 install-exec-am install-exec-local install-frvdocDATA \
4794 install-html install-html-am install-info install-info-am \
4795 install-man install-or1kdocDATA install-pdf install-pdf-am \
63bf33ff
MF		 4796 install-pkgincludeHEADERS install-ppcdocDATA install-ps \
4797 install-ps-am install-rxdocDATA install-strip installcheck \
4798 installcheck-am installdirs installdirs-am maintainer-clean \
4799 maintainer-clean-generic mostlyclean mostlyclean-compile \
4800 mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
4801 recheck tags tags-am uninstall uninstall-am \
4802 uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \
59d8576e 4803 uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \
63bf33ff
MF		 4804 uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \
4805 uninstall-rxdocDATA
6bddc3e8
MF		 4806
4807.PRECIOUS: Makefile
c906108c 4808
4d4996a5 4809@am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@
c906108c 4810
64ae70dd 4811# Generate target constants for newlib/libgloss from its source tree.
5e25901f
MF		 4812# This file is shipped with distributions so we build in the source dir.
4813# Use `make nltvals' to rebuild.
5e25901f
MF		 4814.PHONY: nltvals
4815nltvals:
0a129eb1 4816 $(srccom)/gennltvals.py --cpp "$(CPP)"
5e25901f 4817
015f7b74
MF		 4818common/version.c: common/version.c-stamp ; @true
4819common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
fbe8d1cf 4820 $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp
015f7b74 4821 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=)
fbe8d1cf 4822 $(AM_V_at)touch $@
b6b1c790 4823
b014c9b0
MF		 4824.PRECIOUS: %/test-hw-events.o
4825%/test-hw-events.o: common/hw-events.c
4826 $(AM_V_CC)$(COMPILE) -DMAIN -c -o $@ $<
4827%/test-hw-events: %/test-hw-events.o %/libsim.a
4828 $(AM_V_CCLD)$(LINK) -o $@ $^ $(SIM_COMMON_LIBS) $(LIBS)
4829
f4ac2306
MF		 4830# FIXME This is one very simple-minded way of generating the file hw-config.h.
4831%/hw-config.h: %/stamp-hw ; @true
4832%/stamp-hw: Makefile
4833 $(AM_V_GEN)set -e; \
4834 ( \
4835 sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \
4836 echo "/* generated by Makefile */" ; \
4837 printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \
4838 echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \
4839 printf " dv_%s_descriptor,\n" $$sim_hw ; \
4840 echo " NULL," ; \
4841 echo "};" \
4842 ) > $@.tmp; \
4843 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \
4844 touch $@
4845.PRECIOUS: %/stamp-hw
54e26255
MF		 4846%/modules.c: %/stamp-modules ; @true
4847%/stamp-modules: Makefile
4848 $(AM_V_GEN)set -e; \
4849 LANG=C ; export LANG; \
4850 LC_ALL=C ; export LC_ALL; \
4851 sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \
4852 ( \
4853 echo '/* Do not modify this file. */'; \
4854 echo '/* It is created automatically by the Makefile. */'; \
4855 echo '#include "libiberty.h"'; \
4856 echo '#include "sim-module.h"'; \
4857 sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \
4858 echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \
4859 sed -e 's:\(.*\): \1,:' $@.l-tmp; \
4860 echo '};'; \
4861 echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \
4862 ) >$@.tmp; \
4863 $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \
4864 rm -f $@.l-tmp; \
4865 touch $@
4866.PRECIOUS: %/stamp-modules
f4ac2306 4867
b6b1c790 4868# Alias for developers.
9a7472d7 4869igen: $(IGEN)
b6b1c790 4870
aa0fca16 4871# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
9a7472d7
MF		 4872igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp)
4873 $(AM_V_at)-rm -f $@
4874 $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD)
4875 $(AM_V_at)$(RANLIB_FOR_BUILD) $@
aa0fca16 4876
9a7472d7
MF		 4877igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp)
4878 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD)
b6b1c790
MF		 4879
4880# igen is a build-time only tool. Override the default rules for it.
9a7472d7
MF		 4881igen/%.o: igen/%.c
4882 $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
b6b1c790
MF		 4883
4884# Build some of the files in standalone mode for developers of igen itself.
9a7472d7
MF		 4885igen/%-main.o: igen/%.c
4886 $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@
b6b1c790 4887
e1e1ae6e
MF		 4888site-sim-config.exp: Makefile
4889 $(AM_V_GEN)( \
7a259895 4890 echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \
e1e1ae6e
MF		 4891 echo "set builddir \"$(builddir)\""; \
4892 echo "set srcdir \"$(srcdir)/testsuite\""; \
8996c210 4893 $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \
e1e1ae6e 4894 ) > $@
6c57b87f 4895
804de1fa
MF		 4896# Ignore dirs that only contain configuration settings.
4897check/./config/%.exp: ; @true
e60091e4 4898check/config/%.exp: ; @true
804de1fa 4899check/./lib/%.exp: ; @true
e60091e4 4900check/lib/%.exp: ; @true
804de1fa
MF		 4901
4902check/%.exp:
4903 $(AM_V_at)mkdir -p testsuite/$*
4904 $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp
4905
4906check-DEJAGNU-parallel:
4907 $(AM_V_at)( \
8f97b519
MF		 4908 set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \
4909 $(MAKE) -k `printf 'check/%s.exp ' $$@`; \
804de1fa 4910 ret=$$?; \
8f97b519 4911 set -- `printf 'testsuite/%s/ ' $$@`; \
804de1fa 4912 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \
8f97b519 4913 `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \
804de1fa 4914 $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \
8f97b519 4915 `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \
804de1fa
MF		 4916 echo; \
4917 $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \
4918 exit $$ret)
4919
4920check-DEJAGNU-single:
4921 $(AM_V_RUNTEST)$(DO_RUNTEST)
4922
4923# If running a single job, invoking runtest once is faster & has nicer output.
6c57b87f 4924check-DEJAGNU: site.exp
804de1fa 4925 $(AM_V_at)(set -e; \
6c57b87f
MF		 4926 EXPECT=${EXPECT} ; export EXPECT ; \
4927 runtest=$(RUNTEST); \
4928 if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
804de1fa
MF		 4929 case "$(MAKEFLAGS)" in \
4930 *-j*) $(MAKE) check-DEJAGNU-parallel;; \
4931 *) $(MAKE) check-DEJAGNU-single;; \
4932 esac; \
4933 else \
4934 echo "WARNING: could not find \`runtest'" 1>&2; :;\
4935 fi)
6c57b87f 4936
a389375f
MF		 4937# These tests are build-time only tools. Override the default rules for them.
4938testsuite/common/%.o: testsuite/common/%.c
4939 $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@
4940
4941testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4942 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD)
4943
4944testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4945 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD)
4946
4947testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4948 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD)
4949
4950testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4951 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD)
4952
429a55b8 4953testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 4954 $(AM_V_GEN)$< 32 0 big > $@.tmp
4955 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4956 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 4957
4958testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4959 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD)
4960
429a55b8 4961testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 4962 $(AM_V_GEN)$< 32 31 little > $@.tmp
4963 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4964 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 4965
4966testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4967 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD)
4968
429a55b8 4969testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 4970 $(AM_V_GEN)$< 64 0 big > $@.tmp
4971 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4972 $(AM_V_at)mv $@.tmp $@
a389375f
MF		 4973
4974testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp)
4975 $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD)
4976
429a55b8 4977testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c
fbe8d1cf
MF		 4978 $(AM_V_GEN)$< 64 63 little > $@.tmp
4979 $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
4980 $(AM_V_at)mv $@.tmp $@
c58353b7
MF		 4981@SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h
4982
109a0a7e
MF		 4983@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/modules.o: aarch64/modules.c
4984
b36a89d1
MF		 4985@SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c ; $(SIM_COMPILE)
4986@SIM_ENABLE_ARCH_aarch64_TRUE@-@am__include@ aarch64/$(DEPDIR)/*.Po
6a8e18f0
MF		 4987@SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h
4988
109a0a7e
MF		 4989@SIM_ENABLE_ARCH_arm_TRUE@arm/modules.o: arm/modules.c
4990
b36a89d1
MF		 4991@SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c ; $(SIM_COMPILE)
4992@SIM_ENABLE_ARCH_arm_TRUE@-@am__include@ arm/$(DEPDIR)/*.Po
c65b31b8
MF		 4993@SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h
4994
109a0a7e
MF		 4995@SIM_ENABLE_ARCH_avr_TRUE@avr/modules.o: avr/modules.c
4996
b36a89d1
MF		 4997@SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c ; $(SIM_COMPILE)
4998@SIM_ENABLE_ARCH_avr_TRUE@-@am__include@ avr/$(DEPDIR)/*.Po
bc1dd618
MF		 4999@SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h
5000
109a0a7e
MF		 5001@SIM_ENABLE_ARCH_bfin_TRUE@bfin/modules.o: bfin/modules.c
5002
b36a89d1
MF		 5003@SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c ; $(SIM_COMPILE)
5004@SIM_ENABLE_ARCH_bfin_TRUE@-@am__include@ bfin/$(DEPDIR)/*.Po
a389375f 5005
e5f7bc29
MF		 5006@SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp)
5007@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o
5008@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\
5009@SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \
5010@SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \
5011@SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \
5012@SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \
5013@SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \
5014@SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \
5015@SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \
5016@SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \
5017@SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \
5018@SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \
5019@SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \
5020@SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp
5021@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h
5022@SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h
cdbb77e4
MF		 5023@SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h
5024
109a0a7e
MF		 5025@SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.o: bpf/modules.c
5026
b36a89d1
MF		 5027@SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE)
5028@SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po
ee3134d0 5029
437eeee9 5030@SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS)
e5f7bc29 5031
0a129eb1
MF		 5032@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
5033@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
5034@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5035@SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
5036@SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
5037@SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le
5038@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
5039@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
5040@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
5041
5042@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
5043@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
5044@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5045@SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
5046@SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \
5047@SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be
5048@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
5049@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
5050@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@
5051
3abb19ad
MF		 5052@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be
5053
5054@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch:
5055@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5056@SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch
5057
5058@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu:
5059@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU)
5060@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)rm -f $(srcdir)/bpf/model.c
5061@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu
5062
5063@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le:
5064@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS)
5065@SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le
5066
5067@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be:
5068@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS)
5069@SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be
5070
5071@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le:
5072@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
5073@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle
5074
5075@SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be:
5076@SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE)
5077@SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be
2cbdcc34
MF		 5078@SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h
5079
109a0a7e
MF		 5080@SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.o: cr16/modules.c
5081
b36a89d1
MF		 5082@SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE)
5083@SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po
ee3134d0 5084
437eeee9 5085@SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS)
3abb19ad 5086
70ab6bdd
MF		 5087# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5088@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
5089@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
5090
5091# gencode is a build-time only tool. Override the default rules for it.
5092@SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c
5093@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5094@SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c
5095@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5096
5097@SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT)
5098@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@
5099
5100@SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
5101@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
eaa678ec
MF		 5102@SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
5103
109a0a7e
MF		 5104@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.o: cris/modules.c
5105
b36a89d1
MF		 5106@SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE)
5107@SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po
ee3134d0 5108
437eeee9 5109@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
70ab6bdd 5110
0a129eb1
MF		 5111@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
5112@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
5113@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5114@SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \
5115@SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \
5116@SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
5117@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
5118@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
5119@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
5120
0a129eb1
MF		 5121@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
5122@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
5123@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5124@SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \
5125@SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \
5126@SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
5127@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
5128@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
5129@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@
5130
3298ee7a
MF		 5131@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f
5132
5133@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch:
5134@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5135@SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch
5136
5137@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f:
5138@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5139@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c
5140@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f
5141
5142@SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f:
5143@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5144@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c
5145@SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f
faf177df
MF		 5146@SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h
5147
109a0a7e
MF		 5148@SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.o: d10v/modules.c
5149
b36a89d1
MF		 5150@SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE)
5151@SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po
ee3134d0 5152
437eeee9 5153@SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS)
3298ee7a 5154
70ab6bdd
MF		 5155# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5156@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
5157@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
5158
5159# gencode is a build-time only tool. Override the default rules for it.
5160@SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c
5161@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5162@SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c
5163@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5164
5165@SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT)
5166@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@
5167
5168@SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
5169@SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@
3f6c63ac
MF		 5170@SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h
5171
109a0a7e
MF		 5172@SIM_ENABLE_ARCH_erc32_TRUE@erc32/modules.o: erc32/modules.c
5173
b36a89d1
MF		 5174@SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c ; $(SIM_COMPILE)
5175@SIM_ENABLE_ARCH_erc32_TRUE@-@am__include@ erc32/$(DEPDIR)/*.Po
c0c25232
MF		 5176
5177@SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT)
5178@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
63bf33ff
MF		 5179@SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs
5180@SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5181@SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \
c95bd911 5182@SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT)
59d8576e
MF		 5183@SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local:
5184@SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis
16a6d542
MF		 5185@SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h
5186
109a0a7e
MF		 5187@SIM_ENABLE_ARCH_examples_TRUE@example-synacor/modules.o: example-synacor/modules.c
5188
b36a89d1
MF		 5189@SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c ; $(SIM_COMPILE)
5190@SIM_ENABLE_ARCH_examples_TRUE@-@am__include@ example-synacor/$(DEPDIR)/*.Po
c26946a4
MF		 5191@SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h
5192
109a0a7e
MF		 5193@SIM_ENABLE_ARCH_frv_TRUE@frv/modules.o: frv/modules.c
5194
b36a89d1
MF		 5195@SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE)
5196@SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po
ee3134d0 5197
437eeee9 5198@SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS)
70ab6bdd 5199
0a129eb1
MF		 5200@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
5201@SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
5202@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5203@SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \
5204@SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \
5205@SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
5206@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
5207@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
5208@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@
5209
cd313814
MF		 5210@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode
5211
5212@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch:
5213@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5214@SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch
5215
5216@SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode:
5217@SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE)
5218@SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode
6fe4bd8c
MF		 5219@SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h
5220
109a0a7e
MF		 5221@SIM_ENABLE_ARCH_ft32_TRUE@ft32/modules.o: ft32/modules.c
5222
b36a89d1
MF		 5223@SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c ; $(SIM_COMPILE)
5224@SIM_ENABLE_ARCH_ft32_TRUE@-@am__include@ ft32/$(DEPDIR)/*.Po
3e9c9407
MF		 5225@SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h
5226
109a0a7e
MF		 5227@SIM_ENABLE_ARCH_h8300_TRUE@h8300/modules.o: h8300/modules.c
5228
b36a89d1
MF		 5229@SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c ; $(SIM_COMPILE)
5230@SIM_ENABLE_ARCH_h8300_TRUE@-@am__include@ h8300/$(DEPDIR)/*.Po
1486f22b
MF		 5231@SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h
5232
109a0a7e
MF		 5233@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.o: iq2000/modules.c
5234
b36a89d1
MF		 5235@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE)
5236@SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po
ee3134d0 5237
437eeee9 5238@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS)
cd313814 5239
0a129eb1
MF		 5240@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
5241@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
5242@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5243@SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \
5244@SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \
5245@SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
5246@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
5247@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
5248@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@
5249
d5dd8f5d
MF		 5250@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode
5251
5252@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch:
5253@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5254@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch
5255
5256@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode:
5257@SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5258@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode
000f7bee
MF		 5259@SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h
5260
109a0a7e
MF		 5261@SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.o: lm32/modules.c
5262
b36a89d1
MF		 5263@SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE)
5264@SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po
ee3134d0 5265
437eeee9 5266@SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS)
d5dd8f5d 5267
0a129eb1
MF		 5268@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
5269@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
5270@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5271@SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \
5272@SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \
5273@SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
5274@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
5275@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
5276@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@
5277
86958583
MF		 5278@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
5279
5280@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
5281@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5282@SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
5283
5284@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
5285@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5286@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
ba3a8498
MF		 5287@SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h
5288
109a0a7e
MF		 5289@SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.o: m32c/modules.c
5290
b36a89d1
MF		 5291@SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE)
5292@SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po
ee3134d0 5293
437eeee9 5294@SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS)
c0c25232 5295
70ab6bdd
MF		 5296# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5297@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
5298@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
5299
5300# opc2c is a build-time only tool. Override the default rules for it.
5301@SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c
5302@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5303
5304@SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT)
5305@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5306@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
5307
5308@SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT)
5309@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
5310@SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@
8136f057
MF		 5311@SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h
5312
109a0a7e
MF		 5313@SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.o: m32r/modules.c
5314
b36a89d1
MF		 5315@SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE)
5316@SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po
ee3134d0 5317
437eeee9 5318@SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS)
70ab6bdd 5319
0a129eb1
MF		 5320@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
5321@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
5322@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5323@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \
5324@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \
5325@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
5326@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
5327@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
5328@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
5329
2025c82b 5330@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop-x ; @true
0a129eb1
MF		 5331@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
5332@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5333@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
5334@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \
5335@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
5336@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
5337@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
5338@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
5339
2025c82b 5340@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop-2 ; @true
0a129eb1
MF		 5341@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
5342@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5343@SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
5344@SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \
5345@SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
5346@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
5347@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
5348@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@
5349
cf764309
MF		 5350@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2
5351
5352@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch:
5353@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
5354@SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch
5355
5356@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode:
5357@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5358@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode
5359
5360@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x:
5361@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5362@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x
5363
5364@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2:
5365@SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5366@SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2
ccb68071
MF		 5367@SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h
5368
109a0a7e
MF		 5369@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.o: m68hc11/modules.c
5370
b36a89d1
MF		 5371@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE)
5372@SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po
ee3134d0 5373
437eeee9 5374@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS)
cf764309 5375
70ab6bdd
MF		 5376# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5377@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
5378@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
5379
5380# gencode is a build-time only tool. Override the default rules for it.
5381@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c
5382@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5383
5384@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT)
5385@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@
5386
5387@SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT)
5388@SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@
dfceaa0d
MF		 5389@SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h
5390
109a0a7e
MF		 5391@SIM_ENABLE_ARCH_mcore_TRUE@mcore/modules.o: mcore/modules.c
5392
b36a89d1
MF		 5393@SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c ; $(SIM_COMPILE)
5394@SIM_ENABLE_ARCH_mcore_TRUE@-@am__include@ mcore/$(DEPDIR)/*.Po
a6ead840
MF		 5395@SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h
5396
109a0a7e
MF		 5397@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/modules.o: microblaze/modules.c
5398
b36a89d1
MF		 5399@SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c ; $(SIM_COMPILE)
5400@SIM_ENABLE_ARCH_microblaze_TRUE@-@am__include@ microblaze/$(DEPDIR)/*.Po
1f1afa43
MF		 5401@SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h
5402
109a0a7e
MF		 5403@SIM_ENABLE_ARCH_mips_TRUE@mips/modules.o: mips/modules.c
5404
b36a89d1
MF		 5405@SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE)
5406@SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po
ee3134d0 5407
437eeee9 5408@SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS)
70ab6bdd 5409
49d3ce6c 5410@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable
3a31051b 5411@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single
f6d58d40
MF		 5412@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16
5413@SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32
f12c3c63 5414@SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run
49d3ce6c
MF		 5415
5416@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN)
5417@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5418@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5419@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5420@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5421@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5422@SIM_ENABLE_ARCH_mips_TRUE@ -Wnowidth \
5423@SIM_ENABLE_ARCH_mips_TRUE@ -Wnounimplemented \
5424@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \
5425@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5426@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5427@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5428@SIM_ENABLE_ARCH_mips_TRUE@ -n itable.h -ht mips/itable.h \
5429@SIM_ENABLE_ARCH_mips_TRUE@ -n itable.c -t mips/itable.c
5430@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5431
3a31051b
MF		 5432@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5433@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5434@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5435@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5436@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5437@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5438@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
5439@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5440@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5441@SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
5442@SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
5443@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5444@SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
5445@SIM_ENABLE_ARCH_mips_TRUE@ -x \
5446@SIM_ENABLE_ARCH_mips_TRUE@ -n icache.h -hc mips/icache.h \
5447@SIM_ENABLE_ARCH_mips_TRUE@ -n icache.c -c mips/icache.c \
5448@SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.h -hs mips/semantics.h \
5449@SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.c -s mips/semantics.c \
5450@SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.h -hd mips/idecode.h \
5451@SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.c -d mips/idecode.c \
5452@SIM_ENABLE_ARCH_mips_TRUE@ -n model.h -hm mips/model.h \
5453@SIM_ENABLE_ARCH_mips_TRUE@ -n model.c -m mips/model.c \
5454@SIM_ENABLE_ARCH_mips_TRUE@ -n support.h -hf mips/support.h \
5455@SIM_ENABLE_ARCH_mips_TRUE@ -n support.c -f mips/support.c \
5456@SIM_ENABLE_ARCH_mips_TRUE@ -n engine.h -he mips/engine.h \
5457@SIM_ENABLE_ARCH_mips_TRUE@ -n engine.c -e mips/engine.c \
5458@SIM_ENABLE_ARCH_mips_TRUE@ -n irun.c -r mips/irun.c
5459@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5460
f6d58d40
MF		 5461@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN)
5462@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5463@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5464@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5465@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5466@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5467@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_M16_FLAGS) \
5468@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5469@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5470@SIM_ENABLE_ARCH_mips_TRUE@ -B 16 \
5471@SIM_ENABLE_ARCH_mips_TRUE@ -H 15 \
5472@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5473@SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_M16_DC) \
5474@SIM_ENABLE_ARCH_mips_TRUE@ -P m16_ \
5475@SIM_ENABLE_ARCH_mips_TRUE@ -x \
5476@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.h -hc mips/m16_icache.h \
5477@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.c -c mips/m16_icache.c \
5478@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.h -hs mips/m16_semantics.h \
5479@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.c -s mips/m16_semantics.c \
5480@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.h -hd mips/m16_idecode.h \
5481@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.c -d mips/m16_idecode.c \
5482@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.h -hm mips/m16_model.h \
5483@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.c -m mips/m16_model.c \
5484@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.h -hf mips/m16_support.h \
5485@SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.c -f mips/m16_support.c
5486@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5487
5488@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN)
5489@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5490@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5491@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5492@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5493@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5494@SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \
5495@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5496@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5497@SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \
5498@SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \
5499@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5500@SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \
5501@SIM_ENABLE_ARCH_mips_TRUE@ -P m32_ \
5502@SIM_ENABLE_ARCH_mips_TRUE@ -x \
5503@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.h -hc mips/m32_icache.h \
5504@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.c -c mips/m32_icache.c \
5505@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.h -hs mips/m32_semantics.h \
5506@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.c -s mips/m32_semantics.c \
5507@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.h -hd mips/m32_idecode.h \
5508@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.c -d mips/m32_idecode.c \
5509@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.h -hm mips/m32_model.h \
5510@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.c -m mips/m32_model.c \
5511@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.h -hf mips/m32_support.h \
5512@SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c
5513@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5514
f12c3c63
MF		 5515@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN)
5516@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
5517@SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5518@SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \
5519@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
5520@SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \
5521@SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \
5522@SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \
5523@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \
5524@SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \
5525@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \
5526@SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \
5527@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5528@SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5529@SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \
5530@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \
5531@SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
5532@SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
5533@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \
5534@SIM_ENABLE_ARCH_mips_TRUE@ *) \
5535@SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \
5536@SIM_ENABLE_ARCH_mips_TRUE@ esac; \
5537@SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \
5538@SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \
5539@SIM_ENABLE_ARCH_mips_TRUE@ $${e} \
5540@SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \
5541@SIM_ENABLE_ARCH_mips_TRUE@ -Werror \
5542@SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \
5543@SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \
5544@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \
5545@SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \
5546@SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \
5547@SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \
5548@SIM_ENABLE_ARCH_mips_TRUE@ -x \
5549@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \
5550@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \
5551@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \
5552@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \
5553@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \
5554@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \
5555@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \
5556@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \
5557@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \
5558@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \
5559@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \
5560@SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \
5561@SIM_ENABLE_ARCH_mips_TRUE@ || exit; \
5562@SIM_ENABLE_ARCH_mips_TRUE@ done
5563@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
5564
5565@SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c
5566@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\
5567@SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
5568@SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \
5569@SIM_ENABLE_ARCH_mips_TRUE@ m16*) \
5570@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
5571@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \
5572@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \
5573@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \
5574@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \
5575@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \
5576@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
5577@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
5578@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5579@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
5580@SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \
5581@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
5582@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
5583@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5584@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \
5585@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \
5586@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
5587@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \
5588@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \
5589@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
5590@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5591@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
5592@SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \
5593@SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
5594@SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \
5595@SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \
5596@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \
5597@SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \
5598@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \
5599@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \
5600@SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \
5601@SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \
5602@SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
5603@SIM_ENABLE_ARCH_mips_TRUE@ ;;\
5604@SIM_ENABLE_ARCH_mips_TRUE@ esac \
5605@SIM_ENABLE_ARCH_mips_TRUE@ done
5606@SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@
4c54f341
MF		 5607@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
5608
109a0a7e
MF		 5609@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.o: mn10300/modules.c
5610
b36a89d1
MF		 5611@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE)
5612@SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po
ee3134d0 5613
437eeee9 5614@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
f12c3c63 5615
d2a5dbc7
MF		 5616@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
5617@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN)
5618@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5619@SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \
5620@SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \
5621@SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \
5622@SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \
5623@SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \
5624@SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \
5625@SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \
5626@SIM_ENABLE_ARCH_mn10300_TRUE@ -x \
3bef0f03
MF		 5627@SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \
5628@SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \
5629@SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \
5630@SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \
5631@SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \
5632@SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \
5633@SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \
5634@SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \
5635@SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \
5636@SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \
5637@SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \
5638@SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \
5639@SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \
5640@SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \
5641@SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c
d2a5dbc7 5642@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@
0754b625
MF		 5643@SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h
5644
109a0a7e
MF		 5645@SIM_ENABLE_ARCH_moxie_TRUE@moxie/modules.o: moxie/modules.c
5646
b36a89d1
MF		 5647@SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c ; $(SIM_COMPILE)
5648@SIM_ENABLE_ARCH_moxie_TRUE@-@am__include@ moxie/$(DEPDIR)/*.Po
d2a5dbc7 5649
94f5dfed
MF		 5650@SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp)
5651@SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \
5652@SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \
5653@SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \
5654@SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \
5655@SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \
5656@SIM_ENABLE_ARCH_moxie_TRUE@ else \
5657@SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \
5658@SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \
5659@SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \
5660@SIM_ENABLE_ARCH_moxie_TRUE@ fi
bff048f5
MF		 5661@SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h
5662
109a0a7e
MF		 5663@SIM_ENABLE_ARCH_msp430_TRUE@msp430/modules.o: msp430/modules.c
5664
b36a89d1
MF		 5665@SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c ; $(SIM_COMPILE)
5666@SIM_ENABLE_ARCH_msp430_TRUE@-@am__include@ msp430/$(DEPDIR)/*.Po
4d998e15
MF		 5667@SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h
5668
109a0a7e
MF		 5669@SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.o: or1k/modules.c
5670
b36a89d1
MF		 5671@SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE)
5672@SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po
ee3134d0 5673
437eeee9 5674@SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS)
94f5dfed 5675
0a129eb1
MF		 5676@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
5677@SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
5678@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
5679@SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \
5680@SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \
5681@SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
5682@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
5683@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
5684@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@
5685
f1a0a99c
MF		 5686@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode
5687
5688@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch:
5689@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH)
5690@SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch
5691
5692@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode:
5693@SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
5694@SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode
5695
c0c25232
MF		 5696@SIM_ENABLE_ARCH_ppc_TRUE@ppc/psim$(EXEEXT): ppc/run$(EXEEXT)
5697@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@
4df74707
MF		 5698@SIM_ENABLE_ARCH_ppc_TRUE@ppc/libsim.a: common/libcommon.a
5699@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232
MF		 5700
5701@SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
93e0ec91 5702@SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
c0c25232 5703
ee3314c4
MF		 5704@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5705@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp
5706@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c
5707@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c
5708
5709@SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp)
5710@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp
5711@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h
5712@SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h
3373e27f
MF		 5713@SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h
5714
109a0a7e
MF		 5715@SIM_ENABLE_ARCH_pru_TRUE@pru/modules.o: pru/modules.c
5716
b36a89d1
MF		 5717@SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c ; $(SIM_COMPILE)
5718@SIM_ENABLE_ARCH_pru_TRUE@-@am__include@ pru/$(DEPDIR)/*.Po
91344291
MF		 5719@SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h
5720
109a0a7e
MF		 5721@SIM_ENABLE_ARCH_riscv_TRUE@riscv/modules.o: riscv/modules.c
5722
b36a89d1
MF		 5723@SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c ; $(SIM_COMPILE)
5724@SIM_ENABLE_ARCH_riscv_TRUE@-@am__include@ riscv/$(DEPDIR)/*.Po
91a335f9
MF		 5725@SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h
5726
109a0a7e
MF		 5727@SIM_ENABLE_ARCH_rl78_TRUE@rl78/modules.o: rl78/modules.c
5728
b36a89d1
MF		 5729@SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c ; $(SIM_COMPILE)
5730@SIM_ENABLE_ARCH_rl78_TRUE@-@am__include@ rl78/$(DEPDIR)/*.Po
15538f65
MF		 5731@SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h
5732
109a0a7e
MF		 5733@SIM_ENABLE_ARCH_rx_TRUE@rx/modules.o: rx/modules.c
5734
b36a89d1
MF		 5735@SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c ; $(SIM_COMPILE)
5736@SIM_ENABLE_ARCH_rx_TRUE@-@am__include@ rx/$(DEPDIR)/*.Po
dd719fa6
MF		 5737@SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h
5738
109a0a7e
MF		 5739@SIM_ENABLE_ARCH_sh_TRUE@sh/modules.o: sh/modules.c
5740
b36a89d1
MF		 5741@SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE)
5742@SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po
ee3134d0 5743
437eeee9 5744@SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS)
c0c25232 5745
70ab6bdd
MF		 5746# These rules are copied from automake, but tweaked to use FOR_BUILD variables.
5747@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
5748@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)
5749
5750# gencode is a build-time only tool. Override the default rules for it.
5751@SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c
5752@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@
5753
5754@SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT)
5755@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@
5756
5757@SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT)
5758@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@
5759
5760@SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT)
5761@SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@
7a59a0b9
MF		 5762@SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h
5763
109a0a7e
MF		 5764@SIM_ENABLE_ARCH_v850_TRUE@v850/modules.o: v850/modules.c
5765
b36a89d1
MF		 5766@SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE)
5767@SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po
ee3134d0 5768
437eeee9 5769@SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS)
70ab6bdd 5770
d2a5dbc7
MF		 5771@SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen
5772@SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN)
5773@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \
5774@SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \
5775@SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \
5776@SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \
5777@SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \
5778@SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \
5779@SIM_ENABLE_ARCH_v850_TRUE@ -x \
3bef0f03
MF		 5780@SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \
5781@SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \
5782@SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \
5783@SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \
5784@SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \
5785@SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \
5786@SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \
5787@SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \
5788@SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \
5789@SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \
5790@SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \
5791@SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \
5792@SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \
5793@SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \
5794@SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c
d2a5dbc7
MF		 5795@SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@
5796
5bea0c32
MF		 5797all-recursive: $(SIM_ALL_RECURSIVE_DEPS)
5798
63bf33ff
MF		 5799install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS)
5800 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir)
5801 lib=`echo sim | sed '$(program_transform_name)'`; \
2ba09f42
MF		 5802 for d in $(SIM_ENABLED_ARCHES); do \
5803 n="$$lib"; \
5804 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5805 n="lib$$n.a"; \
5806 $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \
63bf33ff
MF		 5807 done
5808
5809install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS)
5810 $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir)
5811 run=`echo run | sed '$(program_transform_name)'`; \
2ba09f42
MF		 5812 for d in $(SIM_ENABLED_ARCHES); do \
5813 n="$$run"; \
5814 [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \
5815 $(LIBTOOL) --mode=install \
5816 $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \
63bf33ff
MF		 5817 done
5818
59d8576e
MF		 5819uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS)
5820 rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a
2ba09f42 5821 for d in $(SIM_ENABLED_ARCHES); do \
59d8576e
MF		 5822 rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \
5823 done
5824
6bddc3e8
MF		 5825# Tell versions [3.59,3.63) of GNU make to not export all variables.
5826# Otherwise a system limit (for SysV at least) may be exceeded.
5827.NOEXPORT:
A mirror of the official binutils-gdb repository