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Commit | Line | Data |
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668650d5 JW |
1 | 2016-12-03 Jim Wilson <jim.wilson@linaro.org> |
2 | ||
3 | * simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting. | |
4 | (dexTestBranchImmediate): Shift high bit of pos by 5 not 4. | |
5 | ||
88ddd4a1 JW |
6 | 2016-12-01 Jim Wilson <jim.wilson@linaro.org> |
7 | ||
88256e71 | 8 | * simulator.c (fsturs): Switch use of rn and st variables. |
88ddd4a1 JW |
9 | (fsturd, fsturq): Likewise |
10 | ||
5357150c MF |
11 | 2016-08-15 Mike Frysinger <vapier@gentoo.org> |
12 | ||
13 | * interp.c: Include bfd.h. | |
14 | (symcount, symtab, aarch64_get_sym_value): Delete. | |
15 | (remove_useless_symbols): Change count type to long. | |
16 | (aarch64_get_func): Add SIM_DESC to arg list. Add symcount | |
17 | and symtab local variables. | |
18 | (sim_create_inferior): Delete storage. Replace symbol code | |
19 | with a call to trace_load_symbols. | |
20 | * memory.c: Delete bfd.h, elf/internal.h, and elf/common.h | |
21 | includes. | |
22 | (aarch64_get_heap_start): Change aarch64_get_sym_value to | |
23 | trace_sym_value. | |
24 | * memory.h: Delete bfd.h include. | |
25 | (mem_add_blk): Delete unused prototype. | |
26 | * simulator.c (bl, blr): Pass SIM_DESC to aarch64_get_func. | |
27 | * simulator.c (aarch64_get_func): Add SIM_DESC to arg list. | |
28 | (aarch64_get_sym_value): Delete. | |
29 | ||
b14bdb3b NC |
30 | 2016-08-12 Nick Clifton <nickc@redhat.com> |
31 | ||
32 | * simulator.c (aarch64_step): Revert pervious delta. | |
33 | (aarch64_run): Call sim_events_tick after each | |
34 | instruction is simulated, and if necessary call | |
35 | sim_events_process. | |
36 | * simulator.h: Revert previous delta. | |
37 | ||
6a277579 NC |
38 | 2016-08-11 Nick Clifton <nickc@redhat.com> |
39 | ||
40 | * interp.c (sim_create_inferior): Allow for being called with a | |
41 | NULL abfd parameter. If a bfd is provided, initialise the sim | |
42 | with that start address. | |
43 | * simulator.c (HALT_NYI): Just print out the numeric value of the | |
44 | instruction when not tracing. | |
b14bdb3b NC |
45 | (aarch64_step): Change from static to global. |
46 | * simulator.h: Add a prototype for aarch64_step(). | |
6a277579 | 47 | |
293acfae AM |
48 | 2016-07-27 Alan Modra <amodra@gmail.com> |
49 | ||
50 | * memory.c: Don't include libbfd.h. | |
51 | ||
0f118bc7 NC |
52 | 2016-07-21 Nick Clifton <nickc@redhat.com> |
53 | ||
0c66ea4c | 54 | * simulator.c (fsqrts): Use sqrtf rather than sqrt. |
0f118bc7 | 55 | |
c7be4414 JW |
56 | 2016-06-30 Jim Wilson <jim.wilson@linaro.org> |
57 | ||
58 | * cpustate.h: Include config.h. | |
59 | (union GRegisterValue): Add WORDS_BIGENDIAN check. For big endian code | |
60 | use anonymous structs to align members. | |
61 | * simulator.c (aarch64_step): Use sim_core_read_buffer and | |
62 | endian_le2h_4 to read instruction from pc. | |
63 | ||
fd7ed446 NC |
64 | 2016-05-06 Nick Clifton <nickc@redhat.com> |
65 | ||
66 | * simulator.c (do_FMLA_by_element): New function. | |
67 | (do_vec_op2): Call it. | |
68 | ||
2cdad34c NC |
69 | 2016-04-27 Nick Clifton <nickc@redhat.com> |
70 | ||
71 | * simulator.c: Add TRACE_DECODE statements to all emulation | |
72 | functions. | |
73 | ||
7517e550 NC |
74 | 2016-03-30 Nick Clifton <nickc@redhat.com> |
75 | ||
76 | * cpustate.c (aarch64_set_reg_s32): New function. | |
77 | (aarch64_set_reg_u32): New function. | |
78 | (aarch64_get_FP_half): Place half precision value into the correct | |
79 | slot of the union. | |
80 | (aarch64_set_FP_half): Likewise. | |
81 | * cpustate.h: Add prototypes for aarch64_set_reg_s32 and | |
82 | aarch64_set_reg_u32. | |
83 | * memory.c (FETCH_FUNC): Cast the read value to the access type | |
84 | before converting it to the return type. Rename to FETCH_FUNC64. | |
85 | (FETCH_FUNC32): New macro. Duplicates FETCH_FUNC64 but for 32-bit | |
86 | accesses. Use for 32-bit memory access functions. | |
87 | * simulator.c (ldrsb_wb): Use sign extension not zero extension. | |
88 | (ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise. | |
89 | (ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise. | |
90 | (ldrsh_scale_ext, ldrsw_abs): Likewise. | |
91 | (ldrh32_abs): Store 32 bit value not 64-bits. | |
92 | (ldrh32_wb, ldrh32_scale_ext): Likewise. | |
93 | (do_vec_MOV_immediate): Fix computation of val. | |
94 | (do_vec_MVNI): Likewise. | |
95 | (DO_VEC_WIDENING_MUL): New macro. | |
96 | (do_vec_mull): Use new macro. | |
97 | (do_vec_mul): Use new macro. | |
98 | (do_vec_MLA): Read values before writing. | |
99 | (do_vec_xtl): Likewise. | |
100 | (do_vec_SSHL): Select correct shift value. | |
101 | (do_vec_USHL): Likewise. | |
102 | (do_scalar_UCVTF): New function. | |
103 | (do_scalar_vec): Call new function. | |
104 | (store_pair_u64): Treat reads of SP as reads of XZR. | |
105 | ||
ef0d8ffc NC |
106 | 2016-03-29 Nick Clifton <nickc@redhat.com> |
107 | ||
108 | * cpustate.c: Remove space after asterisk in function parameters. | |
109 | * decode.h (greg): Delete unused function. | |
110 | (vreg, shift, extension, scaling, writeback, condcode): Likewise. | |
111 | * simulator.c: Use INSTR macro in more places. | |
112 | (HALT_NYI): Use sim_io_eprintf in place of fprintf. | |
113 | Remove extraneous whitespace. | |
114 | ||
5ab6d79e NC |
115 | 2016-03-23 Nick Clifton <nickc@redhat.com> |
116 | ||
117 | * cpustate.c (aarch64_get_FP_half): New function. Read a vector | |
118 | register as a half precision floating point number. | |
119 | (aarch64_set_FP_half): New function. Similar, but for setting | |
120 | a half precision register. | |
121 | (aarch64_get_thread_id): New function. Returns the value of the | |
122 | CPU's TPIDR register. | |
123 | (aarch64_get_FPCR): New function. Returns the value of the CPU's | |
124 | floating point control register. | |
125 | (aarch64_set_FPCR): New function. Set the value of the CPU's FPCR | |
126 | register. | |
127 | * cpustate.h: Add prototypes for new functions. | |
128 | * sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields. | |
129 | * memory.c: Use unaligned core access functions for all memory | |
130 | reads and writes. | |
131 | * simulator.c (HALT_NYI): Generate an error message if tracing | |
132 | will not tell the user why the simulator is halting. | |
133 | (HALT_UNREACHABLE): Delete. Delete (unneeded) uses of the macro. | |
134 | (INSTR): New time-saver macro. | |
135 | (fldrb_abs): New function. Loads an 8-bit value using a scaled | |
136 | offset. | |
137 | (fldrh_abs): New function. Likewise for 16-bit values. | |
138 | (do_vec_SSHL): Allow for negative shift values. | |
139 | (do_vec_USHL): Likewise. | |
140 | (do_vec_SHL): Correct computation of shift amount. | |
141 | (do_vec_SSHR_USHR): Correct decision of signed vs unsigned | |
142 | shifts and computation of shift value. | |
143 | (clz): New function. Counts leading zero bits. | |
144 | (do_vec_CLZ): New function. Implements CLZ (vector). | |
145 | (do_vec_MOV_element): Call do_vec_CLZ. | |
146 | (dexSimpleFPCondCompare): Implement. | |
147 | (do_FCVT_half_to_single): New function. Implements one of the | |
148 | FCVT operations. | |
149 | (do_FCVT_half_to_double): New function. Likewise. | |
150 | (do_FCVT_single_to_half): New function. Likewise. | |
151 | (do_FCVT_double_to_half): New function. Likewise. | |
152 | (dexSimpleFPDataProc1Source): Call new FCVT functions. | |
153 | (do_scalar_SHL): Handle negative shifts. | |
154 | (do_scalar_shift): Handle SSHR. | |
155 | (do_scalar_USHL): New function. | |
156 | (do_double_add): Simplify to just performing a double precision | |
157 | add operation. Move remaining code into... | |
158 | (do_scalar_vec): ... New function. | |
159 | (dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs | |
160 | functions. | |
161 | (system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR | |
162 | registers. | |
163 | (system_set): New function. | |
164 | (do_MSR_immediate): New function. Stub for now. | |
165 | (do_MSR_reg): New function. Likewise. Partially implements MSR | |
166 | instruction. | |
167 | (do_SYS): New function. Stub for now, | |
168 | (dexSystem): Call new functions. | |
169 | ||
e101a78b NC |
170 | 2016-03-18 Nick Clifton <nickc@redhat.com> |
171 | ||
172 | * cpustate.c: Remove spurious spaces from TRACE strings. | |
173 | Print hex equivalents of floats and doubles. | |
174 | Check element number against array size when accessing vector | |
175 | registers. | |
4c0ca98e NC |
176 | (GET_VEC_ELEMENT): Fix off by one error checking for an invalid |
177 | element index. | |
178 | (SET_VEC_ELEMENT): Likewise. | |
87bba7a5 | 179 | (GET_VEC_ELEMENT): And fix thinko using macro arguments. |
4c0ca98e | 180 | |
e101a78b NC |
181 | * memory.c: Trace memory reads when --trace-memory is enabled. |
182 | Remove float and double load and store functions. | |
183 | * memory.h (aarch64_get_mem_float): Delete prototype. | |
184 | (aarch64_get_mem_double): Likewise. | |
185 | (aarch64_set_mem_float): Likewise. | |
186 | (aarch64_set_mem_double): Likewise. | |
187 | * simulator (IS_SET): Always return either 0 or 1. | |
188 | (IS_CLEAR): Likewise. | |
189 | (fldrs_pcrel): Load and store floats using 32-bit memory accesses | |
190 | and doubles using 64-bit memory accesses. | |
191 | (fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise. | |
192 | (fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise. | |
193 | (fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise. | |
194 | (fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise. | |
195 | (store_pair_double, load_pair_float, load_pair_double): Likewise. | |
196 | (do_vec_MUL_by_element): New function. | |
197 | (do_vec_op2): Call do_vec_MUL_by_element. | |
198 | (do_scalar_NEG): New function. | |
199 | (do_double_add): Call do_scalar_NEG. | |
200 | ||
57aa1742 NC |
201 | 2016-03-03 Nick Clifton <nickc@redhat.com> |
202 | ||
203 | * simulator.c (set_flags_for_sub32): Correct type of signbit. | |
204 | (CondCompare): Swap interpretation of bit 30. | |
205 | (DO_ADDP): Delete macro. | |
206 | (do_vec_ADDP): Copy source registers before starting to update | |
207 | destination register. | |
208 | (do_vec_FADDP): Likewise. | |
209 | (do_vec_load_store): Fix computation of sizeof_operation. | |
210 | (rbit64): Fix type of constant. | |
211 | (aarch64_step): When displaying insn value, display all 32 bits. | |
212 | ||
ce39bd38 MF |
213 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
214 | ||
215 | * config.in, configure: Regenerate. | |
216 | ||
e19418e0 MF |
217 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
218 | ||
219 | * configure: Regenerate. | |
220 | ||
16f7876d MF |
221 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
222 | ||
223 | * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call. | |
224 | * configure: Regenerate. | |
225 | ||
99d8e879 MF |
226 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
227 | ||
228 | * configure: Regenerate. | |
35656e95 MF |
229 | |
230 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> | |
231 | ||
232 | * configure: Regenerate. | |
99d8e879 | 233 | |
347fe5bb MF |
234 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
235 | ||
236 | * configure.ac (SIM_AC_OPTION_INLINE): Delete call. | |
237 | * configure: Regenerate. | |
238 | ||
22be3fbe MF |
239 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
240 | ||
241 | * configure: Regenerate. | |
242 | ||
0dc73ef7 MF |
243 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
244 | ||
245 | * configure: Regenerate. | |
246 | ||
936df756 MF |
247 | 2016-01-09 Mike Frysinger <vapier@gentoo.org> |
248 | ||
249 | * config.in, configure: Regenerate. | |
250 | ||
2e3d4f4d MF |
251 | 2016-01-06 Mike Frysinger <vapier@gentoo.org> |
252 | ||
253 | * interp.c (sim_create_inferior): Mark argv and env const. | |
254 | (sim_open): Mark argv const. | |
255 | ||
1a846c62 MF |
256 | 2016-01-05 Mike Frysinger <vapier@gentoo.org> |
257 | ||
258 | * interp.c: Delete dis-asm.h include. | |
259 | (info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete. | |
260 | (sim_create_inferior): Delete disassemble init logic. | |
261 | (OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete. | |
262 | (sim_open): Delete sim_add_option_table call. | |
263 | * memory.c (mem_error): Delete disas check. | |
264 | * simulator.c: Delete dis-asm.h include. | |
265 | (disas): Delete. | |
266 | (HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM. | |
267 | (HALT_NYI): Likewise. | |
268 | (handle_halt): Delete disas call. | |
269 | (aarch64_step): Replace disas logic with TRACE_DISASM. | |
270 | * simulator.h: Delete dis-asm.h include. | |
271 | (aarch64_print_insn): Delete. | |
272 | ||
bc273e17 MF |
273 | 2016-01-04 Mike Frysinger <vapier@gentoo.org> |
274 | ||
275 | * simulator.c (MAX, MIN): Delete. | |
276 | (do_vec_maxv): Change MAX to max and MIN to min. | |
277 | (do_vec_fminmaxV): Likewise. | |
278 | ||
ac8eefeb TG |
279 | 2016-01-04 Tristan Gingold <gingold@adacore.com> |
280 | ||
281 | * simulator.c: Remove syscall.h include. | |
282 | ||
9bbf6f91 MF |
283 | 2016-01-04 Mike Frysinger <vapier@gentoo.org> |
284 | ||
285 | * configure: Regenerate. | |
286 | ||
0cb8d851 MF |
287 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
288 | ||
289 | * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. | |
290 | * configure: Regenerate. | |
291 | ||
1ac72f06 MF |
292 | 2016-01-02 Mike Frysinger <vapier@gentoo.org> |
293 | ||
294 | * configure: Regenerate. | |
295 | ||
5d015275 MF |
296 | 2015-12-27 Mike Frysinger <vapier@gentoo.org> |
297 | ||
298 | * interp.c (sim_dis_read): Change private_data to application_data. | |
299 | (sim_create_inferior): Likewise. | |
300 | ||
5e744ef8 MF |
301 | 2015-12-27 Mike Frysinger <vapier@gentoo.org> |
302 | ||
303 | * Makefile.in (SIM_OBJS): Delete sim-hload.o. | |
304 | ||
1b393626 MF |
305 | 2015-12-26 Mike Frysinger <vapier@gentoo.org> |
306 | ||
307 | * config.in, configure: Regenerate. | |
308 | ||
0e967299 MF |
309 | 2015-12-26 Mike Frysinger <vapier@gentoo.org> |
310 | ||
311 | * interp.c (sim_create_inferior): Update comment and argv check. | |
312 | ||
f66affe9 MF |
313 | 2015-12-14 Nick Clifton <nickc@redhat.com> |
314 | ||
315 | * simulator.c (system_get): New function. Provides read | |
316 | access to the dczid system register. | |
317 | (do_mrs): New function - implements the MRS instruction. | |
318 | (dexSystem): Call do_mrs for the MRS instruction. Halt on | |
319 | unimplemented system instructions. | |
320 | ||
321 | 2015-11-24 Nick Clifton <nickc@redhat.com> | |
322 | ||
323 | * configure.ac: New configure template. | |
324 | * aclocal.m4: Generate. | |
325 | * config.in: Generate. | |
326 | * configure: Generate. | |
327 | * cpustate.c: New file - functions for accessing AArch64 registers. | |
328 | * cpustate.h: New header. | |
329 | * decode.h: New header. | |
330 | * interp.c: New file - interface between GDB and simulator. | |
331 | * Makefile.in: New makefile template. | |
332 | * memory.c: New file - functions for simulating aarch64 memory | |
333 | accesses. | |
334 | * memory.h: New header. | |
335 | * sim-main.h: New header. | |
336 | * simulator.c: New file - aarch64 simulator functions. | |
337 | * simulator.h: New header. |