[thirdparty/binutils-gdb.git] / sim / arm / armdefs.h

/*  armdefs.h -- ARMulator common definitions:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */

#include <stdio.h>
#include <stdlib.h>

#define FALSE 0
#define TRUE 1
#define LOW 0
#define HIGH 1
#define LOWHIGH 1
#define HIGHLOW 2

#ifndef __STDC__
typedef char *VoidStar;
#endif

typedef unsigned long ARMword;	/* must be 32 bits wide */
typedef struct ARMul_State ARMul_State;

typedef unsigned ARMul_CPInits (ARMul_State * state);
typedef unsigned ARMul_CPExits (ARMul_State * state);
typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword value);
typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword * value);
typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword * value);
typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
			     ARMword instr, ARMword value);
typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
			     ARMword instr);
typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
				ARMword * value);
typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
				 ARMword value);

struct ARMul_State
{
  ARMword Emulate;		/* to start and stop emulation */
  unsigned EndCondition;	/* reason for stopping */
  unsigned ErrorCode;		/* type of illegal instruction */
  ARMword Reg[16];		/* the current register file */
  ARMword RegBank[7][16];	/* all the registers */
  ARMword Cpsr;			/* the current psr */
  ARMword Spsr[7];		/* the exception psr's */
  ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags;	/* dummy flags for speed */
#ifdef MODET
  ARMword TFlag;		/* Thumb state */
#endif
  ARMword Bank;			/* the current register bank */
  ARMword Mode;			/* the current mode */
  ARMword instr, pc, temp;	/* saved register state */
  ARMword loaded, decoded;	/* saved pipeline state */
  unsigned long NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles;	/* emulated cycles used */
  unsigned long NumInstrs;	/* the number of instructions executed */
  unsigned NextInstr;
  unsigned VectorCatch;		/* caught exception mask */
  unsigned CallDebug;		/* set to call the debugger */
  unsigned CanWatch;		/* set by memory interface if its willing to suffer the
				   overhead of checking for watchpoints on each memory
				   access */
  unsigned MemReadDebug, MemWriteDebug;
  unsigned long StopHandle;

  unsigned char *MemDataPtr;	/* admin data */
  unsigned char *MemInPtr;	/* the Data In bus */
  unsigned char *MemOutPtr;	/* the Data Out bus (which you may not need */
  unsigned char *MemSparePtr;	/* extra space */
  ARMword MemSize;

  unsigned char *OSptr;		/* OS Handle */
  char *CommandLine;		/* Command Line from ARMsd */

  ARMul_CPInits *CPInit[16];	/* coprocessor initialisers */
  ARMul_CPExits *CPExit[16];	/* coprocessor finalisers */
  ARMul_LDCs *LDC[16];		/* LDC instruction */
  ARMul_STCs *STC[16];		/* STC instruction */
  ARMul_MRCs *MRC[16];		/* MRC instruction */
  ARMul_MCRs *MCR[16];		/* MCR instruction */
  ARMul_CDPs *CDP[16];		/* CDP instruction */
  ARMul_CPReads *CPRead[16];	/* Read CP register */
  ARMul_CPWrites *CPWrite[16];	/* Write CP register */
  unsigned char *CPData[16];	/* Coprocessor data */
  unsigned char const *CPRegWords[16];	/* map of coprocessor register sizes */

  unsigned EventSet;		/* the number of events in the queue */
  unsigned long Now;		/* time to the nearest cycle */
  struct EventNode **EventPtr;	/* the event list */

  unsigned Exception;		/* enable the next four values */
  unsigned Debug;		/* show instructions as they are executed */
  unsigned NresetSig;		/* reset the processor */
  unsigned NfiqSig;
  unsigned NirqSig;

  unsigned abortSig;
  unsigned NtransSig;
  unsigned bigendSig;
  unsigned prog32Sig;
  unsigned data32Sig;
  unsigned lateabtSig;
  ARMword Vector;		/* synthesize aborts in cycle modes */
  ARMword Aborted;		/* sticky flag for aborts */
  ARMword Reseted;		/* sticky flag for Reset */
  ARMword Inted, LastInted;	/* sticky flags for interrupts */
  ARMword Base;			/* extra hand for base writeback */
  ARMword AbortAddr;		/* to keep track of Prefetch aborts */

  const struct Dbg_HostosInterface *hostif;

  unsigned is_v4;		/* Are we emulating a v4 architecture (or higher) ?  */
  unsigned is_v5;		/* Are we emulating a v5 architecture ?  */
  unsigned verbose;		/* Print various messages like the banner */
};

#define ResetPin NresetSig
#define FIQPin NfiqSig
#define IRQPin NirqSig
#define AbortPin abortSig
#define TransPin NtransSig
#define BigEndPin bigendSig
#define Prog32Pin prog32Sig
#define Data32Pin data32Sig
#define LateAbortPin lateabtSig

/***************************************************************************\
*                        Properties of ARM we know about                    *
\***************************************************************************/

/* The bitflags */
#define ARM_Fix26_Prop   0x01
#define ARM_Nexec_Prop   0x02
#define ARM_Debug_Prop   0x10
#define ARM_Isync_Prop   ARM_Debug_Prop
#define ARM_Lock_Prop    0x20
#define ARM_v4_Prop      0x40
#define ARM_v5_Prop      0x80

/***************************************************************************\
*                   Macros to extract instruction fields                    *
\***************************************************************************/

#define BIT(n) ( (ARMword)(instr>>(n))&1)	/* bit n of instruction */
#define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) )	/* bits m to n of instr */
#define TOPBITS(n) (instr >> (n))	/* bits 31 to n of instr */

/***************************************************************************\
*                      The hardware vector addresses                        *
\***************************************************************************/

#define ARMResetV 0L
#define ARMUndefinedInstrV 4L
#define ARMSWIV 8L
#define ARMPrefetchAbortV 12L
#define ARMDataAbortV 16L
#define ARMAddrExceptnV 20L
#define ARMIRQV 24L
#define ARMFIQV 28L
#define ARMErrorV 32L		/* This is an offset, not an address ! */

#define ARMul_ResetV ARMResetV
#define ARMul_UndefinedInstrV ARMUndefinedInstrV
#define ARMul_SWIV ARMSWIV
#define ARMul_PrefetchAbortV ARMPrefetchAbortV
#define ARMul_DataAbortV ARMDataAbortV
#define ARMul_AddrExceptnV ARMAddrExceptnV
#define ARMul_IRQV ARMIRQV
#define ARMul_FIQV ARMFIQV

/***************************************************************************\
*                          Mode and Bank Constants                          *
\***************************************************************************/

#define USER26MODE   0L
#define FIQ26MODE    1L
#define IRQ26MODE    2L
#define SVC26MODE    3L
#define USER32MODE  16L
#define FIQ32MODE   17L
#define IRQ32MODE   18L
#define SVC32MODE   19L
#define ABORT32MODE 23L
#define UNDEF32MODE 27L
#define SYSTEMMODE  31L

#define ARM32BITMODE (state->Mode > 3)
#define ARM26BITMODE (state->Mode <= 3)
#define ARMMODE (state->Mode)
#define ARMul_MODEBITS 0x1fL
#define ARMul_MODE32BIT ARM32BITMODE
#define ARMul_MODE26BIT ARM26BITMODE

#define USERBANK 0
#define FIQBANK 1
#define IRQBANK 2
#define SVCBANK 3
#define ABORTBANK 4
#define UNDEFBANK 5
#define DUMMYBANK 6
#define SYSTEMBANK USERBANK

#define BANK_CAN_ACCESS_SPSR(bank)  \
  ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)

/***************************************************************************\
*                  Definitons of things in the emulator                     *
\***************************************************************************/

extern void ARMul_EmulateInit (void);
extern ARMul_State *ARMul_NewState (void);
extern void ARMul_Reset (ARMul_State * state);
extern ARMword ARMul_DoProg (ARMul_State * state);
extern ARMword ARMul_DoInstr (ARMul_State * state);

/***************************************************************************\
*                Definitons of things for event handling                    *
\***************************************************************************/

extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay,
				 unsigned (*func) ());
extern void ARMul_EnvokeEvent (ARMul_State * state);
extern unsigned long ARMul_Time (ARMul_State * state);

/***************************************************************************\
*                          Useful support routines                          *
\***************************************************************************/

extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode,
			     unsigned reg);
extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg,
			  ARMword value);
extern ARMword ARMul_GetPC (ARMul_State * state);
extern ARMword ARMul_GetNextPC (ARMul_State * state);
extern void ARMul_SetPC (ARMul_State * state, ARMword value);
extern ARMword ARMul_GetR15 (ARMul_State * state);
extern void ARMul_SetR15 (ARMul_State * state, ARMword value);

extern ARMword ARMul_GetCPSR (ARMul_State * state);
extern void ARMul_SetCPSR (ARMul_State * state, ARMword value);
extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);

/***************************************************************************\
*                  Definitons of things to handle aborts                    *
\***************************************************************************/

extern void ARMul_Abort (ARMul_State * state, ARMword address);
#define ARMul_ABORTWORD 0xefffffff	/* SWI -1 */
#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
                                        state->AbortAddr = (address & ~3L)
#define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
                                 state->Aborted = ARMul_DataAbortV ;
#define ARMul_CLEARABORT state->abortSig = LOW

/***************************************************************************\
*              Definitons of things in the memory interface                 *
\***************************************************************************/

extern unsigned ARMul_MemoryInit (ARMul_State * state,
				  unsigned long initmemsize);
extern void ARMul_MemoryExit (ARMul_State * state);

extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address,
				 ARMword isize);
extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address,
				 ARMword isize);
extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address,
				  ARMword isize);

extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address);
extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address);
extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address);
extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address);

extern void ARMul_StoreWordS (ARMul_State * state, ARMword address,
			      ARMword data);
extern void ARMul_StoreWordN (ARMul_State * state, ARMword address,
			      ARMword data);
extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address,
				 ARMword data);
extern void ARMul_StoreByte (ARMul_State * state, ARMword address,
			     ARMword data);

extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address,
			       ARMword data);
extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address,
			       ARMword data);

extern void ARMul_Icycles (ARMul_State * state, unsigned number,
			   ARMword address);
extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
			   ARMword address);

extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
			     ARMword data);
extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
			     ARMword data);

extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
				ARMword, ARMword, ARMword, ARMword, ARMword,
				ARMword, ARMword, ARMword);

/***************************************************************************\
*            Definitons of things in the co-processor interface             *
\***************************************************************************/

#define ARMul_FIRST 0
#define ARMul_TRANSFER 1
#define ARMul_BUSY 2
#define ARMul_DATA 3
#define ARMul_INTERRUPT 4
#define ARMul_DONE 0
#define ARMul_CANT 1
#define ARMul_INC 3

extern unsigned ARMul_CoProInit (ARMul_State * state);
extern void ARMul_CoProExit (ARMul_State * state);
extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
			       ARMul_CPInits * init, ARMul_CPExits * exit,
			       ARMul_LDCs * ldc, ARMul_STCs * stc,
			       ARMul_MRCs * mrc, ARMul_MCRs * mcr,
			       ARMul_CDPs * cdp,
			       ARMul_CPReads * read, ARMul_CPWrites * write);
extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);

/***************************************************************************\
*               Definitons of things in the host environment                *
\***************************************************************************/

extern unsigned ARMul_OSInit (ARMul_State * state);
extern void ARMul_OSExit (ARMul_State * state);
extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
extern ARMword ARMul_OSLastErrorP (ARMul_State * state);

extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
				   ARMword pc);
extern int rdi_log;

/***************************************************************************\
*                            Host-dependent stuff                           *
\***************************************************************************/

#ifdef macintosh
pascal void SpinCursor (short increment);	/* copied from CursorCtl.h */
# define HOURGLASS           SpinCursor( 1 )
# define HOURGLASS_RATE      1023	/* 2^n - 1 */
#endif

extern void ARMul_UndefInstr      (ARMul_State *, ARMword);
extern void ARMul_FixCPSR         (ARMul_State *, ARMword, ARMword);
extern void ARMul_FixSPSR         (ARMul_State *, ARMword, ARMword);
extern void ARMul_ConsolePrint    (ARMul_State *, const char *, ...);
extern void ARMul_SelectProcessor (ARMul_State *, unsigned);
Commit	Line	Data
c906108c SS	1	/* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
	2	Copyright (C) 1994 Advanced RISC Machines Ltd.
	3
	4	This program is free software; you can redistribute it and/or modify
	5	it under the terms of the GNU General Public License as published by
	6	the Free Software Foundation; either version 2 of the License, or
	7	(at your option) any later version.
	8
	9	This program is distributed in the hope that it will be useful,
	10	but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	GNU General Public License for more details.
	13
	14	You should have received a copy of the GNU General Public License
	15	along with this program; if not, write to the Free Software
	16	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	17
	18	#include <stdio.h>
	19	#include <stdlib.h>
	20
	21	#define FALSE 0
	22	#define TRUE 1
	23	#define LOW 0
	24	#define HIGH 1
	25	#define LOWHIGH 1
	26	#define HIGHLOW 2
	27
	28	#ifndef __STDC__
dfcd3bfb	29	typedef char *VoidStar;
c906108c SS	30	#endif
c906108c SS	31
dfcd3bfb JM	32	typedef unsigned long ARMword; /* must be 32 bits wide */
	33	typedef struct ARMul_State ARMul_State;
	34
	35	typedef unsigned ARMul_CPInits (ARMul_State * state);
	36	typedef unsigned ARMul_CPExits (ARMul_State * state);
	37	typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
	38	ARMword instr, ARMword value);
	39	typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
	40	ARMword instr, ARMword * value);
	41	typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
	42	ARMword instr, ARMword * value);
	43	typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
	44	ARMword instr, ARMword value);
	45	typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
	46	ARMword instr);
	47	typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
	48	ARMword * value);
	49	typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
	50	ARMword value);
	51
	52	struct ARMul_State
	53	{
	54	ARMword Emulate; /* to start and stop emulation */
	55	unsigned EndCondition; /* reason for stopping */
	56	unsigned ErrorCode; /* type of illegal instruction */
	57	ARMword Reg[16]; /* the current register file */
	58	ARMword RegBank[7][16]; /* all the registers */
	59	ARMword Cpsr; /* the current psr */
	60	ARMword Spsr[7]; /* the exception psr's */
	61	ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */
c906108c	62	#ifdef MODET
dfcd3bfb	63	ARMword TFlag; /* Thumb state */
c906108c	64	#endif
dfcd3bfb JM	65	ARMword Bank; /* the current register bank */
	66	ARMword Mode; /* the current mode */
	67	ARMword instr, pc, temp; /* saved register state */
	68	ARMword loaded, decoded; /* saved pipeline state */
	69	unsigned long NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
	70	unsigned long NumInstrs; /* the number of instructions executed */
	71	unsigned NextInstr;
	72	unsigned VectorCatch; /* caught exception mask */
	73	unsigned CallDebug; /* set to call the debugger */
	74	unsigned CanWatch; /* set by memory interface if its willing to suffer the
	75	overhead of checking for watchpoints on each memory
	76	access */
	77	unsigned MemReadDebug, MemWriteDebug;
	78	unsigned long StopHandle;
	79
	80	unsigned char MemDataPtr; / admin data */
	81	unsigned char MemInPtr; / the Data In bus */
	82	unsigned char MemOutPtr; / the Data Out bus (which you may not need */
	83	unsigned char MemSparePtr; / extra space */
	84	ARMword MemSize;
	85
	86	unsigned char OSptr; / OS Handle */
	87	char CommandLine; / Command Line from ARMsd */
	88
	89	ARMul_CPInits CPInit[16]; / coprocessor initialisers */
	90	ARMul_CPExits CPExit[16]; / coprocessor finalisers */
	91	ARMul_LDCs LDC[16]; / LDC instruction */
	92	ARMul_STCs STC[16]; / STC instruction */
	93	ARMul_MRCs MRC[16]; / MRC instruction */
	94	ARMul_MCRs MCR[16]; / MCR instruction */
	95	ARMul_CDPs CDP[16]; / CDP instruction */
	96	ARMul_CPReads CPRead[16]; / Read CP register */
	97	ARMul_CPWrites CPWrite[16]; / Write CP register */
	98	unsigned char CPData[16]; / Coprocessor data */
	99	unsigned char const CPRegWords[16]; / map of coprocessor register sizes */
	100
	101	unsigned EventSet; /* the number of events in the queue */
	102	unsigned long Now; /* time to the nearest cycle */
	103	struct EventNode *EventPtr; / the event list */
	104
	105	unsigned Exception; /* enable the next four values */
	106	unsigned Debug; /* show instructions as they are executed */
	107	unsigned NresetSig; /* reset the processor */
	108	unsigned NfiqSig;
	109	unsigned NirqSig;
	110
	111	unsigned abortSig;
	112	unsigned NtransSig;
	113	unsigned bigendSig;
	114	unsigned prog32Sig;
	115	unsigned data32Sig;
	116	unsigned lateabtSig;
	117	ARMword Vector; /* synthesize aborts in cycle modes */
	118	ARMword Aborted; /* sticky flag for aborts */
	119	ARMword Reseted; /* sticky flag for Reset */
	120	ARMword Inted, LastInted; /* sticky flags for interrupts */
	121	ARMword Base; /* extra hand for base writeback */
	122	ARMword AbortAddr; /* to keep track of Prefetch aborts */
	123
	124	const struct Dbg_HostosInterface *hostif;
	125
3943c96b NC	126	unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
	127	unsigned is_v5; /* Are we emulating a v5 architecture ? */
	128	unsigned verbose; /* Print various messages like the banner */
dfcd3bfb	129	};
c906108c SS	130
	131	#define ResetPin NresetSig
	132	#define FIQPin NfiqSig
	133	#define IRQPin NirqSig
	134	#define AbortPin abortSig
	135	#define TransPin NtransSig
	136	#define BigEndPin bigendSig
	137	#define Prog32Pin prog32Sig
	138	#define Data32Pin data32Sig
	139	#define LateAbortPin lateabtSig
	140
	141	/***************************************************************************\
3943c96b	142	* Properties of ARM we know about *
c906108c	143	\***************************************************************************/
dfcd3bfb	144
c906108c SS	145	/* The bitflags */
	146	#define ARM_Fix26_Prop 0x01
	147	#define ARM_Nexec_Prop 0x02
	148	#define ARM_Debug_Prop 0x10
	149	#define ARM_Isync_Prop ARM_Debug_Prop
	150	#define ARM_Lock_Prop 0x20
3943c96b NC	151	#define ARM_v4_Prop 0x40
3943c96b NC	152	#define ARM_v5_Prop 0x80
c906108c SS	153
	154	/***************************************************************************\
	155	* Macros to extract instruction fields *
	156	\***************************************************************************/
	157
dfcd3bfb JM	158	#define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
	159	#define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
	160	#define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
c906108c SS	161
	162	/***************************************************************************\
	163	* The hardware vector addresses *
	164	\***************************************************************************/
	165
	166	#define ARMResetV 0L
	167	#define ARMUndefinedInstrV 4L
	168	#define ARMSWIV 8L
	169	#define ARMPrefetchAbortV 12L
	170	#define ARMDataAbortV 16L
	171	#define ARMAddrExceptnV 20L
	172	#define ARMIRQV 24L
	173	#define ARMFIQV 28L
dfcd3bfb	174	#define ARMErrorV 32L /* This is an offset, not an address ! */
c906108c SS	175
	176	#define ARMul_ResetV ARMResetV
	177	#define ARMul_UndefinedInstrV ARMUndefinedInstrV
	178	#define ARMul_SWIV ARMSWIV
	179	#define ARMul_PrefetchAbortV ARMPrefetchAbortV
	180	#define ARMul_DataAbortV ARMDataAbortV
	181	#define ARMul_AddrExceptnV ARMAddrExceptnV
	182	#define ARMul_IRQV ARMIRQV
	183	#define ARMul_FIQV ARMFIQV
	184
	185	/***************************************************************************\
	186	* Mode and Bank Constants *
	187	\***************************************************************************/
	188
c1a72ffd NC	189	#define USER26MODE 0L
	190	#define FIQ26MODE 1L
	191	#define IRQ26MODE 2L
	192	#define SVC26MODE 3L
	193	#define USER32MODE 16L
	194	#define FIQ32MODE 17L
	195	#define IRQ32MODE 18L
	196	#define SVC32MODE 19L
c906108c SS	197	#define ABORT32MODE 23L
c906108c SS	198	#define UNDEF32MODE 27L
c1a72ffd	199	#define SYSTEMMODE 31L
c906108c SS	200
	201	#define ARM32BITMODE (state->Mode > 3)
	202	#define ARM26BITMODE (state->Mode <= 3)
	203	#define ARMMODE (state->Mode)
	204	#define ARMul_MODEBITS 0x1fL
	205	#define ARMul_MODE32BIT ARM32BITMODE
	206	#define ARMul_MODE26BIT ARM26BITMODE
	207
	208	#define USERBANK 0
	209	#define FIQBANK 1
	210	#define IRQBANK 2
	211	#define SVCBANK 3
	212	#define ABORTBANK 4
	213	#define UNDEFBANK 5
	214	#define DUMMYBANK 6
b0eae074	215	#define SYSTEMBANK USERBANK
c1a72ffd NC	216
	217	#define BANK_CAN_ACCESS_SPSR(bank) \
	218	((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
c906108c SS	219
	220	/***************************************************************************\
	221	* Definitons of things in the emulator *
	222	\***************************************************************************/
	223
dfcd3bfb JM	224	extern void ARMul_EmulateInit (void);
	225	extern ARMul_State *ARMul_NewState (void);
	226	extern void ARMul_Reset (ARMul_State * state);
	227	extern ARMword ARMul_DoProg (ARMul_State * state);
	228	extern ARMword ARMul_DoInstr (ARMul_State * state);
c906108c SS	229
	230	/***************************************************************************\
	231	* Definitons of things for event handling *
	232	\***************************************************************************/
	233
dfcd3bfb JM	234	extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay,
	235	unsigned (*func) ());
	236	extern void ARMul_EnvokeEvent (ARMul_State * state);
	237	extern unsigned long ARMul_Time (ARMul_State * state);
c906108c SS	238
	239	/***************************************************************************\
	240	* Useful support routines *
	241	\***************************************************************************/
	242
dfcd3bfb JM	243	extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode,
	244	unsigned reg);
	245	extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg,
	246	ARMword value);
	247	extern ARMword ARMul_GetPC (ARMul_State * state);
	248	extern ARMword ARMul_GetNextPC (ARMul_State * state);
	249	extern void ARMul_SetPC (ARMul_State * state, ARMword value);
	250	extern ARMword ARMul_GetR15 (ARMul_State * state);
	251	extern void ARMul_SetR15 (ARMul_State * state, ARMword value);
	252
	253	extern ARMword ARMul_GetCPSR (ARMul_State * state);
	254	extern void ARMul_SetCPSR (ARMul_State * state, ARMword value);
	255	extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
	256	extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);
c906108c SS	257
	258	/***************************************************************************\
	259	* Definitons of things to handle aborts *
	260	\***************************************************************************/
	261
dfcd3bfb JM	262	extern void ARMul_Abort (ARMul_State * state, ARMword address);
dfcd3bfb JM	263	#define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
c906108c SS	264	#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
	265	state->AbortAddr = (address & ~3L)
	266	#define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
	267	state->Aborted = ARMul_DataAbortV ;
	268	#define ARMul_CLEARABORT state->abortSig = LOW
	269
	270	/***************************************************************************\
	271	* Definitons of things in the memory interface *
	272	\***************************************************************************/
	273
dfcd3bfb JM	274	extern unsigned ARMul_MemoryInit (ARMul_State * state,
	275	unsigned long initmemsize);
	276	extern void ARMul_MemoryExit (ARMul_State * state);
	277
	278	extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address,
	279	ARMword isize);
	280	extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address,
	281	ARMword isize);
	282	extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address,
	283	ARMword isize);
	284
	285	extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address);
	286	extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address);
	287	extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address);
	288	extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address);
	289
	290	extern void ARMul_StoreWordS (ARMul_State * state, ARMword address,
	291	ARMword data);
	292	extern void ARMul_StoreWordN (ARMul_State * state, ARMword address,
	293	ARMword data);
	294	extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address,
	295	ARMword data);
	296	extern void ARMul_StoreByte (ARMul_State * state, ARMword address,
	297	ARMword data);
	298
	299	extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address,
	300	ARMword data);
	301	extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address,
	302	ARMword data);
	303
	304	extern void ARMul_Icycles (ARMul_State * state, unsigned number,
	305	ARMword address);
	306	extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
	307	ARMword address);
	308
	309	extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
	310	extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
	311	extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
	312	ARMword data);
	313	extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
	314	ARMword data);
	315
	316	extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
	317	ARMword, ARMword, ARMword, ARMword, ARMword,
	318	ARMword, ARMword, ARMword);
c906108c SS	319
	320	/***************************************************************************\
	321	* Definitons of things in the co-processor interface *
	322	\***************************************************************************/
	323
	324	#define ARMul_FIRST 0
	325	#define ARMul_TRANSFER 1
	326	#define ARMul_BUSY 2
	327	#define ARMul_DATA 3
	328	#define ARMul_INTERRUPT 4
	329	#define ARMul_DONE 0
	330	#define ARMul_CANT 1
	331	#define ARMul_INC 3
	332
dfcd3bfb JM	333	extern unsigned ARMul_CoProInit (ARMul_State * state);
	334	extern void ARMul_CoProExit (ARMul_State * state);
	335	extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
	336	ARMul_CPInits * init, ARMul_CPExits * exit,
	337	ARMul_LDCs * ldc, ARMul_STCs * stc,
	338	ARMul_MRCs * mrc, ARMul_MCRs * mcr,
	339	ARMul_CDPs * cdp,
	340	ARMul_CPReads * read, ARMul_CPWrites * write);
	341	extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);
c906108c SS	342
	343	/***************************************************************************\
	344	* Definitons of things in the host environment *
	345	\***************************************************************************/
	346
dfcd3bfb JM	347	extern unsigned ARMul_OSInit (ARMul_State * state);
	348	extern void ARMul_OSExit (ARMul_State * state);
	349	extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
	350	extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
c906108c	351
dfcd3bfb JM	352	extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
	353	extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
	354	ARMword pc);
	355	extern int rdi_log;
c906108c SS	356
	357	/***************************************************************************\
	358	* Host-dependent stuff *
	359	\***************************************************************************/
	360
	361	#ifdef macintosh
dfcd3bfb	362	pascal void SpinCursor (short increment); /* copied from CursorCtl.h */
c906108c	363	# define HOURGLASS SpinCursor( 1 )
dfcd3bfb	364	# define HOURGLASS_RATE 1023 /* 2^n - 1 */
c906108c	365	#endif
6d358e86 NC	366
	367	extern void ARMul_UndefInstr (ARMul_State *, ARMword);
	368	extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword);
	369	extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword);
	370	extern void ARMul_ConsolePrint (ARMul_State , const char , ...);
	371	extern void ARMul_SelectProcessor (ARMul_State *, unsigned);