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1/* The common simulator framework for GDB, the GNU Debugger.
2
1d506c26 3 Copyright 2002-2024 Free Software Foundation, Inc.
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4
5 Contributed by Andrew Cagney and Red Hat.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
4744ac1b 11 the Free Software Foundation; either version 3 of the License, or
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12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
4744ac1b 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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21
22
23#ifndef SIM_EVENTS_H
24#define SIM_EVENTS_H
25
2c29882f 26#include <stdarg.h>
c906108c 27
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28#include "ansidecl.h"
29
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30/* Notes:
31
32 When scheduling an event, the a delta of zero/one refers to the
33 timeline as follows:
34
35 epoch 0|1 1|2 2|3 3|
36 **queue**|--insn--|*queue*|--insn--|*queue*|--insn--|*queue*|
37 | ^ ^ | ^ ^
38 `- +0 ------------ +1 --.. `----- +0 ------------- +1 --..
39
40 When the queue is initialized, the time is set to zero with a
41 number of initialization events scheduled. Consequently, as also
42 illustrated above, the event queue should be processed before the
43 first instruction. That instruction being executed during tick 1.
44
45 The simulator main loop may take a form similar to:
46
47 if (halt-/restart-setjmp)
48 {
49
50 .... // Determine who should go next
51 last-cpu-nr = get-last-cpu-nr (sd);
52 next-cpu-nr = get-next-cpu-nr (sd);
53 events-were-last? = (last-cpu-nr >= nr-cpus);
54 events-were-next? = (next-cpu-nr >= nr-cpus);
55
56 .... // process any outstanding events
57 sim_events_preprocess (sd, events-were-last?, events-were-next?);
58 if (events-were-next)
59 next-cpu-nr = 0;
60
028f6515 61 .... // prime main loop
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62
63 while (1)
64 {
65 .... // model one insn of next-cpu-nr .. nr-cpus
66 if (sim_events_tick (sd))
67 sim_events_process (sd);
68 next-cpu-nr = 0
69 }
70 }
71
72 NB. In the above pseudo code it is assumed that any cpu-nr >=
73 nr-cpus is a marker for the event queue. */
74
75
76typedef void sim_event_handler(SIM_DESC sd, void *data);
77
78typedef struct _sim_event sim_event;
79
80typedef struct _sim_events sim_events;
81struct _sim_events {
82 int nr_ticks_to_process;
83 sim_event *queue;
84 sim_event *watchpoints;
85 sim_event *watchedpoints;
86 sim_event *free_list;
87 /* flag additional work needed */
88 volatile int work_pending;
89 /* the asynchronous event queue */
90#ifndef MAX_NR_SIGNAL_SIM_EVENTS
91#define MAX_NR_SIGNAL_SIM_EVENTS 2
92#endif
93 sim_event *held;
94 volatile int nr_held;
95 /* timekeeping */
96 unsigned long elapsed_wallclock;
97 SIM_ELAPSED_TIME resume_wallclock;
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98 int64_t time_of_event;
99 int64_t time_from_event;
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100};
101
102
103
104/* Install the "events" module. */
105
106extern SIM_RC sim_events_install (SIM_DESC sd);
107
108
109/* Schedule an event DELTA_TIME ticks into the future */
110
111extern sim_event *sim_events_schedule
112(SIM_DESC sd,
e4c803f5 113 int64_t delta_time,
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114 sim_event_handler *handler,
115 void *data);
116
117extern sim_event *sim_events_schedule_tracef
118(SIM_DESC sd,
e4c803f5 119 int64_t delta_time,
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120 sim_event_handler *handler,
121 void *data,
122 const char *fmt,
2f632133 123 ...) ATTRIBUTE_NULL_PRINTF (5, 6);
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124
125extern sim_event *sim_events_schedule_vtracef
126(SIM_DESC sd,
e4c803f5 127 int64_t delta_time,
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128 sim_event_handler *handler,
129 void *data,
130 const char *fmt,
2f632133 131 va_list ap) ATTRIBUTE_NULL_PRINTF (5, 0);
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132
133
134extern void sim_events_schedule_after_signal
135(SIM_DESC sd,
e4c803f5 136 int64_t delta_time,
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137 sim_event_handler *handler,
138 void *data);
139
140/* NB: signal level events can't have trace strings as malloc isn't
141 available */
142
143
144
145/* Schedule an event milli-seconds from NOW. The exact interpretation
146 of wallclock is host dependant. */
147
148extern sim_event *sim_events_watch_clock
149(SIM_DESC sd,
150 unsigned delta_ms_time,
151 sim_event_handler *handler,
152 void *data);
153
154
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155/* Schedule an event when a PC matches a range. */
156
157extern sim_event *sim_events_watch_pc
158(SIM_DESC sd,
159 int is_within,
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160 uint64_t lb,
161 uint64_t ub,
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162 sim_event_handler *handler,
163 void *data);
164
165
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166/* Schedule an event when the test (IS_WITHIN == (VAL >= LB && VAL <=
167 UB)) of the NR_BYTES value at HOST_ADDR with BYTE_ORDER endian is
168 true.
169
170 HOST_ADDR: pointer into the host address space.
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171 BYTE_ORDER: BFD_ENDIAN_UNKNOWN - host endian; BFD_ENDIAN_BIG;
172 BFD_ENDIAN_LITTLE. */
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173
174extern sim_event *sim_events_watch_sim
175(SIM_DESC sd,
176 void *host_addr,
177 int nr_bytes,
62fe7512 178 enum bfd_endian byte_order,
c906108c 179 int is_within,
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180 uint64_t lb,
181 uint64_t ub,
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182 sim_event_handler *handler,
183 void *data);
184
185
186/* Schedule an event when the test (IS_WITHIN == (VAL >= LB && VAL <=
187 UB)) of the NR_BYTES value at CORE_ADDR in BYTE_ORDER endian is
188 true.
189
190 CORE_ADDR/MAP: pointer into the target address space.
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191 BYTE_ORDER: BFD_ENDIAN_UNKNOWN - host endian; BFD_ENDIAN_BIG;
192 BFD_ENDIAN_LITTLE. */
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193
194extern sim_event *sim_events_watch_core
195(SIM_DESC sd,
196 address_word core_addr,
197 unsigned map,
198 int nr_bytes,
62fe7512 199 enum bfd_endian byte_order,
c906108c 200 int is_within,
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201 uint64_t lb,
202 uint64_t ub,
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203 sim_event_handler *handler,
204 void *data);
205
206/* Deschedule the specified event */
207
208extern void sim_events_deschedule
209(SIM_DESC sd,
210 sim_event *event_to_remove);
211
212
213/* Prepare for main simulator loop. Ensure that the next thing to do
214 is not event processing.
215
216 If the simulator halted part way through event processing then both
217 EVENTS_WERE_LAST and EVENTS_WERE_NEXT shall be true.
218
219 If the simulator halted after processing the last cpu, then only
220 EVENTS_WERE_NEXT shall be true. */
221
222INLINE_SIM_EVENTS\
223(void) sim_events_preprocess
224(SIM_DESC sd,
225 int events_were_last,
226 int events_were_next);
227
228
229/* Progress time.
230
231 Separated into two parts so that the main loop can save its context
232 before the event queue is processed. When sim_events_tick*()
233 returns true, any simulation context should be saved and
234 sim_events_process() called.
235
236 SIM_EVENTS_TICK advances the clock by 1 cycle.
237
238 SIM_EVENTS_TICKN advances the clock by N cycles (1..MAXINT). */
239
240INLINE_SIM_EVENTS\
241(int) sim_events_tick
242(SIM_DESC sd);
243
244INLINE_SIM_EVENTS\
245(int) sim_events_tickn
246(SIM_DESC sd,
247 int n);
248
249INLINE_SIM_EVENTS\
250(void) sim_events_process
251(SIM_DESC sd);
252
253
254/* Advance the clock by an additional SLIP cycles at the next call to
255 sim_events_tick*(). For multiple calls, the effect is
256 accumulative. */
257
258INLINE_SIM_EVENTS\
259(void) sim_events_slip
260(SIM_DESC sd,
261 int slip);
262
263
6439295f 264/* Progress time such that an event shall occur upon the next call to
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265 sim_events tick */
266
267#if 0
268INLINE_SIM_EVENTS\
269(void) sim_events_timewarp
270(SIM_DESC sd);
271#endif
272
273
274/* local concept of elapsed target time */
275
276INLINE_SIM_EVENTS\
e4c803f5 277(int64_t) sim_events_time
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278(SIM_DESC sd);
279
280
281/* local concept of elapsed host time (milliseconds) */
282
283INLINE_SIM_EVENTS\
284(unsigned long) sim_events_elapsed_time
285(SIM_DESC sd);
286
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287/* Returns the time that remains before the event is raised. */
288INLINE_SIM_EVENTS\
e4c803f5 289(int64_t) sim_events_remain_time
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290(SIM_DESC sd, sim_event *event);
291
292
c906108c 293#endif