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f6bcefef | 1 | # Simulator main loop for CRIS. -*- C -*- |
1d506c26 | 2 | # Copyright (C) 2004-2024 Free Software Foundation, Inc. |
f6bcefef HPN |
3 | # Contributed by Axis Communications. |
4 | # | |
5 | # This file is part of the GNU simulators. | |
6 | # | |
7 | # This program is free software; you can redistribute it and/or modify | |
8 | # it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
9 | # the Free Software Foundation; either version 3 of the License, or |
10 | # (at your option) any later version. | |
f6bcefef HPN |
11 | # |
12 | # This program is distributed in the hope that it will be useful, | |
13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | # GNU General Public License for more details. | |
16 | # | |
4744ac1b JB |
17 | # You should have received a copy of the GNU General Public License |
18 | # along with this program. If not, see <http://www.gnu.org/licenses/>. | |
f6bcefef HPN |
19 | |
20 | # Based on the fr30 file. | |
21 | ||
22 | # Syntax: | |
23 | # /bin/sh mainloop.in command | |
24 | # | |
25 | # Command is one of: | |
26 | # | |
27 | # init | |
28 | # support | |
29 | # extract-{simple,scache,pbb} | |
30 | # {full,fast}-exec-{simple,scache,pbb} | |
31 | # | |
32 | # A target need only provide a "full" version of one of simple,scache,pbb. | |
33 | # If the target wants it can also provide a fast version of same. | |
34 | # It can't provide more than this, however for illustration's sake the CRIS | |
35 | # port provides examples of all. | |
36 | ||
37 | # ??? After a few more ports are done, revisit. | |
38 | # Will eventually need to machine generate a lot of this. | |
39 | ||
40 | case "x$1" in | |
41 | ||
42 | xsupport) | |
43 | ||
44 | cat <<EOF | |
6003fe16 | 45 | #line $LINENO "$0" |
be7547b0 TT |
46 | #include <stdlib.h> |
47 | ||
f6bcefef HPN |
48 | /* It seems we don't have a templated header file corresponding to |
49 | cris-tmpl.c, so we have to get out declarations the hackish way. */ | |
50 | extern void @cpu@_specific_init (SIM_CPU *current_cpu); | |
51 | ||
52 | static INLINE const IDESC * | |
53 | extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, | |
54 | int fast_p) | |
55 | { | |
56 | const IDESC *id = @cpu@_decode (current_cpu, pc, insn, | |
57 | #if CGEN_INT_INSN_P | |
58 | insn, | |
59 | #endif | |
60 | abuf); | |
61 | @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); | |
62 | if (! fast_p) | |
63 | { | |
64 | int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); | |
65 | int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); | |
66 | @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); | |
67 | } | |
68 | return id; | |
69 | } | |
70 | ||
3a275541 MF |
71 | /* This might not be used directly depending on the fast compile mode. */ |
72 | ATTRIBUTE_UNUSED static INLINE SEM_PC | |
f6bcefef HPN |
73 | execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) |
74 | { | |
75 | SEM_PC vpc; | |
76 | ||
77 | if (fast_p) | |
78 | { | |
79 | #if ! WITH_SEM_SWITCH_FAST | |
80 | #if WITH_SCACHE | |
81 | vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); | |
82 | #else | |
83 | vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); | |
84 | #endif | |
85 | #else | |
86 | abort (); | |
87 | #endif /* WITH_SEM_SWITCH_FAST */ | |
88 | } | |
89 | else | |
90 | { | |
91 | #if ! WITH_SEM_SWITCH_FULL | |
92 | ARGBUF *abuf = &sc->argbuf; | |
93 | const IDESC *idesc = abuf->idesc; | |
94 | #if WITH_SCACHE_PBB | |
95 | int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); | |
96 | #else | |
97 | int virtual_p = 0; | |
98 | #endif | |
99 | ||
100 | if (! virtual_p) | |
101 | { | |
102 | /* FIXME: call x-before */ | |
103 | if (ARGBUF_PROFILE_P (abuf)) | |
104 | PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); | |
105 | /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ | |
106 | if (PROFILE_MODEL_P (current_cpu) | |
107 | && ARGBUF_PROFILE_P (abuf)) | |
108 | @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); | |
db7858e2 MF |
109 | CGEN_TRACE_INSN_INIT (current_cpu, abuf, 1); |
110 | CGEN_TRACE_INSN (current_cpu, idesc->idata, | |
f6bcefef HPN |
111 | (const struct argbuf *) abuf, abuf->addr); |
112 | } | |
113 | #if WITH_SCACHE | |
114 | vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); | |
115 | #else | |
116 | vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); | |
117 | #endif | |
118 | if (! virtual_p) | |
119 | { | |
120 | /* FIXME: call x-after */ | |
121 | if (PROFILE_MODEL_P (current_cpu) | |
122 | && ARGBUF_PROFILE_P (abuf)) | |
123 | { | |
124 | int cycles; | |
125 | ||
126 | cycles = (*idesc->timing->model_fn) (current_cpu, sc); | |
127 | @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); | |
128 | } | |
db7858e2 | 129 | CGEN_TRACE_INSN_FINI (current_cpu, abuf, 1); |
f6bcefef HPN |
130 | } |
131 | #else | |
132 | abort (); | |
133 | #endif /* WITH_SEM_SWITCH_FULL */ | |
134 | } | |
135 | ||
136 | return vpc; | |
137 | } | |
138 | ||
139 | EOF | |
140 | ||
141 | ;; | |
142 | ||
143 | xinit) | |
144 | ||
145 | cat <<EOF | |
6003fe16 | 146 | #line $LINENO "$0" |
f6bcefef HPN |
147 | /* This seemed the only sane location to emit a call to a |
148 | model-specific init function. It may not work for all simulator | |
149 | types. FIXME: Introduce a model-init hook. */ | |
150 | ||
151 | /* We use the same condition as the code that's expected to follow, so | |
152 | GCC can consolidate the code with only one conditional. */ | |
153 | if (! CPU_IDESC_SEM_INIT_P (current_cpu)) | |
154 | @cpu@_specific_init (current_cpu); | |
155 | EOF | |
156 | ||
157 | ;; | |
158 | ||
159 | xextract-simple | xextract-scache) | |
160 | ||
161 | # Inputs: current_cpu, vpc, sc, FAST_P | |
162 | # Outputs: sc filled in | |
163 | ||
164 | cat <<EOF | |
6003fe16 | 165 | #line $LINENO "$0" |
f6bcefef HPN |
166 | { |
167 | CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc); | |
168 | extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P); | |
169 | } | |
170 | EOF | |
171 | ||
172 | ;; | |
173 | ||
174 | xextract-pbb) | |
175 | ||
176 | # Inputs: current_cpu, pc, sc, max_insns, FAST_P | |
177 | # Outputs: sc, pc | |
178 | # sc must be left pointing past the last created entry. | |
179 | # pc must be left pointing past the last created entry. | |
180 | # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called | |
181 | # to record the vpc of the cti insn. | |
182 | # SET_INSN_COUNT(n) must be called to record number of real insns. | |
183 | ||
184 | cat <<EOF | |
6003fe16 | 185 | #line $LINENO "$0" |
f6bcefef HPN |
186 | { |
187 | const IDESC *idesc; | |
188 | int icount = 0; | |
189 | ||
190 | /* Make sure the buffer doesn't overflow for profiled insns if | |
191 | max_insns happens to not be a multiple of 3. */ | |
192 | if (!FAST_P) | |
193 | max_insns -= 2 + 3; | |
194 | else | |
195 | /* There might be two real insns handled per loop. */ | |
196 | max_insns--; | |
197 | ||
198 | while (max_insns > 0) | |
199 | { | |
200 | UHI insn = GETIMEMUHI (current_cpu, pc); | |
201 | int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); | |
202 | int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); | |
203 | int befaft_p = profile_p || trace_p; | |
204 | ||
205 | if (befaft_p) | |
206 | { | |
207 | @cpu@_emit_before (current_cpu, sc, pc, 1); | |
208 | ++sc; | |
209 | sc->argbuf.trace_p = trace_p; | |
210 | sc->argbuf.profile_p = profile_p; | |
211 | --max_insns; | |
212 | } | |
213 | ||
214 | idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); | |
215 | ++sc; | |
216 | --max_insns; | |
217 | ++icount; | |
218 | ||
219 | if (befaft_p) | |
220 | { | |
221 | @cpu@_emit_after (current_cpu, sc, pc); | |
222 | ++sc; | |
223 | --max_insns; | |
224 | } | |
225 | ||
226 | pc += idesc->length; | |
227 | ||
228 | if (IDESC_CTI_P (idesc)) | |
229 | { | |
230 | SET_CTI_VPC (sc - 1); | |
231 | ||
232 | /* Delay slot? Ignore for zero-instructions (bcc .+2) since | |
233 | those are treated as exit insns to avoid runaway sessions | |
234 | for invalid programs. */ | |
235 | if (insn != 0 && CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) | |
236 | { | |
f6bcefef HPN |
237 | trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); |
238 | profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); | |
239 | befaft_p = profile_p || trace_p; | |
240 | ||
241 | if (befaft_p) | |
242 | { | |
243 | @cpu@_emit_before (current_cpu, sc, pc, 1); | |
244 | ++sc; | |
245 | sc->argbuf.trace_p = trace_p; | |
246 | sc->argbuf.profile_p = profile_p; | |
247 | --max_insns; | |
248 | } | |
249 | ||
250 | insn = GETIMEMUHI (current_cpu, pc); | |
251 | idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); | |
252 | ++sc; | |
253 | --max_insns; | |
254 | ++icount; | |
255 | ||
256 | if (befaft_p) | |
257 | { | |
258 | @cpu@_emit_after (current_cpu, sc, pc); | |
259 | ++sc; | |
260 | --max_insns; | |
261 | } | |
262 | pc += idesc->length; | |
263 | } | |
264 | break; | |
265 | } | |
266 | } | |
267 | ||
268 | Finish: | |
269 | SET_INSN_COUNT (icount); | |
270 | } | |
271 | EOF | |
272 | ||
273 | ;; | |
274 | ||
275 | xfull-exec-* | xfast-exec-*) | |
276 | ||
277 | # Inputs: current_cpu, sc, FAST_P | |
278 | # Outputs: vpc | |
279 | # vpc contains the address of the next insn to execute | |
280 | ||
281 | cat <<EOF | |
6003fe16 | 282 | #line $LINENO "$0" |
f6bcefef HPN |
283 | { |
284 | #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) | |
285 | #define DEFINE_SWITCH | |
286 | #include "sem@cpu@-switch.c" | |
287 | #else | |
288 | vpc = execute (current_cpu, vpc, FAST_P); | |
289 | #endif | |
290 | } | |
291 | EOF | |
292 | ||
293 | ;; | |
294 | ||
295 | *) | |
296 | echo "Invalid argument to mainloop.in: $1" >&2 | |
297 | exit 1 | |
298 | ;; | |
299 | ||
300 | esac |