[thirdparty/binutils-gdb.git] / sim / d10v / d10v_sim.h

#include <stdio.h>
#include <ctype.h>
#include <limits.h>
#include "ansidecl.h"
#include "callback.h"
#include "opcode/d10v.h"

#define DEBUG_TRACE		0x00000001
#define DEBUG_VALUES		0x00000002
#define DEBUG_LINE_NUMBER	0x00000004
#define DEBUG_MEMSIZE		0x00000008
#define DEBUG_INSTRUCTION	0x00000010

#ifndef	DEBUG
#define	DEBUG (DEBUG_TRACE | DEBUG_VALUES | DEBUG_LINE_NUMBER)
#endif

extern int d10v_debug;

#if UCHAR_MAX == 255
typedef unsigned char uint8;
typedef signed char int8;
#else
#error "Char is not an 8-bit type"
#endif

#if SHRT_MAX == 32767
typedef unsigned short uint16;
typedef signed short int16;
#else
#error "Short is not a 16-bit type"
#endif

#if INT_MAX == 2147483647
typedef unsigned int uint32;
typedef signed int int32;

#elif LONG_MAX == 2147483647
typedef unsigned long uint32;
typedef signed long int32;

#else
#error "Neither int nor long is a 32-bit type"
#endif

#if LONG_MAX > 2147483647
typedef unsigned long uint64;
typedef signed long int64;

#elif __GNUC__
typedef unsigned long long uint64;
typedef signed long long int64;

#else
#error "Can't find an appropriate 64-bit type"
#endif

/* FIXME: D10V defines */
typedef uint16 reg_t;

struct simops 
{
  long opcode;
  long mask;
  int format;
  int cycles;
  int unit;
  int exec_type;
  void (*func)();
  int numops;
  int operands[9];
};

enum _ins_type
{
  INS_UNKNOWN,			/* unknown instruction */
  INS_LONG,			/* long instruction (both containers) */
  INS_COND_TRUE,		/* # times EXExxx executed other instruction */
  INS_COND_FALSE,		/* # times EXExxx did not execute other instruction */
  INS_CYCLES,			/* # cycles */

  INS_LEFT,			/* normal left instructions */
  INS_LEFT_PARALLEL,		/* left side of || */
  INS_LEFT_COND_TEST,		/* EXExx test on left side */
  INS_LEFT_COND_EXE,		/* execution after EXExxx test on right side succeeded */
  INS_LEFT_NOPS,		/* NOP on left side */

  INS_RIGHT,			/* normal right instructions */
  INS_RIGHT_PARALLEL,		/* right side of || */
  INS_RIGHT_COND_TEST,		/* EXExx test on right side */
  INS_RIGHT_COND_EXE,		/* execution after EXExxx test on left side succeeded */
  INS_RIGHT_NOPS,		/* NOP on right side */

  INS_MAX
};

extern unsigned long ins_type_counters[ (int)INS_MAX ];

struct _state
{
  reg_t regs[16];		/* general-purpose registers */
  reg_t cregs[16];		/* control registers */
  int64 a[2];			/* accumulators */
  uint8 SM;
  uint8 EA;
  uint8 DB;
  uint8 IE;
  uint8 RP;
  uint8 MD;
  uint8 FX;
  uint8 ST;
  uint8 F0;
  uint8 F1;
  uint8 C;
  uint8 exe;
  uint8 *imem;
  uint8 *dmem;
  uint32 mem_min;
  uint32 mem_max;
  int   exception;
  enum _ins_type ins_type;
} State;

extern host_callback *d10v_callback;
extern uint16 OP[4];
extern struct simops Simops[];

#define PC	(State.cregs[2])
#define PSW	(State.cregs[0])
#define BPSW	(State.cregs[1])
#define BPC	(State.cregs[3])
#define RPT_C	(State.cregs[7])
#define RPT_S	(State.cregs[8])
#define RPT_E	(State.cregs[9])
#define MOD_S	(State.cregs[10])
#define MOD_E	(State.cregs[11])
#define IBA	(State.cregs[14])

#define SIG_D10V_STOP	-1
#define SIG_D10V_EXIT	-2

#define SEXT3(x)	((((x)&0x7)^(~3))+4)	

/* sign-extend a 4-bit number */
#define SEXT4(x)	((((x)&0xf)^(~7))+8)	

/* sign-extend an 8-bit number */
#define SEXT8(x)	((((x)&0xff)^(~0x7f))+0x80)

/* sign-extend a 16-bit number */
#define SEXT16(x)	((((x)&0xffff)^(~0x7fff))+0x8000)

/* sign-extend a 32-bit number */
#define SEXT32(x)	((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)

/* sign extend a 40 bit number */
#define SEXT40(x)	((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)

/* sign extend a 44 bit number */
#define SEXT44(x)	((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)

/* sign extend a 60 bit number */
#define SEXT60(x)	((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)

#define MAX32	0x7fffffffLL
#define MIN32	0xff80000000LL
#define MASK32	0xffffffffLL
#define MASK40	0xffffffffffLL

#define INC_ADDR(x,i)	x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))

#define	RB(x)	(*((uint8 *)((x)+State.imem)))
#define SB(addr,data)	( RB(addr) = (data & 0xff))

#if defined(__GNUC__) && defined(__OPTIMIZE__) && !defined(NO_ENDIAN_INLINE)
#define ENDIAN_INLINE static __inline__
#include "endian.c"
#undef ENDIAN_INLINE

#else
extern uint32 get_longword PARAMS ((uint8 *));
extern uint16 get_word PARAMS ((uint8 *));
extern int64 get_longlong PARAMS ((uint8 *));
extern void write_word PARAMS ((uint8 *addr, uint16 data));
extern void write_longword PARAMS ((uint8 *addr, uint32 data));
extern void write_longlong PARAMS ((uint8 *addr, int64 data));
#endif

#define SW(addr,data)		write_word((long)(addr)+State.imem,data)
#define RW(x)			get_word((long)(x)+State.imem)
#define SLW(addr,data)  	write_longword((long)(addr)+State.imem,data)
#define RLW(x)			get_longword((long)(x)+State.imem)
#define READ_16(x)		get_word(x)
#define WRITE_16(addr,data)	write_word(addr,data)
#define READ_64(x)		get_longlong(x)
#define WRITE_64(addr,data)	write_longlong(addr,data)
Commit	Line	Data
2934d1c9 MH	1	#include <stdio.h>
2934d1c9 MH	2	#include <ctype.h>
7eebfc62	3	#include <limits.h>
2934d1c9	4	#include "ansidecl.h"
87178dbd	5	#include "callback.h"
2934d1c9 MH	6	#include "opcode/d10v.h"
2934d1c9 MH	7
7eebfc62 MM	8	#define DEBUG_TRACE 0x00000001
7eebfc62 MM	9	#define DEBUG_VALUES 0x00000002
5c255669 MM	10	#define DEBUG_LINE_NUMBER 0x00000004
	11	#define DEBUG_MEMSIZE 0x00000008
	12	#define DEBUG_INSTRUCTION 0x00000010
	13
	14	#ifndef DEBUG
	15	#define DEBUG (DEBUG_TRACE \| DEBUG_VALUES \| DEBUG_LINE_NUMBER)
	16	#endif
87178dbd	17
7eebfc62	18	extern int d10v_debug;
87178dbd	19
7eebfc62	20	#if UCHAR_MAX == 255
2934d1c9	21	typedef unsigned char uint8;
2934d1c9	22	typedef signed char int8;
7eebfc62 MM	23	#else
	24	#error "Char is not an 8-bit type"
	25	#endif
	26
	27	#if SHRT_MAX == 32767
	28	typedef unsigned short uint16;
2934d1c9	29	typedef signed short int16;
7eebfc62 MM	30	#else
	31	#error "Short is not a 16-bit type"
	32	#endif
	33
	34	#if INT_MAX == 2147483647
	35	typedef unsigned int uint32;
2934d1c9	36	typedef signed int int32;
7eebfc62 MM	37
	38	#elif LONG_MAX == 2147483647
	39	typedef unsigned long uint32;
	40	typedef signed long int32;
	41
	42	#else
	43	#error "Neither int nor long is a 32-bit type"
	44	#endif
	45
	46	#if LONG_MAX > 2147483647
	47	typedef unsigned long uint64;
	48	typedef signed long int64;
	49
	50	#elif __GNUC__
	51	typedef unsigned long long uint64;
2934d1c9 MH	52	typedef signed long long int64;
2934d1c9 MH	53
7eebfc62 MM	54	#else
	55	#error "Can't find an appropriate 64-bit type"
	56	#endif
	57
2934d1c9 MH	58	/* FIXME: D10V defines */
	59	typedef uint16 reg_t;
	60
	61	struct simops
	62	{
	63	long opcode;
	64	long mask;
	65	int format;
	66	int cycles;
	67	int unit;
	68	int exec_type;
	69	void (*func)();
	70	int numops;
	71	int operands[9];
	72	};
	73
87178dbd MM	74	enum _ins_type
87178dbd MM	75	{
aeb1f26b MM	76	INS_UNKNOWN, /* unknown instruction */
	77	INS_LONG, /* long instruction (both containers) */
	78	INS_COND_TRUE, /* # times EXExxx executed other instruction */
	79	INS_COND_FALSE, /* # times EXExxx did not execute other instruction */
	80	INS_CYCLES, /* # cycles */
	81
	82	INS_LEFT, /* normal left instructions */
	83	INS_LEFT_PARALLEL, /* left side of \|\| */
	84	INS_LEFT_COND_TEST, /* EXExx test on left side */
	85	INS_LEFT_COND_EXE, /* execution after EXExxx test on right side succeeded */
	86	INS_LEFT_NOPS, /* NOP on left side */
	87
	88	INS_RIGHT, /* normal right instructions */
	89	INS_RIGHT_PARALLEL, /* right side of \|\| */
	90	INS_RIGHT_COND_TEST, /* EXExx test on right side */
	91	INS_RIGHT_COND_EXE, /* execution after EXExxx test on left side succeeded */
	92	INS_RIGHT_NOPS, /* NOP on right side */
	93
7eebfc62	94	INS_MAX
87178dbd MM	95	};
87178dbd MM	96
aeb1f26b	97	extern unsigned long ins_type_counters[ (int)INS_MAX ];
7eebfc62	98
2934d1c9 MH	99	struct _state
	100	{
	101	reg_t regs[16]; /* general-purpose registers */
5c255669 MM	102	reg_t cregs[16]; /* control registers */
5c255669 MM	103	int64 a[2]; /* accumulators */
2934d1c9 MH	104	uint8 SM;
	105	uint8 EA;
	106	uint8 DB;
	107	uint8 IE;
	108	uint8 RP;
	109	uint8 MD;
	110	uint8 FX;
	111	uint8 ST;
	112	uint8 F0;
	113	uint8 F1;
	114	uint8 C;
	115	uint8 exe;
	116	uint8 *imem;
	117	uint8 *dmem;
5c255669 MM	118	uint32 mem_min;
5c255669 MM	119	uint32 mem_max;
4f425a32	120	int exception;
87178dbd	121	enum _ins_type ins_type;
2934d1c9 MH	122	} State;
2934d1c9 MH	123
87178dbd	124	extern host_callback *d10v_callback;
2934d1c9 MH	125	extern uint16 OP[4];
	126	extern struct simops Simops[];
	127
	128	#define PC (State.cregs[2])
	129	#define PSW (State.cregs[0])
	130	#define BPSW (State.cregs[1])
	131	#define BPC (State.cregs[3])
	132	#define RPT_C (State.cregs[7])
	133	#define RPT_S (State.cregs[8])
	134	#define RPT_E (State.cregs[9])
	135	#define MOD_S (State.cregs[10])
	136	#define MOD_E (State.cregs[11])
	137	#define IBA (State.cregs[14])
	138
5c255669 MM	139	#define SIG_D10V_STOP -1
	140	#define SIG_D10V_EXIT -2
	141
2934d1c9 MH	142	#define SEXT3(x) ((((x)&0x7)^(~3))+4)
	143
	144	/* sign-extend a 4-bit number */
	145	#define SEXT4(x) ((((x)&0xf)^(~7))+8)
	146
	147	/* sign-extend an 8-bit number */
	148	#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
	149
	150	/* sign-extend a 16-bit number */
	151	#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
	152
4f425a32 MH	153	/* sign-extend a 32-bit number */
	154	#define SEXT32(x) ((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)
	155
4c38885c MH	156	/* sign extend a 40 bit number */
	157	#define SEXT40(x) ((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)
	158
d70b4d42 MH	159	/* sign extend a 44 bit number */
	160	#define SEXT44(x) ((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)
	161
	162	/* sign extend a 60 bit number */
	163	#define SEXT60(x) ((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)
	164
2934d1c9 MH	165	#define MAX32 0x7fffffffLL
	166	#define MIN32 0xff80000000LL
	167	#define MASK32 0xffffffffLL
	168	#define MASK40 0xffffffffffLL
2934d1c9	169
4f425a32 MH	170	#define INC_ADDR(x,i) x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
4f425a32 MH	171
2934d1c9	172	#define RB(x) (((uint8 )((x)+State.imem)))
4c38885c	173	#define SB(addr,data) ( RB(addr) = (data & 0xff))
2934d1c9	174
5c255669 MM	175	#if defined(__GNUC__) && defined(__OPTIMIZE__) && !defined(NO_ENDIAN_INLINE)
	176	#define ENDIAN_INLINE static __inline__
	177	#include "endian.c"
	178	#undef ENDIAN_INLINE
2934d1c9 MH	179
2934d1c9 MH	180	#else
d6fe5ca5 MM	181	extern uint32 get_longword PARAMS ((uint8 *));
	182	extern uint16 get_word PARAMS ((uint8 *));
	183	extern int64 get_longlong PARAMS ((uint8 *));
	184	extern void write_word PARAMS ((uint8 *addr, uint16 data));
	185	extern void write_longword PARAMS ((uint8 *addr, uint32 data));
	186	extern void write_longlong PARAMS ((uint8 *addr, int64 data));
5c255669	187	#endif
d70b4d42 MH	188
	189	#define SW(addr,data) write_word((long)(addr)+State.imem,data)
	190	#define RW(x) get_word((long)(x)+State.imem)
87178dbd	191	#define SLW(addr,data) write_longword((long)(addr)+State.imem,data)
d70b4d42 MH	192	#define RLW(x) get_longword((long)(x)+State.imem)
	193	#define READ_16(x) get_word(x)
	194	#define WRITE_16(addr,data) write_word(addr,data)
	195	#define READ_64(x) get_longlong(x)
	196	#define WRITE_64(addr,data) write_longlong(addr,data)