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1/* Example synacor simulator.
2
1d506c26 3 Copyright (C) 2005-2024 Free Software Foundation, Inc.
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4 Contributed by Mike Frysinger.
5
6 This file is part of the GNU simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#ifndef EXAMPLE_SYNACOR_SIM_H
22#define EXAMPLE_SYNACOR_SIM_H
23
24struct example_sim_cpu {
25 uint16_t regs[8];
26 sim_cia pc;
27
28 /* This isn't a real register, and the stack is not directly addressable,
29 so use memory outside of the 16-bit address space. */
30 uint32_t sp;
31};
32
33#define EXAMPLE_SIM_CPU(cpu) ((struct example_sim_cpu *) CPU_ARCH_DATA (cpu))
34
35extern void step_once (SIM_CPU *);
36extern void initialize_cpu (SIM_DESC, SIM_CPU *);
37
38#endif