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b34f6357 | 1 | # Makefile template for Configure for the frv simulator |
32d0add0 | 2 | # Copyright (C) 1998-2015 Free Software Foundation, Inc. |
b34f6357 DB |
3 | # Contributed by Red Hat. |
4 | # | |
5 | # This program is free software; you can redistribute it and/or modify | |
6 | # it under the terms of the GNU General Public License as published by | |
4744ac1b | 7 | # the Free Software Foundation; either version 3 of the License, or |
b34f6357 DB |
8 | # (at your option) any later version. |
9 | # | |
10 | # This program is distributed in the hope that it will be useful, | |
11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | # GNU General Public License for more details. | |
14 | # | |
4744ac1b JB |
15 | # You should have received a copy of the GNU General Public License |
16 | # along with this program. If not, see <http://www.gnu.org/licenses/>. | |
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17 | |
18 | ## COMMON_PRE_CONFIG_FRAG | |
19 | ||
20 | FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o | |
21 | ||
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22 | SIM_OBJS = \ |
23 | $(SIM_NEW_COMMON_OBJS) \ | |
24 | sim-cpu.o \ | |
25 | sim-hload.o \ | |
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26 | sim-model.o \ |
27 | sim-reg.o \ | |
28 | cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \ | |
122bbfb5 | 29 | cgen-run.o sim-reason.o sim-stop.o \ |
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30 | sim-if.o arch.o \ |
31 | $(FRV_OBJS) \ | |
32 | traps.o interrupts.o memory.o cache.o pipeline.o \ | |
676a64f4 | 33 | profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \ |
105dd264 | 34 | devices.o reset.o registers.o |
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35 | |
36 | # Extra headers included by sim-main.h. | |
37 | SIM_EXTRA_DEPS = \ | |
38 | $(CGEN_INCLUDE_DEPS) \ | |
39 | arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \ | |
40 | registers.h profile.h \ | |
41 | $(sim-options_h) | |
42 | ||
43 | SIM_EXTRA_CFLAGS = @sim_trapdump@ | |
44 | ||
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45 | SIM_EXTRA_CLEAN = frv-clean |
46 | ||
47 | # This selects the frv newlib/libgloss syscall definitions. | |
48 | NL_TARGET = -DNL_TARGET_frv | |
49 | ||
50 | ## COMMON_POST_CONFIG_FRAG | |
51 | ||
52 | arch = frv | |
53 | ||
54 | arch.o: arch.c $(SIM_MAIN_DEPS) | |
55 | ||
56 | devices.o: devices.c $(SIM_MAIN_DEPS) | |
57 | ||
58 | # FRV objs | |
59 | ||
60 | FRVBF_INCLUDE_DEPS = \ | |
61 | $(CGEN_MAIN_CPU_DEPS) \ | |
62 | $(SIM_EXTRA_DEPS) \ | |
63 | cpu.h decode.h eng.h | |
64 | ||
65 | frv.o: frv.c $(FRVBF_INCLUDE_DEPS) | |
66 | traps.o: traps.c $(FRVBF_INCLUDE_DEPS) | |
67 | pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS) | |
68 | interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS) | |
69 | memory.o: memory.c $(FRVBF_INCLUDE_DEPS) | |
70 | cache.o: cache.c $(FRVBF_INCLUDE_DEPS) | |
71 | options.o: options.c $(FRVBF_INCLUDE_DEPS) | |
72 | reset.o: reset.c $(FRVBF_INCLUDE_DEPS) | |
73 | registers.o: registers.c $(FRVBF_INCLUDE_DEPS) | |
e930b1f5 | 74 | profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS) |
b34f6357 | 75 | profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS) |
676a64f4 | 76 | profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS) |
b34f6357 | 77 | profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS) |
e930b1f5 | 78 | profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS) |
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79 | sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h |
80 | ||
81 | ||
82 | # FIXME: Use of `mono' is wip. | |
83 | mloop.c eng.h: stamp-mloop | |
84 | stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile | |
086c6838 | 85 | $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ |
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86 | -mono -scache -parallel-generic-write -parallel-only \ |
87 | -cpu frvbf -infile $(srcdir)/mloop.in | |
88 | $(SHELL) $(srcroot)/move-if-change eng.hin eng.h | |
89 | $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c | |
90 | touch stamp-mloop | |
91 | mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS) | |
92 | ||
93 | cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS) | |
94 | decode.o: decode.c $(FRVBF_INCLUDE_DEPS) | |
95 | sem.o: sem.c $(FRVBF_INCLUDE_DEPS) | |
96 | model.o: model.c $(FRVBF_INCLUDE_DEPS) | |
97 | ||
98 | frv-clean: | |
99 | rm -f mloop.c eng.h stamp-mloop | |
100 | rm -f tmp-* | |
101 | rm -f stamp-arch stamp-cpu | |
102 | ||
103 | # cgen support, enable with --enable-cgen-maint | |
104 | CGEN_MAINT = ; @true | |
105 | # The following line is commented in or out depending upon --enable-cgen-maint. | |
106 | @CGEN_MAINT@CGEN_MAINT = | |
107 | ||
108 | stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu | |
b34f6357 | 109 | $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ |
d89a78b6 | 110 | archfile=$(srcdir)/../../cpu/frv.cpu \ |
b34f6357 | 111 | FLAGS="with-scache" |
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112 | touch stamp-arch |
113 | arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch | |
114 | # @true | |
115 | ||
b34f6357 | 116 | stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu |
b34f6357 | 117 | $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ |
676a64f4 | 118 | cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \ |
d89a78b6 | 119 | archfile=$(srcdir)/../../cpu/frv.cpu \ |
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120 | FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \ |
121 | EXTRAFILES="$(CGEN_CPU_SEM)" | |
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122 | touch stamp-cpu |
123 | cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu | |
124 | # @true |