[thirdparty/binutils-gdb.git] / sim / frv / options.c

/* FRV simulator memory option handling.
   Copyright (C) 1999-2021 Free Software Foundation, Inc.
   Contributed by Red Hat.

This file is part of GDB, the GNU debugger.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#define WANT_CPU frvbf
#define WANT_CPU_FRVBF

#include "sim-main.h"
#include "sim-assert.h"
#include "sim-options.h"

#include <string.h>
#include <stdlib.h>

/* FRV specific command line options. */

enum {
  OPTION_FRV_DATA_CACHE = OPTION_START,
  OPTION_FRV_INSN_CACHE,
  OPTION_FRV_PROFILE_CACHE,
  OPTION_FRV_PROFILE_PARALLEL,
  OPTION_FRV_TIMER,
  OPTION_FRV_MEMORY_LATENCY
};

static DECLARE_OPTION_HANDLER (frv_option_handler);

const OPTION frv_options[] =
{
  { {"profile", optional_argument, NULL, 'p'},
      'p', "on|off", "Perform profiling",
      frv_option_handler },
  { {"data-cache", optional_argument, NULL, OPTION_FRV_DATA_CACHE },
      '\0', "WAYS[,SETS[,LINESIZE]]", "Enable data cache",
      frv_option_handler },
  { {"insn-cache", optional_argument, NULL, OPTION_FRV_INSN_CACHE },
      '\0', "WAYS[,SETS[,LINESIZE]]", "Enable instruction cache",
      frv_option_handler },
  { {"profile-cache", optional_argument, NULL, OPTION_FRV_PROFILE_CACHE },
      '\0', "on|off", "Profile caches",
      frv_option_handler },
  { {"profile-parallel", optional_argument, NULL, OPTION_FRV_PROFILE_PARALLEL },
      '\0', "on|off", "Profile parallelism",
      frv_option_handler },
  { {"timer", required_argument, NULL, OPTION_FRV_TIMER },
      '\0', "CYCLES,INTERRUPT", "Set Interrupt Timer",
      frv_option_handler },
  { {"memory-latency", required_argument, NULL, OPTION_FRV_MEMORY_LATENCY },
      '\0', "CYCLES", "Set Latency of memory",
      frv_option_handler },
  { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
};

static char *
parse_size (char *chp, address_word *nr_bytes)
{
  /* <nr_bytes> */
  *nr_bytes = strtoul (chp, &chp, 0);
  return chp;
}

static address_word
check_pow2 (address_word value, char *argname, char *optname, SIM_DESC sd)
{
  if ((value & (value - 1)) != 0)
    {
      sim_io_eprintf (sd, "%s argument to %s must be a power of 2\n",
		      argname, optname);
      return 0; /* will enable default value.  */
    }

  return value;
}

static void
parse_cache_option (SIM_DESC sd, char *arg, char *cache_name, int is_data_cache)
{
  int i;
  address_word ways = 0, sets = 0, linesize = 0;
  if (arg != NULL)
    {
      char *chp = arg;
      /* parse the arguments */
      chp = parse_size (chp, &ways);
      ways = check_pow2 (ways, "WAYS", cache_name, sd);
      if (*chp == ',')
	{
	  chp = parse_size (chp + 1, &sets);
	  sets = check_pow2 (sets, "SETS", cache_name, sd);
	  if (*chp == ',')
	    {
	      chp = parse_size (chp + 1, &linesize);
	      linesize = check_pow2 (linesize, "LINESIZE", cache_name, sd);
	    }
	}
    }
  for (i = 0; i < MAX_NR_PROCESSORS; ++i)
    {
      SIM_CPU *current_cpu = STATE_CPU (sd, i);
      FRV_CACHE *cache = is_data_cache ? CPU_DATA_CACHE (current_cpu)
	                               : CPU_INSN_CACHE (current_cpu);
      cache->ways = ways;
      cache->sets = sets;
      cache->line_size = linesize;
      frv_cache_init (current_cpu, cache);
    }
}

static SIM_RC
frv_option_handler (SIM_DESC sd, sim_cpu *current_cpu, int opt,
		    char *arg, int is_command)
{
  switch (opt)
    {
    case 'p' :
      if (! WITH_PROFILE)
	sim_io_eprintf (sd, "Profiling not compiled in, `-p' ignored\n");
      else
	{
	  unsigned mask = PROFILE_USEFUL_MASK;
	  if (WITH_PROFILE_CACHE_P)
	    mask |= (1 << PROFILE_CACHE_IDX);
	  if (WITH_PROFILE_PARALLEL_P)
	    mask |= (1 << PROFILE_PARALLEL_IDX);
	  return set_profile_option_mask (sd, "profile", mask, arg);
	}
      break;

    case OPTION_FRV_DATA_CACHE:
      parse_cache_option (sd, arg, "data_cache", 1/*is_data_cache*/);
      return SIM_RC_OK;

    case OPTION_FRV_INSN_CACHE:
      parse_cache_option (sd, arg, "insn_cache", 0/*is_data_cache*/);
      return SIM_RC_OK;

    case OPTION_FRV_PROFILE_CACHE:
      if (WITH_PROFILE_CACHE_P)
	return sim_profile_set_option (sd, "-cache", PROFILE_CACHE_IDX, arg);
      else
	sim_io_eprintf (sd, "Cache profiling not compiled in, `--profile-cache' ignored\n");
      break;

    case OPTION_FRV_PROFILE_PARALLEL:
      if (WITH_PROFILE_PARALLEL_P)
	{
	  unsigned mask
	    = (1 << PROFILE_MODEL_IDX) | (1 << PROFILE_PARALLEL_IDX);
	  return set_profile_option_mask (sd, "-parallel", mask, arg);
	}
      else
	sim_io_eprintf (sd, "Parallel profiling not compiled in, `--profile-parallel' ignored\n");
      break;

    case OPTION_FRV_TIMER:
      {
	char *chp = arg;
	address_word cycles, interrupt;
	chp = parse_size (chp, &cycles);
	if (chp == arg)
	  {
	    sim_io_eprintf (sd, "Cycle count required for --timer\n");
	    return SIM_RC_FAIL;
	  }
	if (*chp != ',')
	  {
	    sim_io_eprintf (sd, "Interrupt number required for --timer\n");
	    return SIM_RC_FAIL;
	  }
	chp = parse_size (chp + 1, &interrupt);
	if (interrupt < 1 || interrupt > 15)
	  {
	    sim_io_eprintf (sd, "Interrupt number for --timer must be greater than 0 and less that 16\n");
	    return SIM_RC_FAIL;
	  }
	frv_interrupt_state.timer.enabled = 1;
	frv_interrupt_state.timer.value = cycles;
	frv_interrupt_state.timer.current = 0;
	frv_interrupt_state.timer.interrupt =
	  FRV_INTERRUPT_LEVEL_1 + interrupt - 1;
      }
      return SIM_RC_OK;

    case OPTION_FRV_MEMORY_LATENCY:
      {
	int i;
	char *chp = arg;
	address_word cycles;
	chp = parse_size (chp, &cycles);
	if (chp == arg)
	  {
	    sim_io_eprintf (sd, "Cycle count required for --memory-latency\n");
	    return SIM_RC_FAIL;
	  }
	for (i = 0; i < MAX_NR_PROCESSORS; ++i)
	  {
	    SIM_CPU *current_cpu = STATE_CPU (sd, i);
	    FRV_CACHE *insn_cache = CPU_INSN_CACHE (current_cpu);
	    FRV_CACHE *data_cache = CPU_DATA_CACHE (current_cpu);
	    insn_cache->memory_latency = cycles;
	    data_cache->memory_latency = cycles;
	  }
      }
      return SIM_RC_OK;

    default:
      sim_io_eprintf (sd, "Unknown FRV option %d\n", opt);
      return SIM_RC_FAIL;

    }

  return SIM_RC_FAIL;
}
Commit	Line	Data
b34f6357	1	/* FRV simulator memory option handling.
3666a048	2	Copyright (C) 1999-2021 Free Software Foundation, Inc.
b34f6357 DB	3	Contributed by Red Hat.
	4
	5	This file is part of GDB, the GNU debugger.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
4744ac1b JB	9	the Free Software Foundation; either version 3 of the License, or
4744ac1b JB	10	(at your option) any later version.
b34f6357 DB	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
4744ac1b JB	17	You should have received a copy of the GNU General Public License
4744ac1b JB	18	along with this program. If not, see <http://www.gnu.org/licenses/>. */
b34f6357 DB	19
	20	#define WANT_CPU frvbf
	21	#define WANT_CPU_FRVBF
	22
	23	#include "sim-main.h"
	24	#include "sim-assert.h"
	25	#include "sim-options.h"
	26
b34f6357	27	#include <string.h>
b34f6357	28	#include <stdlib.h>
b34f6357 DB	29
	30	/* FRV specific command line options. */
	31
	32	enum {
	33	OPTION_FRV_DATA_CACHE = OPTION_START,
	34	OPTION_FRV_INSN_CACHE,
	35	OPTION_FRV_PROFILE_CACHE,
	36	OPTION_FRV_PROFILE_PARALLEL,
	37	OPTION_FRV_TIMER,
	38	OPTION_FRV_MEMORY_LATENCY
	39	};
	40
	41	static DECLARE_OPTION_HANDLER (frv_option_handler);
	42
	43	const OPTION frv_options[] =
	44	{
	45	{ {"profile", optional_argument, NULL, 'p'},
	46	'p', "on\|off", "Perform profiling",
	47	frv_option_handler },
	48	{ {"data-cache", optional_argument, NULL, OPTION_FRV_DATA_CACHE },
	49	'\0', "WAYS[,SETS[,LINESIZE]]", "Enable data cache",
	50	frv_option_handler },
	51	{ {"insn-cache", optional_argument, NULL, OPTION_FRV_INSN_CACHE },
	52	'\0', "WAYS[,SETS[,LINESIZE]]", "Enable instruction cache",
	53	frv_option_handler },
	54	{ {"profile-cache", optional_argument, NULL, OPTION_FRV_PROFILE_CACHE },
	55	'\0', "on\|off", "Profile caches",
	56	frv_option_handler },
	57	{ {"profile-parallel", optional_argument, NULL, OPTION_FRV_PROFILE_PARALLEL },
	58	'\0', "on\|off", "Profile parallelism",
	59	frv_option_handler },
	60	{ {"timer", required_argument, NULL, OPTION_FRV_TIMER },
	61	'\0', "CYCLES,INTERRUPT", "Set Interrupt Timer",
	62	frv_option_handler },
	63	{ {"memory-latency", required_argument, NULL, OPTION_FRV_MEMORY_LATENCY },
	64	'\0', "CYCLES", "Set Latency of memory",
	65	frv_option_handler },
	66	{ {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
	67	};
	68
	69	static char *
	70	parse_size (char chp, address_word nr_bytes)
	71	{
	72	/* <nr_bytes> */
	73	*nr_bytes = strtoul (chp, &chp, 0);
	74	return chp;
	75	}
	76
	77	static address_word
	78	check_pow2 (address_word value, char argname, char optname, SIM_DESC sd)
	79	{
	80	if ((value & (value - 1)) != 0)
	81	{
	82	sim_io_eprintf (sd, "%s argument to %s must be a power of 2\n",
	83	argname, optname);
	84	return 0; /* will enable default value. */
	85	}
	86
	87	return value;
	88	}
	89
	90	static void
	91	parse_cache_option (SIM_DESC sd, char arg, char cache_name, int is_data_cache)
	92	{
93	int i;
94	address_word ways = 0, sets = 0, linesize = 0;
95	if (arg != NULL)
96	{
97	char *chp = arg;
98	/* parse the arguments */
99	chp = parse_size (chp, &ways);
100	ways = check_pow2 (ways, "WAYS", cache_name, sd);
101	if (*chp == ',')
102	{
103	chp = parse_size (chp + 1, &sets);
104	sets = check_pow2 (sets, "SETS", cache_name, sd);
105	if (*chp == ',')
106	{
107	chp = parse_size (chp + 1, &linesize);
108	linesize = check_pow2 (linesize, "LINESIZE", cache_name, sd);
109	}
110	}
111	}
112	for (i = 0; i < MAX_NR_PROCESSORS; ++i)
113	{
114	SIM_CPU *current_cpu = STATE_CPU (sd, i);
115	FRV_CACHE *cache = is_data_cache ? CPU_DATA_CACHE (current_cpu)
116	: CPU_INSN_CACHE (current_cpu);
117	cache->ways = ways;
118	cache->sets = sets;
119	cache->line_size = linesize;
120	frv_cache_init (current_cpu, cache);
121	}
122	}
123
124	static SIM_RC
125	frv_option_handler (SIM_DESC sd, sim_cpu *current_cpu, int opt,
126	char *arg, int is_command)
127	{
128	switch (opt)
129	{
130	case 'p' :
131	if (! WITH_PROFILE)
132	sim_io_eprintf (sd, "Profiling not compiled in, `-p' ignored\n");
133	else
134	{
135	unsigned mask = PROFILE_USEFUL_MASK;
136	if (WITH_PROFILE_CACHE_P)
137	mask \|= (1 << PROFILE_CACHE_IDX);
138	if (WITH_PROFILE_PARALLEL_P)
139	mask \|= (1 << PROFILE_PARALLEL_IDX);
140	return set_profile_option_mask (sd, "profile", mask, arg);
141	}
142	break;
143
144	case OPTION_FRV_DATA_CACHE:
145	parse_cache_option (sd, arg, "data_cache", 1/is_data_cache/);
146	return SIM_RC_OK;
147
148	case OPTION_FRV_INSN_CACHE:
149	parse_cache_option (sd, arg, "insn_cache", 0/is_data_cache/);
150	return SIM_RC_OK;
151
152	case OPTION_FRV_PROFILE_CACHE:
153	if (WITH_PROFILE_CACHE_P)
154	return sim_profile_set_option (sd, "-cache", PROFILE_CACHE_IDX, arg);
155	else
156	sim_io_eprintf (sd, "Cache profiling not compiled in, `--profile-cache' ignored\n");
157	break;
158
159	case OPTION_FRV_PROFILE_PARALLEL:
160	if (WITH_PROFILE_PARALLEL_P)
161	{
162	unsigned mask
163	= (1 << PROFILE_MODEL_IDX) \| (1 << PROFILE_PARALLEL_IDX);
164	return set_profile_option_mask (sd, "-parallel", mask, arg);
165	}
166	else
167	sim_io_eprintf (sd, "Parallel profiling not compiled in, `--profile-parallel' ignored\n");
168	break;
169
170	case OPTION_FRV_TIMER:
171	{
172	char *chp = arg;
173	address_word cycles, interrupt;
174	chp = parse_size (chp, &cycles);
175	if (chp == arg)
176	{
177	sim_io_eprintf (sd, "Cycle count required for --timer\n");
178	return SIM_RC_FAIL;
179	}
180	if (*chp != ',')
181	{
182	sim_io_eprintf (sd, "Interrupt number required for --timer\n");
183	return SIM_RC_FAIL;
184	}
185	chp = parse_size (chp + 1, &interrupt);
186	if (interrupt < 1 \|\| interrupt > 15)
187	{
188	sim_io_eprintf (sd, "Interrupt number for --timer must be greater than 0 and less that 16\n");
189	return SIM_RC_FAIL;
190	}
191	frv_interrupt_state.timer.enabled = 1;
192	frv_interrupt_state.timer.value = cycles;
193	frv_interrupt_state.timer.current = 0;
194	frv_interrupt_state.timer.interrupt =
195	FRV_INTERRUPT_LEVEL_1 + interrupt - 1;
196	}
197	return SIM_RC_OK;
198
199	case OPTION_FRV_MEMORY_LATENCY:
200	{
201	int i;
202	char *chp = arg;
203	address_word cycles;
204	chp = parse_size (chp, &cycles);
205	if (chp == arg)
206	{
207	sim_io_eprintf (sd, "Cycle count required for --memory-latency\n");
208	return SIM_RC_FAIL;
209	}
210	for (i = 0; i < MAX_NR_PROCESSORS; ++i)
211	{
212	SIM_CPU *current_cpu = STATE_CPU (sd, i);
213	FRV_CACHE *insn_cache = CPU_INSN_CACHE (current_cpu);
214	FRV_CACHE *data_cache = CPU_DATA_CACHE (current_cpu);
215	insn_cache->memory_latency = cycles;
216	data_cache->memory_latency = cycles;
217	}
218	}
219	return SIM_RC_OK;
220
221	default:
222	sim_io_eprintf (sd, "Unknown FRV option %d\n", opt);
223	return SIM_RC_FAIL;
224
225	}
226
227	return SIM_RC_FAIL;
228	}