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b34f6357 | 1 | /* Main simulator entry points specific to the FRV. |
3666a048 | 2 | Copyright (C) 1998-2021 Free Software Foundation, Inc. |
b34f6357 DB |
3 | Contributed by Red Hat. |
4 | ||
5 | This file is part of the GNU simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
9 | the Free Software Foundation; either version 3 of the License, or |
10 | (at your option) any later version. | |
b34f6357 DB |
11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
4744ac1b JB |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
b34f6357 DB |
19 | |
20 | #define WANT_CPU | |
21 | #define WANT_CPU_FRVBF | |
22 | #include "sim-main.h" | |
b34f6357 | 23 | #include <stdlib.h> |
b34f6357 DB |
24 | #include "sim-options.h" |
25 | #include "libiberty.h" | |
26 | #include "bfd.h" | |
27 | #include "elf-bfd.h" | |
28 | ||
29 | static void free_state (SIM_DESC); | |
30 | static void print_frv_misc_cpu (SIM_CPU *cpu, int verbose); | |
b34f6357 DB |
31 | \f |
32 | /* Cover function of sim_state_free to free the cpu buffers as well. */ | |
33 | ||
34 | static void | |
35 | free_state (SIM_DESC sd) | |
36 | { | |
37 | if (STATE_MODULES (sd) != NULL) | |
38 | sim_module_uninstall (sd); | |
39 | sim_cpu_free_all (sd); | |
40 | sim_state_free (sd); | |
41 | } | |
42 | ||
43 | /* Create an instance of the simulator. */ | |
44 | ||
45 | SIM_DESC | |
46 | sim_open (kind, callback, abfd, argv) | |
47 | SIM_OPEN_KIND kind; | |
48 | host_callback *callback; | |
49 | bfd *abfd; | |
2e3d4f4d | 50 | char * const *argv; |
b34f6357 DB |
51 | { |
52 | char c; | |
53 | int i; | |
54 | unsigned long elf_flags = 0; | |
55 | SIM_DESC sd = sim_state_alloc (kind, callback); | |
56 | ||
57 | /* The cpu data is kept in a separately allocated chunk of memory. */ | |
58 | if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) | |
59 | { | |
60 | free_state (sd); | |
61 | return 0; | |
62 | } | |
63 | ||
64 | #if 0 /* FIXME: pc is in mach-specific struct */ | |
65 | /* FIXME: watchpoints code shouldn't need this */ | |
66 | { | |
67 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
68 | STATE_WATCHPOINTS (sd)->pc = &(PC); | |
69 | STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); | |
70 | } | |
71 | #endif | |
72 | ||
73 | if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) | |
74 | { | |
75 | free_state (sd); | |
76 | return 0; | |
77 | } | |
78 | ||
79 | /* These options override any module options. | |
80 | Obviously ambiguity should be avoided, however the caller may wish to | |
81 | augment the meaning of an option. */ | |
82 | sim_add_option_table (sd, NULL, frv_options); | |
83 | ||
77cf2ef5 | 84 | /* The parser will print an error message for us, so we silently return. */ |
b34f6357 DB |
85 | if (sim_parse_args (sd, argv) != SIM_RC_OK) |
86 | { | |
87 | free_state (sd); | |
88 | return 0; | |
89 | } | |
90 | ||
b34f6357 DB |
91 | /* Allocate core managed memory if none specified by user. |
92 | Use address 4 here in case the user wanted address 0 unmapped. */ | |
93 | if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) | |
94 | sim_do_commandf (sd, "memory region 0,0x%lx", FRV_DEFAULT_MEM_SIZE); | |
95 | ||
96 | /* check for/establish the reference program image */ | |
97 | if (sim_analyze_program (sd, | |
98 | (STATE_PROG_ARGV (sd) != NULL | |
99 | ? *STATE_PROG_ARGV (sd) | |
100 | : NULL), | |
101 | abfd) != SIM_RC_OK) | |
102 | { | |
103 | free_state (sd); | |
104 | return 0; | |
105 | } | |
106 | ||
107 | /* set machine and architecture correctly instead of defaulting to frv */ | |
108 | { | |
109 | bfd *prog_bfd = STATE_PROG_BFD (sd); | |
110 | if (prog_bfd != NULL) | |
111 | { | |
112 | struct elf_backend_data *backend_data; | |
113 | ||
114 | if (bfd_get_arch (prog_bfd) != bfd_arch_frv) | |
115 | { | |
116 | sim_io_eprintf (sd, "%s: \"%s\" is not a FRV object file\n", | |
117 | STATE_MY_NAME (sd), | |
118 | bfd_get_filename (prog_bfd)); | |
119 | free_state (sd); | |
120 | return 0; | |
121 | } | |
122 | ||
123 | backend_data = get_elf_backend_data (prog_bfd); | |
124 | ||
125 | if (backend_data != NULL) | |
126 | backend_data->elf_backend_object_p (prog_bfd); | |
127 | ||
128 | elf_flags = elf_elfheader (prog_bfd)->e_flags; | |
129 | } | |
130 | } | |
131 | ||
132 | /* Establish any remaining configuration options. */ | |
133 | if (sim_config (sd) != SIM_RC_OK) | |
134 | { | |
135 | free_state (sd); | |
136 | return 0; | |
137 | } | |
138 | ||
139 | if (sim_post_argv_init (sd) != SIM_RC_OK) | |
140 | { | |
141 | free_state (sd); | |
142 | return 0; | |
143 | } | |
144 | ||
145 | /* Open a copy of the cpu descriptor table. */ | |
146 | { | |
147 | CGEN_CPU_DESC cd = frv_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, | |
148 | CGEN_ENDIAN_BIG); | |
149 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
150 | { | |
151 | SIM_CPU *cpu = STATE_CPU (sd, i); | |
152 | CPU_CPU_DESC (cpu) = cd; | |
153 | CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; | |
154 | CPU_ELF_FLAGS (cpu) = elf_flags; | |
155 | } | |
156 | frv_cgen_init_dis (cd); | |
157 | } | |
158 | ||
159 | /* Initialize various cgen things not done by common framework. | |
160 | Must be done after frv_cgen_cpu_open. */ | |
161 | cgen_init (sd); | |
162 | ||
163 | /* CPU specific initialization. */ | |
164 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
165 | { | |
166 | SIM_CPU* cpu = STATE_CPU (sd, i); | |
167 | frv_initialize (cpu, sd); | |
168 | } | |
169 | ||
b34f6357 DB |
170 | return sd; |
171 | } | |
172 | ||
173 | void | |
6e4f085c | 174 | frv_sim_close (sd, quitting) |
b34f6357 DB |
175 | SIM_DESC sd; |
176 | int quitting; | |
177 | { | |
178 | int i; | |
179 | /* Terminate cache support. */ | |
180 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
181 | { | |
182 | SIM_CPU* cpu = STATE_CPU (sd, i); | |
183 | frv_cache_term (CPU_INSN_CACHE (cpu)); | |
184 | frv_cache_term (CPU_DATA_CACHE (cpu)); | |
185 | } | |
b34f6357 DB |
186 | } |
187 | \f | |
188 | SIM_RC | |
189 | sim_create_inferior (sd, abfd, argv, envp) | |
190 | SIM_DESC sd; | |
191 | bfd *abfd; | |
2e3d4f4d MF |
192 | char * const *argv; |
193 | char * const *envp; | |
b34f6357 DB |
194 | { |
195 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
196 | SIM_ADDR addr; | |
197 | ||
198 | if (abfd != NULL) | |
199 | addr = bfd_get_start_address (abfd); | |
200 | else | |
201 | addr = 0; | |
202 | sim_pc_set (current_cpu, addr); | |
203 | ||
0e967299 MF |
204 | /* Standalone mode (i.e. `run`) will take care of the argv for us in |
205 | sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' | |
206 | with `gdb`), we need to handle it because the user can change the | |
207 | argv on the fly via gdb's 'run'. */ | |
208 | if (STATE_PROG_ARGV (sd) != argv) | |
209 | { | |
210 | freeargv (STATE_PROG_ARGV (sd)); | |
211 | STATE_PROG_ARGV (sd) = dupargv (argv); | |
212 | } | |
b34f6357 DB |
213 | |
214 | return SIM_RC_OK; | |
215 | } |