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[thirdparty/binutils-gdb.git] / sim / lm32 / model.c
CommitLineData
c28c63d8
JB		 1/* Simulator model support for lm32bf.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
c5a57081 5Copyright 1996-2010, 2012 Free Software Foundation, Inc.
c28c63d8
JB		 6
7This file is part of the GNU simulators.
8
fb067cad
DE		 9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
c28c63d8 13
fb067cad
DE		 14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
c28c63d8 18
fb067cad
DE		 19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
c28c63d8
JB		 22
23*/
24
25#define WANT_CPU lm32bf
26#define WANT_CPU_LM32BF
27
28#include "sim-main.h"
29
30/* The profiling data is recorded here, but is accessed via the profiling
31 mechanism. After all, this is information for profiling. */
32
33#if WITH_PROFILE_MODEL_P
34
35/* Model handlers for each insn. */
36
37static int
38model_lm32_add (SIM_CPU *current_cpu, void *sem_arg)
39{
40#define FLD(f) abuf->fields.sfmt_user.f
41 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
42 const IDESC * UNUSED idesc = abuf->idesc;
43 int cycles = 0;
44 {
45 int referenced = 0;
46 int UNUSED insn_referenced = abuf->written;
47 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
48 }
49 return cycles;
50#undef FLD
51}
52
53static int
54model_lm32_addi (SIM_CPU *current_cpu, void *sem_arg)
55{
56#define FLD(f) abuf->fields.sfmt_addi.f
57 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
58 const IDESC * UNUSED idesc = abuf->idesc;
59 int cycles = 0;
60 {
61 int referenced = 0;
62 int UNUSED insn_referenced = abuf->written;
63 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
64 }
65 return cycles;
66#undef FLD
67}
68
69static int
70model_lm32_and (SIM_CPU *current_cpu, void *sem_arg)
71{
72#define FLD(f) abuf->fields.sfmt_user.f
73 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
74 const IDESC * UNUSED idesc = abuf->idesc;
75 int cycles = 0;
76 {
77 int referenced = 0;
78 int UNUSED insn_referenced = abuf->written;
79 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
80 }
81 return cycles;
82#undef FLD
83}
84
85static int
86model_lm32_andi (SIM_CPU *current_cpu, void *sem_arg)
87{
88#define FLD(f) abuf->fields.sfmt_andi.f
89 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
90 const IDESC * UNUSED idesc = abuf->idesc;
91 int cycles = 0;
92 {
93 int referenced = 0;
94 int UNUSED insn_referenced = abuf->written;
95 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
96 }
97 return cycles;
98#undef FLD
99}
100
101static int
102model_lm32_andhii (SIM_CPU *current_cpu, void *sem_arg)
103{
104#define FLD(f) abuf->fields.sfmt_andi.f
105 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
106 const IDESC * UNUSED idesc = abuf->idesc;
107 int cycles = 0;
108 {
109 int referenced = 0;
110 int UNUSED insn_referenced = abuf->written;
111 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
112 }
113 return cycles;
114#undef FLD
115}
116
117static int
118model_lm32_b (SIM_CPU *current_cpu, void *sem_arg)
119{
120#define FLD(f) abuf->fields.sfmt_be.f
121 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
122 const IDESC * UNUSED idesc = abuf->idesc;
123 int cycles = 0;
124 {
125 int referenced = 0;
126 int UNUSED insn_referenced = abuf->written;
127 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
128 }
129 return cycles;
130#undef FLD
131}
132
133static int
134model_lm32_bi (SIM_CPU *current_cpu, void *sem_arg)
135{
136#define FLD(f) abuf->fields.sfmt_bi.f
137 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
138 const IDESC * UNUSED idesc = abuf->idesc;
139 int cycles = 0;
140 {
141 int referenced = 0;
142 int UNUSED insn_referenced = abuf->written;
143 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
144 }
145 return cycles;
146#undef FLD
147}
148
149static int
150model_lm32_be (SIM_CPU *current_cpu, void *sem_arg)
151{
152#define FLD(f) abuf->fields.sfmt_be.f
153 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
154 const IDESC * UNUSED idesc = abuf->idesc;
155 int cycles = 0;
156 {
157 int referenced = 0;
158 int UNUSED insn_referenced = abuf->written;
159 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
160 }
161 return cycles;
162#undef FLD
163}
164
165static int
166model_lm32_bg (SIM_CPU *current_cpu, void *sem_arg)
167{
168#define FLD(f) abuf->fields.sfmt_be.f
169 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
170 const IDESC * UNUSED idesc = abuf->idesc;
171 int cycles = 0;
172 {
173 int referenced = 0;
174 int UNUSED insn_referenced = abuf->written;
175 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
176 }
177 return cycles;
178#undef FLD
179}
180
181static int
182model_lm32_bge (SIM_CPU *current_cpu, void *sem_arg)
183{
184#define FLD(f) abuf->fields.sfmt_be.f
185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
186 const IDESC * UNUSED idesc = abuf->idesc;
187 int cycles = 0;
188 {
189 int referenced = 0;
190 int UNUSED insn_referenced = abuf->written;
191 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
192 }
193 return cycles;
194#undef FLD
195}
196
197static int
198model_lm32_bgeu (SIM_CPU *current_cpu, void *sem_arg)
199{
200#define FLD(f) abuf->fields.sfmt_be.f
201 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
202 const IDESC * UNUSED idesc = abuf->idesc;
203 int cycles = 0;
204 {
205 int referenced = 0;
206 int UNUSED insn_referenced = abuf->written;
207 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
208 }
209 return cycles;
210#undef FLD
211}
212
213static int
214model_lm32_bgu (SIM_CPU *current_cpu, void *sem_arg)
215{
216#define FLD(f) abuf->fields.sfmt_be.f
217 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
218 const IDESC * UNUSED idesc = abuf->idesc;
219 int cycles = 0;
220 {
221 int referenced = 0;
222 int UNUSED insn_referenced = abuf->written;
223 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
224 }
225 return cycles;
226#undef FLD
227}
228
229static int
230model_lm32_bne (SIM_CPU *current_cpu, void *sem_arg)
231{
232#define FLD(f) abuf->fields.sfmt_be.f
233 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
234 const IDESC * UNUSED idesc = abuf->idesc;
235 int cycles = 0;
236 {
237 int referenced = 0;
238 int UNUSED insn_referenced = abuf->written;
239 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
240 }
241 return cycles;
242#undef FLD
243}
244
245static int
246model_lm32_call (SIM_CPU *current_cpu, void *sem_arg)
247{
248#define FLD(f) abuf->fields.sfmt_be.f
249 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
250 const IDESC * UNUSED idesc = abuf->idesc;
251 int cycles = 0;
252 {
253 int referenced = 0;
254 int UNUSED insn_referenced = abuf->written;
255 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
256 }
257 return cycles;
258#undef FLD
259}
260
261static int
262model_lm32_calli (SIM_CPU *current_cpu, void *sem_arg)
263{
264#define FLD(f) abuf->fields.sfmt_bi.f
265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
266 const IDESC * UNUSED idesc = abuf->idesc;
267 int cycles = 0;
268 {
269 int referenced = 0;
270 int UNUSED insn_referenced = abuf->written;
271 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
272 }
273 return cycles;
274#undef FLD
275}
276
277static int
278model_lm32_cmpe (SIM_CPU *current_cpu, void *sem_arg)
279{
280#define FLD(f) abuf->fields.sfmt_user.f
281 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
282 const IDESC * UNUSED idesc = abuf->idesc;
283 int cycles = 0;
284 {
285 int referenced = 0;
286 int UNUSED insn_referenced = abuf->written;
287 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
288 }
289 return cycles;
290#undef FLD
291}
292
293static int
294model_lm32_cmpei (SIM_CPU *current_cpu, void *sem_arg)
295{
296#define FLD(f) abuf->fields.sfmt_addi.f
297 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
298 const IDESC * UNUSED idesc = abuf->idesc;
299 int cycles = 0;
300 {
301 int referenced = 0;
302 int UNUSED insn_referenced = abuf->written;
303 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
304 }
305 return cycles;
306#undef FLD
307}
308
309static int
310model_lm32_cmpg (SIM_CPU *current_cpu, void *sem_arg)
311{
312#define FLD(f) abuf->fields.sfmt_user.f
313 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
314 const IDESC * UNUSED idesc = abuf->idesc;
315 int cycles = 0;
316 {
317 int referenced = 0;
318 int UNUSED insn_referenced = abuf->written;
319 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
320 }
321 return cycles;
322#undef FLD
323}
324
325static int
326model_lm32_cmpgi (SIM_CPU *current_cpu, void *sem_arg)
327{
328#define FLD(f) abuf->fields.sfmt_addi.f
329 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
330 const IDESC * UNUSED idesc = abuf->idesc;
331 int cycles = 0;
332 {
333 int referenced = 0;
334 int UNUSED insn_referenced = abuf->written;
335 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
336 }
337 return cycles;
338#undef FLD
339}
340
341static int
342model_lm32_cmpge (SIM_CPU *current_cpu, void *sem_arg)
343{
344#define FLD(f) abuf->fields.sfmt_user.f
345 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
346 const IDESC * UNUSED idesc = abuf->idesc;
347 int cycles = 0;
348 {
349 int referenced = 0;
350 int UNUSED insn_referenced = abuf->written;
351 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
352 }
353 return cycles;
354#undef FLD
355}
356
357static int
358model_lm32_cmpgei (SIM_CPU *current_cpu, void *sem_arg)
359{
360#define FLD(f) abuf->fields.sfmt_addi.f
361 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
362 const IDESC * UNUSED idesc = abuf->idesc;
363 int cycles = 0;
364 {
365 int referenced = 0;
366 int UNUSED insn_referenced = abuf->written;
367 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
368 }
369 return cycles;
370#undef FLD
371}
372
373static int
374model_lm32_cmpgeu (SIM_CPU *current_cpu, void *sem_arg)
375{
376#define FLD(f) abuf->fields.sfmt_user.f
377 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
378 const IDESC * UNUSED idesc = abuf->idesc;
379 int cycles = 0;
380 {
381 int referenced = 0;
382 int UNUSED insn_referenced = abuf->written;
383 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
384 }
385 return cycles;
386#undef FLD
387}
388
389static int
390model_lm32_cmpgeui (SIM_CPU *current_cpu, void *sem_arg)
391{
392#define FLD(f) abuf->fields.sfmt_andi.f
393 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
394 const IDESC * UNUSED idesc = abuf->idesc;
395 int cycles = 0;
396 {
397 int referenced = 0;
398 int UNUSED insn_referenced = abuf->written;
399 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
400 }
401 return cycles;
402#undef FLD
403}
404
405static int
406model_lm32_cmpgu (SIM_CPU *current_cpu, void *sem_arg)
407{
408#define FLD(f) abuf->fields.sfmt_user.f
409 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
410 const IDESC * UNUSED idesc = abuf->idesc;
411 int cycles = 0;
412 {
413 int referenced = 0;
414 int UNUSED insn_referenced = abuf->written;
415 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
416 }
417 return cycles;
418#undef FLD
419}
420
421static int
422model_lm32_cmpgui (SIM_CPU *current_cpu, void *sem_arg)
423{
424#define FLD(f) abuf->fields.sfmt_andi.f
425 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
426 const IDESC * UNUSED idesc = abuf->idesc;
427 int cycles = 0;
428 {
429 int referenced = 0;
430 int UNUSED insn_referenced = abuf->written;
431 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
432 }
433 return cycles;
434#undef FLD
435}
436
437static int
438model_lm32_cmpne (SIM_CPU *current_cpu, void *sem_arg)
439{
440#define FLD(f) abuf->fields.sfmt_user.f
441 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
442 const IDESC * UNUSED idesc = abuf->idesc;
443 int cycles = 0;
444 {
445 int referenced = 0;
446 int UNUSED insn_referenced = abuf->written;
447 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
448 }
449 return cycles;
450#undef FLD
451}
452
453static int
454model_lm32_cmpnei (SIM_CPU *current_cpu, void *sem_arg)
455{
456#define FLD(f) abuf->fields.sfmt_addi.f
457 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
458 const IDESC * UNUSED idesc = abuf->idesc;
459 int cycles = 0;
460 {
461 int referenced = 0;
462 int UNUSED insn_referenced = abuf->written;
463 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
464 }
465 return cycles;
466#undef FLD
467}
468
469static int
470model_lm32_divu (SIM_CPU *current_cpu, void *sem_arg)
471{
472#define FLD(f) abuf->fields.sfmt_user.f
473 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
474 const IDESC * UNUSED idesc = abuf->idesc;
475 int cycles = 0;
476 {
477 int referenced = 0;
478 int UNUSED insn_referenced = abuf->written;
479 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
480 }
481 return cycles;
482#undef FLD
483}
484
485static int
486model_lm32_lb (SIM_CPU *current_cpu, void *sem_arg)
487{
488#define FLD(f) abuf->fields.sfmt_addi.f
489 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
490 const IDESC * UNUSED idesc = abuf->idesc;
491 int cycles = 0;
492 {
493 int referenced = 0;
494 int UNUSED insn_referenced = abuf->written;
495 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
496 }
497 return cycles;
498#undef FLD
499}
500
501static int
502model_lm32_lbu (SIM_CPU *current_cpu, void *sem_arg)
503{
504#define FLD(f) abuf->fields.sfmt_addi.f
505 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
506 const IDESC * UNUSED idesc = abuf->idesc;
507 int cycles = 0;
508 {
509 int referenced = 0;
510 int UNUSED insn_referenced = abuf->written;
511 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
512 }
513 return cycles;
514#undef FLD
515}
516
517static int
518model_lm32_lh (SIM_CPU *current_cpu, void *sem_arg)
519{
520#define FLD(f) abuf->fields.sfmt_addi.f
521 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
522 const IDESC * UNUSED idesc = abuf->idesc;
523 int cycles = 0;
524 {
525 int referenced = 0;
526 int UNUSED insn_referenced = abuf->written;
527 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
528 }
529 return cycles;
530#undef FLD
531}
532
533static int
534model_lm32_lhu (SIM_CPU *current_cpu, void *sem_arg)
535{
536#define FLD(f) abuf->fields.sfmt_addi.f
537 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
538 const IDESC * UNUSED idesc = abuf->idesc;
539 int cycles = 0;
540 {
541 int referenced = 0;
542 int UNUSED insn_referenced = abuf->written;
543 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
544 }
545 return cycles;
546#undef FLD
547}
548
549static int
550model_lm32_lw (SIM_CPU *current_cpu, void *sem_arg)
551{
552#define FLD(f) abuf->fields.sfmt_addi.f
553 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
554 const IDESC * UNUSED idesc = abuf->idesc;
555 int cycles = 0;
556 {
557 int referenced = 0;
558 int UNUSED insn_referenced = abuf->written;
559 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
560 }
561 return cycles;
562#undef FLD
563}
564
565static int
566model_lm32_modu (SIM_CPU *current_cpu, void *sem_arg)
567{
568#define FLD(f) abuf->fields.sfmt_user.f
569 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
570 const IDESC * UNUSED idesc = abuf->idesc;
571 int cycles = 0;
572 {
573 int referenced = 0;
574 int UNUSED insn_referenced = abuf->written;
575 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
576 }
577 return cycles;
578#undef FLD
579}
580
581static int
582model_lm32_mul (SIM_CPU *current_cpu, void *sem_arg)
583{
584#define FLD(f) abuf->fields.sfmt_user.f
585 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
586 const IDESC * UNUSED idesc = abuf->idesc;
587 int cycles = 0;
588 {
589 int referenced = 0;
590 int UNUSED insn_referenced = abuf->written;
591 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
592 }
593 return cycles;
594#undef FLD
595}
596
597static int
598model_lm32_muli (SIM_CPU *current_cpu, void *sem_arg)
599{
600#define FLD(f) abuf->fields.sfmt_addi.f
601 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
602 const IDESC * UNUSED idesc = abuf->idesc;
603 int cycles = 0;
604 {
605 int referenced = 0;
606 int UNUSED insn_referenced = abuf->written;
607 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
608 }
609 return cycles;
610#undef FLD
611}
612
613static int
614model_lm32_nor (SIM_CPU *current_cpu, void *sem_arg)
615{
616#define FLD(f) abuf->fields.sfmt_user.f
617 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
618 const IDESC * UNUSED idesc = abuf->idesc;
619 int cycles = 0;
620 {
621 int referenced = 0;
622 int UNUSED insn_referenced = abuf->written;
623 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
624 }
625 return cycles;
626#undef FLD
627}
628
629static int
630model_lm32_nori (SIM_CPU *current_cpu, void *sem_arg)
631{
632#define FLD(f) abuf->fields.sfmt_andi.f
633 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
634 const IDESC * UNUSED idesc = abuf->idesc;
635 int cycles = 0;
636 {
637 int referenced = 0;
638 int UNUSED insn_referenced = abuf->written;
639 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
640 }
641 return cycles;
642#undef FLD
643}
644
645static int
646model_lm32_or (SIM_CPU *current_cpu, void *sem_arg)
647{
648#define FLD(f) abuf->fields.sfmt_user.f
649 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
650 const IDESC * UNUSED idesc = abuf->idesc;
651 int cycles = 0;
652 {
653 int referenced = 0;
654 int UNUSED insn_referenced = abuf->written;
655 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
656 }
657 return cycles;
658#undef FLD
659}
660
661static int
662model_lm32_ori (SIM_CPU *current_cpu, void *sem_arg)
663{
664#define FLD(f) abuf->fields.sfmt_andi.f
665 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
666 const IDESC * UNUSED idesc = abuf->idesc;
667 int cycles = 0;
668 {
669 int referenced = 0;
670 int UNUSED insn_referenced = abuf->written;
671 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
672 }
673 return cycles;
674#undef FLD
675}
676
677static int
678model_lm32_orhii (SIM_CPU *current_cpu, void *sem_arg)
679{
680#define FLD(f) abuf->fields.sfmt_andi.f
681 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
682 const IDESC * UNUSED idesc = abuf->idesc;
683 int cycles = 0;
684 {
685 int referenced = 0;
686 int UNUSED insn_referenced = abuf->written;
687 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
688 }
689 return cycles;
690#undef FLD
691}
692
693static int
694model_lm32_rcsr (SIM_CPU *current_cpu, void *sem_arg)
695{
696#define FLD(f) abuf->fields.sfmt_rcsr.f
697 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
698 const IDESC * UNUSED idesc = abuf->idesc;
699 int cycles = 0;
700 {
701 int referenced = 0;
702 int UNUSED insn_referenced = abuf->written;
703 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
704 }
705 return cycles;
706#undef FLD
707}
708
709static int
710model_lm32_sb (SIM_CPU *current_cpu, void *sem_arg)
711{
712#define FLD(f) abuf->fields.sfmt_addi.f
713 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
714 const IDESC * UNUSED idesc = abuf->idesc;
715 int cycles = 0;
716 {
717 int referenced = 0;
718 int UNUSED insn_referenced = abuf->written;
719 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
720 }
721 return cycles;
722#undef FLD
723}
724
725static int
726model_lm32_sextb (SIM_CPU *current_cpu, void *sem_arg)
727{
728#define FLD(f) abuf->fields.sfmt_user.f
729 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
730 const IDESC * UNUSED idesc = abuf->idesc;
731 int cycles = 0;
732 {
733 int referenced = 0;
734 int UNUSED insn_referenced = abuf->written;
735 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
736 }
737 return cycles;
738#undef FLD
739}
740
741static int
742model_lm32_sexth (SIM_CPU *current_cpu, void *sem_arg)
743{
744#define FLD(f) abuf->fields.sfmt_user.f
745 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
746 const IDESC * UNUSED idesc = abuf->idesc;
747 int cycles = 0;
748 {
749 int referenced = 0;
750 int UNUSED insn_referenced = abuf->written;
751 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
752 }
753 return cycles;
754#undef FLD
755}
756
757static int
758model_lm32_sh (SIM_CPU *current_cpu, void *sem_arg)
759{
760#define FLD(f) abuf->fields.sfmt_addi.f
761 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
762 const IDESC * UNUSED idesc = abuf->idesc;
763 int cycles = 0;
764 {
765 int referenced = 0;
766 int UNUSED insn_referenced = abuf->written;
767 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
768 }
769 return cycles;
770#undef FLD
771}
772
773static int
774model_lm32_sl (SIM_CPU *current_cpu, void *sem_arg)
775{
776#define FLD(f) abuf->fields.sfmt_user.f
777 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
778 const IDESC * UNUSED idesc = abuf->idesc;
779 int cycles = 0;
780 {
781 int referenced = 0;
782 int UNUSED insn_referenced = abuf->written;
783 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
784 }
785 return cycles;
786#undef FLD
787}
788
789static int
790model_lm32_sli (SIM_CPU *current_cpu, void *sem_arg)
791{
792#define FLD(f) abuf->fields.sfmt_addi.f
793 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
794 const IDESC * UNUSED idesc = abuf->idesc;
795 int cycles = 0;
796 {
797 int referenced = 0;
798 int UNUSED insn_referenced = abuf->written;
799 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
800 }
801 return cycles;
802#undef FLD
803}
804
805static int
806model_lm32_sr (SIM_CPU *current_cpu, void *sem_arg)
807{
808#define FLD(f) abuf->fields.sfmt_user.f
809 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
810 const IDESC * UNUSED idesc = abuf->idesc;
811 int cycles = 0;
812 {
813 int referenced = 0;
814 int UNUSED insn_referenced = abuf->written;
815 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
816 }
817 return cycles;
818#undef FLD
819}
820
821static int
822model_lm32_sri (SIM_CPU *current_cpu, void *sem_arg)
823{
824#define FLD(f) abuf->fields.sfmt_addi.f
825 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
826 const IDESC * UNUSED idesc = abuf->idesc;
827 int cycles = 0;
828 {
829 int referenced = 0;
830 int UNUSED insn_referenced = abuf->written;
831 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
832 }
833 return cycles;
834#undef FLD
835}
836
837static int
838model_lm32_sru (SIM_CPU *current_cpu, void *sem_arg)
839{
840#define FLD(f) abuf->fields.sfmt_user.f
841 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
842 const IDESC * UNUSED idesc = abuf->idesc;
843 int cycles = 0;
844 {
845 int referenced = 0;
846 int UNUSED insn_referenced = abuf->written;
847 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
848 }
849 return cycles;
850#undef FLD
851}
852
853static int
854model_lm32_srui (SIM_CPU *current_cpu, void *sem_arg)
855{
856#define FLD(f) abuf->fields.sfmt_addi.f
857 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
858 const IDESC * UNUSED idesc = abuf->idesc;
859 int cycles = 0;
860 {
861 int referenced = 0;
862 int UNUSED insn_referenced = abuf->written;
863 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
864 }
865 return cycles;
866#undef FLD
867}
868
869static int
870model_lm32_sub (SIM_CPU *current_cpu, void *sem_arg)
871{
872#define FLD(f) abuf->fields.sfmt_user.f
873 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
874 const IDESC * UNUSED idesc = abuf->idesc;
875 int cycles = 0;
876 {
877 int referenced = 0;
878 int UNUSED insn_referenced = abuf->written;
879 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
880 }
881 return cycles;
882#undef FLD
883}
884
885static int
886model_lm32_sw (SIM_CPU *current_cpu, void *sem_arg)
887{
888#define FLD(f) abuf->fields.sfmt_addi.f
889 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
890 const IDESC * UNUSED idesc = abuf->idesc;
891 int cycles = 0;
892 {
893 int referenced = 0;
894 int UNUSED insn_referenced = abuf->written;
895 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
896 }
897 return cycles;
898#undef FLD
899}
900
901static int
902model_lm32_user (SIM_CPU *current_cpu, void *sem_arg)
903{
904#define FLD(f) abuf->fields.sfmt_user.f
905 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
906 const IDESC * UNUSED idesc = abuf->idesc;
907 int cycles = 0;
908 {
909 int referenced = 0;
910 int UNUSED insn_referenced = abuf->written;
911 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
912 }
913 return cycles;
914#undef FLD
915}
916
917static int
918model_lm32_wcsr (SIM_CPU *current_cpu, void *sem_arg)
919{
920#define FLD(f) abuf->fields.sfmt_wcsr.f
921 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
922 const IDESC * UNUSED idesc = abuf->idesc;
923 int cycles = 0;
924 {
925 int referenced = 0;
926 int UNUSED insn_referenced = abuf->written;
927 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
928 }
929 return cycles;
930#undef FLD
931}
932
933static int
934model_lm32_xor (SIM_CPU *current_cpu, void *sem_arg)
935{
936#define FLD(f) abuf->fields.sfmt_user.f
937 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
938 const IDESC * UNUSED idesc = abuf->idesc;
939 int cycles = 0;
940 {
941 int referenced = 0;
942 int UNUSED insn_referenced = abuf->written;
943 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
944 }
945 return cycles;
946#undef FLD
947}
948
949static int
950model_lm32_xori (SIM_CPU *current_cpu, void *sem_arg)
951{
952#define FLD(f) abuf->fields.sfmt_andi.f
953 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
954 const IDESC * UNUSED idesc = abuf->idesc;
955 int cycles = 0;
956 {
957 int referenced = 0;
958 int UNUSED insn_referenced = abuf->written;
959 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
960 }
961 return cycles;
962#undef FLD
963}
964
965static int
966model_lm32_xnor (SIM_CPU *current_cpu, void *sem_arg)
967{
968#define FLD(f) abuf->fields.sfmt_user.f
969 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
970 const IDESC * UNUSED idesc = abuf->idesc;
971 int cycles = 0;
972 {
973 int referenced = 0;
974 int UNUSED insn_referenced = abuf->written;
975 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
976 }
977 return cycles;
978#undef FLD
979}
980
981static int
982model_lm32_xnori (SIM_CPU *current_cpu, void *sem_arg)
983{
984#define FLD(f) abuf->fields.sfmt_andi.f
985 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
986 const IDESC * UNUSED idesc = abuf->idesc;
987 int cycles = 0;
988 {
989 int referenced = 0;
990 int UNUSED insn_referenced = abuf->written;
991 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
992 }
993 return cycles;
994#undef FLD
995}
996
997static int
998model_lm32_break (SIM_CPU *current_cpu, void *sem_arg)
999{
2310652a 1000#define FLD(f) abuf->fields.sfmt_empty.f
c28c63d8
JB		 1001 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1002 const IDESC * UNUSED idesc = abuf->idesc;
1003 int cycles = 0;
1004 {
1005 int referenced = 0;
1006 int UNUSED insn_referenced = abuf->written;
1007 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
1008 }
1009 return cycles;
1010#undef FLD
1011}
1012
1013static int
1014model_lm32_scall (SIM_CPU *current_cpu, void *sem_arg)
1015{
2310652a 1016#define FLD(f) abuf->fields.sfmt_empty.f
c28c63d8
JB		 1017 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1018 const IDESC * UNUSED idesc = abuf->idesc;
1019 int cycles = 0;
1020 {
1021 int referenced = 0;
1022 int UNUSED insn_referenced = abuf->written;
1023 cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
1024 }
1025 return cycles;
1026#undef FLD
1027}
1028
1029/* We assume UNIT_NONE == 0 because the tables don't always terminate
1030 entries with it. */
1031
1032/* Model timing data for `lm32'. */
1033
1034static const INSN_TIMING lm32_timing[] = {
1035 { LM32BF_INSN_X_INVALID, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1036 { LM32BF_INSN_X_AFTER, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1037 { LM32BF_INSN_X_BEFORE, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1038 { LM32BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1039 { LM32BF_INSN_X_CHAIN, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1040 { LM32BF_INSN_X_BEGIN, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1041 { LM32BF_INSN_ADD, model_lm32_add, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1042 { LM32BF_INSN_ADDI, model_lm32_addi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1043 { LM32BF_INSN_AND, model_lm32_and, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1044 { LM32BF_INSN_ANDI, model_lm32_andi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1045 { LM32BF_INSN_ANDHII, model_lm32_andhii, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1046 { LM32BF_INSN_B, model_lm32_b, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1047 { LM32BF_INSN_BI, model_lm32_bi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1048 { LM32BF_INSN_BE, model_lm32_be, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1049 { LM32BF_INSN_BG, model_lm32_bg, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1050 { LM32BF_INSN_BGE, model_lm32_bge, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1051 { LM32BF_INSN_BGEU, model_lm32_bgeu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1052 { LM32BF_INSN_BGU, model_lm32_bgu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1053 { LM32BF_INSN_BNE, model_lm32_bne, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1054 { LM32BF_INSN_CALL, model_lm32_call, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1055 { LM32BF_INSN_CALLI, model_lm32_calli, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1056 { LM32BF_INSN_CMPE, model_lm32_cmpe, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1057 { LM32BF_INSN_CMPEI, model_lm32_cmpei, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1058 { LM32BF_INSN_CMPG, model_lm32_cmpg, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1059 { LM32BF_INSN_CMPGI, model_lm32_cmpgi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1060 { LM32BF_INSN_CMPGE, model_lm32_cmpge, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1061 { LM32BF_INSN_CMPGEI, model_lm32_cmpgei, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1062 { LM32BF_INSN_CMPGEU, model_lm32_cmpgeu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1063 { LM32BF_INSN_CMPGEUI, model_lm32_cmpgeui, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1064 { LM32BF_INSN_CMPGU, model_lm32_cmpgu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1065 { LM32BF_INSN_CMPGUI, model_lm32_cmpgui, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1066 { LM32BF_INSN_CMPNE, model_lm32_cmpne, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1067 { LM32BF_INSN_CMPNEI, model_lm32_cmpnei, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1068 { LM32BF_INSN_DIVU, model_lm32_divu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1069 { LM32BF_INSN_LB, model_lm32_lb, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1070 { LM32BF_INSN_LBU, model_lm32_lbu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1071 { LM32BF_INSN_LH, model_lm32_lh, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1072 { LM32BF_INSN_LHU, model_lm32_lhu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1073 { LM32BF_INSN_LW, model_lm32_lw, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1074 { LM32BF_INSN_MODU, model_lm32_modu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1075 { LM32BF_INSN_MUL, model_lm32_mul, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1076 { LM32BF_INSN_MULI, model_lm32_muli, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1077 { LM32BF_INSN_NOR, model_lm32_nor, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1078 { LM32BF_INSN_NORI, model_lm32_nori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1079 { LM32BF_INSN_OR, model_lm32_or, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1080 { LM32BF_INSN_ORI, model_lm32_ori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1081 { LM32BF_INSN_ORHII, model_lm32_orhii, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1082 { LM32BF_INSN_RCSR, model_lm32_rcsr, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1083 { LM32BF_INSN_SB, model_lm32_sb, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1084 { LM32BF_INSN_SEXTB, model_lm32_sextb, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1085 { LM32BF_INSN_SEXTH, model_lm32_sexth, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1086 { LM32BF_INSN_SH, model_lm32_sh, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1087 { LM32BF_INSN_SL, model_lm32_sl, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1088 { LM32BF_INSN_SLI, model_lm32_sli, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1089 { LM32BF_INSN_SR, model_lm32_sr, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1090 { LM32BF_INSN_SRI, model_lm32_sri, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1091 { LM32BF_INSN_SRU, model_lm32_sru, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1092 { LM32BF_INSN_SRUI, model_lm32_srui, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1093 { LM32BF_INSN_SUB, model_lm32_sub, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1094 { LM32BF_INSN_SW, model_lm32_sw, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1095 { LM32BF_INSN_USER, model_lm32_user, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1096 { LM32BF_INSN_WCSR, model_lm32_wcsr, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1097 { LM32BF_INSN_XOR, model_lm32_xor, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1098 { LM32BF_INSN_XORI, model_lm32_xori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1099 { LM32BF_INSN_XNOR, model_lm32_xnor, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1100 { LM32BF_INSN_XNORI, model_lm32_xnori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1101 { LM32BF_INSN_BREAK, model_lm32_break, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1102 { LM32BF_INSN_SCALL, model_lm32_scall, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1103};
1104
1105#endif /* WITH_PROFILE_MODEL_P */
1106
1107static void
1108lm32_model_init (SIM_CPU *cpu)
1109{
1110 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_LM32_DATA));
1111}
1112
1113#if WITH_PROFILE_MODEL_P
1114#define TIMING_DATA(td) td
1115#else
1116#define TIMING_DATA(td) 0
1117#endif
1118
1119static const MODEL lm32_models[] =
1120{
1121 { "lm32", & lm32_mach, MODEL_LM32, TIMING_DATA (& lm32_timing[0]), lm32_model_init },
1122 { 0 }
1123};
1124
1125/* The properties of this cpu's implementation. */
1126
1127static const MACH_IMP_PROPERTIES lm32bf_imp_properties =
1128{
1129 sizeof (SIM_CPU),
1130#if WITH_SCACHE
1131 sizeof (SCACHE)
1132#else
1133 0
1134#endif
1135};
1136
1137
1138static void
1139lm32bf_prepare_run (SIM_CPU *cpu)
1140{
1141 if (CPU_IDESC (cpu) == NULL)
1142 lm32bf_init_idesc_table (cpu);
1143}
1144
1145static const CGEN_INSN *
1146lm32bf_get_idata (SIM_CPU *cpu, int inum)
1147{
1148 return CPU_IDESC (cpu) [inum].idata;
1149}
1150
1151static void
1152lm32_init_cpu (SIM_CPU *cpu)
1153{
1154 CPU_REG_FETCH (cpu) = lm32bf_fetch_register;
1155 CPU_REG_STORE (cpu) = lm32bf_store_register;
1156 CPU_PC_FETCH (cpu) = lm32bf_h_pc_get;
1157 CPU_PC_STORE (cpu) = lm32bf_h_pc_set;
1158 CPU_GET_IDATA (cpu) = lm32bf_get_idata;
1159 CPU_MAX_INSNS (cpu) = LM32BF_INSN__MAX;
1160 CPU_INSN_NAME (cpu) = cgen_insn_name;
1161 CPU_FULL_ENGINE_FN (cpu) = lm32bf_engine_run_full;
1162#if WITH_FAST
1163 CPU_FAST_ENGINE_FN (cpu) = lm32bf_engine_run_fast;
1164#else
1165 CPU_FAST_ENGINE_FN (cpu) = lm32bf_engine_run_full;
1166#endif
1167}
1168
1169const MACH lm32_mach =
1170{
1171 "lm32", "lm32", MACH_LM32,
1172 32, 32, & lm32_models[0], & lm32bf_imp_properties,
1173 lm32_init_cpu,
1174 lm32bf_prepare_run
1175};
1176
A mirror of the official binutils-gdb repository