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sim: delete dead current_state globals
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c906108c 1/* Main simulator entry points specific to the M32R.
618f726f 2 Copyright (C) 1996-2016 Free Software Foundation, Inc.
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3 Contributed by Cygnus Support.
4
16b47b25 5 This file is part of GDB, the GNU debugger.
c906108c 6
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7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
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9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
c906108c 11
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12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
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17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20#include "sim-main.h"
21#include "sim-options.h"
22#include "libiberty.h"
23#include "bfd.h"
24
25#ifdef HAVE_STRING_H
26#include <string.h>
27#else
28#ifdef HAVE_STRINGS_H
29#include <strings.h>
30#endif
31#endif
32#ifdef HAVE_STDLIB_H
33#include <stdlib.h>
34#endif
35
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36#include "dv-m32r_uart.h"
37
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38static void free_state (SIM_DESC);
39static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
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40\f
41/* Cover function of sim_state_free to free the cpu buffers as well. */
42
43static void
44free_state (SIM_DESC sd)
45{
46 if (STATE_MODULES (sd) != NULL)
47 sim_module_uninstall (sd);
48 sim_cpu_free_all (sd);
49 sim_state_free (sd);
50}
51
52/* Create an instance of the simulator. */
53
54SIM_DESC
55sim_open (kind, callback, abfd, argv)
56 SIM_OPEN_KIND kind;
57 host_callback *callback;
6b4a8935 58 struct bfd *abfd;
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59 char **argv;
60{
61 SIM_DESC sd = sim_state_alloc (kind, callback);
62 char c;
63 int i;
64
65 /* The cpu data is kept in a separately allocated chunk of memory. */
66 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
67 {
68 free_state (sd);
69 return 0;
70 }
71
72#if 0 /* FIXME: pc is in mach-specific struct */
73 /* FIXME: watchpoints code shouldn't need this */
74 {
75 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
76 STATE_WATCHPOINTS (sd)->pc = &(PC);
77 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
78 }
79#endif
80
81 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
82 {
83 free_state (sd);
84 return 0;
85 }
86
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87#if 0 /* FIXME: 'twould be nice if we could do this */
88 /* These options override any module options.
89 Obviously ambiguity should be avoided, however the caller may wish to
90 augment the meaning of an option. */
91 if (extra_options != NULL)
92 sim_add_option_table (sd, extra_options);
93#endif
94
95 /* getopt will print the error message so we just have to exit if this fails.
96 FIXME: Hmmm... in the case of gdb we need getopt to call
97 print_filtered. */
98 if (sim_parse_args (sd, argv) != SIM_RC_OK)
99 {
100 free_state (sd);
101 return 0;
102 }
103
104 /* Allocate a handler for the control registers and other devices
105 if no memory for that range has been allocated by the user.
106 All are allocated in one chunk to keep things from being
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107 unnecessarily complicated.
108 TODO: Move these to the sim-model framework. */
109 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
110 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
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111
112 /* Allocate core managed memory if none specified by user.
113 Use address 4 here in case the user wanted address 0 unmapped. */
114 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
115 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
116
117 /* check for/establish the reference program image */
118 if (sim_analyze_program (sd,
119 (STATE_PROG_ARGV (sd) != NULL
120 ? *STATE_PROG_ARGV (sd)
121 : NULL),
122 abfd) != SIM_RC_OK)
123 {
124 free_state (sd);
125 return 0;
126 }
127
128 /* Establish any remaining configuration options. */
129 if (sim_config (sd) != SIM_RC_OK)
130 {
131 free_state (sd);
132 return 0;
133 }
134
135 if (sim_post_argv_init (sd) != SIM_RC_OK)
136 {
137 free_state (sd);
138 return 0;
139 }
140
141 /* Open a copy of the cpu descriptor table. */
142 {
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143 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
144 CGEN_ENDIAN_BIG);
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145 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
146 {
147 SIM_CPU *cpu = STATE_CPU (sd, i);
148 CPU_CPU_DESC (cpu) = cd;
149 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
150 }
151 m32r_cgen_init_dis (cd);
152 }
153
154 /* Initialize various cgen things not done by common framework.
155 Must be done after m32r_cgen_cpu_open. */
156 cgen_init (sd);
157
158 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
159 {
160 /* Only needed for profiling, but the structure member is small. */
161 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
162 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
163 /* Hook in callback for reporting these stats */
164 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
165 = print_m32r_misc_cpu;
166 }
167
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168 return sd;
169}
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170\f
171SIM_RC
172sim_create_inferior (sd, abfd, argv, envp)
173 SIM_DESC sd;
6b4a8935 174 struct bfd *abfd;
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175 char **argv;
176 char **envp;
177{
178 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
179 SIM_ADDR addr;
180
181 if (abfd != NULL)
182 addr = bfd_get_start_address (abfd);
183 else
184 addr = 0;
185 sim_pc_set (current_cpu, addr);
186
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187#ifdef M32R_LINUX
188 m32rbf_h_cr_set (current_cpu,
189 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
190 m32rbf_h_cr_set (current_cpu,
191 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
192#endif
193
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194 /* Standalone mode (i.e. `run`) will take care of the argv for us in
195 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
196 with `gdb`), we need to handle it because the user can change the
197 argv on the fly via gdb's 'run'. */
198 if (STATE_PROG_ARGV (sd) != argv)
199 {
200 freeargv (STATE_PROG_ARGV (sd));
201 STATE_PROG_ARGV (sd) = dupargv (argv);
202 }
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203
204 return SIM_RC_OK;
205}
206
207/* PROFILE_CPU_CALLBACK */
208
209static void
210print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
211{
212 SIM_DESC sd = CPU_STATE (cpu);
213 char buf[20];
214
215 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
216 {
217 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
218 sim_io_printf (sd, " %-*s %s\n\n",
219 PROFILE_LABEL_WIDTH, "Fill nops:",
220 sim_add_commas (buf, sizeof (buf),
221 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
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222 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
223 sim_io_printf (sd, " %-*s %s\n\n",
224 PROFILE_LABEL_WIDTH, "Parallel insns:",
225 sim_add_commas (buf, sizeof (buf),
226 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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227 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
228 sim_io_printf (sd, " %-*s %s\n\n",
229 PROFILE_LABEL_WIDTH, "Parallel insns:",
230 sim_add_commas (buf, sizeof (buf),
231 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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232 }
233}