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Commit | Line | Data |
---|---|---|
90ad43b2 AC |
1 | Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com> |
2 | ||
3 | start-sanitize-vr5400 | |
4 | * mips.igen: Tag all mipsIV instructions with vr5400 model. | |
5 | ||
6 | * configure.in: Add mips64vr5400 target. | |
7 | * configure: Re-generate. | |
8 | ||
9 | end-sanitize-vr5400 | |
10 | * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ | |
11 | to top. | |
12 | (tmp-igen, tmp-m16): Pass -I srcdir to igen. | |
13 | ||
635ae9cb GRK |
14 | Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com> |
15 | ||
16 | * gencode.c (build_instruction): Follow sim_write's lead in using | |
17 | BigEndianMem instead of !ByteSwapMem. | |
18 | ||
122edc03 AC |
19 | Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com> |
20 | ||
21 | * configure.in (sim_gen): Dependent on target, select type of | |
22 | generator. Always select old style generator. | |
23 | ||
24 | configure: Re-generate. | |
25 | ||
26 | Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New | |
27 | targets. | |
28 | (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16, | |
29 | SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN, | |
30 | IGEN_TRACE, IGEN_INSN, IGEN_DC): Define | |
31 | (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member | |
32 | SIM_@sim_gen@_*, set by autoconf. | |
33 | ||
dad6f1f3 AC |
34 | Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com> |
35 | ||
36 | * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define. | |
37 | ||
38 | * interp.c (ColdReset): Remove #ifdef HASFPU, check | |
39 | CURRENT_FLOATING_POINT instead. | |
40 | ||
41 | * interp.c (ifetch32): New function. Fetch 32 bit instruction. | |
42 | (address_translation): Raise exception InstructionFetch when | |
43 | translation fails and isINSTRUCTION. | |
44 | ||
45 | * interp.c (sim_open, sim_write, sim_monitor, store_word, | |
46 | sim_engine_run): Change type of of vaddr and paddr to | |
47 | address_word. | |
48 | (address_translation, prefetch, load_memory, store_memory, | |
49 | cache_op): Change type of vAddr and pAddr to address_word. | |
50 | ||
51 | * gencode.c (build_instruction): Change type of vaddr and paddr to | |
52 | address_word. | |
53 | ||
92ad193b AC |
54 | Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com> |
55 | ||
56 | * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT | |
57 | macro to obtain result of ALU op. | |
58 | ||
aa324b9b AC |
59 | Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
60 | ||
61 | * interp.c (sim_info): Call profile_print. | |
62 | ||
e2f8ffb7 AC |
63 | Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
64 | ||
65 | * Makefile.in (SIM_OBJS): Add sim-profile.o module. | |
66 | ||
67 | * sim-main.h (WITH_PROFILE): Do not define, defined in | |
68 | common/sim-config.h. Use sim-profile module. | |
69 | (simPROFILE): Delete defintion. | |
70 | ||
71 | * interp.c (PROFILE): Delete definition. | |
72 | (mips_option_handler): Delete 'p', 'y' and 'x' profile options. | |
73 | (sim_close): Delete code writing profile histogram. | |
74 | (mips_set_profile, mips_set_profile_size, writeout16, writeout32): | |
75 | Delete. | |
76 | (sim_engine_run): Delete code profiling the PC. | |
77 | ||
fb5a2a3e AC |
78 | Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
79 | ||
80 | * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word. | |
81 | ||
82 | * interp.c (sim_monitor): Make register pointers of type | |
83 | unsigned_word*. | |
84 | ||
85 | * sim-main.h: Make registers of type unsigned_word not | |
86 | signed_word. | |
87 | ||
ea985d24 AC |
88 | Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com> |
89 | ||
90 | start-sanitize-r5900 | |
91 | * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB, | |
92 | ...): Move to sim-main.h | |
93 | ||
94 | end-sanitize-r5900 | |
95 | * interp.c (sync_operation): Rename from SyncOperation, make | |
96 | global, add SD argument. | |
97 | (prefetch): Rename from Prefetch, make global, add SD argument. | |
98 | (decode_coproc): Make global. | |
99 | ||
100 | * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define. | |
101 | ||
102 | * gencode.c (build_instruction): Generate DecodeCoproc not | |
103 | decode_coproc calls. | |
104 | ||
105 | * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h | |
106 | (SizeFGR): Move to sim-main.h | |
107 | (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT, | |
108 | simSIGINT, simJALDELAYSLOT): Move to sim-main.h | |
109 | (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to | |
110 | sim-main.h. | |
111 | (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF, | |
112 | FP_RM_TOMINF, GETRM): Move to sim-main.h. | |
113 | (Uncached, CachedNoncoherent, CachedCoherent, Cached, | |
114 | isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h. | |
115 | (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian, | |
116 | BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h | |
117 | ||
118 | * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise | |
119 | exception. | |
120 | (sim-alu.h): Include. | |
121 | (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define. | |
122 | (sim_cia): Typedef to instruction_address. | |
123 | ||
284e759d AC |
124 | Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com> |
125 | ||
126 | * Makefile.in (interp.o): Rename generated file engine.c to | |
127 | oengine.c. | |
128 | ||
129 | * interp.c: Update. | |
130 | ||
339fb149 AC |
131 | Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com> |
132 | ||
133 | * gencode.c (build_instruction): Use FPR_STATE not fpr_state. | |
134 | ||
8b70f837 AC |
135 | Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com> |
136 | ||
137 | * gencode.c (build_instruction): For "FPSQRT", output correct | |
138 | number of arguments to Recip. | |
139 | ||
0c2c5f61 AC |
140 | Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com> |
141 | ||
142 | * Makefile.in (interp.o): Depends on sim-main.h | |
143 | ||
144 | * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers. | |
145 | ||
146 | * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state, | |
147 | ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields. | |
148 | (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*, | |
149 | STATE, DSSTATE): Define | |
150 | (GPR, FGRIDX, ..): Define. | |
151 | ||
152 | * interp.c (registers, register_widths, fpr_state, ipc, dspc, | |
153 | pending_*, hiaccess, loaccess, state, dsstate): Delete globals. | |
154 | (GPR, FGRIDX, ...): Delete macros. | |
155 | ||
156 | * interp.c: Update names to match defines from sim-main.h | |
157 | ||
18c64df6 AC |
158 | Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com> |
159 | ||
160 | * interp.c (sim_monitor): Add SD argument. | |
161 | (sim_warning): Delete. Replace calls with calls to | |
162 | sim_io_eprintf. | |
163 | (sim_error): Delete. Replace calls with sim_io_error. | |
164 | (open_trace, writeout32, writeout16, getnum): Add SD argument. | |
165 | (mips_set_profile): Rename from sim_set_profile. Add SD argument. | |
166 | (mips_set_profile_size): Rename from sim_set_profile_size. Add SD | |
167 | argument. | |
168 | (mips_size): Rename from sim_size. Add SD argument. | |
169 | ||
170 | * interp.c (simulator): Delete global variable. | |
171 | (callback): Delete global variable. | |
172 | (mips_option_handler, sim_open, sim_write, sim_read, | |
173 | sim_store_register, sim_fetch_register, sim_info, sim_do_command, | |
174 | sim_size,sim_monitor): Use sim_io_* not callback->*. | |
175 | (sim_open): ZALLOC simulator struct. | |
176 | (PROFILE): Do not define. | |
177 | ||
178 | Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
179 | ||
180 | * interp.c (sim_open), support.h: Replace CHECKSIM macro found in | |
181 | support.h with corresponding code. | |
182 | ||
183 | * sim-main.h (word64, uword64), support.h: Move definition to | |
184 | sim-main.h. | |
185 | (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto. | |
186 | ||
187 | * support.h: Delete | |
188 | * Makefile.in: Update dependencies | |
189 | * interp.c: Do not include. | |
190 | ||
191 | Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
192 | ||
193 | * interp.c (address_translation, load_memory, store_memory, | |
194 | cache_op): Rename to from AddressTranslation et.al., make global, | |
195 | add SD argument | |
196 | ||
197 | * sim-main.h (AddressTranslation, LoadMemory, StoreMemory, | |
198 | CacheOp): Define. | |
199 | ||
200 | * interp.c (SignalException): Rename to signal_exception, make | |
201 | global. | |
202 | ||
203 | * interp.c (Interrupt, ...): Move definitions to sim-main.h. | |
204 | ||
205 | * sim-main.h (SignalException, SignalExceptionInterrupt, | |
206 | SignalExceptionInstructionFetch, SignalExceptionAddressStore, | |
207 | SignalExceptionAddressLoad, SignalExceptionSimulatorFault, | |
208 | SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable): | |
209 | Define. | |
210 | ||
211 | * interp.c, support.h: Use. | |
212 | ||
213 | Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
214 | ||
215 | * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename | |
216 | to value_fpr / store_fpr. Add SD argument. | |
217 | (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub, | |
218 | Multiply, Divide, Recip, SquareRoot, Convert): Make global. | |
219 | ||
220 | * sim-main.h (ValueFPR, StoreFPR): Define. | |
221 | ||
222 | Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
223 | ||
224 | * interp.c (sim_engine_run): Check consistency between configure | |
225 | WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN | |
226 | and HASFPU. | |
227 | ||
228 | * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE. | |
229 | (mips_fpu): Configure WITH_FLOATING_POINT. | |
230 | (mips_endian): Configure WITH_TARGET_ENDIAN. | |
231 | * configure: Update. | |
232 | ||
233 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
234 | ||
235 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
236 | ||
adf4739e AC |
237 | start-sanitize-r5900 |
238 | Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
239 | ||
240 | * interp.c (MAX_REG): Allow up-to 128 registers. | |
241 | (LO1, HI1): Define value that matches REGISTER_NAMES in gdb. | |
242 | (REGISTER_SA): Ditto. | |
243 | (sim_open): Initialize register_widths for r5900 specific | |
244 | registers. | |
245 | (sim_fetch_register, sim_store_register): Check for request of | |
246 | r5900 specific SA register. Check for request for hi 64 bits of | |
247 | r5900 specific registers. | |
248 | ||
249 | end-sanitize-r5900 | |
26b20b0a BM |
250 | Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com> |
251 | ||
252 | * configure: Regenerated. | |
253 | ||
6eedf3f4 MA |
254 | Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com> |
255 | ||
256 | * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. | |
257 | ||
e63bc706 AC |
258 | Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
259 | ||
6eedf3f4 MA |
260 | * gencode.c (print_igen_insn_models): Assume certain architectures |
261 | include all mips* instructions. | |
262 | (print_igen_insn_format): Use data_size==-1 as marker for MIPS16 | |
263 | instruction. | |
264 | ||
e63bc706 AC |
265 | * Makefile.in (tmp.igen): Add target. Generate igen input from |
266 | gencode file. | |
267 | ||
268 | * gencode.c (FEATURE_IGEN): Define. | |
269 | (main): Add --igen option. Generate output in igen format. | |
270 | (process_instructions): Format output according to igen option. | |
271 | (print_igen_insn_format): New function. | |
272 | (print_igen_insn_models): New function. | |
273 | (process_instructions): Only issue warnings and ignore | |
274 | instructions when no FEATURE_IGEN. | |
275 | ||
eb2e3c85 AC |
276 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
277 | ||
278 | * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some | |
279 | MIPS targets. | |
280 | ||
92f91d1f AC |
281 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
282 | ||
283 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
284 | ||
285 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
286 | ||
287 | * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN, | |
288 | SIM_RESERVED_BITS): Delete, moved to common. | |
289 | (SIM_EXTRA_CFLAGS): Update. | |
290 | ||
794e9ac9 AC |
291 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
292 | ||
76a6247f | 293 | * configure.in: Configure non-strict memory alignment. |
794e9ac9 AC |
294 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
295 | ||
b45caf05 AC |
296 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> |
297 | ||
298 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
299 | ||
300 | Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com> | |
301 | ||
302 | * gencode.c (SDBBP,DERET): Added (3900) insns. | |
303 | (RFE): Turn on for 3900. | |
304 | * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added. | |
305 | (dsstate): Made global. | |
306 | (SUBTARGET_R3900): Added. | |
307 | (CANCELDELAYSLOT): New. | |
308 | (SignalException): Ignore SystemCall rather than ignore and | |
309 | terminate. Add DebugBreakPoint handling. | |
310 | (decode_coproc): New insns RFE, DERET; and new registers Debug | |
311 | and DEPC protected by SUBTARGET_R3900. | |
312 | (sim_engine_run): Use CANCELDELAYSLOT rather than clearing | |
313 | bits explicitly. | |
314 | * Makefile.in,configure.in: Add mips subtarget option. | |
315 | * configure: Update. | |
316 | ||
7afa8d4e GRK |
317 | Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com> |
318 | ||
319 | * gencode.c: Add r3900 (tx39). | |
320 | ||
321 | start-sanitize-tx19 | |
322 | * gencode.c: Fix some configuration problems by improving | |
323 | the relationship between tx19 and tx39. | |
324 | end-sanitize-tx19 | |
325 | ||
667065d0 GRK |
326 | Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com> |
327 | ||
328 | * gencode.c (build_instruction): Don't need to subtract 4 for | |
329 | JALR, just 2. | |
330 | ||
9cb8397f GRK |
331 | Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com> |
332 | ||
333 | * interp.c: Correct some HASFPU problems. | |
334 | ||
a2ab5e65 AC |
335 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> |
336 | ||
337 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
338 | ||
11ac69e0 AC |
339 | Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com> |
340 | ||
341 | * interp.c (mips_options): Fix samples option short form, should | |
342 | be `x'. | |
343 | ||
972f3a34 AC |
344 | Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com> |
345 | ||
346 | * interp.c (sim_info): Enable info code. Was just returning. | |
347 | ||
9eeaaefa AC |
348 | Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
349 | ||
350 | * interp.c (decode_coproc): Clarify warning about unsuported MTC0, | |
351 | MFC0. | |
352 | ||
c31c13b4 AC |
353 | Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com> |
354 | ||
355 | * gencode.c (build_instruction): Use SIGNED64 for 64 bit | |
356 | constants. | |
357 | (build_instruction): Ditto for LL. | |
358 | ||
b637f306 GRK |
359 | start-sanitize-tx19 |
360 | Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com> | |
361 | ||
362 | * mips/configure.in, mips/gencode: Add tx19/r1900. | |
363 | ||
364 | end-sanitize-tx19 | |
6fea4763 DE |
365 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> |
366 | ||
367 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
368 | ||
52352d38 AC |
369 | start-sanitize-r5900 |
370 | Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
371 | ||
372 | * gencode.c (build_instruction): For "pabsw" and "pabsh", check | |
373 | for overflow due to ABS of MININT, set result to MAXINT. | |
374 | (build_instruction): For "psrlvw", signextend bit 31. | |
375 | ||
376 | end-sanitize-r5900 | |
88117054 AC |
377 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
378 | ||
379 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
380 | * config.in: Ditto. | |
381 | ||
fafce69a AC |
382 | Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com> |
383 | ||
384 | * interp.c (sim_open): Add call to sim_analyze_program, update | |
385 | call to sim_config. | |
386 | ||
7230ff0f AC |
387 | Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com> |
388 | ||
389 | * interp.c (sim_kill): Delete. | |
fafce69a AC |
390 | (sim_create_inferior): Add ABFD argument. Set PC from same. |
391 | (sim_load): Move code initializing trap handlers from here. | |
392 | (sim_open): To here. | |
393 | (sim_load): Delete, use sim-hload.c. | |
394 | ||
395 | * Makefile.in (SIM_OBJS): Add sim-hload.o module. | |
7230ff0f | 396 | |
247fccde AC |
397 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> |
398 | ||
399 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
400 | * config.in: Ditto. | |
401 | ||
402 | Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
403 | ||
404 | * interp.c (sim_open): Add ABFD argument. | |
405 | (sim_load): Move call to sim_config from here. | |
406 | (sim_open): To here. Check return status. | |
407 | ||
408 | start-sanitize-r5900 | |
409 | * gencode.c (build_instruction): Do not define x8000000000000000, | |
410 | x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000. | |
411 | ||
412 | end-sanitize-r5900 | |
413 | start-sanitize-r5900 | |
414 | Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
415 | ||
416 | * gencode.c (build_instruction): For "pdivw", "pdivbw" and | |
417 | "pdivuw" check for overflow due to signed divide by -1. | |
418 | ||
419 | end-sanitize-r5900 | |
c12e2e4c GRK |
420 | Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com> |
421 | ||
422 | * gencode.c (build_instruction): Two arg MADD should | |
423 | not assign result to $0. | |
424 | ||
1e851d2c AC |
425 | start-sanitize-r5900 |
426 | Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com> | |
427 | ||
428 | * gencode.c (build_instruction): For "ppac5" use unsigned | |
429 | arrithmetic so that the sign bit doesn't smear when right shifted. | |
430 | (build_instruction): For "pdiv" perform sign extension when | |
431 | storing results in HI and LO. | |
432 | (build_instructions): For "pdiv" and "pdivbw" check for | |
433 | divide-by-zero. | |
434 | (build_instruction): For "pmfhl.slw" update hi part of dest | |
435 | register as well as low part. | |
436 | (build_instruction): For "pmfhl" portably handle long long values. | |
437 | (build_instruction): For "pmfhl.sh" correctly negative values. | |
438 | Store half words 2 and three in the correct place. | |
439 | (build_instruction): For "psllvw", sign extend value after shift. | |
440 | ||
441 | end-sanitize-r5900 | |
442 | Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com) | |
443 | ||
444 | * sim/mips/configure: Change default_sim_endian to 0 (bi-endian) | |
445 | * sim/mips/configure.in: Regenerate. | |
446 | ||
447 | Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com> | |
448 | ||
449 | * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit | |
450 | signed8, unsigned8 et.al. types. | |
451 | ||
452 | start-sanitize-r5900 | |
453 | * gencode.c (build_instruction): For PMULTU* do not sign extend | |
454 | registers. Make generated code easier to debug. | |
455 | ||
456 | end-sanitize-r5900 | |
457 | * interp.c (SUB_REG_FETCH): Handle both little and big endian | |
458 | hosts when selecting subreg. | |
459 | ||
460 | start-sanitize-r5900 | |
461 | Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com> | |
462 | ||
463 | * gencode.c (type_for_data_len): For 32bit operations concerned | |
464 | with overflow, perform op using 64bits. | |
465 | (build_instruction): For PADD, always compute operation using type | |
466 | returned by type_for_data_len. | |
467 | (build_instruction): For PSUBU, when overflow, saturate to zero as | |
468 | actually underflow. | |
469 | ||
470 | end-sanitize-r5900 | |
ae19b07b JL |
471 | Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com) |
472 | ||
649625bb | 473 | start-sanitize-r5900 |
64435234 JL |
474 | * gencode.c (build_instruction): Handle "pext5" according to |
475 | version 1.95 of the r5900 ISA. | |
476 | ||
649625bb JL |
477 | * gencode.c (build_instruction): Handle "ppac5" according to |
478 | version 1.95 of the r5900 ISA. | |
649625bb | 479 | |
1e851d2c | 480 | end-sanitize-r5900 |
05d1322f JL |
481 | * interp.c (sim_engine_run): Reset the ZERO register to zero |
482 | regardless of FEATURE_WARN_ZERO. | |
ae19b07b JL |
483 | * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO. |
484 | ||
485 | Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
486 | ||
487 | * interp.c (decode_coproc): Implement MTC0 N, CAUSE. | |
488 | (SignalException): For BreakPoints ignore any mode bits and just | |
489 | save the PC. | |
490 | (SignalException): Always set the CAUSE register. | |
491 | ||
56e7c849 AC |
492 | Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com> |
493 | ||
494 | * interp.c (SignalException): Clear the simDELAYSLOT flag when an | |
495 | exception has been taken. | |
496 | ||
497 | * interp.c: Implement the ERET and mt/f sr instructions. | |
498 | ||
ae19b07b | 499 | start-sanitize-r5900 |
56e7c849 AC |
500 | Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com> |
501 | ||
502 | * gencode.c (build_instruction): For paddu, extract unsigned | |
503 | sub-fields. | |
504 | ||
505 | * gencode.c (build_instruction): Saturate padds instead of padd | |
506 | instructions. | |
507 | ||
508 | end-sanitize-r5900 | |
509 | Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
510 | ||
511 | * interp.c (SignalException): Don't bother restarting an | |
512 | interrupt. | |
513 | ||
514 | Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
515 | ||
516 | * interp.c (SignalException): Really take an interrupt. | |
517 | (interrupt_event): Only deliver interrupts when enabled. | |
518 | ||
519 | Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
520 | ||
521 | * interp.c (sim_info): Only print info when verbose. | |
522 | (sim_info) Use sim_io_printf for output. | |
523 | ||
2f2e6c5d AC |
524 | Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com> |
525 | ||
526 | * interp.c (CoProcPresent): Add UNUSED attribute - not used by all | |
527 | mips architectures. | |
528 | ||
529 | Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
530 | ||
531 | * interp.c (sim_do_command): Check for common commands if a | |
532 | simulator specific command fails. | |
533 | ||
d3d2a9f7 GRK |
534 | Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com> |
535 | ||
536 | * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP | |
537 | and simBE when DEBUG is defined. | |
538 | ||
50a2a691 AC |
539 | Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com> |
540 | ||
541 | * interp.c (interrupt_event): New function. Pass exception event | |
542 | onto exception handler. | |
543 | ||
544 | * configure.in: Check for stdlib.h. | |
545 | * configure: Regenerate. | |
546 | ||
547 | * gencode.c (build_instruction): Add UNUSED attribute to tempS | |
548 | variable declaration. | |
549 | (build_instruction): Initialize memval1. | |
550 | (build_instruction): Add UNUSED attribute to byte, bigend, | |
551 | reverse. | |
552 | (build_operands): Ditto. | |
553 | ||
554 | * interp.c: Fix GCC warnings. | |
555 | (sim_get_quit_code): Delete. | |
556 | ||
557 | * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS. | |
558 | * Makefile.in: Ditto. | |
559 | * configure: Re-generate. | |
560 | ||
561 | * Makefile.in (SIM_OBJS): Add sim-watch.o module. | |
562 | ||
563 | Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
564 | ||
565 | * interp.c (mips_option_handler): New function parse argumes using | |
566 | sim-options. | |
567 | (myname): Replace with STATE_MY_NAME. | |
568 | (sim_open): Delete check for host endianness - performed by | |
569 | sim_config. | |
570 | (simHOSTBE, simBE): Delete, replaced by sim-endian flags. | |
571 | (sim_open): Move much of the initialization from here. | |
572 | (sim_load): To here. After the image has been loaded and | |
573 | endianness set. | |
574 | (sim_open): Move ColdReset from here. | |
575 | (sim_create_inferior): To here. | |
576 | (sim_open): Make FP check less dependant on host endianness. | |
577 | ||
578 | * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or | |
579 | run. | |
580 | * interp.c (sim_set_callbacks): Delete. | |
581 | ||
582 | * interp.c (membank, membank_base, membank_size): Replace with | |
583 | STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE. | |
584 | (sim_open): Remove call to callback->init. gdb/run do this. | |
585 | ||
586 | * interp.c: Update | |
587 | ||
588 | * sim-main.h (SIM_HAVE_FLATMEM): Define. | |
589 | ||
590 | * interp.c (big_endian_p): Delete, replaced by | |
591 | current_target_byte_order. | |
592 | ||
593 | Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
594 | ||
595 | * interp.c (host_read_long, host_read_word, host_swap_word, | |
596 | host_swap_long): Delete. Using common sim-endian. | |
597 | (sim_fetch_register, sim_store_register): Use H2T. | |
598 | (pipeline_ticks): Delete. Handled by sim-events. | |
599 | (sim_info): Update. | |
600 | (sim_engine_run): Update. | |
601 | ||
602 | Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
603 | ||
604 | * interp.c (sim_stop_reason): Move code determining simEXCEPTION | |
605 | reason from here. | |
606 | (SignalException): To here. Signal using sim_engine_halt. | |
607 | (sim_stop_reason): Delete, moved to common. | |
608 | ||
609 | Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com> | |
610 | ||
611 | * interp.c (sim_open): Add callback argument. | |
612 | (sim_set_callbacks): Delete SIM_DESC argument. | |
613 | (sim_size): Ditto. | |
614 | ||
2e61a3ad AC |
615 | Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com> |
616 | ||
617 | * Makefile.in (SIM_OBJS): Add common modules. | |
618 | ||
619 | * interp.c (sim_set_callbacks): Also set SD callback. | |
620 | (set_endianness, xfer_*, swap_*): Delete. | |
621 | (host_read_word, host_read_long, host_swap_word, host_swap_long): | |
622 | Change to functions using sim-endian macros. | |
623 | (control_c, sim_stop): Delete, use common version. | |
624 | (simulate): Convert into. | |
625 | (sim_engine_run): This function. | |
626 | (sim_resume): Delete. | |
627 | ||
628 | * interp.c (simulation): New variable - the simulator object. | |
629 | (sim_kind): Delete global - merged into simulation. | |
630 | (sim_load): Cleanup. Move PC assignment from here. | |
631 | (sim_create_inferior): To here. | |
632 | ||
633 | * sim-main.h: New file. | |
634 | * interp.c (sim-main.h): Include. | |
635 | ||
636 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
637 | ||
638 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
639 | ||
3be0e228 DE |
640 | Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com> |
641 | ||
642 | * tconfig.in (SIM_HAVE_BIENDIAN): Define. | |
643 | ||
d654ba0a GRK |
644 | Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com> |
645 | ||
646 | * gencode.c (build_instruction): DIV instructions: check | |
647 | for division by zero and integer overflow before using | |
648 | host's division operation. | |
649 | ||
9d52bcb7 DE |
650 | Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com> |
651 | ||
652 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
653 | * interp.c: #include bfd.h. | |
654 | (target_byte_order): Delete. | |
655 | (sim_kind, myname, big_endian_p): New static locals. | |
656 | (sim_open): Set sim_kind, myname. Move call to set_endianness to | |
657 | after argument parsing. Recognize -E arg, set endianness accordingly. | |
658 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
659 | load file into simulator. Set PC from bfd. | |
660 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
661 | (set_endianness): Use big_endian_p instead of target_byte_order. | |
662 | ||
87e43259 AC |
663 | Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com> |
664 | ||
665 | * interp.c (sim_size): Delete prototype - conflicts with | |
666 | definition in remote-sim.h. Correct definition. | |
667 | ||
668 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
669 | ||
670 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
671 | * config.in: Ditto. | |
672 | ||
fbda74b1 DE |
673 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> |
674 | ||
8a7c3105 DE |
675 | * interp.c (sim_open): New arg `kind'. |
676 | ||
fbda74b1 DE |
677 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
678 | ||
a35e91c3 AC |
679 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
680 | ||
681 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
682 | ||
683 | Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com> | |
684 | ||
685 | * interp.c (sim_open): Set optind to 0 before calling getopt. | |
686 | ||
687 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
688 | ||
689 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
690 | ||
6efa34d8 GRK |
691 | Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com> |
692 | ||
693 | * interp.c : Replace uses of pr_addr with pr_uword64 | |
694 | where the bit length is always 64 independent of SIM_ADDR. | |
695 | (pr_uword64) : added. | |
696 | ||
a77aa7ec AC |
697 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> |
698 | ||
699 | * configure: Re-generate. | |
700 | ||
601fb8ae MM |
701 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> |
702 | ||
703 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
704 | ||
53b9417e DE |
705 | Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com> |
706 | ||
707 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
708 | in argv form. | |
709 | (other sim_*): New SIM_DESC argument. | |
710 | ||
711 | start-sanitize-r5900 | |
712 | Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com> | |
713 | ||
714 | * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR): | |
715 | Change values to avoid overloading DOUBLEWORD which is tested | |
716 | for all insns. | |
717 | * gencode.c: reinstate "offending code". | |
53b9417e | 718 | |
56e7c849 | 719 | end-sanitize-r5900 |
53b9417e DE |
720 | Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com> |
721 | ||
722 | * interp.c: Fix printing of addresses for non-64-bit targets. | |
723 | (pr_addr): Add function to print address based on size. | |
724 | start-sanitize-r5900 | |
725 | * gencode.c: #ifdef out offending code until a permanent fix | |
726 | can be added. Code is causing build errors for non-5900 mips targets. | |
727 | end-sanitize-r5900 | |
728 | ||
729 | start-sanitize-r5900 | |
730 | Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com> | |
731 | ||
732 | * gencode.c (process_instructions): Correct test for ISA dependent | |
733 | architecture bits in isa field of MIPS_DECODE. | |
734 | ||
735 | end-sanitize-r5900 | |
7e05106d MA |
736 | Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com> |
737 | ||
738 | * interp.c (simopen): Add support for LSI MiniRISC PMON vectors. | |
739 | ||
2d18fbc6 | 740 | start-sanitize-r5900 |
53b9417e | 741 | Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com> |
2d18fbc6 GRK |
742 | |
743 | * gencode.c (MIPS_DECODE): Correct instruction feature flags for | |
744 | PMADDUW. | |
745 | ||
746 | end-sanitize-r5900 | |
747 | Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com> | |
748 | ||
749 | * gencode.c (build_mips16_operands): Correct computation of base | |
750 | address for extended PC relative instruction. | |
751 | ||
276c2d7d GRK |
752 | start-sanitize-r5900 |
753 | Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com> | |
2d18fbc6 GRK |
754 | |
755 | * Makefile.in, configure, configure.in, gencode.c, | |
756 | interp.c, support.h: add r5900. | |
757 | ||
276c2d7d | 758 | end-sanitize-r5900 |
da0bce9c ILT |
759 | Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com> |
760 | ||
761 | * interp.c (mips16_entry): Add support for floating point cases. | |
762 | (SignalException): Pass floating point cases to mips16_entry. | |
763 | (ValueFPR): Don't restrict fmt_single and fmt_word to even | |
764 | registers. | |
765 | (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single | |
766 | or fmt_word. | |
767 | (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR, | |
768 | and then set the state to fmt_uninterpreted. | |
769 | (COP_SW): Temporarily set the state to fmt_word while calling | |
770 | ValueFPR. | |
771 | ||
6389d856 ILT |
772 | Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com> |
773 | ||
774 | * gencode.c (build_instruction): The high order may be set in the | |
775 | comparison flags at any ISA level, not just ISA 4. | |
776 | ||
19c5af72 DE |
777 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> |
778 | ||
779 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
780 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
781 | * configure.in: sinclude ../common/aclocal.m4. | |
782 | * configure: Regenerated. | |
783 | ||
736a306c ILT |
784 | Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com> |
785 | ||
786 | * configure: Rebuild after change to aclocal.m4. | |
787 | ||
295dbbe4 SG |
788 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) |
789 | ||
790 | * configure configure.in Makefile.in: Update to new configure | |
791 | scheme which is more compatible with WinGDB builds. | |
792 | * configure.in: Improve comment on how to run autoconf. | |
793 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
794 | * Makefile.in: Use autoconf substitution to install common | |
795 | makefile fragment. | |
796 | ||
797 | Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com> | |
798 | ||
799 | * gencode.c (build_instruction): Use BigEndianCPU instead of | |
800 | ByteSwapMem. | |
801 | ||
e1db0d47 MA |
802 | Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com> |
803 | ||
804 | * interp.c (sim_monitor): Make output to stdout visible in | |
805 | wingdb's I/O log window. | |
806 | ||
2902e8ab MA |
807 | Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com> |
808 | ||
809 | * support.h: Undo previous change to SIGTRAP | |
810 | and SIGQUIT values. | |
811 | ||
7e6c297e ILT |
812 | Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com> |
813 | ||
814 | * interp.c (store_word, load_word): New static functions. | |
815 | (mips16_entry): New static function. | |
816 | (SignalException): Look for mips16 entry and exit instructions. | |
817 | (simulate): Use the correct index when setting fpr_state after | |
818 | doing a pending move. | |
819 | ||
0049ba7a MA |
820 | Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com> |
821 | ||
822 | * interp.c: Fix byte-swapping code throughout to work on | |
823 | both little- and big-endian hosts. | |
824 | ||
2510786b MA |
825 | Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com> |
826 | ||
827 | * support.h: Make definitions of SIGTRAP and SIGQUIT consistent | |
828 | with gdb/config/i386/xm-windows.h. | |
829 | ||
39bf0ef4 MA |
830 | Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com> |
831 | ||
832 | * gencode.c (build_instruction): Work around MSVC++ code gen bug | |
833 | that messes up arithmetic shifts. | |
834 | ||
dbeec768 SG |
835 | Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com) |
836 | ||
837 | * support.h: Use _WIN32 instead of __WIN32__. Also add defs for | |
838 | SIGTRAP and SIGQUIT for _WIN32. | |
839 | ||
deffd638 ILT |
840 | Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com> |
841 | ||
842 | * gencode.c (build_instruction) [MUL]: Cast operands to word64, to | |
843 | force a 64 bit multiplication. | |
844 | (build_instruction) [OR]: In mips16 mode, don't do anything if the | |
845 | destination register is 0, since that is the default mips16 nop | |
846 | instruction. | |
847 | ||
aaff8437 ILT |
848 | Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com> |
849 | ||
063443cf ILT |
850 | * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI. |
851 | (build_endian_shift): Don't check proc64. | |
852 | (build_instruction): Always set memval to uword64. Cast op2 to | |
853 | uword64 when shifting it left in memory instructions. Always use | |
854 | the same code for stores--don't special case proc64. | |
855 | ||
aaff8437 ILT |
856 | * gencode.c (build_mips16_operands): Fix base PC value for PC |
857 | relative operands. | |
858 | (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a | |
859 | jal instruction. | |
860 | * interp.c (simJALDELAYSLOT): Define. | |
861 | (JALDELAYSLOT): Define. | |
862 | (INDELAYSLOT, INJALDELAYSLOT): Define. | |
863 | (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared. | |
864 | ||
280f90e1 AMT |
865 | Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com) |
866 | ||
867 | * interp.c (sim_open): add flush_cache as a PMON routine | |
868 | (sim_monitor): handle flush_cache by ignoring it | |
869 | ||
aaff8437 ILT |
870 | Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com> |
871 | ||
872 | * gencode.c (build_instruction): Use !ByteSwapMem instead of | |
873 | BigEndianMem. | |
874 | * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete. | |
875 | (BigEndianMem): Rename to ByteSwapMem and change sense. | |
876 | (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change | |
877 | BigEndianMem references to !ByteSwapMem. | |
878 | (set_endianness): New function, with prototype. | |
879 | (sim_open): Call set_endianness. | |
880 | (sim_info): Use simBE instead of BigEndianMem. | |
881 | (xfer_direct_word, xfer_direct_long, swap_direct_word, | |
882 | swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word, | |
883 | xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER | |
884 | ifdefs, keeping the prototype declaration. | |
885 | (swap_word): Rewrite correctly. | |
886 | (ColdReset): Delete references to CONFIG. Delete endianness related | |
887 | code; moved to set_endianness. | |
888 | ||
6429b296 JW |
889 | Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com> |
890 | ||
891 | * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits. | |
892 | * interp.c (CHECKHILO): Define away. | |
893 | (simSIGINT): New macro. | |
894 | (membank_size): Increase from 1MB to 2MB. | |
895 | (control_c): New function. | |
896 | (sim_resume): Rename parameter signal to signal_number. Add local | |
897 | variable prev. Call signal before and after simulate. | |
898 | (sim_stop_reason): Add simSIGINT support. | |
899 | (sim_warning, sim_error, dotrace, SignalException): Define as stdarg | |
900 | functions always. | |
901 | (sim_warning): Delete call to SignalException. Do call printf_filtered | |
902 | if logfh is NULL. | |
903 | (AddressTranslation): Add #ifdef DEBUG around debugging message and | |
904 | a call to sim_warning. | |
905 | ||
906 | Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com> | |
907 | ||
908 | * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD | |
909 | 16 bit instructions. | |
910 | ||
831f59a2 ILT |
911 | Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com> |
912 | ||
913 | Add support for mips16 (16 bit MIPS implementation): | |
914 | * gencode.c (inst_type): Add mips16 instruction encoding types. | |
915 | (GETDATASIZEINSN): Define. | |
916 | (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add | |
917 | jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and | |
918 | mtlo. | |
919 | (MIPS16_DECODE): New table, for mips16 instructions. | |
920 | (bitmap_val): New static function. | |
921 | (struct mips16_op): Define. | |
922 | (mips16_op_table): New table, for mips16 operands. | |
923 | (build_mips16_operands): New static function. | |
924 | (process_instructions): If PC is odd, decode a mips16 | |
925 | instruction. Break out instruction handling into new | |
926 | build_instruction function. | |
927 | (build_instruction): New static function, broken out of | |
928 | process_instructions. Check modifiers rather than flags for SHIFT | |
929 | bit count and m[ft]{hi,lo} direction. | |
930 | (usage): Pass program name to fprintf. | |
931 | (main): Remove unused variable this_option_optind. Change | |
932 | ``*loptarg++'' to ``loptarg++''. | |
933 | (my_strtoul): Parenthesize && within ||. | |
350d33b8 | 934 | * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd. |
831f59a2 ILT |
935 | (simulate): If PC is odd, fetch a 16 bit instruction, and |
936 | increment PC by 2 rather than 4. | |
937 | * configure.in: Add case for mips16*-*-*. | |
938 | * configure: Rebuild. | |
939 | ||
940 | Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com> | |
941 | ||
942 | * interp.c: Allow -t to enable tracing in standalone simulator. | |
943 | Fix garbage output in trace file and error messages. | |
944 | ||
e3d12c65 DE |
945 | Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com> |
946 | ||
947 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
948 | (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define. | |
949 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
950 | * configure: Regenerated. | |
951 | * tconfig.in: New file. | |
952 | ||
953 | Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com> | |
954 | ||
955 | * interp.c: Fix bugs in 64-bit port. | |
956 | Use ansi function declarations for msvc compiler. | |
957 | Initialize and test file pointer in trace code. | |
958 | Prevent duplicate definition of LAST_EMED_REGNUM. | |
959 | ||
960 | Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com> | |
961 | ||
962 | * interp.c (xfer_big_long): Prevent unwanted sign extension. | |
963 | ||
964 | Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk> | |
965 | ||
966 | * interp.c (SignalException): Check for explicit terminating | |
967 | breakpoint value. | |
968 | * gencode.c: Pass instruction value through SignalException() | |
969 | calls for Trap, Breakpoint and Syscall. | |
970 | ||
971 | Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk> | |
972 | ||
973 | * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is | |
974 | only used on those hosts that provide it. | |
975 | * configure.in: Add sqrt() to list of functions to be checked for. | |
976 | * config.in: Re-generated. | |
977 | * configure: Re-generated. | |
978 | ||
979 | Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com> | |
980 | ||
981 | * gencode.c (process_instructions): Call build_endian_shift when | |
982 | expanding STORE RIGHT, to fix swr. | |
983 | * support.h (SIGNEXTEND): If the sign bit is not set, explicitly | |
984 | clear the high bits. | |
985 | * interp.c (Convert): Fix fmt_single to fmt_long to not truncate. | |
986 | Fix float to int conversions to produce signed values. | |
987 | ||
cc5201d7 ILT |
988 | Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com> |
989 | ||
458e1f58 ILT |
990 | * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction. |
991 | (process_instructions): Correct handling of nor instruction. | |
992 | Correct shift count for 32 bit shift instructions. Correct sign | |
993 | extension for arithmetic shifts to not shift the number of bits in | |
994 | the type. Fix 64 bit multiply high word calculation. Fix 32 bit | |
995 | unsigned multiply. Fix ldxc1 and friends to use coprocessor 1. | |
996 | Fix madd. | |
c05d1721 ILT |
997 | * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC. |
998 | It's OK to have a mult follow a mult. What's not OK is to have a | |
999 | mult follow an mfhi. | |
458e1f58 | 1000 | (Convert): Comment out incorrect rounding code. |
cc5201d7 | 1001 | |
f24b7b69 JSC |
1002 | Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk> |
1003 | ||
1004 | * interp.c (sim_monitor): Improved monitor printf | |
1005 | simulation. Tidied up simulator warnings, and added "--log" option | |
1006 | for directing warning message output. | |
1007 | * gencode.c: Use sim_warning() rather than WARNING macro. | |
1008 | ||
1009 | Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com> | |
1010 | ||
1011 | * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and | |
1012 | getopt1.o, rather than on gencode.c. Link objects together. | |
1013 | Don't link against -liberty. | |
1014 | (gencode.o, getopt.o, getopt1.o): New targets. | |
1015 | * gencode.c: Include <ctype.h> and "ansidecl.h". | |
1016 | (AND): Undefine after including "ansidecl.h". | |
1017 | (ULONG_MAX): Define if not defined. | |
1018 | (OP_*): Don't define macros; now defined in opcode/mips.h. | |
1019 | (main): Call my_strtoul rather than strtoul. | |
1020 | (my_strtoul): New static function. | |
1021 | ||
1022 | Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com) | |
1023 | ||
1024 | * gencode.c (process_instructions): Generate word64 and uword64 | |
1025 | instead of `long long' and `unsigned long long' data types. | |
1026 | * interp.c: #include sysdep.h to get signals, and define default | |
1027 | for SIGBUS. | |
1028 | * (Convert): Work around for Visual-C++ compiler bug with type | |
1029 | conversion. | |
1030 | * support.h: Make things compile under Visual-C++ by using | |
1031 | __int64 instead of `long long'. Change many refs to long long | |
1032 | into word64/uword64 typedefs. | |
1033 | ||
a271d1d9 JM |
1034 | Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) |
1035 | ||
1036 | * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir, | |
1037 | INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values. | |
1038 | (docdir): Removed. | |
1039 | * configure.in (AC_PREREQ): autoconf 2.5 or higher. | |
1040 | (AC_PROG_INSTALL): Added. | |
1041 | (AC_PROG_CC): Moved to before configure.host call. | |
1042 | * configure: Rebuilt. | |
1043 | ||
1044 | Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk> | |
1045 | ||
1046 | * configure.in: Define @SIMCONF@ depending on mips target. | |
1047 | * configure: Rebuild. | |
1048 | * Makefile.in (run): Add @SIMCONF@ to control simulator | |
1049 | construction. | |
1050 | * gencode.c: Change LOADDRMASK to 64bit memory model only. | |
1051 | * interp.c: Remove some debugging, provide more detailed error | |
1052 | messages, update memory accesses to use LOADDRMASK. | |
1053 | ||
4fa134be ILT |
1054 | Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com> |
1055 | ||
1056 | * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS, | |
1057 | AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set | |
1058 | stamp-h. | |
1059 | * configure: Rebuild. | |
1060 | * config.in: New file, generated by autoheader. | |
1061 | * interp.c: Include "config.h". Include <stdlib.h>, <string.h>, | |
1062 | and <strings.h> if they exist. Replace #ifdef sun with #ifdef | |
1063 | HAVE_ANINT and HAVE_AINT, as appropriate. | |
1064 | * Makefile.in (run): Use @LIBS@ rather than -lm. | |
1065 | (interp.o): Depend upon config.h. | |
1066 | (Makefile): Just rebuild Makefile. | |
1067 | (clean): Remove stamp-h. | |
1068 | (mostlyclean): Make the same as clean, not as distclean. | |
1069 | (config.h, stamp-h): New targets. | |
1070 | ||
1071 | Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk> | |
1072 | ||
1073 | * interp.c (ColdReset): Fix boolean test. Make all simulator | |
1074 | globals static. | |
1075 | ||
f7481d45 JSC |
1076 | Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk> |
1077 | ||
1078 | * interp.c (xfer_direct_word, xfer_direct_long, | |
1079 | swap_direct_word, swap_direct_long, xfer_big_word, | |
1080 | xfer_big_long, xfer_little_word, xfer_little_long, | |
1081 | swap_word,swap_long): Added. | |
1082 | * interp.c (ColdReset): Provide function indirection to | |
1083 | host<->simulated_target transfer routines. | |
1084 | * interp.c (sim_store_register, sim_fetch_register): Updated to | |
1085 | make use of indirected transfer routines. | |
1086 | ||
1087 | Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk> | |
1088 | ||
1089 | * gencode.c (process_instructions): Ensure FP ABS instruction | |
1090 | recognised. | |
1091 | * interp.c (AbsoluteValue): Add routine. Also provide simple PMON | |
1092 | system call support. | |
1093 | ||
8b554809 JSC |
1094 | Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk> |
1095 | ||
1096 | * interp.c (sim_do_command): Complain if callback structure not | |
1097 | initialised. | |
1098 | ||
d0757082 JSC |
1099 | Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk> |
1100 | ||
1101 | * interp.c (Convert): Provide round-to-nearest and round-to-zero | |
1102 | support for Sun hosts. | |
1103 | * Makefile.in (gencode): Ensure the host compiler and libraries | |
1104 | used for cross-hosted build. | |
1105 | ||
e871dd18 JSC |
1106 | Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk> |
1107 | ||
1108 | * interp.c, gencode.c: Some more (TODO) tidying. | |
1109 | ||
1110 | Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk> | |
1111 | ||
1112 | * gencode.c, interp.c: Replaced explicit long long references with | |
1113 | WORD64HI, WORD64LO, SET64HI and SET64LO macro calls. | |
1114 | * support.h (SET64LO, SET64HI): Macros added. | |
1115 | ||
5c59ec43 ILT |
1116 | Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com> |
1117 | ||
1118 | * configure: Regenerate with autoconf 2.7. | |
1119 | ||
1120 | Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com> | |
1121 | ||
1122 | * interp.c (LoadMemory): Enclose text following #endif in /* */. | |
1123 | * support.h: Remove superfluous "1" from #if. | |
1124 | * support.h (CHECKSIM): Remove stray 'a' at end of line. | |
1125 | ||
1126 | Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com> | |
1127 | ||
1128 | * interp.c (StoreFPR): Control UndefinedResult() call on | |
1129 | WARN_RESULT manifest. | |
1130 | ||
8bae0a0c JSC |
1131 | Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk> |
1132 | ||
1133 | * gencode.c: Tidied instruction decoding, and added FP instruction | |
1134 | support. | |
1135 | ||
1136 | * interp.c: Added dineroIII, and BSD profiling support. Also | |
1137 | run-time FP handling. | |
1138 | ||
1139 | Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk> | |
1140 | ||
1141 | * Changelog, Makefile.in, README.Cygnus, configure, configure.in, | |
1142 | gencode.c, interp.c, support.h: created. |