[thirdparty/binutils-gdb.git] / sim / mips / configure.ac

dnl Process this file with autoconf to produce a configure script.
AC_INIT(Makefile.in)
AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])

dnl The sim shouldn't be checking $target and changing behavior.  But it is,
dnl and until we clean that up, we need to expand --target for use below.
AC_CANONICAL_SYSTEM

# DEPRECATED
#
# Instead of defining a `subtarget' macro, code should be checking
# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
# in question.
#
case "${target}" in
  mips64vr*-*-*)	SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
  mips*tx39*)           SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
  mips*-sde-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mips*-mti-elf*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa32*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  mipsisa64*-*-*)       SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
  *)                    SIM_SUBTARGET="";;
esac
AC_SUBST(SIM_SUBTARGET)


#
# Select the bitsize of the target
#
case "${target}" in
  mips*-sde-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-mti-elf*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips64*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mips16*-*-*)          mips_bitsize=64 ; mips_msb=63 ;;
  mipsisa32*-*-*)       mips_bitsize=32 ; mips_msb=31 ;;
  mipsisa64*-*-*)       mips_bitsize=64 ; mips_msb=63 ;;
  mips*-*-*)            mips_bitsize=32 ; mips_msb=31 ;;
  *)                    mips_bitsize=64 ; mips_msb=63 ;;
esac
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb)


#
# Select the floating hardware support of the target
#
mips_fpu=HARDWARE_FLOATING_POINT
mips_fpu_bitsize=
case "${target}" in
  mips*tx39*)		mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  mips*-sde-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-mti-elf*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips64*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mips16*-*-*)          mips_fpu=HARD_FLOATING_POINT ;;
  mipsisa32*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mipsisa64*-*-*)       mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
  mips*-*-*)            mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
  *)                    mips_fpu=HARD_FLOATING_POINT ;;
esac
SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)


#
# Select the IGEN architecture
#
sim_gen=IGEN
sim_igen_machine="-M mipsIV"
sim_m16_machine="-M mips16,mipsIII"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
sim_mach_default="mips8000"

case "${target}" in
  mips*tx39*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			sim_igen_machine="-M r3900"
			;;
  mips64vr43*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mipsIV"
			sim_mach_default="mips8000"
			;;
  mips64vr5*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M vr5000"
			sim_mach_default="mips5000"
			;;
  mips64vr41*)		sim_gen=M16
			sim_igen_machine="-M vr4100"
			sim_m16_machine="-M vr4100"
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			sim_mach_default="mips4100"
                        ;;
  mips64vr-*-* | mips64vrel-*-*)
			sim_gen=MULTI
			sim_multi_configs="\
			  vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
			  vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
			  vr5000:mipsIV:32,64,f:mips4300,mips5000\
			  vr5400:mipsIV,vr5400:32,64,f:mips5400\
			  vr5500:mipsIV,vr5500:32,64,f:mips5500"
			sim_multi_default=mips5000
			;;
  mips*-sde-elf* | mips*-mti-elf*)
			sim_gen=MULTI
			sim_multi_configs="\
			  micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
			  mipsisa64r2:mips64r2,mips16,mips16e,mdmx,dsp,dsp2,mips3d,smartmips:32,64,f:mipsisa32r2,mipsisa64r2,mipsisa32r5,mipsisa64r5\
			  mipsisa64r6:mips64r6:32,64,f:mipsisa32r6,mipsisa64r6"
			sim_multi_default=mipsisa64r2
			;;
  mips64*-*-*)		sim_igen_filter="32,64,f"
			sim_gen=IGEN
			;;
  mips16*-*-*)		sim_gen=M16
			sim_igen_filter="32,64,f"
			sim_m16_filter="16"
			;;
  mipsisa32r2*-*-*)	sim_gen=MULTI
			sim_multi_configs="\
			  micromips:micromips32,micromipsdsp:32,f:mips_micromips\
			  mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
			sim_multi_default=mipsisa32r2
			;;
  mipsisa32r6*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mips32r6"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32r6"
			;;
  mipsisa32*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
			sim_m16_machine="-M mips16,mips16e,mips32"
			sim_igen_filter="32,f"
			sim_mach_default="mipsisa32"
			;;
  mipsisa64r2*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
			sim_m16_machine="-M mips16,mips16e,mips64r2"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64r2"
			;;
  mipsisa64r6*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mips64r6"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64r6"
			;;
  mipsisa64sb1*-*-*)	sim_gen=IGEN
			sim_igen_machine="-M mips64,mips3d,sb1"
			sim_igen_filter="32,64,f"
			sim_mach_default="mips_sb1"
			;;
  mipsisa64*-*-*)	sim_gen=M16
			sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
			sim_m16_machine="-M mips16,mips16e,mips64"
			sim_igen_filter="32,64,f"
			sim_mach_default="mipsisa64"
			;;
  mips*lsi*)		sim_gen=M16
			sim_igen_machine="-M mipsIII,mips16"
			sim_m16_machine="-M mips16,mipsIII"
			sim_igen_filter="32,f"
			sim_m16_filter="16"
			sim_mach_default="mips4000"
			;;
  mips*-*-*)		sim_gen=IGEN
			sim_igen_filter="32,f"
			;;
esac

# The MULTI generator can combine several simulation engines into one.
# executable.  A configuration which uses the MULTI should set two
# variables: ${sim_multi_configs} and ${sim_multi_default}.
#
# ${sim_multi_configs} is the list of engines to build.  Each
# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
# where:
#
# - NAME is a C-compatible prefix for the engine,
# - MACHINE is a -M argument,
# - FILTER is a -F argument, and
# - BFDMACHS is a comma-separated list of bfd machines that the
#     simulator can run.
#
# Each entry will have a separate simulation engine whose prefix is
# m32<NAME>.  If the machine list includes "mips16", there will also
# be a mips16 engine, prefix m16<NAME>.  The mips16 engine will be
# generated using the same machine list as the 32-bit version,
# but the filter will be "16" instead of FILTER.
#
# The simulator compares the bfd mach against BFDMACHS to decide
# which engine to use.  Entries in BFDMACHS should be bfd_mach
# values with "bfd_mach_" removed.  ${sim_multi_default} says
# which entry should be the default.
if test ${sim_gen} = MULTI; then

  # Simple sanity check.
  if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
    AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
  fi

  # Start in a known state.
  rm -f multi-include.h multi-run.c
  sim_multi_flags=
  sim_multi_src=
  sim_multi_obj=
  sim_multi_igen_configs=
  sim_seen_default=no

  cat << __EOF__ > multi-run.c
/* Main entry point for MULTI simulators.
   Copyright (C) 2003-2022 Free Software Foundation, Inc.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.

   --

   This file was generated by sim/mips/configure.  */

#include "sim-main.h"
#include "multi-include.h"
#include "elf-bfd.h"
#include "elfxx-mips.h"
#include "elf/mips.h"

#define SD sd
#define CPU cpu

void
sim_engine_run (SIM_DESC sd,
		int next_cpu_nr,
		int nr_cpus,
		int signal) /* ignore */
{
  int mach;

  if (STATE_ARCHITECTURE (sd) == NULL)
    mach = bfd_mach_${sim_multi_default};
  else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
	   & EF_MIPS_ARCH_ASE_MICROMIPS)
    mach = bfd_mach_mips_micromips;
  else
  {
     mach = _bfd_elf_mips_mach (elf_elfheader (STATE_PROG_BFD (sd))->e_flags);
     if (!mach)
       mach = STATE_ARCHITECTURE (SD)->mach;
  }

  switch (mach)
    {
__EOF__

  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`
    name=`echo ${c} | sed 's/:.*//'`
    machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
    filter=`echo ${c} | sed 's/.*://'`

    # Build the following lists:
    #
    #   sim_multi_flags: all -M and -F flags used by the simulator
    #   sim_multi_src: all makefile-generated source files
    #   sim_multi_obj: the objects for ${sim_multi_src}
    #   sim_multi_igen_configs: igen configuration strings.
    #
    # Each entry in ${sim_multi_igen_configs} is a prefix (m32
    # or m16) followed by the NAME, MACHINE and FILTER part of
    # the ${sim_multi_configs} entry.
    sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"

    # Check whether special handling is needed.
    case ${c} in
      *:*mips16*:*)
	# Run igen twice, once for normal mode and once for mips16.
	ws="m32 m16"

	# The top-level function for the mips16 simulator is
	# in a file m16${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16"
	;;
      *:*micromips32*:*)
	# Run igen thrice, once for micromips32, once for micromips16,
	# and once for m32.
	ws="micromips_m32 micromips16 micromips32"

	# The top-level function for the micromips simulator is
	# in a file micromips${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16,32"
	;;
      *:*micromips64*:*)
	# Run igen thrice, once for micromips64, once for micromips16,
	# and once for m64.
	ws="micromips_m64 micromips16 micromips64"

	# The top-level function for the micromips simulator is
	# in a file micromips${name}_run.c, generated by the
	# tmp-run-multi Makefile rule.
	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	sim_multi_flags="${sim_multi_flags} -F 16,32,64"
	;;
      *)
	ws=m32
	;;
    esac

    # Now add the list of igen-generated files to ${sim_multi_src}
    # and ${sim_multi_obj}.
    for w in ${ws}; do
      for base in engine icache idecode model semantics support; do
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
      done
      sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
    done

    # Add an include for the engine.h file.  This file declares the
    # top-level foo_engine_run() function.
    echo "#include \"${w}${name}_engine.h\"" >> multi-include.h

    # Add case statements for this engine to sim_engine_run().
    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
      if test ${mach} = ${sim_multi_default}; then
	echo "    default:" >> multi-run.c
	sim_seen_default=yes
      fi
    done
    echo "      ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
      >> multi-run.c
    echo "      break;" >> multi-run.c
  done

  # Check whether we added a 'default:' label.
  if test ${sim_seen_default} = no; then
    AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
  fi

  cat << __EOF__ >> multi-run.c
    }
}

int
mips_mach_multi (SIM_DESC sd)
{
  if (STATE_ARCHITECTURE (sd) == NULL)
    return bfd_mach_${sim_multi_default};

  switch (STATE_ARCHITECTURE (SD)->mach)
    {
__EOF__

  # Add case statements for this engine to mips_mach_multi().
  for fc in ${sim_multi_configs}; do

    # Split up the entry.  ${c} contains the first three elements.
    # Note: outer sqaure brackets are m4 quotes.
    c=`echo ${fc} | sed ['s/:[^:]*$//']`
    bfdmachs=`echo ${fc} | sed 's/.*://'`

    for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
      echo "    case bfd_mach_${mach}:" >> multi-run.c
    done
  done

  cat << __EOF__ >> multi-run.c
      return (STATE_ARCHITECTURE (SD)->mach);
    default:
      return bfd_mach_${sim_multi_default};
    }
}
__EOF__

  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
else
  # For clean-extra
  sim_multi_src=doesnt-exist.c

  if test x"${sim_mach_default}" = x""; then
    AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
  fi
  SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
fi
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
sim_m16_flags=" -F ${sim_m16_filter}  ${sim_m16_machine}  ${sim_igen_smp}"
sim_micromips16_flags=" -F ${sim_micromips16_filter}  ${sim_micromips16_machine}  ${sim_igen_smp}"
sim_micromips_flags=" -F ${sim_micromips_filter}  ${sim_micromips_machine}  ${sim_igen_smp}"
AC_SUBST(sim_igen_flags)
AC_SUBST(sim_m16_flags)
AC_SUBST(sim_micromips_flags)
AC_SUBST(sim_micromips16_flags)
AC_SUBST(sim_gen)
AC_SUBST(sim_multi_flags)
AC_SUBST(sim_multi_igen_configs)
AC_SUBST(sim_multi_src)
AC_SUBST(sim_multi_obj)

SIM_AC_OUTPUT
Commit	Line	Data
c906108c	1	dnl Process this file with autoconf to produce a configure script.
c906108c	2	AC_INIT(Makefile.in)
760b3e8b	3	AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
c906108c	4
89d5fc24 MF	5	dnl The sim shouldn't be checking $target and changing behavior. But it is,
	6	dnl and until we clean that up, we need to expand --target for use below.
	7	AC_CANONICAL_SYSTEM
	8
c906108c SS	9	# DEPRECATED
	10	#
	11	# Instead of defining a `subtarget' macro, code should be checking
	12	# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
	13	# in question.
	14	#
	15	case "${target}" in
4c54fc26	16	mips64vr--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c	17	mipstx39) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085	18	mips-sde-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
cc220243	19	mips-mti-elf) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	20	mipsisa32--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28 CD	21	mipsisa64--*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c SS	22	*) SIM_SUBTARGET="";;
	23	esac
	24	AC_SUBST(SIM_SUBTARGET)
	25
	26
	27
c906108c SS	28	#
	29	# Select the bitsize of the target
	30	#
c906108c	31	case "${target}" in
4b5d35ee	32	mips-sde-elf) mips_bitsize=64 ; mips_msb=63 ;;
cc220243	33	mips-mti-elf) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	34	mips64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	35	mips16--*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28 CD	36	mipsisa32--*) mips_bitsize=32 ; mips_msb=31 ;;
1e799e28 CD	37	mipsisa64--*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c SS	38	mips--*) mips_bitsize=32 ; mips_msb=31 ;;
	39	*) mips_bitsize=64 ; mips_msb=63 ;;
	40	esac
7d554943	41	SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb)
c906108c SS	42
	43
	44
	45	#
	46	# Select the floating hardware support of the target
	47	#
	48	mips_fpu=HARDWARE_FLOATING_POINT
	49	mips_fpu_bitsize=
	50	case "${target}" in
4b5d35ee TS	51	mipstx39) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
4b5d35ee TS	52	mips-sde-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
cc220243	53	mips-mti-elf) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	54	mips64--*) mips_fpu=HARD_FLOATING_POINT ;;
c906108c SS	55	mips16--*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28 CD	56	mipsisa32--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
1e799e28 CD	57	mipsisa64--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c SS	58	mips--*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
	59	*) mips_fpu=HARD_FLOATING_POINT ;;
	60	esac
	61	SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
	62
	63
	64
c906108c SS	65	#
	66	# Select the IGEN architecture
	67	#
	68	sim_gen=IGEN
	69	sim_igen_machine="-M mipsIV"
139181c8	70	sim_m16_machine="-M mips16,mipsIII"
c906108c SS	71	sim_igen_filter="32,64,f"
c906108c SS	72	sim_m16_filter="16"
4c54fc26 CD	73	sim_mach_default="mips8000"
4c54fc26 CD	74
c906108c SS	75	case "${target}" in
	76	mipstx39) sim_gen=IGEN
	77	sim_igen_filter="32,f"
	78	sim_igen_machine="-M r3900"
	79	;;
	80	mips64vr43--*) sim_gen=IGEN
	81	sim_igen_machine="-M mipsIV"
4c54fc26	82	sim_mach_default="mips8000"
c906108c SS	83	;;
	84	mips64vr5--*) sim_gen=IGEN
	85	sim_igen_machine="-M vr5000"
4c54fc26	86	sim_mach_default="mips5000"
c906108c SS	87	;;
	88	mips64vr41*) sim_gen=M16
	89	sim_igen_machine="-M vr4100"
	90	sim_m16_machine="-M vr4100"
	91	sim_igen_filter="32,64,f"
	92	sim_m16_filter="16"
4c54fc26	93	sim_mach_default="mips4100"
c906108c	94	;;
4c54fc26 CD	95	mips64vr-- \| mips64vrel--)
	96	sim_gen=MULTI
	97	sim_multi_configs="\
	98	vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
	99	vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
	100	vr5000:mipsIV:32,64,f:mips4300,mips5000\
	101	vr5400:mipsIV,vr5400:32,64,f:mips5400\
	102	vr5500:mipsIV,vr5500:32,64,f:mips5500"
	103	sim_multi_default=mips5000
	104	;;
cc220243	105	mips-sde-elf \| mips-mti-elf)
8e394ffc AB	106	sim_gen=MULTI
	107	sim_multi_configs="\
	108	micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
06c441cc FS	109	mipsisa64r2:mips64r2,mips16,mips16e,mdmx,dsp,dsp2,mips3d,smartmips:32,64,f:mipsisa32r2,mipsisa64r2,mipsisa32r5,mipsisa64r5\
06c441cc FS	110	mipsisa64r6:mips64r6:32,64,f:mipsisa32r6,mipsisa64r6"
8e394ffc	111	sim_multi_default=mipsisa64r2
3669427c	112	;;
c906108c SS	113	mips64--*) sim_igen_filter="32,64,f"
	114	sim_gen=IGEN
	115	;;
	116	mips16--*) sim_gen=M16
	117	sim_igen_filter="32,64,f"
	118	sim_m16_filter="16"
	119	;;
8e394ffc AB	120	mipsisa32r2--*) sim_gen=MULTI
	121	sim_multi_configs="\
	122	micromips:micromips32,micromipsdsp:32,f:mips_micromips\
	123	mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
	124	sim_multi_default=mipsisa32r2
e70cb6cd	125	;;
06c441cc FS	126	mipsisa32r6--*) sim_gen=IGEN
	127	sim_igen_machine="-M mips32r6"
	128	sim_igen_filter="32,f"
	129	sim_mach_default="mipsisa32r6"
	130	;;
d5fb0879 RS	131	mipsisa32--*) sim_gen=M16
	132	sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
	133	sim_m16_machine="-M mips16,mips16e,mips32"
	134	sim_igen_filter="32,f"
	135	sim_mach_default="mipsisa32"
1e799e28	136	;;
d5fb0879 RS	137	mipsisa64r2--*) sim_gen=M16
	138	sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
	139	sim_m16_machine="-M mips16,mips16e,mips64r2"
	140	sim_igen_filter="32,64,f"
	141	sim_mach_default="mipsisa64r2"
e70cb6cd	142	;;
06c441cc FS	143	mipsisa64r6--*) sim_gen=IGEN
	144	sim_igen_machine="-M mips64r6"
	145	sim_igen_filter="32,64,f"
	146	sim_mach_default="mipsisa64r6"
	147	;;
7cbea089	148	mipsisa64sb1--*) sim_gen=IGEN
109ad085	149	sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089	150	sim_igen_filter="32,64,f"
4c54fc26	151	sim_mach_default="mips_sb1"
7cbea089	152	;;
d5fb0879 RS	153	mipsisa64--*) sim_gen=M16
	154	sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
	155	sim_m16_machine="-M mips16,mips16e,mips64"
	156	sim_igen_filter="32,64,f"
	157	sim_mach_default="mipsisa64"
1e799e28	158	;;
109ad085	159	mipslsi) sim_gen=M16
c906108c SS	160	sim_igen_machine="-M mipsIII,mips16"
	161	sim_m16_machine="-M mips16,mipsIII"
	162	sim_igen_filter="32,f"
	163	sim_m16_filter="16"
4c54fc26	164	sim_mach_default="mips4000"
109ad085	165	;;
c906108c SS	166	mips--*) sim_gen=IGEN
	167	sim_igen_filter="32,f"
	168	;;
	169	esac
4c54fc26 CD	170
	171	# The MULTI generator can combine several simulation engines into one.
	172	# executable. A configuration which uses the MULTI should set two
	173	# variables: ${sim_multi_configs} and ${sim_multi_default}.
	174	#
	175	# ${sim_multi_configs} is the list of engines to build. Each
	176	# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
	177	# where:
	178	#
	179	# - NAME is a C-compatible prefix for the engine,
	180	# - MACHINE is a -M argument,
	181	# - FILTER is a -F argument, and
	182	# - BFDMACHS is a comma-separated list of bfd machines that the
	183	# simulator can run.
	184	#
	185	# Each entry will have a separate simulation engine whose prefix is
	186	# m32<NAME>. If the machine list includes "mips16", there will also
	187	# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
	188	# generated using the same machine list as the 32-bit version,
	189	# but the filter will be "16" instead of FILTER.
	190	#
	191	# The simulator compares the bfd mach against BFDMACHS to decide
	192	# which engine to use. Entries in BFDMACHS should be bfd_mach
	193	# values with "bfd_mach_" removed. ${sim_multi_default} says
	194	# which entry should be the default.
	195	if test ${sim_gen} = MULTI; then
	196
	197	# Simple sanity check.
	198	if test -z "${sim_multi_configs}" \|\| test -z "${sim_multi_default}"; then
306f4178	199	AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
4c54fc26 CD	200	fi
	201
	202	# Start in a known state.
	203	rm -f multi-include.h multi-run.c
	204	sim_multi_flags=
	205	sim_multi_src=
8e394ffc	206	sim_multi_obj=
4c54fc26 CD	207	sim_multi_igen_configs=
	208	sim_seen_default=no
	209
	210	cat << __EOF__ > multi-run.c
	211	/* Main entry point for MULTI simulators.
4a94e368	212	Copyright (C) 2003-2022 Free Software Foundation, Inc.
4c54fc26 CD	213
	214	This program is free software; you can redistribute it and/or modify
	215	it under the terms of the GNU General Public License as published by
35ee6e1e	216	the Free Software Foundation; either version 3 of the License, or
4c54fc26 CD	217	(at your option) any later version.
	218
	219	This program is distributed in the hope that it will be useful,
	220	but WITHOUT ANY WARRANTY; without even the implied warranty of
	221	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	222	GNU General Public License for more details.
	223
	224	You should have received a copy of the GNU General Public License
35ee6e1e	225	along with this program. If not, see <http://www.gnu.org/licenses/>.
4c54fc26 CD	226
	227	--
	228
	229	This file was generated by sim/mips/configure. */
	230
	231	#include "sim-main.h"
	232	#include "multi-include.h"
8e394ffc	233	#include "elf-bfd.h"
06c441cc	234	#include "elfxx-mips.h"
8e394ffc	235	#include "elf/mips.h"
4c54fc26 CD	236
	237	#define SD sd
	238	#define CPU cpu
	239
	240	void
	241	sim_engine_run (SIM_DESC sd,
	242	int next_cpu_nr,
	243	int nr_cpus,
	244	int signal) /* ignore */
	245	{
	246	int mach;
	247
	248	if (STATE_ARCHITECTURE (sd) == NULL)
	249	mach = bfd_mach_${sim_multi_default};
1554f758	250	else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
8e394ffc AB	251	& EF_MIPS_ARCH_ASE_MICROMIPS)
8e394ffc AB	252	mach = bfd_mach_mips_micromips;
4c54fc26	253	else
06c441cc FS	254	{
	255	mach = _bfd_elf_mips_mach (elf_elfheader (STATE_PROG_BFD (sd))->e_flags);
	256	if (!mach)
	257	mach = STATE_ARCHITECTURE (SD)->mach;
	258	}
4c54fc26 CD	259
	260	switch (mach)
	261	{
	262	__EOF__
	263
	264	for fc in ${sim_multi_configs}; do
	265
	266	# Split up the entry. ${c} contains the first three elements.
	267	# Note: outer sqaure brackets are m4 quotes.
	268	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	269	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	270	name=`echo ${c} \| sed 's/:.*//'`
	271	machine=`echo ${c} \| sed 's/.:\(.\):.*/\1/'`
	272	filter=`echo ${c} \| sed 's/.*://'`
	273
	274	# Build the following lists:
	275	#
	276	# sim_multi_flags: all -M and -F flags used by the simulator
	277	# sim_multi_src: all makefile-generated source files
	278	# sim_multi_obj: the objects for ${sim_multi_src}
	279	# sim_multi_igen_configs: igen configuration strings.
	280	#
	281	# Each entry in ${sim_multi_igen_configs} is a prefix (m32
	282	# or m16) followed by the NAME, MACHINE and FILTER part of
	283	# the ${sim_multi_configs} entry.
	284	sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
	285
8e394ffc	286	# Check whether special handling is needed.
4c54fc26 CD	287	case ${c} in
	288	:mips16:)
	289	# Run igen twice, once for normal mode and once for mips16.
	290	ws="m32 m16"
	291
	292	# The top-level function for the mips16 simulator is
	293	# in a file m16${name}_run.c, generated by the
	294	# tmp-run-multi Makefile rule.
	295	sim_multi_src="${sim_multi_src} m16${name}_run.c"
	296	sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
	297	sim_multi_flags="${sim_multi_flags} -F 16"
	298	;;
8e394ffc AB	299	:micromips32:)
	300	# Run igen thrice, once for micromips32, once for micromips16,
	301	# and once for m32.
	302	ws="micromips_m32 micromips16 micromips32"
	303
	304	# The top-level function for the micromips simulator is
	305	# in a file micromips${name}_run.c, generated by the
	306	# tmp-run-multi Makefile rule.
	307	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	308	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	309	sim_multi_flags="${sim_multi_flags} -F 16,32"
	310	;;
	311	:micromips64:)
	312	# Run igen thrice, once for micromips64, once for micromips16,
	313	# and once for m64.
	314	ws="micromips_m64 micromips16 micromips64"
	315
	316	# The top-level function for the micromips simulator is
	317	# in a file micromips${name}_run.c, generated by the
	318	# tmp-run-multi Makefile rule.
	319	sim_multi_src="${sim_multi_src} micromips${name}_run.c"
	320	sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
	321	sim_multi_flags="${sim_multi_flags} -F 16,32,64"
	322	;;
4c54fc26 CD	323	*)
	324	ws=m32
	325	;;
	326	esac
	327
	328	# Now add the list of igen-generated files to ${sim_multi_src}
	329	# and ${sim_multi_obj}.
	330	for w in ${ws}; do
	331	for base in engine icache idecode model semantics support; do
	332	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
	333	sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
	334	sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
	335	done
	336	sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
	337	done
	338
	339	# Add an include for the engine.h file. This file declares the
	340	# top-level foo_engine_run() function.
	341	echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
	342
	343	# Add case statements for this engine to sim_engine_run().
	344	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
	345	echo " case bfd_mach_${mach}:" >> multi-run.c
	346	if test ${mach} = ${sim_multi_default}; then
	347	echo " default:" >> multi-run.c
	348	sim_seen_default=yes
	349	fi
	350	done
	351	echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
	352	>> multi-run.c
	353	echo " break;" >> multi-run.c
	354	done
	355
	356	# Check whether we added a 'default:' label.
	357	if test ${sim_seen_default} = no; then
306f4178	358	AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
4c54fc26 CD	359	fi
	360
	361	cat << __EOF__ >> multi-run.c
	362	}
	363	}
	364
	365	int
	366	mips_mach_multi (SIM_DESC sd)
	367	{
	368	if (STATE_ARCHITECTURE (sd) == NULL)
	369	return bfd_mach_${sim_multi_default};
	370
	371	switch (STATE_ARCHITECTURE (SD)->mach)
	372	{
	373	__EOF__
	374
	375	# Add case statements for this engine to mips_mach_multi().
	376	for fc in ${sim_multi_configs}; do
	377
	378	# Split up the entry. ${c} contains the first three elements.
	379	# Note: outer sqaure brackets are m4 quotes.
	380	c=`echo ${fc} \| sed ['s/:[^:]*$//']`
	381	bfdmachs=`echo ${fc} \| sed 's/.*://'`
	382
	383	for mach in `echo ${bfdmachs} \| sed 's/,/ /g'`; do
	384	echo " case bfd_mach_${mach}:" >> multi-run.c
	385	done
	386	done
	387
	388	cat << __EOF__ >> multi-run.c
	389	return (STATE_ARCHITECTURE (SD)->mach);
	390	default:
	391	return bfd_mach_${sim_multi_default};
	392	}
	393	}
	394	__EOF__
	395
	396	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
	397	else
	398	# For clean-extra
	399	sim_multi_src=doesnt-exist.c
	400
	401	if test x"${sim_mach_default}" = x""; then
306f4178	402	AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
4c54fc26 CD	403	fi
	404	SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
	405	fi
c906108c SS	406	sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
c906108c SS	407	sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
8e394ffc AB	408	sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}"
8e394ffc AB	409	sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}"
c906108c SS	410	AC_SUBST(sim_igen_flags)
c906108c SS	411	AC_SUBST(sim_m16_flags)
8e394ffc AB	412	AC_SUBST(sim_micromips_flags)
8e394ffc AB	413	AC_SUBST(sim_micromips16_flags)
c906108c	414	AC_SUBST(sim_gen)
4c54fc26 CD	415	AC_SUBST(sim_multi_flags)
	416	AC_SUBST(sim_multi_igen_configs)
	417	AC_SUBST(sim_multi_src)
	418	AC_SUBST(sim_multi_obj)
c906108c	419
c906108c	420	SIM_AC_OUTPUT