[thirdparty/binutils-gdb.git] / sim / mips / tconfig.in

/* mips target configuration file.  */

/* See sim-hload.c.  We properly handle LMA.  */
#ifdef TARGET_TX3904
#define SIM_HANDLES_LMA 1

/* FIXME: This is unnecessarily necessary: */
#include "ansidecl.h"
#include "callback.h"
#include "remote-sim.h"
#include "sim-module.h"

MODULE_INSTALL_FN dv_sockser_install;
#define MODULE_LIST dv_sockser_install,
#else
#define SIM_HANDLES_LMA 0
#endif

/* Define this if the simulator supports profiling.
   See the mips simulator for an example.
   This enables the `-p foo' and `-s bar' options.
   The target is required to provide sim_set_profile{,_size}.  */
#define SIM_HAVE_PROFILE

/* Define this if the simulator uses an instruction cache.
   See the h8/300 simulator for an example.
   This enables the `-c size' option to set the size of the cache.
   The target is required to provide sim_set_simcache_size.  */
/* #define SIM_HAVE_SIMCACHE */

/* Define this if the target cpu is bi-endian
   and the simulator supports it.  */
#define SIM_HAVE_BIENDIAN
Commit	Line	Data
c906108c SS	1	/* mips target configuration file. */
	2
	3	/* See sim-hload.c. We properly handle LMA. */
	4	#ifdef TARGET_TX3904
	5	#define SIM_HANDLES_LMA 1
	6
	7	/* FIXME: This is unnecessarily necessary: */
	8	#include "ansidecl.h"
	9	#include "callback.h"
	10	#include "remote-sim.h"
	11	#include "sim-module.h"
	12
	13	MODULE_INSTALL_FN dv_sockser_install;
	14	#define MODULE_LIST dv_sockser_install,
43e526b9 JM	15	#else
43e526b9 JM	16	#define SIM_HANDLES_LMA 0
c906108c SS	17	#endif
	18
	19	/* Define this if the simulator supports profiling.
	20	See the mips simulator for an example.
	21	This enables the `-p foo' and `-s bar' options.
	22	The target is required to provide sim_set_profile{,_size}. */
	23	#define SIM_HAVE_PROFILE
	24
	25	/* Define this if the simulator uses an instruction cache.
	26	See the h8/300 simulator for an example.
	27	This enables the `-c size' option to set the size of the cache.
	28	The target is required to provide sim_set_simcache_size. */
	29	/* #define SIM_HAVE_SIMCACHE */
	30
	31	/* Define this if the target cpu is bi-endian
	32	and the simulator supports it. */
	33	#define SIM_HAVE_BIENDIAN